JP2008026348A - Electro-optical device and electronic apparatus - Google Patents

Abstract

High-quality image display is performed while realizing high density and miniaturization of a liquid crystal device.
An electro-optical device includes a plurality of data lines (10) provided on a substrate (10) so as to intersect with each other in a pixel area including an effective area (10aa) and a dummy area (10ab) surrounding the effective area (10ab). 6a), a plurality of scanning lines (3a), a pixel electrode (9a) provided for each effective pixel corresponding to the intersection of the data line and the scanning line in the effective region, and a pixel electrode provided for each effective pixel. And a storage capacitor (70a) electrically connected to the electrode. The electro-optical device is provided for each dummy pixel corresponding to the intersection of the data line and the scanning line in at least a part of the dummy region, and further includes an additional capacitor (70b) electrically connected to the data line.
[Selection] Figure 7

Description

  The present invention relates to a technical field of an electro-optical device such as a liquid crystal device, and an electronic apparatus such as a liquid crystal projector including the electro-optical device.

  In this type of electro-optical device, pixel electrodes are arranged for each pixel in a pixel region on a substrate, and an image signal is supplied to the pixel electrodes via data lines when driven. As a method of supplying image signals to the pixel electrodes, for example, a method of sequentially supplying image signals to each of the data lines, or a number of data lines adjacent to each other by serial-parallel conversion of the image signals. A method of supplying image signals simultaneously for each group is adopted. The supply of such an image signal is performed via a sampling switch provided, for example, in a sampling circuit electrically connected to the data line.

  The electro-optical device driven in this way has a technical problem in that fluctuations in the image signal potential written to the data line occur, and vertical stripe-like display unevenness due to this fluctuation occurs. More specifically, in the case where the method of supplying image signals simultaneously for each of the groups exemplified above is adopted, among two adjacent groups in which image signals are sequentially supplied on the time axis, A data line that belongs to the first group to which the image signal is supplied relatively earlier and is adjacent to the second group to which the image signal is supplied relatively later, and a second group that is adjacent to the data line The following fluctuations in the image signal potential are likely to occur in the data lines belonging to. That is, the parasitic capacitance between the gate and the drain of each sampling switch corresponding to the two data lines also changes due to the parasitic capacitance or the like existing between the two adjacent data lines. As a result, the image signal potential of the data line on the drain side of each sampling switch is pushed down (i.e., the image signal potential is lower than the original image signal potential, or the next sampling, it is originally (Possible to sample only a low image signal potential) or push-up (that is, an image signal potential higher than the original image signal potential, or a higher image signal potential is sampled at the next sampling. A situation may occur.

  In Patent Document 1, as a means for solving such a technical problem, in a peripheral region located around the pixel region on the substrate, it is electrically connected to a part of a data line extending to the peripheral region. A technique for providing a capacitor is disclosed.

Japanese Patent Laid-Open No. 2004-125887

  On the other hand, such an electro-optical device has a general demand for higher density and smaller size of the device. According to the technique disclosed in Patent Document 1, the occurrence of display unevenness is reduced by providing a capacitor on the data line. However, by providing such a capacitor, it becomes difficult to narrow the peripheral region, and the device There is a technical problem that it is difficult to achieve higher density and smaller size.

  The present invention has been made in view of the above-described problems, for example, and an electro-optical device capable of displaying a high-quality image without vertical stripe-like display unevenness while realizing high density and downsizing of the device, and It is an object to provide an electronic apparatus including the electro-optical device.

  In order to solve the above problems, an electro-optical device according to the present invention includes a plurality of data lines and a plurality of data lines provided on a substrate so as to intersect with each other in a pixel area including an effective area and a dummy area surrounding the effective area in a frame shape. A scanning line, a pixel electrode provided for each effective pixel corresponding to the intersection of the data line and the scanning line in the effective region, and a pixel electrode provided for each effective pixel. A storage capacitor connected thereto; and an additional capacitor electrically connected to the data line in at least a part of the dummy region.

  According to the electro-optical device of the invention, the pixel region on the substrate includes an effective region that occupies the center of the pixel region and a dummy region that occupies the periphery of the pixel region. Each of the plurality of effective pixels constituting the effective region is provided with a pixel electrode, a switching element such as a thin film transistor for controlling switching of the pixel electrode, and a pixel portion having a storage capacitor (hereinafter referred to as “effective pixel portion” as appropriate). Yes. When the electro-optical device is driven, the effective pixel unit is selected based on, for example, a scanning signal supplied via the scanning line, and an image signal is supplied to the pixel electrode via the data line. Accordingly, for example, the alignment state of liquid crystal, which is an example of an electro-optical material, can be controlled for each effective pixel, and the effective area is, for example, an image display area for performing image display in the pixel area. In each effective pixel portion, the potential holding characteristic of the pixel electrode can be enhanced by the storage capacitor electrically connected to the data line in parallel with the pixel electrode.

  On the other hand, the dummy area in the pixel area on the substrate is arranged as an area that does not directly contribute to the image display as described above. In the dummy area, irregularities in the operating state that are likely to occur relatively near the periphery of the pixel area or at the edge or edge, such as uneven alignment of the electro-optic material at the edge of the pixel area, due to operational characteristics and manufacturing characteristics. It serves to separate the area from the effective area. In the electro-optical device according to the present invention, each of the plurality of dummy pixels constituting the dummy region is provided with a pixel portion that simulates an effective pixel portion (hereinafter referred to as “dummy pixel portion” as appropriate). In at least a part of the dummy region, the dummy pixel portion has an additional capacitor electrically connected to the data line. Therefore, it is possible to appropriately secure the capacity around the so-called data line. The term “capacity around the data line” as used herein means that, for one data line, in addition to the wiring capacity of the data line itself, between one data line and another component that at least partially overlaps on the substrate. The relative capacitance of one data line determined by the relationship with the parasitic capacitance (for example, the parasitic capacitance generated between another wiring partially overlapping the data line on the substrate). That is, in the electro-optical device according to the present invention, for each data line, an additional capacitor is provided in addition to the wiring capacitance of the data line, so that, for example, the gate of the sampling switch of the sampling circuit that supplies an image signal to the data line It is possible to suppress the influence of the parasitic capacitance between the drain and the image signal potential on the data line. Therefore, it is possible to suppress fluctuations in the potential that the data line should have, and to prevent the occurrence of display defects that are noticeable in the display image as display unevenness along the data line due to this, for example. it can. As a result, the electro-optical device of the present invention can perform high-quality image display.

  Further, in the electro-optical device according to the present invention, an additional capacitor is provided in a dummy region that is functionally a so-called dead space in the pixel region, whereby a new additional capacitor is provided in the peripheral region already described in Patent Document 1. In comparison, even if the peripheral region on the substrate is narrowed and narrowed, a greater degree of design freedom is secured in the peripheral region for the arrangement of the peripheral circuit portion for driving the data lines and scanning lines. It becomes possible.

  Furthermore, in the electro-optical device of the present invention, it is preferable that the dummy region is provided with a storage capacitor in the effective region and an additional capacitor formed at the same opportunity in the manufacturing process of the electro-optical device. Further, between the dummy pixel portion and the effective pixel portion, other configurations except for the configuration related to the installation of the additional capacitor may be the same. With this configuration, by increasing the original function of the dummy pixel, the pixel portion that is located closer to the periphery and thus becomes unstable and difficult to perform normal image display is formed as a dummy pixel portion. In addition, since the pixel is located closer to the center, a pixel portion that is stable and can easily perform normal image display can be formed as an effective pixel portion. In addition, the storage capacity is created in the effective region without significantly changing the design of the dummy pixel portion with respect to the configuration of the effective pixel portion, that is, while making the stacked structure and manufacturing process on the substrate the same or similar. Thus, it is possible to build an additional capacity in the dummy area. In this case, compared with the configuration of Patent Document 1 described above, in order to provide an additional capacity, a new relay wiring is provided for electrical connection with the data line, and accordingly, a new wiring is provided. There is no need to make major design changes that require opening contact holes.

  Therefore, in the electro-optical device of the present invention, it is possible to prevent the manufacturing process from being complicated and the manufacturing cost from being increased, and the electro-optical device can be more easily densified and miniaturized.

  In one aspect of the electro-optical device according to the present invention, the additional capacitor is provided for each dummy pixel corresponding to the intersection of the data line and the scanning line, and the lower electrode and the dielectric film are provided on the substrate. And a dummy capacitor having the same stacked structure as the storage capacitor, in which the upper electrode is stacked in order from the lower layer side.

  According to this aspect, the additional capacitor is a dummy capacitor that simulates the storage capacitor and has the same stacked structure as the storage capacitor in the effective pixel portion. Here, “the same stacked structure” means that the stacking order of each layer of the additional capacitor and the storage capacitor is the same. That is, the additional capacitor is sandwiched between one electrode formed from the same film as the lower electrode of the storage capacitor, another electrode formed from the same film as the upper electrode of the storage capacitor, and the pair of electrodes. And a dielectric film. Here, “formed from the same film” means forming a precursor film common to the additional capacitor and the storage capacitor, and performing a patterning process on the same, for example, under one electrode of the additional capacitor and the storage capacitor. This means that the side electrode is formed according to each location and has a unique pattern shape. In other words, the additional capacity and the storage capacity are formed at the same opportunity in the manufacturing process stage. Since the additional capacity and the storage capacity are manufactured on the same occasion as described above, it is possible to realize a simplification of the manufacturing process or a reduction in manufacturing cost as compared with the case where these are manufactured separately. it can.

  In the aspect related to the dummy capacitor, the dummy capacitor may be short-circuited with the data path in the same stacked structure.

  With this configuration, the storage capacitor and the dummy capacitor are manufactured in the same or almost the same configuration, or almost the same or almost the same manufacturing process, and the dummy capacitor has a relatively simple configuration and manufacturing process of short-circuiting. By adopting, it becomes possible to construct as an additional capacity of the data line.

  In the aspect related to the short circuit in the dummy capacitor, the dummy capacitor is provided for each effective pixel, and one of the source electrode and the drain electrode is connected to the data line and the other is connected to the pixel electrode. The dummy capacitor may further be short-circuited with electrode portions corresponding to the source electrode and the drain electrode in the same stacked structure.

  If comprised in this way, among the processes which manufacture the thin-film transistor which functions as a switching element in an effective region, for example, it responds to these electrodes, utilizing the same process as the process of positively forming the source electrode and the drain electrode at least. By adopting a relatively simple configuration and manufacturing process of short-circuiting the electrode portion, a dummy capacitor can be constructed as an additional capacitor for the data line. That is, compared to the manufacturing process of the storage capacitor in the effective area, the dummy capacitor can be constructed as the additional capacitor of the data line without requiring an additional process.

  In this aspect of the dummy capacitor, the dummy capacitor may have an area different from that of the storage capacitor when viewed in plan on the substrate.

  With this configuration, the capacitance value proportional to the area related to the dummy capacitor can be set to a desired value by increasing or decreasing the area compared to the storage capacitor that is the simulation target of the dummy capacitor. In particular, if the dummy capacitance is increased, only a part of the dummy pixel can be used to achieve a required capacitance value as a dummy capacitance that is an additional capacitance of the data line. As a result, some dummy pixel portions in the dummy area also have a function as an additional capacity of the data line, and other dummy pixel portions in the dummy area have the original function of the dummy pixel exclusively. Is also possible. Therefore, the dummy pixel portion can be formed with the same structure as the effective pixel portion except that the dummy storage capacitor functions as an additional capacitor and the arrangement area is different from the storage capacitor. In other words, it is possible to provide an additional capacitor without significantly changing the design of the dummy pixel portion with respect to the configuration of the effective pixel portion.

  Further, in this case, the storage capacitor is formed so as not to enter the opening region of each pixel in which the pixel electrode is formed in plan view on the substrate, and the dummy capacitor is formed on the substrate. It may be configured so as to be within the region of each dummy pixel corresponding to the opening region of each pixel as viewed in plan above, and to have the area larger than the storage capacitor.

  According to this configuration, in the region corresponding to the opening region in the dummy region, the presence of the dummy capacitor prevents the transmission or reflection of light contributing to display from being performed. However, since at least a directly visible image is displayed in the dummy area, even if such a dummy capacitance creation area is formed so as to fall within the area corresponding to the opening area, there is no problem in display. Little or no. On the other hand, a certain dummy region can be formed by forming it within a region corresponding to the opening region of each pixel, for example, in a region corresponding to the region where the pixel electrode is formed or in a region overlapping the dummy electrode. It is possible to achieve a high capacity value by using it. In this way, a desired capacitance value can be obtained without degrading display quality and without expanding the area on the substrate for creating additional capacitance, which is very effective in practice. The “opening region” or “opening region of each pixel” according to the present invention means a region where display light in each pixel portion can be emitted by transmission or reflection.

  In one aspect of the electro-optical device according to the invention, the at least part of the plurality of dummy pixels further includes a dummy electrode that simulates the pixel electrode.

  According to this aspect, since the dummy pixel portion has the dummy electrode in the same manner as the effective pixel portion has the pixel electrode, the effective pixel portion can be simulated more accurately, and the original function of the dummy region is enhanced. It is done.

  That is, when the electro-optical device is driven, the emission of display light is hindered by the presence of the storage capacitor, but the dummy pixel portion can be driven by the same operation as the effective pixel portion. As a result, in the dummy area, for example, the alignment state of the liquid crystal, which is an example of the electro-optical device, is controlled with the same performance as that of the effective pixel portion, so that stable and good image display can be performed in the effective area. At this time, the prevention of display light emission does not reduce the function of the dummy pixel. Therefore, the reliability of the electro-optical device can be improved. However, the pixel electrode may not be provided in the dummy pixel which does not need to perform image display completely equivalent to the effective pixel.

  In another aspect of the electro-optical device according to the invention, the additional capacitor is disposed on the upper layer side of the data line, and the lower electrode and the upper electrode are stacked on the substrate in order from the lower layer side. The lower electrode is electrically connected to the data line through a contact hole opened through an interlayer insulating film that insulates the additional capacitor and the data line.

  According to this aspect, in order to provide an additional capacity, a relay wiring is newly provided for electrical connection with the data line, or a drastic design change that requires opening a new contact hole accordingly. There is no need to do this. Therefore, the resistance related to the electrical connection between the additional capacitor and the data line is prevented from increasing in the presence of the relay wiring or in the new contact hole opened due to the electrical connection with the relay wiring. In addition, it is possible to prevent problems such as a complicated manufacturing process in the electro-optical device manufacturing process and an increase in manufacturing cost.

  In another aspect of the electro-optical device according to the aspect of the invention, the additional capacitor has a stacked structure in which a lower electrode and an upper electrode each formed of a metal film are sequentially stacked from the lower layer side on the substrate.

  According to this aspect, the additional capacitor has a MIM (Metal Insulator Metal) structure. Therefore, the dielectric film constituting the additional capacitor can be formed from a dielectric material having a high dielectric constant (that is, a High-K material). Therefore, the additional capacitor can be formed in a relatively small area so as to have a capacitance value sufficient to suppress fluctuations in the image signal potential of the data line. The “metal film” means a single-layer conductive film formed including a relatively low-resistance conductive material such as aluminum, or a multilayer film formed including such a conductive film.

  In another aspect of the electro-optical device according to the aspect of the invention, the additional capacitor has a stacked structure in which a lower electrode and an upper electrode are sequentially stacked from the lower layer side on the substrate, and the lower electrode and the upper electrode One of the electrodes has a predetermined potential.

  According to this aspect, the additional capacity can be suitably functioned. That is, it is possible to accumulate an appropriate amount of charge according to the potential difference between the potential corresponding to the image signal supplied to the data line and the predetermined potential by the additional capacitor. The “predetermined potential” according to the present invention means a predetermined potential regardless of a change in image signal potential or image data, for example, a fixed potential that is completely fixed at a constant potential with respect to the time axis. Alternatively, it may be a fixed potential that is fixed at a constant potential for a certain period with respect to the time axis (for example, an inverted potential that is inverted with respect to a reference potential every certain period).

  In order to solve the above problems, an electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention (including various aspects thereof).

  According to the electronic apparatus of the present invention, since the electro-optical device according to the present invention described above is provided, a projection display device and a television set capable of performing high-quality image display while increasing the density and reducing the size. Various electronic devices such as mobile phones, electronic notebooks, word processors, viewfinder type or monitor direct-view type video tape recorders, workstations, videophones, POS terminals, and touch panels can be realized. In addition, as an electronic apparatus of the present invention, for example, an electrophoretic device such as electronic paper, an electron emission device (Field Emission Display and Conduction Electron-Emitter Display), and a display device using these electrophoretic device and electron emission device are realized. Is also possible.

  The operation and other advantages of the present invention will become apparent from the best mode for carrying out the invention described below.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, a driving circuit built-in type TFT active matrix driving type liquid crystal device, which is an example of the electro-optical device of the present invention, is taken as an example.

<Overall configuration of liquid crystal device>
First, the overall configuration of the liquid crystal device according to the present embodiment will be described with reference to FIGS. 1 and 2. Here, FIG. 1 is a schematic plan view of the liquid crystal device as seen from the side of the counter substrate together with the components formed on the TFT array substrate, and FIG. 'Cross section.

  1 and 2, the liquid crystal device is composed of a TFT array substrate 10 and a counter substrate 20 which are arranged to face each other. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20, and the TFT array substrate 10 and the counter substrate 20 are provided with a sealing material 52 provided in a seal region located around the pixel region 10a. Are bonded to each other.

  The sealing material 52 is made of, for example, an ultraviolet curable resin, a thermosetting resin, or the like for bonding the two substrates, and is applied on the TFT array substrate 10 in the manufacturing process and then cured by ultraviolet irradiation, heating, or the like. It is. Further, for example, in the sealing material 52, a gap material 56 such as a glass fiber or a glass bead for dispersing the distance (inter-substrate gap) between the TFT array substrate 10 and the counter substrate 20 to a predetermined value is dispersed.

  A light-shielding frame light-shielding film 53 that defines the frame area of the image display region 10aa is provided on the counter substrate 20 side in parallel with the inside of the seal region where the sealing material 52 is disposed. However, part or all of the frame light shielding film 53 may be provided as a built-in light shielding film on the TFT array substrate 10 side. In the present embodiment, the frame region defined by the frame light-shielding film 53 is at least a frame-shaped region along the edge of the pixel region 10a, for example, with respect to the pixel region 10a when viewed in plan on the TFT array substrate 10. It arrange | positions so that it may overlap with a one part area | region. An area defined by the frame area in the pixel area 10a is an effective area where the image is displayed, that is, the image display area 10aa. Note that an area overlapping the frame area in the pixel area 10a is configured as a dummy area.

  In the peripheral region located on the periphery of the pixel region 10 a on the TFT array substrate 10, a peripheral circuit portion is formed including the data line driving circuit 101, the sampling circuit 7, the scanning line driving circuit 104, and the external circuit connection terminal 102. Is done.

  In the peripheral region on the TFT array substrate 10, the data line driving circuit 101 and the external circuit connection terminal 102 are provided along one side of the TFT array substrate 10 on the outer peripheral side from the seal region. In addition, a region located on the inner side of the seal region in the peripheral region on the TFT array substrate 10 is covered with the frame light shielding film 53 along one side of the image display region 10aa along one side of the TFT array substrate 10. Thus, the sampling circuit 7 is arranged.

  The scanning line driving circuit 104 is provided along two sides adjacent to one side of the TFT array substrate 10 so as to be covered with the frame light shielding film 53. Further, in order to electrically connect the two scanning line driving circuits 104 provided on both sides of the image display area 10aa in this way, the TFT light shielding film 53 is covered along the remaining side of the TFT array substrate 10. A plurality of wirings 105 are provided.

  In the peripheral region on the TFT array substrate 10, vertical conduction terminals 106 are disposed in regions facing the four corners of the counter substrate 20, and vertical conduction is provided between the TFT array substrate 10 and the counter substrate 20. A material is provided corresponding to the vertical conduction terminal 106 and electrically connected to the terminal 106.

  In FIG. 2, on a TFT array substrate 10, a pixel electrode 9a is formed on a TFT (Thin Film Transistor) serving as a pixel switching element, a wiring such as a scanning line, a data line, and an alignment film 16 is formed thereon. ing. In the present embodiment, the pixel switching element may be constituted by various transistors, TFD, or the like in addition to the TFT.

  On the other hand, a lattice-shaped or striped light-shielding film 23 is formed in the image display region 10aa on the counter substrate 20, and a liquid crystal layer 50 is interposed on the light-shielding film 23 (below the light-shielding film 23 in FIG. 2). Thus, a counter electrode 21 facing the plurality of pixel electrodes 9a is formed, and an alignment film 22 is further formed.

  The liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several types of nematic liquid crystals are mixed, and takes a predetermined alignment state between the pair of alignment films. A liquid crystal storage capacitor is formed between the pixel electrode 9 a and the counter electrode 21 by applying a voltage to each of the liquid crystal devices during driving.

  Although not shown here, in addition to the data line driving circuit 101 and the scanning line driving circuit 104, the TFT array substrate 10 is used for inspecting the quality, defects, and the like of the liquid crystal device during manufacturing or at the time of shipment. An inspection circuit or the like may be formed.

  Next, an electrical configuration of the liquid crystal device will be described with reference to FIG. FIG. 3 is a block diagram schematically showing the configuration of the pixel region and the peripheral circuit unit.

  In FIG. 3, the liquid crystal device is provided with the scanning line driving circuit 104, the data line driving circuit 101, and the sampling circuit 7, which constitute the peripheral circuit section as already described.

  For example, a Y clock signal CLY, an inverted Y clock signal CLYinv, and a Y start pulse DY are supplied to the scanning line driving circuit 104 from an external circuit not shown in FIG. When the Y start pulse DY is input, the scanning line driving circuit 104 sequentially generates and outputs the scanning signals G1,..., Gm at a timing based on the Y clock signal CLY and the inverted Y clock signal CLYinv.

  In the present embodiment, the data line driving circuit 101 is supplied with an X clock signal CLX, an inverted X clock signal CLXinv, and an X start pulse DX from an external circuit, for example, via an external circuit connection terminal 102. When the X start pulse DX is input, the data line driving circuit 101 receives sampling circuit driving signals S1, S2, S3,..., Sn− at timing based on the X clock signal CLX and the inverted X clock signal XCLXinv. 1 and Sn are sequentially generated and output.

  The sampling circuit 7 includes a plurality of sampling switches 71 formed of P-channel or N-channel single-channel TFTs or complementary TFTs. For example, the image signal VID supplied from the external circuit to the external circuit connection terminal 102 is supplied to the sampling circuit 7 through the image signal line 6. In the present embodiment, a case where the number of the image signal lines 6 is one and each of the sampling switches 71 is supplied with the image signal VID from the image signal lines 6 will be described. Phase expansion). For example, when image signals are serial-parallel developed into six phases of image signals VID1 to VID6, these image signals are input to the sampling circuit 7 via six image signal lines. When parallel image signals obtained by converting serial image signals are simultaneously supplied to a plurality of image signal lines, image signals can be input to the data lines 6a for each group, and the drive frequency can be suppressed.

  In the sampling circuit 7, each sampling switch 71 receives an image on each data line 6a in accordance with the sampling circuit drive signals S1, S2, S3,..., Sn-1, Sn output from the data line drive circuit 101. The signal VID is configured to be supplied.

  The liquid crystal device includes data lines 6 a and scanning lines 3 a that are wired vertically and horizontally in a pixel region 10 a that occupies the center of the TFT array substrate 10. As described with reference to FIGS. 1 and 2, the pixel area 10a on the TFT array substrate 10 includes an image display area 10aa and a dummy area 10ab which are effective areas. In the image display area 10aa on the TFT array substrate 10, effective pixel portions 90a are arranged in a matrix corresponding to the intersections of the data lines 6a and the scanning lines 3a. Each effective pixel portion 90a includes a pixel electrode 9a and a pixel electrode 9a. TFT 30a for further switching control, and further a storage capacitor 70a. On the other hand, dummy pixel portions 90b are arranged in the dummy area 10ab corresponding to the intersections of the data lines 6a and the scanning lines 3a. In the present embodiment, preferably, the effective pixel portion 90a and the dummy pixel portion 90b have substantially the same structure except for a characteristic configuration described later, that is, a configuration in which the dummy storage capacitor 70b functions as an additional capacitor. In this case, the dummy pixel portion 90b is substantially the same as the pixel electrode 9a, the TFT 30a, and the storage capacitor 70a in the effective pixel portion 90a except for the above-described differences, and the dummy pixel portion 9b, the dummy pixel portion TFT 30b, and the dummy pixel portion 90b. A storage capacitor 70b is provided. In FIG. 3 and the explanations of FIG. 3 and subsequent figures that will be described later, regarding the dummy pixel portion 90b, the same components as those of the effective pixel portion 90a are denoted by the same reference numerals in FIG. In particular, only the differences will be described in detail.

  If attention is paid to the configuration of the effective pixel portion 90a in FIG. 3, the data line 6a is electrically connected to the source electrode of the TFT 30a, while the scanning line 3a is electrically connected to the gate electrode of the TFT 30a. The pixel electrode 9a is connected to the drain electrode of the TFT 30a. In the effective pixel portion 90a, the liquid crystal is sandwiched between the pixel electrode 9a and the counter electrode 21 to form a liquid crystal storage capacitor. In addition, a storage capacitor 70a is added in parallel with the pixel electrode 9a in order to prevent leakage of an image signal written to the pixel electrode 9a. One electrode of the storage capacitor 70a is electrically connected to the drain of the TFT 30a in parallel with the pixel electrode 9a, and the other electrode is electrically connected to the capacitor wiring 300 having a fixed potential so as to be at a constant potential Vf. Has been.

  On the other hand, in the dummy pixel portion 90b, the source electrode and the drain electrode of the dummy pixel portion TFT 30b are short-circuited. As a result, a part of the electrical path between the dummy storage capacitor 70b and the data line 6a is short-circuited, and the dummy storage capacitor 70b is electrically connected to the data line 6a and formed as an “additional capacitor” according to the present invention. Is done.

  Each scanning line 3a is selected line-sequentially by the scanning signals G1,..., Gm output from the scanning line driving circuit 104. In the present embodiment, as an example, as shown in FIG. 3, for one data line 6a in the pixel region 10a, the dummy pixel portion 90b is a dummy region located at the upper side in the drawing along the extending direction of the data line 6a. Four pixels are provided in each of 10ab and the dummy area 10ab positioned below the image display area 10aa. In FIG. 3, scanning signals G1 to G4 are provided for the dummy pixel portion 90b in the upper dummy region 10ab, and scanning signals Gm-3 to Gm are provided for the dummy pixel portion 90b in the lower dummy region 10ab. Each is supplied via the scanning line 3a. Therefore, in the image display area 10aa sandwiched between these two dummy areas 10ab, each scanning line 3a is selected by the scanning signals G5 to Gm-4.

  In the effective pixel portion 90a corresponding to the scanning line 3a selected in the image display area 10aa, when the scanning signals G5 to Gm-4 are supplied to the TFT 30a, the TFT 30a is turned on, and the effective pixel portion 90a is in the selected state. Become. In the effective pixel portion 90a, the pixel electrode 9a is supplied with the image signal VID from the data line 6a at a predetermined timing by closing the TFT 30a for a certain period. As a result, an applied voltage defined by the potentials of the pixel electrode 9a and the counter electrode 21 is applied to the liquid crystal.

  The liquid crystal modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The light transmittance is increased, and light having a contrast corresponding to the image signal VID is emitted from the liquid crystal device as a whole.

  On the other hand, in the dummy region 10ab, the dummy pixel portion TFT 30b is configured such that the source electrode and the drain electrode are short-circuited as described above and does not function as a pixel switching element. One electrode electrically connected to the drain of the dummy pixel portion TFT 30b of the dummy storage capacitor 70b is set to the same potential as the potential of the image signal VID in the data line 6a, and the other electrode is connected to the capacitor wiring 300. Electrically connected to a constant potential Vf, a charge amount corresponding to the potential difference between the pair of electrodes is stored in the dummy storage capacitor 70b. Thereby, the dummy storage capacitor 70b can function as an “additional capacitor” according to the present invention in a reinforcing manner with respect to the wiring capacity of the data line 6a.

  Therefore, in the present embodiment, the dummy pixel portion TFT 30b can function the dummy storage capacitor 70b as an additional capacitor only by short-circuiting the source electrode and the drain electrode as described above. The dummy pixel portion 90b can be formed with substantially the same configuration as that of the effective pixel portion 90a without making a significant design change. In addition, since the dummy pixel unit 90b has the same configuration as the effective pixel unit 90a in this way, the dummy storage capacitor 70b can function as an additional capacitor with the same performance as the storage capacitor 70a in the effective pixel unit 90a. Is possible.

  In the present embodiment, as shown in FIG. 3, the dummy storage capacitor 70b is not limited to function as an additional capacitor in all of the dummy pixel portions 90b in the dummy region 10ab. The pixel portion 90b is formed in the same structure as the effective pixel portion 90a so that it can be driven by the same operation, for example, and the other dummy pixel portion 90b is formed so that the dummy storage capacitor 70b functions as an additional capacitor. Also good.

  In this case, for example, when displaying an image in the liquid crystal device, some of the dummy pixel portions 90b are driven by the same operation as that of the effective pixel portion 90a, and the scanning signals G1 to G4 or Gm-3 to Gm are used for the dummy pixel portion. When supplied to the TFT 30b, the image signal VID is supplied from the data line 6a to the dummy pixel electrode 9b via the dummy pixel portion TFT 30b. For example, the dummy pixel portion 90b is supplied with an image signal VID having a potential capable of emitting transmitted light corresponding to black, and a black solid display is performed, and the edge of the display image in the image display area 10aa is blackened. It is done.

  Therefore, with this configuration, a pixel portion that is disposed near the edge of the pixel region 10a in the liquid crystal device and whose operation is unstable and it is difficult to perform normal image display functions as the dummy pixel portion 90b. The orientation state can be controlled with the same performance as that of the effective pixel portion 90a, and stable and good image display can be performed in the image display area 10aa. Therefore, the reliability of the liquid crystal device can be improved. Further, even if the dummy pixel portion 90b is made to function in this way, by forming it with the same structure as the effective pixel portion 90a, the manufacturing process of the liquid crystal device is complicated, thereby preventing problems such as an increase in manufacturing cost. can do.

<Configuration of pixel portion>
Next, the configuration of the effective pixel portion 90a and the dummy pixel portion 90b in the present embodiment will be described with reference to FIGS.

  First, the configuration of the effective pixel portion 90a will be described with reference to FIGS. FIG. 4 is a plan view schematically showing an example of the configuration of the effective pixel portion in the liquid crystal device according to the present embodiment, and FIG. 5 is a cross-sectional view taken along the line AA ′ of FIG. .

  As described with reference to FIG. 3, a plurality of pixel electrodes 9a are provided in a matrix in the image display region 10aa on the TFT array substrate 10. In FIG. 4, the vertical and horizontal boundaries (dotted line portions) of the pixel electrodes 9a are provided. A data line 6a and a scanning line 3a are provided along the outline of the pixel electrode 9a). The data line 6a is made of, for example, a metal film such as an aluminum film or an alloy film, and the scanning line 3a is made of, for example, a conductive polysilicon film.

  4 or 5, the scanning line 3a is disposed so as to face the channel region 1a 'indicated by the hatched region rising to the right in FIG. 4 in the semiconductor layer 1a, and the scanning line 3a serves as a gate electrode. Function. That is, each of the intersections of the scanning line 3a and the data line 6a is provided with a pixel switching TFT 30a in which the main line portion of the scanning line 3a is opposed to the channel region 1a ′ as a gate electrode.

  In FIG. 5, the data line 6 a is formed on the TFT array substrate 10 with the first interlayer insulating film 41 as a base and on a lower layer side than the storage capacitor 70 a, and a high concentration source of the TFT 30 a through the contact hole 81. It is electrically connected to the region 1d. The data line 6a is, for example, a Ti (titanium) layer, a TiN (titanium nitride) layer, an Al (aluminum) layer, and a TiN layer with thicknesses of 100 nm, 500 nm, 3500 nm, and 1500 nm sequentially from the upper layer side to the lower layer side. Each is formed as a laminated multilayer film. Further, as shown in FIG. 4 or FIG. 5, in the data line 6a, a position corresponding to a contact hole 83 for electrically connecting the lower capacitor electrode 71 of the storage capacitor 70a and the high concentration drain region 1e of the TFT 30a. The opening 6ah is disposed. That is, the contact hole 83 is located in the opening 6ah in the data line 6a as viewed in plan on the TFT array substrate 10 as well shown in FIG. And 42 are opened so as to expose the surface of the high-concentration drain region 1e of the TFT 30a.

  4 or 5, the storage capacitor 70a is connected to the high-concentration drain region 1e of the TFT 30 and the pixel electrode 9a, and a lower capacitor electrode 71 as a pixel potential side capacitor electrode which is a lower electrode of the storage capacitor 70a; A part of the upper capacitor electrode 300 as a fixed potential side capacitor electrode, which is the upper electrode of the storage capacitor 70, is formed so as to face the dielectric film 75. In this embodiment, as will be described below, the storage capacitor 70a has an MIM structure.

  As already described with reference to FIG. 3, the upper capacitor electrode 300 extends on the TFT array substrate 10 from the pixel region 10a to the periphery thereof, and is electrically connected to a constant potential source. It is said. The constant potential source may be a positive power source or a negative power source supplied to the scanning line driving circuit 104 or the data line driving circuit 101, or may be a constant potential supplied to the counter electrode 21 of the counter substrate 20. Absent. The upper capacitor electrode 300 has a multilayer structure in which, for example, a TiN layer, an Al layer, and a TiN layer are sequentially stacked in a thickness of 500 nm, 3500 nm, and 500 nm from the lower layer side on the TFT array substrate 10. The lower capacitor electrode 71 also has a multilayer structure in which, for example, a conductive film having the same thickness as the upper capacitor electrode 300, that is, a TiN layer, an Al layer, and a TiN layer are sequentially stacked from the lower layer side. The lower capacitor electrode 71 has a function of relaying and connecting the pixel electrode 9a and the high-concentration drain region 1e of the TFT 30a in addition to a function as a pixel potential side capacitor electrode. In addition, the dielectric film 75 disposed between the lower capacitor electrode 71 and the upper capacitor electrode 300 is, for example, a silicon oxide film such as an HTO (High Temperature Oxide) film, an LTO (Low Temperature Oxide) film, or silicon nitride. It is composed of a film or the like.

  On the other hand, in FIG. 5, on the TFT array substrate 10, below the TFT 30a, a lower light-shielding film 11a is provided in a lattice shape with a film thickness of, for example, 2000 nm via a base insulating layer 12. The base insulating layer 12 is formed on the entire surface of the TFT array substrate 10 and insulates the TFT 30a from the lower light shielding film 11a.

  The pixel electrode 9a is located in the uppermost layer on the third interlayer insulating film 43, and is electrically connected to the high concentration drain region 1e in the semiconductor layer 1a via the contact holes 83 and 85 by relaying the lower capacitor electrode 71. It is connected to the.

  As shown in FIGS. 4 and 5, the liquid crystal device includes a transparent TFT array substrate 10 and a transparent counter substrate 20 disposed to face the TFT array substrate 10. The TFT array substrate 10 is made of, for example, a quartz substrate, a glass substrate, or a silicon substrate, and the counter substrate 20 is made of, for example, a glass substrate or a quartz substrate.

  A pixel electrode 9a is provided on the TFT array substrate 10, and an alignment film 16 that has been subjected to a predetermined alignment process such as a rubbing process is provided above the pixel electrode 9a. The pixel electrode 9a is made of a transparent conductive film such as an ITO (Indium Tin Oxide) film. The alignment film 16 is made of an organic film such as a polyimide film.

  On the other hand, a counter electrode 21 is provided over the entire surface of the counter substrate 20, and an alignment film 22 subjected to a predetermined alignment process such as a rubbing process is provided below the counter electrode 21. The counter electrode 21 is made of a transparent conductive film such as an ITO film. The alignment film 22 is made of an organic film such as a polyimide film. Further, in the image display area 10aa on the counter substrate 20 (below the counter substrate 20 in FIG. 5), a light shielding film 23 having a lattice shape or a stripe shape is provided.

  A liquid crystal layer 50 is formed between the TFT array substrate 10 and the counter substrate 20 that are configured as described above and are arranged so that the pixel electrode 9a and the counter electrode 21 face each other. The liquid crystal layer 50 takes a predetermined alignment state by the alignment films 16 and 22 in a state where an electric field from the pixel electrode 9a is not applied.

  In FIG. 5, the pixel switching TFT 30a has an LDD (Lightly Doped Drain) structure. The scanning line 3a, the channel region 1a ′ of the semiconductor layer 1a in which the channel is formed by the electric field from the scanning line 3a, the scanning A gate insulating film 2 for insulating the line 3a from the semiconductor layer 1a, a low concentration source region 1b and a low concentration drain region 1c of the semiconductor layer 1a, a high concentration source region 1d and a high concentration drain region 1e of the semiconductor layer 1a are provided. . The semiconductor layer 1a is formed with a film thickness of, for example, 550 nm.

  On the scanning line 3a, a first interlayer insulating film 41 is formed in which a contact hole 81 leading to the high concentration source region 1d and a contact hole 83 leading to the high concentration drain region 1e are respectively opened.

  A data line 6a is formed on the first interlayer insulating film 41, and a second interlayer insulating film 42 having a contact hole 83 formed thereon is formed thereon. Further, the third interlayer insulating film 43 in which the contact hole 85 is formed so as to cover the entire surface of the second interlayer insulating film 42 from above the upper capacitor electrode 300 of the storage capacitor 70a disposed on the second interlayer insulating film 42. Is formed.

  Next, the configuration of the dummy pixel unit 90b will be described with reference to FIGS. FIG. 6 is a plan view schematically showing an example of the configuration of the dummy pixel portion in the liquid crystal device according to the present embodiment, and FIG. 7 is a cross-sectional view taken along the line BB ′ of FIG. .

  As already described, the dummy pixel portion 90b is formed with substantially the same structure as the effective pixel portion 90a except that the dummy storage capacitor 70b functions as an additional capacitor. The dummy pixel electrode 9b is provided in the dummy region 10ab on the TFT array substrate 10 corresponding to the intersection of the data line 6a and the scanning line 3a. In FIG. 6, the outline of the dummy pixel electrode 9b is indicated by a dotted line portion 9b ′.

  In FIG. 7, in the pixel region 10 a on the TFT array substrate 10, the dummy region 10 ab is arranged so as to overlap with the frame region when seen in a plan view, and is a dummy that constitutes the dummy pixel portion 90 b on the TFT array substrate 10. The pixel electrode 9b and the like are disposed under the frame light shielding film 53 formed on the counter substrate 20 side in FIG. Thus, the dummy area 10ab is arranged as an area that does not contribute to the function of the image display area 10aa, that is, the image display.

  In FIG. 7, in the dummy pixel portion 90b, the data line 6a on the TFT array substrate 10 is not formed with the opening portion 6ah as shown in FIG. 4 or 5, but is opened through the first interlayer insulating film 41. It is electrically connected to the high-concentration drain region 1e of the dummy pixel portion TFT 30b via the perforated contact hole 84. As described above, a part of the data line 6a is electrically connected to the high-concentration source region 1d and the high-concentration drain region 1e of the dummy pixel portion TFT 30b through the contact holes 81 and 84. The source electrode and the drain electrode of the part TFT 30b are short-circuited.

  The dummy storage capacitor 70b is disposed in the same layer as the storage capacitor 70a in the effective pixel portion 90a and has the same stacked structure. As a result, the dummy storage capacitor 70b is disposed on the second interlayer insulating film 42 in the same manner as the storage capacitor 70a, and in order from the lower layer side, the lower capacitor electrode 71 as the pixel potential side capacitor electrode, the dielectric film 75, and It has an MIM structure in which an upper capacitor electrode 300 as a fixed potential side capacitor electrode is stacked. The lower capacitor electrode 71 of the dummy storage capacitor 70b is electrically connected to the data line 6a through a contact hole 83 that is opened through the second interlayer insulating film.

  Therefore, the dummy storage capacitor 70b is added as an additional capacitor, and a part of the electrical path is short-circuited without a significant design change that requires a new relay wiring or a new contact hole. Thus, it is possible to easily form a configuration that is electrically connected to the data line 6a. Therefore, the resistance related to the electrical connection between the dummy storage capacitor 70b and the data line 6a is increased in the presence of the relay wiring or in a new contact hole opened due to the electrical connection with the relay wiring. It becomes possible to prevent.

  Further, in the manufacturing process of the liquid crystal device, each of the dummy storage capacitor 70b and the storage capacitor 70a can be formed by the same process in each of the lower capacitor electrode 71, the dielectric film 75, and the upper capacitor electrode 300. . Further, by forming the dummy storage capacitor 70b with the MIM structure, a sufficient capacitance value is secured to suppress fluctuations in the image signal potential of the data line 6a, which will be described later, even if the pixel region 10a has a high definition. It becomes possible.

  As described above, in this embodiment, in the dummy region 10ab on the TFT array substrate 10, the dummy storage capacitor 70b in the dummy pixel unit 90b functions as an additional capacitor, thereby appropriately securing the capacitance around the data line 6a. can do. Therefore, it is possible to suppress the influence of the parasitic capacitance between the gate and the drain of the sampling switch 71 of the sampling circuit 7 that supplies the image signal VID to the data line 6a on the fluctuation of the image signal potential in the data line 6a. Therefore, fluctuations in the potential of the image signal VID that should be held by the data line 6a are suppressed, and as a result, display defects such that display unevenness along the data line 6a is noticeable in the display image occur. This can be prevented. As a result, the liquid crystal device can perform high-quality image display.

  In the present embodiment, the dummy storage area 70b of the dummy pixel portion 90b functions as an additional capacity in the dummy area 10ab, which is a so-called dead space in the pixel area 10a. Compared with the configuration in which the peripheral area is provided, even if the peripheral area on the TFT array substrate 10 is narrowed and narrowed, it is possible to secure a greater degree of design freedom regarding the arrangement of the peripheral circuit portion in the peripheral area. It becomes.

  Therefore, according to the present embodiment, as described above, the dummy storage capacitor 70b can be made to function as an additional capacitor with only a relatively simple design change. Therefore, the manufacturing process is complicated and manufactured in the manufacturing process of the liquid crystal device. It is possible to easily increase the density and reduce the size of the liquid crystal device while preventing an increase in cost.

<Modification>
Next, a modified example will be described with reference to FIG. FIG. 8 is a plan view schematically showing an example of the configuration of the dummy pixel portion in this modification.

  In this modification, in the dummy pixel portion 90b, the arrangement area of the dummy storage capacitor 70b is made different from the arrangement area of the storage capacitor 70a in the effective pixel section 90a shown in FIG. Form as possible. As a result, the dummy storage capacitor 70b and the storage capacitor 70a are made different in capacitance value so that the dummy storage capacitor has a value sufficient to suppress fluctuations in the original image signal potential to be held by the data line 6a. It is possible to ensure a capacitance value of 70b.

  For example, in FIG. 4 and FIG. 8, in the dummy pixel portion 90b, the arrangement area of the dummy storage capacitor 70b is made smaller than the effective pixel portion 90a when viewed in plan on the TFT array substrate 10. As a result, a larger area than the arrangement area of the storage capacitor 70a of the effective pixel portion 90a is secured. Thereby, the capacitance value of the dummy storage capacitor 70b can be secured larger than the capacitance value of the storage capacitor 70a.

  Further, in the configuration of this modification, the dummy pixel portion 90b is formed with the same structure as the effective pixel portion 90a except that the dummy storage capacitor 70b functions as an additional capacitor and the arrangement area thereof is different from the storage capacitor 70a. be able to. Accordingly, it is possible to provide an additional capacitor without significantly changing the design of the dummy pixel portion 90b with respect to the configuration of the effective pixel portion 90a.

  As described above, the liquid crystal device is not limited to the configuration in which the dummy storage capacitor 70b functions as an additional capacitor. For example, in the pixel region 10a on the TFT array substrate 10, at least a part of the dummy region 10ab is included in the liquid crystal device. The additional capacitor may be formed by being electrically connected to the data line 6a, and the dummy pixel portion 90b may not be disposed in the region where the additional capacitor is provided.

<Electronic equipment>
Next, an overall configuration, particularly an optical configuration, of an embodiment of a projection type color display device as an example of an electronic apparatus using the above-described liquid crystal device as a light valve will be described. FIG. 9 is a schematic cross-sectional view of the projection type color display device.

  In FIG. 9, a liquid crystal projector 1100, which is an example of a projection type color display device, prepares three liquid crystal modules including a liquid crystal device having a drive circuit mounted on a TFT array substrate, and RGB light valves 100R, 100G, and The projector is configured as 100B. In the liquid crystal projector 1100, when projection light is emitted from a lamp unit 1102 of a white light source such as a metal halide lamp, light components R, G, and R corresponding to the three primary colors of RGB are obtained by three mirrors 1106 and two dichroic mirrors 1108. The light is divided into B and led to the light valves 100R, 100G and 100B corresponding to the respective colors. In particular, the B light is guided through a relay lens system 1121 including an incident lens 1122, a relay lens 1123, and an exit lens 1124 in order to prevent light loss due to a long optical path. Light components corresponding to the three primary colors modulated by the light valves 100R, 100G, and 100B are synthesized again by the dichroic prism 1112 and then projected as a color image on the screen via the projection lens 1114.

  The present invention is not limited to the above-described embodiments, and can be appropriately changed without departing from the spirit or idea of the invention that can be read from the claims and the entire specification, and an electro-optical device with such a change. In addition, an electronic apparatus including the electro-optical device is also included in the technical scope of the present invention.

It is a schematic plan view of a liquid crystal device. It is HH 'sectional drawing of FIG. It is a block diagram which shows roughly the structure of a pixel area | region and a peripheral circuit part. It is a top view which shows roughly an example of a structure of the effective pixel part in the liquid crystal device which concerns on this embodiment. It is sectional drawing in the AA 'line of FIG. It is a top view which shows roughly an example of a structure of the dummy pixel part in the liquid crystal device which concerns on this embodiment. It is sectional drawing in the BB 'line | wire of FIG. It is a top view which shows roughly an example of a structure of a dummy pixel part about this modification. 1 is a schematic cross-sectional view showing a color liquid crystal projector as an example of a projection type color display device which is an embodiment of an electronic apparatus of the present invention.

Explanation of symbols

  3a ... Scanning line, 6a ... Data line, 9a ... Pixel electrode, 10 ... TFT array substrate, 10a ... Pixel area, 10aa ... Image display area, 10ab ... Dummy area, 70a ... Storage capacitor, 70b ... Dummy storage capacitor, 90a ... Effective pixel portion, 90b ... dummy pixel portion

Claims (11)

On the board
A plurality of data lines and a plurality of scanning lines provided to intersect with each other in an effective area and a pixel area including a dummy area surrounding the effective area in a frame shape;
In the effective region, a pixel electrode provided for each effective pixel corresponding to the intersection of the data line and the scanning line;
A storage capacitor provided for each effective pixel and electrically connected to the pixel electrode;
An electro-optic device comprising: an additional capacitor electrically connected to the data line in at least a part of the dummy region. The additional capacitor is provided for each dummy pixel corresponding to the intersection of the data line and the scanning line, and on the substrate, a lower electrode, a dielectric film, and an upper electrode are sequentially stacked from the lower layer side. The electro-optical device according to claim 1, wherein the electro-optical device is a dummy capacitor having the same stacked structure as the storage capacitor. The electro-optical device according to claim 2, wherein the dummy capacitor is short-circuited in an electrical path between the dummy capacitor and the data line in the same stacked structure. Provided for each of the effective pixels, one of a source electrode and a drain electrode is connected to the data line and the other is connected to the pixel electrode, and further includes a thin film transistor for controlling the switching of the pixel electrode. ,
4. The electro-optical device according to claim 3, wherein in the dummy capacitor, electrode portions corresponding to the source electrode and the drain electrode are short-circuited with each other in the same stacked structure. The electro-optical device according to claim 2, wherein the dummy capacitor has an area different from that of the storage capacitor when viewed in plan on the substrate. The storage capacitor is formed so as not to enter the opening region of each pixel in which the pixel electrode is formed in plan view on the substrate,
The dummy capacitor is formed so as to be in a region of each dummy pixel corresponding to the opening region of each pixel when viewed in plan on the substrate, and the area is larger than the storage capacitor. The electro-optical device according to claim 5. The electro-optical device according to claim 1, further comprising a dummy electrode that simulates the pixel electrode in at least a part of the plurality of dummy. On the substrate, the additional capacitor is disposed on an upper layer side from the data line, and has a stacked structure in which a lower electrode and an upper electrode are stacked in order from a lower layer side on the substrate, and the lower electrode includes the lower electrode, 8. The data line is electrically connected to the data line through a contact hole opened through an interlayer insulating film that insulates the additional capacitor and the data line from each other. The electro-optical device according to one item. The said additional capacity | capacitance has a laminated structure on which the lower electrode and upper electrode which are each formed from a metal film are laminated | stacked in order from a lower layer side on the said board | substrate. The electro-optical device according to 1.   The additional capacitor has a stacked structure in which a lower electrode and an upper electrode are sequentially stacked from the lower layer side on the substrate, and one of the lower electrode and the upper electrode has a predetermined potential. The electro-optical device according to claim 1, wherein the electro-optical device is characterized in that:   An electronic apparatus comprising the electro-optical device according to claim 1.

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