JP2008005611A - Inverter device - Google Patents

Abstract

A three-phase balanced voltage can be stably supplied to a three-phase three-wire load while saving cost by omitting an output circuit and a filter circuit for one phase and simplifying the circuit configuration. Provided is an inverter device including a phase-line voltage control type inverter.
In an inverter device having a three-phase line voltage control type inverter with a certain phase grounded, means for setting a load-side three-phase target phase voltage Vo ^* , and a load-side three-phase voltage Output voltage adjusting means 32-35 for outputting the inverter output phase voltages Vinv-u and Vinv-w as pulse width modulation signals so as to be the phase target phase voltage Vo ^*, and the inverter output phase voltage between the ground phase A means 50 for converting to line voltage and a circuit 21 for driving the three-phase line voltage control type inverter are provided.
[Selection] Figure 2

Description

  The present invention relates to an inverter device that converts DC power into AC power, and more particularly, three-phase line voltage control in which one phase is a ground phase and an output circuit is connected only between the ground phase and the other two phases. The present invention relates to an inverter device having a type inverter.

  In general, the inverter employs a full-bridge output circuit configuration in a three-phase three-wire system that outputs a sine wave three-phase voltage. That is, the full-bridge type inverter includes three sets of output circuits that take out output from the middle point of two power switching elements connected in series and is connected in parallel, and includes a reactor and a capacitor on the output side of the inverter. Three sets of filter circuits are connected for each phase.

  When the half-bridge type inverter is used as a three-phase line voltage control type inverter, two sets of output circuits that take out the output from the midpoint of two power switching elements connected in series are connected in parallel and connected in series. The ground phase is taken out from the midpoint of the two connected capacitors, and AC power is supplied to a three-phase three-wire load. Then, two sets of filter circuits composed of a reactor and a capacitor are connected to the two phases excluding the ground phase of the inverter.

  However, to output a three-phase balanced sine wave voltage, a harmonic filter is required for each phase. In a three-phase line voltage control type inverter, a filter circuit consisting of a reactor and a capacitor is required for one phase (ground phase). Therefore, there is a problem that voltage imbalance occurs in the three-phase load and the balance of the load voltage (supply voltage) is lost during the independent (single) operation.

In order to improve the voltage imbalance caused by the unbalanced load connected to the three-phase three-wire power system and the impedance imbalance of the power transmission path, the compensation current is reduced using a power converter (inverter device). It has been proposed to inject and compensate for voltage imbalance (Patent Document 1).
Japanese Patent No. 3173899

  The present invention has been made in view of the above-described circumstances, omitting an output circuit and a filter circuit for one phase, simplifying the circuit configuration, making it economical, and providing three-phase three-wire loads. An object of the present invention is to provide an inverter device including a three-phase line voltage control type inverter capable of stably supplying a phase balanced voltage.

The inverter device according to the present invention includes a means for setting a load-side three-phase target phase voltage Vo ^* in an inverter device including a three-phase line voltage control type inverter in which a certain phase is grounded; Output voltage adjusting means for adjusting the effective value and phase of each phase voltage of the inverter output so that the phase target phase voltage Vo ^* is obtained, and converting the inverter output phase voltage into a line voltage between the ground phase, And a circuit for driving the three-phase line voltage control type inverter.

Here, the output voltage adjusting means calculates a current value of two-phase current other than the ground phase, and calculates a voltage ωLI formed by the effective value of the two-phase current and a reactor (reactance L). The reactor voltage value ωLI and the load side three-phase target phase voltage Vo ^* are compared with the three-phase target phase voltage effective value Vo ^*, and the phase differences Δθu, Δθw and the effective values Vinv-u, Vinv− means for calculating w and adjusting the phase voltage output by the inverter. The output voltage adjusting means detects the actual phase voltage effective values Vu, Vw and phase values θu, θw of the two phases other than the load-side ground phase, and the actual phase voltage effective values Vu, Vw on the load side. And the phase values θu and θw are used to detect the phase difference of each deviation and the voltage effective value compared with the three-phase target phase voltage effective value Vo ^* . Means for obtaining the phase value and the effective voltage value of each of the two-phase voltages other than the ground phase by performing feedback control so that the difference is zero may be provided.

The present invention includes output voltage adjusting means for adjusting the phase value and effective value of each of the two-phase voltages other than the ground phase on the inverter side so that the load-side three-phase target phase voltage Vo ^* is obtained. By making the output phase voltage unbalanced, a balanced (balanced) three-phase voltage can be supplied to the three-phase three-wire load. Therefore, an output circuit and filter circuit for one phase are omitted, and a three-phase three-wire load is supplied to the three-phase three-wire load while simplifying the circuit configuration with a three-phase line voltage control type inverter. it can.

In particular, the actual phase voltage effective value and the phase value on the load side are detected, the phase difference of the deviation from the three-phase target phase voltage Vo ^* and the difference of the voltage effective value are detected, and the difference between the phase difference of the deviation and the voltage effective value is detected. The phase voltage output from the inverter is feedback-controlled so that the zero is zero, so that even if there is an imbalance in the load itself and an imbalance in the line impedance, the balanced three-phase load is automatically applied to the three-phase three-wire load. A voltage can be supplied.

  Embodiments of the present invention will be described below with reference to the accompanying drawings. In order to simplify the explanation, in the AC terms such as voltage and current, unless there is a special explanation, all are effective values. In addition, in each figure, the same code | symbol is attached | subjected to the member or element which has the same effect | action or function, and the overlapping description is abbreviate | omitted.

  FIG. 1 shows an inverter device according to an embodiment of the present invention. In the present embodiment, the case where the V phase is grounded will be described. In the inverter device 10, the DC output of the DC power supply 11 is boosted by the boost chopper 12 and smoothed by the capacitor (DC power supply) 13 with the DC link voltage. The direct current power of the DC link voltage is converted into alternating current power of a predetermined frequency and voltage by the inverter 15 and supplied to the three-phase three-wire load 16. In the three-phase three-wire load 16, the V phase is normally grounded. The DC power source 11 includes a distributed power source such as a gas turbine generator or a solar battery, and supplies DC power from the power source. The DC power source 11 and the inverter device 10 are unitized and used as a single device. be able to. The inverter device 10 includes an inverter 15, a step-up chopper 12 around the inverter 15, a filter circuit 17, a switch 18, a sensor circuit, a control circuit, and the like, and converts DC power into AC power.

  The inverter 15 is connected in parallel with two sets of output circuits (arms) that take out outputs (U phase, W phase) from the middle point of two power switching elements connected in series, and two capacitors connected in series 13 is a three-phase line voltage control type circuit in which the ground phase (V phase) is extracted from the midpoint of 13. The inverter 15 is a power conversion device that converts DC power into AC power by performing on / off control of the power switching element according to the pulse width modulation signal, and the DC link voltage of the capacitor 13 is output according to the pulse width modulation signal. Harmonic components are removed by the filter circuit 17 composed of the reactor and the capacitor, whereby a sine wave voltage waveform is formed on the output side of the filter circuit 17.

  A switch 18 is provided on the output side of the filter circuit 17 so that the output of the inverter 15 is connected to or disconnected from the load. Furthermore, a second switch 19 is provided on the output side of the inverter device 10 and can be connected to or disconnected from the system load 16.

When the second switch 19 is closed, the three-phase line voltage of the load 16 is detected by the voltage detector, and is taken into the control unit 20 of the inverter device 10 as the three-phase voltage Vu, Vv, Vw. In the control unit 20 of the inverter device 10, the amplitude and phase of the three-phase target phase voltage Vo ^* are set in advance, and each phase voltage of the inverter output is effective so that the load-side voltage becomes the three-phase target phase voltage Vo ^*. Output voltage adjusting means for adjusting the value (amplitude) and the phase is provided. In the control unit 20, each phase voltage whose amplitude and phase are adjusted by the output voltage adjusting means is converted into a line voltage, a pulse width modulation (PWM) signal is formed by a line voltage sine wave waveform, and the drive circuit 21 The power switching element of the output circuit of the inverter 15 is controlled to be turned on / off to output a rectangular waveform, and the filter circuit 17 removes the harmonic component, thereby the sine wave voltage of the three-phase target phase voltage Vo ^*. A waveform is formed on the reactor output side (load 16).

  Accordingly, the inverter device 10 is an inverter device provided with the three-phase line voltage control type inverter 15, and the output circuit and the filter circuit are omitted for one phase as compared with the full bridge type inverter device. However, by providing the output voltage adjustment means in the output circuit for two phases, the balanced voltage is supplied to the three-phase three-wire load 16 during the independent operation (independent operation). Can do. Hereinafter, the output voltage adjusting means will be specifically described.

  2 and 3 show the first output voltage adjusting means. FIG. 2A shows an output example of a general line voltage control type inverter device as a comparative example. Although the output voltage of the inverter 15 is balanced, it is supplied to the three-phase three-wire load 16. The load side voltage is unbalanced (unbalanced). That is, a pulse width modulation signal is output from the control unit 20 so that the inverter output phase voltages Vinv-u, Vinv-v, and Vinv-w are balanced, and the phase voltages Vinv-u, Vinv-v, and Vinv-w are large. And the phases are shifted by 120 °.

  Therefore, when the load current I is zero, that is, when there is no load, the load side phase voltages Vu, Vv, Vw supplied to the three-phase three-wire load 16 are balanced. However, when the load current I flows, a voltage of jωLI is formed in the reactor (reactance L) of the filter circuit. The V phase is a ground phase, there is no reactor, and reactances Lu and Lw are connected only to the U phase and the W phase, so a voltage of jωLuIu is formed in the U phase, and a voltage of jωLwIw is applied to the reactor in the W phase. It is formed. For this reason, the three-phase phase voltages Vu, Vv, Vw supplied to the three-phase three-wire load 16 are unbalanced and become a distorted triangle A.

In the inverter device of the present invention, the voltage output from the three-phase line voltage control type inverter is adjusted to be unbalanced and output, so that the load side voltage supplied to the three-phase three-wire load 16 is balanced. It is made to let you. For this reason, the inverter output voltage adjusting means shown in FIG. That is, a target phase voltage setting means 31 for setting the load-side three-phase target phase voltage Vo ^* is provided. This three-phase target phase voltage Vo ^* is a three-phase phase voltage in which the phase voltages Vu, Vv, and Vw supplied to each phase on the load side have the same amplitude (2 ^1/2 Vo) and the phase is shifted by 120 °. . The setting means includes a storage device such as a memory (not shown), a switch, a display, and the like. A predetermined value is stored in advance in a storage device such as a memory, and the user may arbitrarily rewrite the target phase voltage from the outside using a switch, a display, or the like, or illustrated in the inverter device of the present invention. A communication port may be provided, and the user may arbitrarily rewrite the target phase voltage from an external communication device such as a personal computer. Thus, by arbitrarily changing the target phase voltage from the outside, it is possible to deal with systems having various phase voltages.

And means 32 for detecting phase currents Iu, Iw, reactor voltage calculation means 33 for calculating voltages jωLuIu, jωLwIw formed by the phase currents Iu, Iw and the reactor (reactance L), and three phases on the load side Phase difference calculating means 34a for calculating the phase differences Δθu and Δθw moving from the target phase voltage Vo ^* and an amplitude calculating means 34b for calculating an effective value by the target phase voltage are provided. Then, an inverter output phase voltage calculation means 35 for calculating an instantaneous value (instantaneous value of Vinv-u, Vinv-w) of each phase voltage output from the inverter from the phase and effective value, and an instantaneous value of the phase voltage output by the inverter. And inverter output line voltage calculation means 36 for converting the value into an instantaneous value of the line voltage between the ground phase (instantaneous value of Vinv-uv and Vinv-wv).

When an inverter output line voltage instantaneous value (Vinv-uv, Vinv-wv instantaneous value) signal is obtained, the line voltage instantaneous value signal is supplied from the control unit 20 to the drive circuit 21 as a pulse width modulation signal. The inverter output line voltage (Vinv-uv, Vinv-wv) shown in FIG. 2B is obtained at the output terminal of the inverter 15. The triangle B formed by the output line voltage is distorted as shown in the figure, but the load side voltage (the voltage supplied to the three-phase three-wire load 16 that is the reactor output terminal voltage) is shown in the figure. Is obtained by subtracting the voltage drop of the reactor voltage from the inverter output terminal voltage, so that it becomes an equilateral triangle as shown by a triangle C in the figure, and the target balanced three-phase voltages Vu, Vv, Vw (equal amplitude (2 ^1/2 Vo) and the phase is shifted by 120 °).

Regarding the inverter output adjusting means shown in FIG. 3, the relationship with FIG. 2B will be described. The phase difference calculating means 34a calculates Δθw and Δθu in FIG. Perform the following calculation to calculate the phase difference Δθw, Δθu to which the inverter output phase voltage (Vinv-u, Vinv-w) to which the reactor voltage drop is added from the target balanced output phase voltage Vw, Vu Can do.

Similarly, the effective value calculation means 34b calculates the effective value of the inverter output phase voltage (Vinv-u, Vinv-w) in FIG. By performing the following calculation, the effective value to be output of the inverter output phase voltage (Vinv-u, Vinv-w) obtained by adding the vector drop of the reactor voltage from the target output phase voltages Vw, Vu can be calculated.

The inverter output phase voltage calculation means 35 performs the following calculation based on the phase difference to be moved and the effective value to be output calculated by the calculation means 34a and 34b, thereby obtaining the inverter output phase voltage (Vinv-u, Vinv-w). ) Is calculated.

When the sine waveform of the inverter output phase voltage (Vinv-u, Vinv-w) is formed at the inverter output terminal, the load side voltage (three-phase 3 which is the reactor output terminal voltage) is obtained by subtracting the vector drop of the reactor voltage. As a sine wave waveform of the voltage supplied to the line load 16, the following waveform which is a target waveform is obtained.

  Next, the output voltage adjusting means of the second embodiment of the present invention will be described with reference to FIG. This adjustment means is common to the above embodiment in that a balanced three-phase voltage is supplied to the load side by adjusting the amplitude and phase of the three-phase line voltage control type inverter output phase voltage unbalanced. . However, the difference is that the voltage amplitude and phase on the load side are detected without interposing the load current and adjusted by direct feedback control.

That is, means for setting the target phase voltage (amplitude) Vo ^* and target phases θu ^* and θw ^* to be supplied to the three-phase load, and means 51 for detecting the actual phase voltages Vu and Vw and the phases θu and θw on the load side. , 52, 53, 54, actual phase voltages Vu, Vw and phases θu, θw, and feedback control so that error ε between target phase voltage Vo ^* and target phases θu ^* , θw ^* is zero, U-phase PI control means 41 and W-phase PI control means 42 for obtaining the amplitude and phase of each of the two-phase voltages (Vinv-u, Vinv-w) output from the inverter. Here, the target balanced three-phase voltages Vu, Vv, Vw have the same amplitude (2 ^1/2 Vo) and the phase is shifted by 120 °. Therefore, the target phase θu ^* is a time function ωt, and θw ^* is It is a time function (ωt−240 °), and the target phase voltage (amplitude) is (2 ^1/2 Vo).

A configuration example of the U-phase PI control means 41 is shown in FIG. The adder 43 subtracts the amplitude error ε between the target phase voltage Vo ^* and the actual load phase voltage Vu, and the U-phase inverter output voltage Vinv-u is output by the PI controller 44 so that the amplitude error ε is zero. To do. Similarly, the phase error ε between the target phase θu ^* and the actual load phase θu is subtracted by the adder 45, and the U-phase inverter output phase difference Δθu is output by the PI controller 46 so that the phase error ε is zero. To do. The adder 55 adds the U-phase inverter output phase difference Δθu that has passed through the limiter 48 and the target phase θu ^* to output an inverter U-phase voltage phase value (θu ^* + Δθu). Finally, the modulation factor generating means 49 uses the U-phase inverter output voltage Vinv-u passed through the limiter 47 and the U-phase inverter voltage phase value (θu ^* + Δθu) in the pulse width modulation signal αu corresponding to the U-phase voltage waveform. Is formed.

The same applies to the W-phase PI control means 42. As shown in FIG. 5B, adders 43, 44, and 55, PI controllers 44 and 46, limiters 47 and 48, and modulation factor generation means 49 are provided. A pulse width modulation signal αw corresponding to the W-phase voltage waveform is formed. As described above, the pulse width modulation signal αw is obtained by calculating the amplitude error ε between the target phase voltage Vo ^* and the actual load phase voltage Vw by the adder 43 and setting the PI controller 44 so that the amplitude error ε is zero. The W-phase inverter output voltage Vinv-w (amplitude) is output at, and the phase error ε between the target phase θw ^* and the actual load phase θw is subtracted by the adder 45 so that the phase error ε is zero. The controller 46 outputs the W-phase inverter output phase difference Δθw, adds the W-phase inverter output phase difference Δθw passed through the limiter 48 and the target phase θw ^* by the adder 55, and adds the W-phase inverter voltage phase value (θw ^* + Δθw) is output.

Therefore, the pulse width modulation signal αu is feedback-controlled so that the load voltage Vu and the load phase θu coincide with the target phase voltage Vo ^* and the target phase θu ^* . Similarly, the pulse width modulation signal αw is feedback-controlled so that the load voltage Vw and the load phase Δθw coincide with the target phase voltage Vo ^* and the target phase difference θw ^* .

  Since the pulse width modulation signals αu and αw correspond to the phase voltage output from the inverter, the pulse width modulation signals αu-v and αw corresponding to the line voltage between the pulse width modulation signals αu and αw and the ground phase (V phase). The phase voltage / line voltage converter 50 converts to −v. Then, the three-phase line voltage control type inverter 15 is driven by the drive circuit 21 to form the target values of the three-phase voltages Vu ′, Vv ′, Vw ′ (Vu, Vv, Vw) balanced on the load side. Is done.

The line voltage Vu-v on the load side is detected by the voltage detection means 51 and the phase detection means 52, the U-phase voltage Vu and the phase θu are extracted, fed back to the U-phase PI controller 41, and the target phase voltage Vo ^* PI control is performed so as to coincide with the target phase θu ^* . Similarly, the line voltage Vw-v on the load side is detected by the voltage detection means 53 and the phase detection means 54, the W-phase voltage Vw and the phase θw are extracted, fed back to the W-phase PI controller 42, and the target phase voltage PI control is performed so that Vo ^* matches the target phase θw ^* .

Therefore, an output voltage that can adjust the U-phase voltage value and phase value on the inverter side and the W-phase voltage value and phase value on the inverter side by PI control so that the three-phase target phase voltage (balanced phase voltage) Vo ^* on the load side is obtained. By providing the adjusting means, it is possible to supply a balanced (balanced) three-phase voltage to the three-phase three-wire load while making the output phase voltage on the inverter side unbalanced (unbalanced). For this reason, an output circuit and a filter circuit for one phase are omitted, and a three-phase three-wire load is supplied with a balanced three-phase voltage while simplifying the circuit configuration with a three-phase line voltage control type inverter. Can supply.

In particular, the actual phase voltages Vu and Vw and phase values θu and θw on the load side are detected, the phase difference ε of the deviation from the three-phase target phase voltage Vo ^* and the difference ε of the effective voltage value are detected, and the phase difference of the deviation is detected. By performing feedback control (PI control) so that the difference ε between the ε and the voltage effective value becomes zero, the phase value and the voltage effective value of each of the two-phase voltages other than the ground phase are obtained and output. Even in the presence of its own imbalance and line impedance imbalance, a balanced three-phase voltage can be supplied to a three-phase three-wire load.

  In the above embodiment, an example of PI (proportional integral) control has been described as an example of feedback control. However, other types of control such as PID (proportional integral derivative) control may be used as a matter of course. is there.

The above-described embodiment can be realized by adding software by using a microprocessor and a voltage / current detector normally provided in the inverter device. For this reason, the change in changing the target voltage Vo ^* is facilitated, and the cost can be reduced.

  Although one embodiment of the present invention has been described so far, the present invention is not limited to the above-described embodiment, and may of course be implemented in various forms within the scope of the technical idea.

It is a block diagram which shows the inverter apparatus of one Embodiment of this invention. It is a vector diagram which shows the relationship between load side phase voltage Vu, Vv, Vw and inverter output phase voltage (Vinv-u, Vinv-w), (a) is the inverter output phase voltage of a comparative example, and load The case where the side phase voltage is unbalanced is shown, and (b) shows the case where the inverter output phase voltage of the present invention is unbalanced and the load side phase voltage is balanced. It is a block diagram which shows the output voltage adjustment means of 1st Embodiment of this invention. It is a block diagram which shows the output voltage adjustment means of 2nd Embodiment of this invention. It is a block diagram which shows the detail of the feedback control means of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Inverter apparatus 11 DC power supply 12 Boost chopper 13 Capacitor 15 Inverter 16 Load 17 Filter circuit 18, 19 Switch 20 Control part 21 Drive circuit 31 Target phase voltage setting means 32 Phase current detection means 33 Reactor voltage calculation means 34a Phase difference calculation means 34b RMS value calculating means 35 Inverter output phase voltage calculating means 36 Inverter output line voltage calculating means 41 U phase PI controller 42 W phase PI controllers 43, 45, 55 Adders 44, 46 Controllers 47, 48 Limiter 49 Modulation Rate generating means 50 Phase / line voltage converter 51, 53 Voltage detecting means 52, 54 Phase detecting means Iu, Iw phase current jωLuIu, jωLwIw Reactor voltage L Reactance Vinv-u, Vinv-w Inverter output phase voltage Vinv-uv, Vinv-wv Inverter output line voltage Vu, Vv, Vw Load side voltage Δθu, Δθ w phase difference

Claims (3)

In an inverter device comprising a three-phase line voltage control type inverter in which a certain phase is grounded,
Means for setting the load side three-phase target phase voltage Vo ^* ;
Output voltage adjusting means for adjusting the effective value and phase of each phase voltage of the inverter output so as to be the three-phase target phase voltage Vo ^* on the load side;
An inverter device comprising: a circuit for converting the inverter output phase voltage into a line voltage between the ground phase and driving the three-phase line voltage control type inverter. The output voltage adjusting means is
Means for detecting current effective values of two phases other than the ground phase;
Reactor voltage ωLI formed by the phase current effective value and the reactance L of the reactor are respectively calculated, the reactor voltage value ωLI and the three-phase target phase voltage Vo ^* are compared, the phase difference and the effective value are calculated, The inverter device according to claim 1, further comprising means for outputting the inverter output phase voltage. The output voltage adjusting means is
Means for detecting an actual phase voltage effective value and a phase value of two phases other than the ground phase on the load side;
The actual phase voltage effective value and phase value on the load side are compared with the three-phase target phase voltage Vo ^* to detect the phase difference of each phase shift and the voltage effective value difference, and the phase difference and voltage of the shift The inverter apparatus according to claim 1, further comprising feedback control so that a difference between the effective values becomes zero.

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