JP2008091758A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

An object of the present invention is to provide a highly reliable semiconductor device in which adverse effects on a bonding process caused by bleeding are eliminated.
A lead frame having a plurality of leads and an island portion, and a plurality of electrode pads are disposed to face a surface of the island portion of the lead frame through an adhesive. In the semiconductor device 100 including the semiconductor chip 37 to be formed, the plurality of wires 43 that respectively connect the plurality of electrode pads 39 and the plurality of leads 33 of the semiconductor chip 37, and the sealing resin 45 that seals the semiconductor chip 37. A plurality of convex portions 51 having a uniform height are provided on the back surface 31 b of the island portion 31, and the plurality of convex portions 51 define a plurality of gaps 53 that open at the outer peripheral edge portion of the island portion 31.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly, to a semiconductor device manufactured by mounting a semiconductor chip on a lead frame and mounting and baking it, and a manufacturing method thereof.

  As a conventional semiconductor device, for example, there is one described in Patent Document 1. FIG. 14 shows a semiconductor device described in this document. In the semiconductor device 1, the first chip 5 is mounted on the island 3, and the second chip 7 is mounted on the first chip 5. Then, a groove 9 is formed around the mounting area of the second chip 7 on the first chip 5 so as to surround the mounting area, and the second chip 7 is mounted inside the groove 9. Thereby, when the second chip 7 mounted on the first chip 5 is baked, spreading of the generated bleed is prevented by the groove 9. As a result, the bleed is prevented from flowing on the first chip 5.

  FIG. 15 shows a semiconductor device described in Patent Document 2. In the semiconductor device 10, a plurality of grooves 13 extending radially from the center are formed on the upper surface of the island 11. This prevents the chip from being displaced due to foaming during the thermosetting of the paste.

FIG. 16 shows a semiconductor device described in Patent Document 3. In the semiconductor device 20, a trench-like groove 23 is provided on the back surface 21 a of the island electrode 21, thereby preventing the solder 25 that forms the external connection electrode from flowing.
JP 2006-66670 A JP-A-62-171131 JP 2003-188333 A

However, the prior art described in the above literature has room for improvement in the following points.
In the semiconductor device 1 described in Patent Document 1, it is possible to prevent the spread of the bleed generated after baking from the silver paste used when the second chip 7 is mounted on the first chip 5. However, when bleed after baking is generated from the silver paste used for mounting the first chip 5 on the island 3, if the gap between the island 3 and the first chip 5 is small, the generated bleed There is a high possibility of going around to the back of the island.

According to the present invention, a lead frame having a plurality of leads and island portions;
A semiconductor chip having a plurality of electrode pads, and placed on an upper surface of the island part of the lead frame via an adhesive;
A plurality of wires respectively connecting the plurality of electrode pads of the semiconductor chip and the plurality of leads;
In a semiconductor device including a sealing resin for sealing the semiconductor chip,
A plurality of convex portions having a uniform height are provided on the lower surface of the island portion,
A semiconductor device is provided in which the plurality of convex portions define a plurality of gaps opened at the outer peripheral edge portion of the island portion.

  According to the present invention, when the adhesive bleed generated when the semiconductor chip is mounted and baked wraps around from the side surface of the island portion to the lower surface side, it passes from the outer peripheral edge portion of the lower surface of the island portion to the center portion through the gap. Since the bleed flows in, the bleed does not come into contact with the bonding jig, so that contamination of the bonding jig by the bleed can be prevented. Furthermore, if the bleed adheres to the bonding jig in the next bonding process, the position of the lead frame placed on the bonding jig will be distorted, resulting in poor bonding at the joint between the wire lead and the electrode pad. According to the present invention, these adverse effects due to bleeding can be avoided, so that problems during manufacturing can be eliminated, and the reliability of the semiconductor device is improved.

As mentioned above, although the structure of this invention was demonstrated, this invention is not restricted to this, Various aspects are included. For example, according to the present invention, there is provided a method for manufacturing the above semiconductor device,
Preparing the lead frame having the island portion;
On the lower surface of the island portion, a mask prohibition region is provided at the outer peripheral edge, and a mask region other than the mask prohibition region is masked,
Half-etching to leave the mask region on the lower surface of the island part to form the convex part,
The semiconductor chip is heated and placed using the adhesive so as to face the upper surface of the island portion of the lead frame,
Wire bonding the plurality of electrode pads and the plurality of leads of the semiconductor chip,
A method of manufacturing a semiconductor device in which the semiconductor chip is sealed with the sealing resin is provided.

  According to the present invention, there is also provided a lead frame used in the method for manufacturing a semiconductor device.

  ADVANTAGE OF THE INVENTION According to this invention, the bad influence to the bonding process by a bleed is eliminated, and a highly reliable semiconductor device is provided.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings, the same reference numerals are given to the same components, and the description will be omitted as appropriate.

  FIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention. 2 is a rear perspective view of the island portion of the lead frame of the semiconductor device of FIG. FIG. 3 is a plan view of the lead frame of the semiconductor device of FIG. Hereinafter, description will be made with reference to FIGS. 1 to 3.

The semiconductor device 100 according to the present embodiment has a lead frame 34 having a plurality of leads 33 and island portions 31 and a plurality of electrode pads 39, and is opposed to the upper surface (surface 31a) of the island portions 31 of the lead frame 34. The semiconductor chip 37 placed via the adhesive 35, the plurality of wires 43 respectively connecting the plurality of electrode pads 39 and the plurality of leads 33 of the semiconductor chip 37, and the sealing resin for sealing the semiconductor chip 37 45, a plurality of convex portions 51 having a uniform height are provided on the lower surface (back surface 31 b) of the island portion 31, and the plurality of convex portions 51 are the outer peripheral edge portions of the island portion 31. A plurality of gaps 53 that are open at the end are defined.
In FIG. 1, the configuration of parts not related to the essence of the present invention is omitted.

  As shown in FIG. 1, the semiconductor device 100 according to the present embodiment is mounted on a lead frame 34 having a plurality of leads 33 and island portions 31, and on a surface 31 a of the island portion 31 of the lead frame 34 via an adhesive 35. A semiconductor chip 37 having a plurality of electrode pads 39 on the upper surface thereof, and a plurality of wires 43 such as gold wires respectively connecting the plurality of leads 33 of the lead frame 34 to the plurality of electrode pads 39 via bumps 41; ,including.

  As shown in FIG. 2, the island portion 31 of the lead frame 34 has a front surface 31 a on which the semiconductor chip 37 is placed via an adhesive 35 and a back surface 31 b on the opposite side. The island part 31 has the convex part 51 which has uniform height on the back surface 31b. In the present embodiment, the convex portion 51 has a rectangular parallelepiped shape, but is not particularly limited thereto. Other shapes will be described later.

  The plurality of flat surfaces 51a of the plurality of convex portions 51 are formed flush with each other. The plurality of flat surfaces 51a become contact surfaces with the bonding jig in the wire bonding process. Therefore, the flat surfaces 51a of the plurality of convex portions 51 may be formed so that the surfaces in contact with the bonding jig are flush with each other. It should be noted that the flat surfaces 51a of all the plurality of convex portions 51 do not have to be flush with each other, and may be configured so that the lead frame 34 is stably placed at least on the bonding jig. For example, on the back surface 31b of the island part 31, it is sufficient that at least the convex parts 51 located on the diagonal line have the same height, and the other convex parts 51 can be made lower than the height.

  The plurality of convex portions 51 define a plurality of gaps 53 from the central portion toward the outer peripheral edge portion. It is more preferable that the plurality of gaps 53 are radially defined from the central portion toward the outer peripheral edge portion. Each convex portion 51 is formed to be spaced a predetermined distance inward from the outer peripheral edge portion of the island portion 31, and an outer peripheral clearance 55 is formed between the outer peripheral edge portion of the island portion 31 and the side surface of each convex portion 51.

  A method for forming the convex portion 51 of the island portion 31 will be described below.

  First, as shown in FIG. 3, a mask is applied to the shape of the flat surface 51 a of the convex portion 51 to be formed on the back surface 31 b of the island portion 31, here, a rectangular mask region 47 (shown by a broken line in the figure). In the present embodiment, the plurality of mask regions 47 are separated from the center of the island part 31 by a predetermined distance and are separated from the outer peripheral edge part of the island part 31 by a predetermined distance. A gap 49 is defined between the outer peripheral edge of the island portion 31 and each mask region 47.

  The plurality of mask regions 47 are preferably arranged at equal intervals radially from the center of the island portion 31 so as not to contact each other. The plurality of mask regions 47 are arranged so that the lead frame 34 having the plurality of convex portions 51 formed after half etching is stably placed on the bonding jig 61 during the wire bonding process. preferable. In the present embodiment, the mask region 47 is not provided in the central portion of the island portion 31, but a mask region having an arbitrary shape such as a circle or a polygon may be separated from the mask region 47 by a predetermined distance in the central portion. Good. Thereby, the intensity | strength of the center part of the island part 31 after a half etching can be strengthened.

  Next, half etching is performed on the back surface 31 b of the island portion 31 so as to leave the mask region 47, thereby forming a plurality of convex portions 51. As described above, the plurality of convex portions 51 have a uniform height and are formed flush with each other. After half etching, the mask is removed. In this way, as shown in FIG. 2, a plurality of convex portions 51 are formed on the back surface 31 b of the island portion 31.

  Next, a method for manufacturing the semiconductor device 100 using the lead frame 34 of the present embodiment will be described below with reference to FIGS. 4 to 7 are cross-sectional views in each manufacturing process of the semiconductor device 100 of this embodiment.

  In the method of manufacturing the semiconductor device 100 according to the present embodiment, a lead frame 34 having an island portion 31 is prepared, and a mask prohibition region is provided on the lower surface (back surface 31b) of the island portion 31 at the outer peripheral edge. A mask area is applied to the other mask area (mask area 47 in FIG. 3), and half-etching is performed so as to leave the mask area 47 on the lower surface (back surface 31b) of the island portion 31 to form the convex portion 51. The semiconductor chip 37 is placed on the upper surface (surface 31a) of the part 31 by heating with the adhesive 35, and the plurality of electrode pads 39 and the plurality of leads 33 of the semiconductor chip 37 are respectively wire bonded, The semiconductor chip 37 is sealed with a sealing resin 45.

  Specifically, as shown in FIG. 4, the lead frame 34 of FIG. 3 is prepared, and the adhesive 35 is applied to the surface 31 a of the island portion 31 of the lead frame 34. In this embodiment, the adhesive 35 is a silver paste. A semiconductor chip 37 is placed on the surface 31a of the island portion 31 of the lead frame 34 via an adhesive 35, baked, and the silver paste is baked and hardened (chip mounting process). The semiconductor chip 37 has a plurality of electrode pads 39 on its outer peripheral edge. A plurality of convex portions 51 are provided on the back surface 31 b of the island portion 31.

  Next, as shown in FIG. 5, the back surface 31 b of the island part 31 is placed facing the upper surface 61 a of the bonding jig 61. Bumps 41 are formed on the plurality of electrode pads 39 of the semiconductor chip 37, and wire bonding is performed with the plurality of leads 33 of the lead frame 34 using the plurality of wires 43, respectively (wire bonding step).

  Next, as shown in FIG. 6, the island part 31, the lead 33, the semiconductor chip 37, and the wire 43 are sealed with a resin 45 (resin sealing process). Then, as shown in FIG. 7, the lead 33 is molded, and the assembly of the semiconductor device 100 is completed (lead molding process).

  As shown in FIG. 8, when a semiconductor device is manufactured using a conventional method, in the chip mounting process, in the island part 31 placed on the bonding jig 61, the bleed 63 generated after baking is the island part 31. From the front surface 31a to the back surface 31b through the side surface. The bleed 63 further leaks and spreads between the back surface 31 b of the back surface 31 b and the upper surface 61 a of the bonding jig 61. When the upper surface 61a of the bonding jig 61 is contaminated by the bleed, the position of the lead frame placed on the bonding jig is distorted due to the thickness of the bleed, and at the joint between the wire lead and the electrode pad. There is a possibility of causing a bonding failure and the reliability of the semiconductor device is lowered.

  On the other hand, according to the semiconductor device 100 of the present embodiment, the bleed 63 generated after baking in the island portion 31 placed on the bonding jig 61 in the chip mounting process described above is from the surface 31 a of the island portion 31. Although it goes around to the back surface 31b through the side surface, it flows into the gap 53 between the outer peripheral edge gap 55 and the convex portion 51 of the back surface 31b of the island part 31 as shown in FIGS. Thereby, it is possible to prevent the bleed 63 from going around between the upper surface 61 a of the bonding jig 61 and the flat surface 51 a of the convex portion 51.

  As described above, according to the semiconductor device 100 of the embodiment of the present invention, the bleed 63 of the adhesive 35 generated when the semiconductor chip 37 is mounted and baked wraps around from the side surface of the island portion 31 to the back surface 31b side. At this time, the bleed 63 flows from the outer peripheral edge portion of the back surface 31b of the island portion 31 through the gap 53 toward the center portion. Thereby, since the bleed 63 does not contact the bonding jig 61, it is possible to prevent the bonding jig from being contaminated by the bleed. Further, when the bleed adheres to the bonding jig 61 in the next bonding process, the thickness of the bleed causes distortion in the position of the lead frame placed on the bonding jig 61, so that the wire leads and the electrode pads are joined. However, according to the semiconductor device 100 of the present embodiment, these adverse effects due to bleed can be avoided, so that problems during manufacturing can be eliminated and the reliability of the semiconductor device 100 is improved. To do.

  As mentioned above, although embodiment of this invention was described with reference to drawings, these are the illustrations of this invention, Various structures other than the above are also employable.

  For example, as shown in FIG. 11, the island portion 101 of the semiconductor device according to another embodiment of the present invention is provided with a plurality of convex portions 103 having a uniform height on the back surface 101 b, and the plurality of convex portions 103. It is also possible to define a plurality of gaps 105 respectively. The plurality of gaps 105 are preferably provided at substantially equal intervals radially from the central portion 109 toward the outer peripheral edge portion. A central convex portion 111 can be further formed in the central portion 109.

  As shown in FIG. 12A, when the semiconductor chip 125 is provided in a partial region of the surface 121a of the island part 121, only the part corresponding to the back side of the region where the semiconductor chip 125 is placed is The convex part 123 can also be provided in the back surface 121b of the island part 121 so that the clearance 127 may be provided in the outer periphery part of the part 121 (FIG.12 (b)). In this example, the number of the convex portions 123 is one, but a plurality of convex portions may be provided as in the above embodiment.

  Thus, in the periphery of the portion corresponding to the back side of the region where the semiconductor chip 125 is mounted on the front surface 121a of the island portion 121, the region inside the predetermined distance from the outer peripheral edge portion of the island portion 121 is defined as the convex portion 123 formation prohibited region, It is preferable to form the convex portion 123 in a region other than the convex portion 123 formation prohibition region.

  Furthermore, as shown in FIG. 13, the island part 141 can also be provided with a plurality of convex parts 143 having a plane of an arbitrary shape. The plurality of convex portions 143 are preferably formed at a predetermined distance and spaced apart from each other at substantially equal intervals. The plurality of convex portions 143 are preferably formed at a predetermined distance from the outer peripheral edge portion of the island portion 141, and define a gap 145 in the outer peripheral edge portion.

It is sectional drawing of the semiconductor device which concerns on one embodiment of this invention. FIG. 2 is a rear perspective view of an island portion of a lead frame of the semiconductor device of FIG. 1. FIG. 2 is a plan view of a lead frame of the semiconductor device of FIG. 1. FIG. 2 is a cross-sectional view of the semiconductor device of FIG. 1 during a chip mounting process. FIG. 2 is a cross-sectional view of the semiconductor device of FIG. 1 during a wire bonding process. It is sectional drawing at the time of the resin sealing process of the semiconductor device of FIG. FIG. 2 is a cross-sectional view of the semiconductor device of FIG. 1 during a lead molding process. It is sectional drawing for demonstrating the influence of the bleed in the manufacturing process of the conventional semiconductor device. FIG. 2 is a cross-sectional view for explaining the influence of bleed in the manufacturing process of the semiconductor device of FIG. 1. FIG. 3 is a perspective view for explaining the influence of bleed in the manufacturing process of the semiconductor device of FIG. 1. It is a back surface top view of the island part of the semiconductor device which concerns on other embodiment of this invention. It is a figure for demonstrating the island part of the semiconductor device which concerns on other embodiment of this invention. It is a back surface top view of the island part of the semiconductor device which concerns on other embodiment of this invention. It is a figure which shows the structure of the conventional semiconductor device. It is a figure which shows the structure of the conventional semiconductor device. It is sectional drawing of the conventional semiconductor device.

Explanation of symbols

31 Island portion 31a Front surface 31b Back surface 33 Lead 34 Lead frame 35 Adhesive 37 Semiconductor chip 39 Electrode pad 41 Bump 43 Wire 45 Sealing resin 47 Mask area 49 Gap 51 Protrusion 51a Flat surface 53 Gap 55 Outer peripheral edge gap 61 Bonding tool 63 Bleed 100 Semiconductor device 101 Island portion 103 Convex portion 105 Clearance 109 Central portion 111 Central convex portion 121 Island portion 123 Convex portion 125 Semiconductor chip 127 Clearance 141 Island portion 143 Convex portion 145 Clearance

Claims (8)

A lead frame having a plurality of leads and island portions;
A semiconductor chip having a plurality of electrode pads, and placed on an upper surface of the island part of the lead frame via an adhesive;
A plurality of wires respectively connecting the plurality of electrode pads of the semiconductor chip and the plurality of leads;
In a semiconductor device including a sealing resin for sealing the semiconductor chip,
Providing a convex portion having a uniform height on the lower surface of the island portion,
The convex portion is a semiconductor device that defines a plurality of gaps opened at an outer peripheral edge of the island portion. The semiconductor device according to claim 1,
A semiconductor device including a prohibited region that prohibits the formation of the convex portion on at least a part of the lower surface of the island portion. The semiconductor device according to claim 2,
The prohibited region is a semiconductor device including a region from the outer peripheral edge portion to a predetermined distance inside. The semiconductor device according to claim 2 or 3,
The forbidden region is a semiconductor device including a central region of the lower surface of the island portion. The semiconductor device according to claim 1,
The plurality of gaps are semiconductor devices defined radially from a central portion toward the outer peripheral edge portion. The semiconductor device according to claim 1,
The semiconductor device, wherein the adhesive is a silver paste. A method of manufacturing a semiconductor device according to claim 1,
Preparing the lead frame having the island portion;
On the lower surface of the island portion, a mask prohibition region is provided at the outer peripheral edge, and a mask region other than the mask prohibition region is masked,
Half-etching to leave the mask region on the lower surface of the island part to form the convex part,
The semiconductor chip is heated and placed using the adhesive so as to face the upper surface of the island portion of the lead frame,
Wire bonding the plurality of electrode pads and the plurality of leads of the semiconductor chip,
A method for manufacturing a semiconductor device, wherein the semiconductor chip is sealed with the sealing resin.   A lead frame used in the method for manufacturing a semiconductor device according to claim 7.

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