JP2008083138A - Plasma display device - Google Patents

Abstract

A plasma display device capable of immediately detecting when a connection failure occurs in a flexible wiring board for a sustain electrode.
A plasma display panel having a short-circuit wiring connected in common to one end of a plurality of sustain electrodes, a sustain electrode driving circuit for supplying a drive voltage to the sustain electrodes, and sustain electrode driving A flexible wiring board 549 that electrically connects the circuit 54 and the shorting wiring 27 is provided. The flexible wiring board 549 has a driving lead 547 for supplying a driving voltage to the sustain electrode, and a shorting wiring 27. A connection failure detection circuit 500 is provided, which is provided with a connection confirmation lead wire 548 that is electrically connected, and that detects an electrical connection failure between the sustain electrode drive circuit 54 and the short-circuit wiring 27. And
[Selection] Figure 11

Description

  The present invention relates to a plasma display device known as a thin, lightweight image display device having a large screen.

  A plasma display device using a typical AC surface discharge type panel as a plasma display panel (hereinafter abbreviated as “panel”) has a wide viewing angle and a large screen, and is self-luminous and image display. Due to its high quality, it is becoming the mainstream of large screen image display devices.

  In the panel, a large number of discharge cells are formed between a front plate and a back plate arranged to face each other. In the front plate, a plurality of display electrode pairs each consisting of a pair of scan electrodes and sustain electrodes are formed in parallel with each other on the front glass substrate, and a dielectric layer and a protective layer are formed so as to cover the display electrode pairs. Yes. The back plate has a plurality of parallel data electrodes on the back glass substrate, a dielectric layer so as to cover them, and a plurality of barrier ribs in parallel with the data electrodes formed on the back glass substrate. A phosphor layer is formed on the side walls of the barrier ribs. Then, the front plate and the back plate are arranged opposite to each other so that the display electrode pair and the data electrode are three-dimensionally crossed and sealed, and a discharge gas containing, for example, 5% xenon in a partial pressure ratio is sealed in the internal discharge space. Has been. Here, a discharge cell is formed at a portion where the display electrode pair and the data electrode face each other. The panel is divided into an image display area for displaying an image and other non-display areas, and each electrode is formed by pulling out each electrode to the outside of the image display area on the front plate or the back plate, that is, to the non-display region. Each electrode is driven by applying a drive voltage to the lead portion.

  In the plasma display device using the panel having such a configuration, a sustain pulse is alternately applied to the display electrode pair to generate a gas discharge in each discharge cell, and red, green and blue are generated by ultraviolet rays generated by the gas discharge. A color image is displayed by exciting and emitting phosphors of the respective colors.

  As a method of driving the panel, a subfield method, that is, a method of performing gradation display by combining subfields to emit light after dividing one field period into a plurality of subfields is generally used.

  Each subfield has an initialization period, an address period, and a sustain period. In the initialization period, an initialization discharge is generated, and wall charges necessary for the subsequent address operation are formed on each electrode. In the address period, an address pulse voltage is selectively applied to the discharge cells to be displayed to generate an address discharge to form wall charges. In the sustain period, a sustain pulse is alternately applied to the display electrode pair composed of the scan electrode and the sustain electrode, and a sustain discharge is generated in the discharge cell in which the address discharge is generated, and the phosphor layer of the corresponding discharge cell is caused to emit light. The image is displayed.

  In such a plasma display device, each electrode lead portion and each drive circuit output portion are electrically connected by a flexible wiring board (hereinafter referred to as “FPC”), and the FPC is connected. A panel is driven by applying a driving voltage to each electrode. For example, the output part of each drive circuit has a connector provided to connect to the FPC, and by connecting the other end of the FPC with one end fixed to the drawer of the panel to the connector, Each electrode and each drive circuit are electrically connected.

  At this time, regarding the scanning electrode and the data electrode, since each electrode is driven independently, if there is even one FPC that is not correctly connected, an image display defect occurs. Therefore, it is possible to detect a connection failure related to the FPC by checking the display image.

  On the other hand, the sustain electrodes are driven by commonly applying the same drive voltage to all the sustain electrodes. Therefore, it is possible to form a short-circuit wiring in which all the sustain electrodes are connected in common, and one sustain electrode drive circuit drives all the sustain electrodes through the short-circuit wiring. Therefore, in such a configuration, even if there is a poorly connected FPC, a drive voltage is applied to all the sustain electrodes from the correctly connected FPC via the short-circuit wiring, so that a normal image is displayed on the panel. Is displayed. Therefore, it is difficult to determine whether or not all FPCs are normally connected only by looking at the display image.

  However, when a connection failure occurs in the FPC related to the sustain electrode, a current that should flow through the FPC flows through the normally connected FPC. May be overloaded. In recent years, the amount of current flowing during driving has increased due to the further increase in screen size of the panel, and the load in such a case tends to further increase.

Therefore, the connection failure can be detected by the color change of the paint by electrically arranging in series the resistors coated with the temperature indicating paint on each circuit pattern of the FPC that connects the panel and the drive circuit for driving the panel. Such a technique has been proposed (see, for example, Patent Document 1). As a result, the confirmation of the connection state can be performed easily and accurately in a short time, and the inspection man-hours can be reduced and the efficiency can be improved.
JP-A-2-186531

  However, in this technique, the connection state can be confirmed in a manufacturing process or the like in which the connection portion of the FPC can be visually observed. For example, the FPC related to the sustain electrode is caused by vibration or impact generated during the conveyance of the product. If a connection failure occurs, it is difficult to detect it.

  The present invention has been made in view of these problems, and provides a plasma display device capable of immediately detecting a connection failure between a sustain electrode driving circuit and a short-circuit wiring. With the goal.

  In order to solve this problem, the present invention provides a plasma in which a plurality of scan electrodes and sustain electrodes are formed on a front plate and a short-circuit wiring connected in common to one end of the plurality of sustain electrodes is formed. A display panel; a sustain electrode drive circuit that supplies a drive voltage to the sustain electrode; and a flexible wiring board that electrically connects the sustain electrode drive circuit and the short-circuiting wiring. A drive lead for supplying a drive voltage to the sustain electrode, and a connection check lead that is electrically insulated from the drive lead and electrically connected to the short-circuit wire; And a connection failure detection circuit that is electrically connected to the connection confirmation lead of the flexible wiring board and detects an electrical connection failure between the sustain electrode drive circuit and the short-circuit wiring. And butterflies.

  With this configuration, for example, when a connection failure occurs between the FPC for electrically connecting the sustain electrode drive circuit and the short-circuit wiring and the short-circuit wiring, it can be immediately detected.

  In the plasma display device of the present invention, the connection failure detection circuit includes a plurality of resistors for resistance-dividing the drive voltage output from the connection confirmation lead, a capacitor for smoothing the resistance-divided drive voltage, and a capacitor. A diode having a cathode connected thereto, and a switching circuit connected to the anode of the diode and displacing an output signal when the voltage of the capacitor becomes a predetermined voltage or less are provided. As a result, the sustain pulse voltage exceeding 100 (V) is resistance-divided and smoothed to charge the capacitor. When a connection failure occurs between the sustain electrode drive circuit and the short-circuit wiring, the capacitor voltage is decreased. Since the output signal of the switching circuit can be displaced, it becomes possible to immediately detect when an electrical connection failure occurs between the sustain electrode driving circuit and the short-circuit wiring.

  In the plasma display device of the present invention, the sustain electrode drive circuit and the connection failure detection circuit are mounted on the same substrate. As a result, the FPC connected to the short-circuit wiring can be connected to the sustain electrode drive circuit and the connection failure detection circuit arranged on the same substrate through one connector, so that the short-circuit with the sustain electrode drive circuit. The electrical connection with the wiring for use can be confirmed with higher accuracy.

  According to the present invention, it is possible to provide a plasma display device that can immediately detect when a connection failure occurs between the sustain electrode driving circuit and the short-circuit wiring.

  Hereinafter, a plasma display device according to an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is an exploded perspective view showing a structure of panel 10 according to the embodiment of the present invention. The front plate 20 has a front substrate 21 made of glass. On the front substrate 21, a plurality of display electrode pairs 24 including scan electrodes 22 and sustain electrodes 23 are formed. A dielectric layer 25 is formed so as to cover the scan electrode 22 and the sustain electrode 23, and a protective layer 26 is formed on the dielectric layer 25.

  The back plate 30 has a back substrate 31 made of glass. A plurality of data electrodes 32 are formed on the back substrate 31, a dielectric layer 33 is formed so as to cover the data electrodes 32, and a grid-like partition wall 34 is formed thereon. A phosphor layer 35 that emits light of each color of red (R), green (G), and blue (B) is provided on the side surface of the partition wall 34 and on the dielectric layer 33.

  The front plate 20 and the back plate 30 are arranged to face each other so that the display electrode pair 24 and the data electrode 32 intersect each other with a minute discharge space interposed therebetween, and the outer peripheral portion thereof is sealed with a sealing material such as glass frit. Has been. In the discharge space, for example, a mixed gas of neon and xenon is enclosed as a discharge gas. The discharge space is partitioned into a plurality of sections by partition walls 34, and discharge cells are formed at the intersections between the display electrode pairs 24 and the data electrodes 32. When these discharge cells discharge and emit light, an image is displayed, and the panel 10 is divided into an image display area for displaying an image and a non-display area other than that.

  Note that the structure of the panel 10 is not limited to the above-described structure, and for example, the panel 10 may include a stripe-shaped partition wall.

  FIG. 2 is an electrode array diagram of panel 10 in accordance with the exemplary embodiment of the present invention. The panel 10 includes n scan electrodes SC1 to SCn (scan electrode 22 in FIG. 1) and n sustain electrodes SU1 to SUn (FIG. 1) extending in the row direction. 1 sustain electrodes 23) are arranged, and m (in this embodiment, m = 5760) data electrodes D1 to Dm (data electrode 32 in FIG. 1) extending in the column direction are arranged. A discharge cell is formed at a portion where one pair of scan electrode SCi (i = 1 to n) and sustain electrode SUi intersects one data electrode Dj (j = 1 to m), and the discharge cell is in the discharge space. M × n are formed. As shown in FIGS. 1 and 2, scan electrode SCi and sustain electrode SUi are formed in parallel with each other, and therefore, between scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn. There is a large interelectrode capacitance Cp.

  FIG. 3 is a partially enlarged view of panel 10 according to the embodiment of the present invention. Sustain electrode 23 has a lead portion formed to be drawn to the non-display area of panel 10. In order to apply the same drive voltage in common to the sustain electrode 23, a short-circuit wiring 27 connected in common to all the sustain electrodes 23 is formed, and a plurality of lead electrodes 28 are provided in the short-circuit wiring 27. Thus, a lead-out portion of the sustain electrode 23 is formed.

  FIG. 4 is a schematic diagram showing a state in which an FPC is connected to panel 10 according to the embodiment of the present invention. The FPC 539 is made of a flexible printed wiring board so that flexible wiring can be performed, and has a stripe-shaped wiring formed by printing a metal foil on a generally known flexible resin board such as polyimide. It has a configuration. An insulating part is provided between the wirings so that the wirings on the stripe are electrically insulated from each other. The electrode terminal provided at one end of the FPC 539 is formed with an interval and a wiring width based on the arrangement interval of the extraction electrodes of the scanning electrode 22, and the electrode terminal provided at the other end of the FPC 539 is the FPC 539. Are formed at an interval and a wiring width based on the arrangement interval of the electrodes provided in the connector to which is connected. The FPC 539 is fixed to the front plate 20 with the electrode terminals provided at one end thereof being electrically connected to the lead electrodes of the scanning electrode 22.

  The sustain electrode FPC 549 is formed of a flexible printed wiring board similar to the FPC 539, and has a structure in which a metal foil is printed on a flexible resin substrate. The wiring portion is composed of a drive conductor 547 that has a function of transmitting a drive voltage such as a sustain pulse voltage to the sustain electrode 23, and a connection confirmation conductor 548 for taking out the drive voltage. Note that the driving lead 547 is formed as a single wide wiring so that a large current can flow. Further, since it is empirically known that the end of the FPC is easily peeled off first when the connection portion between the FPC and the extraction electrode is detached due to vibration or impact, the connection confirmation lead 548 is shown in FIG. In this way, it is formed close to the end of the sustain electrode FPC 549. An insulating portion is provided between the driving lead wire 547 and the connection confirmation lead wire 548 and is electrically insulated from each other. The electrode terminal provided at one end of the sustain electrode FPC 549 is formed with an interval and a wiring width based on the arrangement interval of the lead electrodes 28 of the short-circuit wiring 27, and is formed at the other end of the sustain electrode FPC 549. The provided electrode terminals are formed at intervals and wiring widths based on the arrangement intervals of the electrodes provided on the connector to which the sustain electrode FPC 549 is connected. The sustain electrode FPC 549 is fixed to the front plate 20 with the electrode terminals provided at one end thereof being electrically connected to the lead electrodes 28 respectively. Therefore, the drive voltage transmitted from the drive conductor 547 to the short-circuit wiring 27 can be taken out from the connection confirmation conductor 548 via the short-circuit wiring 27.

  By configuring the sustain electrode FPC 549 in such a configuration, when an electrical connection failure occurs between the sustain electrode driving circuit and the short-circuit wiring 27, for example, a connection portion between the sustain electrode FPC 549 and the lead electrode 28. When a failure occurs and a connection failure occurs between the sustain electrode FPC 549 and the extraction electrode 28, it can be immediately detected.

  FIG. 5 is a diagram illustrating an example of a circuit block of the plasma display device. In FIG. 5, the plasma display device 1 includes the panel 10, the image signal processing circuit 51, the data electrode drive circuit 52, the scan electrode drive circuit 53, the sustain electrode drive circuit 54, the timing generation circuit 55, A connection failure detection circuit 500 and a power supply circuit (not shown) for supplying power necessary for each circuit block are provided.

  The image signal processing circuit 51 described above converts the input image signal sig into image data indicating light emission / non-light emission for each subfield. The data electrode driving circuit 52 described above converts the image data for each subfield into signals corresponding to the data electrodes D1 to Dm, and drives the data electrodes D1 to Dm. The timing generation circuit 55 described above generates various timing signals for controlling the operation of each circuit block based on the horizontal synchronization signal H and the vertical synchronization signal V, and supplies them to the respective circuit blocks. Based on the timing signal, scan electrode driving circuit 53 described above generates a sustain pulse in the sustain period, generates a ramp waveform voltage in the initialization period, and generates a scan pulse in the address period, thereby generating each scan electrode SC1. ... SCn is driven. Sustain electrode driving circuit 54 has sustain pulse generating unit 200 for generating a sustain pulse in the sustain period, and drives sustain electrodes SU1 to SUn based on a timing signal. The connection failure detection circuit 500 described above is provided on a printed circuit board (three in this embodiment) used for driving the sustain electrodes SU1 to SUn, and the sustain electrodes SU1 to SUn applied to the short-circuit wiring 27 are provided. It is detected whether or not a voltage for driving is output from the connection confirmation lead 548 of the sustain electrode FPC 549, and an electrical connection failure between the sustain electrode drive circuit 54 and the short-circuit wiring 27 is detected.

  Next, details of sustain electrode drive circuit 54 will be described.

  FIG. 6 is a circuit diagram showing details of sustain electrode drive circuit 54 of plasma display device 1 in accordance with the exemplary embodiment of the present invention. The sustain pulse generator 200 includes a power recovery unit 210 and a clamp unit 220. The power recovery unit 210 includes a power recovery capacitor C200, switching elements Q211 and Q212, and backflow prevention diodes D201 and D202. The clamp unit 220 includes switching elements Q221 and Q222.

  Further, as shown in FIG. 6, the sustain electrode drive circuit 54 includes switching elements Q231 and Q232 for applying the voltage Ve1 to the sustain electrodes SU1 to SUn, a backflow prevention diode D231, and a voltage ΔVe to the voltage Ve1. Switching elements Q241 and Q242 for applying the accumulated voltage Ve2 to sustain electrodes SU1 to SUn, and a charging capacitor C241 are provided.

  Regarding sustain electrodes SU1 to SUn, since the same drive voltage can be applied in common to all sustain electrodes SU1 to SUn as will be described later, sustain electrode drive circuit 54 provides sustain electrodes SU1 to SUn individually. The sustain electrodes SU1 to SUn are electrically connected to the sustain electrode drive circuit 54 in common electrically.

  The details of the connection failure detection circuit 500 will be described later.

  Next, a driving voltage waveform for driving panel 10 and its operation will be described. The plasma display device in the present embodiment uses a subfield method as a method for driving panel 10. In this method, one field period is divided into a plurality of subfields, and gradation display is performed by controlling light emission and non-light emission of each discharge cell in each subfield. Each subfield has an initialization period, an address period, and a sustain period.

  In the initializing period, initializing discharge is performed in the discharge cells, and wall charges necessary for the subsequent address operation are formed. In the address period, a scan pulse is sequentially applied to the scan electrodes SC1 to SCn and an address pulse corresponding to an image signal to be displayed is applied to the data electrodes D1 to Dm to perform address discharge, thereby forming a selective wall charge. Do. In the subsequent sustain period, a predetermined number of sustain pulses corresponding to the display luminance to be emitted are applied between scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn, and a discharge cell in which wall charges are formed by address discharge is selected. Discharge and emit light.

  FIG. 7 is a drive voltage waveform diagram of the plasma display apparatus. FIG. 7 shows drive voltage waveforms of two subfields, that is, drive voltage waveforms of the first subfield (first SF) and the second subfield (second SF). The voltage waveform is almost the same.

  In the first half of the initializing period of the first SF, 0 (V) is applied to the data electrodes D1 to Dm and the sustain electrodes SU1 to SUn, respectively, and the discharge start voltage with respect to the sustain electrodes SU1 to SUn is applied to the scan electrodes SC1 to SCn. A ramp waveform voltage that gently rises from the voltage Vi1 below toward the voltage Vi2 that exceeds the discharge start voltage is applied. While this ramp waveform voltage rises, a weak initializing discharge occurs between scan electrodes SC1 to SCn, sustain electrodes SU1 to SUn, and data electrodes D1 to Dm. Negative wall voltage is accumulated on scan electrodes SC1 to SCn, and positive wall voltage is accumulated on data electrodes D1 to Dm and sustain electrodes SU1 to SUn. Here, the wall voltage above the electrode represents a voltage generated by wall charges accumulated on the dielectric layer covering the electrode, the protective layer, the phosphor layer, and the like.

  In the latter half of the initialization period, positive voltage Ve1 is applied to sustain electrodes SU1 to SUn via diode D231 and switching elements Q231 and Q232 shown in FIG. At this time, the voltage Ve1 is commonly applied from the sustain electrode driving circuit 54 to all the sustain electrodes SU1 to SUn via the sustain electrode FPC 549 and the short-circuit wiring 27. At this time, the switching element Q242 is turned on, and the capacitor C241 is charged so that the voltage of the capacitor C241 becomes the voltage Ve1. A scan waveform SC1 to SCn is applied with a ramp waveform voltage that gently decreases from voltage Vi3 that is equal to or lower than the discharge start voltage to voltage Vi4 that exceeds the discharge start voltage with respect to sustain electrodes SU1 to SUn. During this time, weak initializing discharges occur between scan electrodes SC1 to SCn, sustain electrodes SU1 to SUn, and data electrodes D1 to Dm, respectively. Then, the negative wall voltage above scan electrodes SC1 to SCn and the positive wall voltage above sustain electrodes SU1 to SUn are weakened, and the positive wall voltage above data electrodes D1 to Dm is adjusted to a value suitable for the write operation. The

  Thus, the initialization operation ends. As the drive voltage waveform in the initialization period, only the voltage waveform in the latter half of the initialization period may be applied as shown in the initialization period of the second SF in FIG. Initializing discharge is selectively generated in the discharge cells that have undergone sustain discharge in the sustain period of the field.

  In the subsequent address period, voltage Vc is applied to scan electrodes SC1 to SCn. At this time, in sustain electrode driving circuit 54, switching element Q242 is cut off (hereinafter referred to as “off”) while switching elements Q231 and Q232 are kept on, and switching element Q241 is turned on to obtain the voltage of capacitor C241. The voltage ΔVe is superimposed. Thereby, voltage Ve1 + ΔVe, that is, voltage Ve2 is applied to sustain electrodes SU1 to SUn. Further, the current from the capacitor C241 to the voltage source Ve1 is cut off by the action of the diode D231 for preventing backflow. At this time, the voltage Ve <b> 2 is commonly applied from the sustain electrode driving circuit 54 to all the sustain electrodes SU <b> 1 to SUn via each sustain electrode FPC 549 and the short-circuit wiring 27.

  Next, negative scan pulse voltage Va is applied to scan electrode SC1 in the first row. Then, a positive address pulse voltage Vd is applied to the data electrode Dk (k = 1 to m) of the discharge cell that should emit light in the first row among the data electrodes D1 to Dm. Then, the voltage difference at the intersection between the data electrode Dk and the scan electrode SC1 is obtained by adding the difference between the wall voltage on the data electrode Dk and the wall voltage on the scan electrode SC1 to the difference between the externally applied voltages (Vd−Va). The discharge start voltage is exceeded. Then, address discharge occurs between data electrode Dk and scan electrode SC1, and between sustain electrode SU1 and scan electrode SC1, positive wall voltage is accumulated on scan electrode SC1, and negative wall is applied on sustain electrode SU1. A voltage is accumulated, and a negative wall voltage is also accumulated on the data electrode Dk. In this way, the write operation for the first row is performed. On the other hand, the voltage at the intersection of the data electrodes D1 to Dm to which the address pulse voltage Vd is not applied and the scan electrode SC1 does not exceed the discharge start voltage, so that address discharge does not occur. The above address operation is performed until the discharge cell in the nth row, and the address period ends.

  In the subsequent sustain period, first, switching element Q212 of sustain electrode drive circuit 54 is turned on. Then, the charges on the sustain electrodes SU1 to SUn side start to flow to the capacitor C200 through the short-circuit wiring 27 and each sustain electrode FPC 549, the inductor L200, the diode D202, and the switching element Q212, and the voltages of the sustain electrodes SU1 to SUn begin to decrease. . Then, switching element Q222 is turned on when the voltage of sustain electrodes SU1 to SUn drops to near 0 (V). Then, sustain electrodes SU1 to SUn are clamped to 0 (V) through switching element Q222.

  Further, scan electrode drive circuit 53 is operated to raise the voltages of scan electrodes SC1 to SCn to voltage Vs.

  In this manner, 0 (V) is applied to sustain electrodes SU1 to SUn, and positive sustain pulse voltage Vs is applied to scan electrodes SC1 to SCn. Then, in the discharge cell in which the address discharge has occurred, the voltage difference between scan electrode SCi and sustain electrode SUi is the sum of sustain pulse voltage Vs and the difference between the wall voltage on scan electrode SCi and the wall voltage on sustain electrode SUi. The discharge start voltage is exceeded. Then, a sustain discharge occurs between scan electrode SCi and sustain electrode SUi, and phosphor layer 35 emits light by the ultraviolet rays generated at this time.

  As a result of this discharge, negative wall voltage is accumulated on scan electrode SCi, and positive wall voltage is accumulated on sustain electrode SUi. Further, a positive wall voltage is accumulated on the data electrode Dk. In the discharge cells in which no address discharge has occurred during the address period, no sustain discharge occurs, and the wall voltage at the end of the initialization period is maintained.

  Subsequently, scan electrode driving circuit 53 is operated to lower the voltages of scan electrodes SC1 to SCn to 0 (V).

  Further, the switching element Q211 of the sustain electrode driving circuit 54 is turned on. Then, a current starts to flow from the capacitor C200 for power recovery to the sustain electrodes SU1 to SUn via the switching element Q211, the diode D201, the inductor L200, the sustain electrode FPC 549 and the short-circuit wiring 27, and the sustain electrodes SU1 to SUn. The voltage starts to rise. Then, when the voltage of sustain electrodes SU1 to SUn rises to near Vs, switching element Q221 is turned on. Then, sustain electrodes SU1 to SUn are clamped to voltage Vs of smoothing capacitor C250 through switching element Q221.

  In this manner, 0 (V) is applied to scan electrodes SC1 to SCn, and positive sustain pulse voltage Vs is applied to sustain electrodes SU1 to SUn. Then, in the discharge cell in which the sustain discharge has occurred, the voltage difference between the sustain electrode SUi and the scan electrode SCi exceeds the discharge start voltage, so that the sustain discharge occurs again between the sustain electrode SUi and the scan electrode SCi. A negative wall voltage is accumulated on SUi, and a positive wall voltage is accumulated on scan electrode SCi.

  Thereafter, similarly, the number of sustain pulses corresponding to the luminance weight is alternately applied to scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn, and a potential difference is given between the electrodes of display electrode pair 24, thereby writing in the write period. The sustain discharge is continuously performed in the discharge cell that has caused the discharge.

  At this time, in order to stably generate a sustain discharge in each discharge cell, a sustain pulse having a steep shape with a rise time of 1 μsec or less and an amplitude of usually several hundreds (V) or more is applied to the display electrode pair 24. There is a need to. For this reason, a large current instantaneously flows through the panel, but this current increases in proportion to the area of the display screen. For example, when sustain discharge occurs in the majority of all discharge cells, a large current exceeding 200 (A) instantaneously flows if the display screen size is a 50-inch panel. In the panel 10 having a display screen size of 103 inches in the form, a very large current exceeding 800 (A), which is about four times that, flows instantaneously.

  At the end of the sustain period, a so-called narrow pulse-like potential difference is applied between scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn, and the positive wall voltage on data electrode Dk is left while scanning. The wall voltage on electrode SCi and sustain electrode SUi is reduced.

  Thus, the maintenance operation in the maintenance period is completed. As described above, the sustain electrode driving circuit 54 applies all the sustain pulse voltages to all the sustain electrodes SU1 to SUn via the sustain electrode FPCs 549 and the short-circuit wiring 27 as described above. The electrodes SU1 to SUn are driven in common.

  The subsequent operation of the subfield is substantially the same as the operation of the first SF, and thus description thereof is omitted.

  FIG. 8 is a diagram showing an example of an arrangement of a printed circuit board on which each electrode drive circuit of the plasma display device is mounted. FIG. 9 is a schematic diagram showing a connection state between the connector 544 mounted on the sustain pulse generating printed board 541 and the sustain electrode FPC 549, and FIG. 10 shows the drive output from the sustain electrode drive circuit 54. It is the schematic which shows the mode of supply of a voltage. FIG. 8 schematically shows a state in which the back cover of the plasma display device is removed, and schematically shows a printed circuit board group on which each electrode drive circuit is mounted and its arrangement.

  In the present embodiment, as shown in FIG. 8, the data electrode driving circuit 52 is mounted on twelve write pulse generating printed boards 521. The scan electrode drive circuit 53 is configured to be divided and mounted on three scan electrode drive printed boards 531.

  The sustain electrodes SU1 to SUn are configured to be driven using three printed boards. That is, the sustain electrode driving circuit 54 is mounted on the sustain pulse generating printed board 541 that is the main board, and the sustain electrode driving circuit 54 and the short-circuit wiring 27 are provided on the two relay printed boards 542 that are the relay boards. Is formed as a conductive wire. Then, the sustain pulse generating printed circuit board 541 and the relay printed circuit board 542 are electrically connected, so that the output from the sustain electrode driving circuit 54 is applied to the short-circuit wiring 27 via the relay printed circuit board 542. It is configured to be able to.

  As described above, in the present embodiment, the printed circuit board group 84 includes the twelve write pulse generating printed circuit boards 521, the three scanning electrode driving printed circuit boards 531, and the sustain pulse generating printed circuit boards 541 and 2. The number of printed circuit boards 542 is merely an example, and the number of printed circuit boards and the configuration of the drive circuit mounted on each printed circuit board are optimal in accordance with the specifications of the plasma display device. It is desirable to have a configuration.

  Each printed board has a plurality of connectors. The write pulse generation printed circuit board 521 is equipped with the connector 524 for connecting the FPC 529 described above, and the drive voltage output from the data electrode drive circuit 52 is the connector 524 and the FPC 529 connected to the connector 524. And applied to the data electrodes D1 to Dm.

  The scan electrode driving printed circuit board 531 includes a connector 533 for electrically connecting the scan electrode driving printed circuit boards 531 to each other and a connector 534 for connecting the FPC 539 described above. The drive voltage output from scan electrode drive circuit 53 is applied to each of scan electrodes SC1 to SCn via connector 534 and FPC 539 connected to connector 534.

  The sustain pulse generating printed circuit board 541 and the relay printed circuit board 542 are connected to the connector 543 for electrically connecting the sustain pulse generating printed circuit board 541 and the relay printed circuit board 542 and the short-circuit wiring 27. A connector 544 for connecting the above-described sustain electrode FPC 549 is mounted. As shown in FIG. 9, the sustain pulse generating printed circuit board 541 and the two relay printed circuit boards 542 are connected to the connector 543 of the sustain pulse generating printed circuit board 541 and the connector 543 of the relay printed circuit board 542 with a cable 545. It can be electrically connected by connecting by. Further, as indicated by a broken line in FIG. 10, the drive voltage output from the sustain electrode drive circuit 54 is supplied to the relay printed circuit board 542 via the connector 543 and the cable 545 connected to the connector 543, and the connector The voltage is applied to the short-circuit wiring 27 through the sustain electrode FPC 549 connected to the connector 544 and the sustain electrode 544, and is applied to all the sustain electrodes SU1 to SUn. In this embodiment, an example is shown in which four connectors 544 are mounted on each of the sustain pulse generating printed circuit board 541 and the relay printed circuit board 542, and one connector 543 is mounted. It is only an example, and it is desirable to have an optimal configuration in accordance with the specifications of the plasma display device.

  Here, in the sustain period, a discharge current corresponding to the number of discharge cells that have caused the sustain discharge flows along with the sustain discharge described above. This current increases in proportion to the area of the display screen. In the panel 10 having a display screen size of 103 inches in the present embodiment, a current about four times as large as that of a panel having a display screen size of 50 inches flows. For example, when sustain discharge occurs in the majority of all discharge cells, a very large current exceeding 800 (A) may flow instantaneously.

  As described above, in panel 10 according to the present embodiment, a large current that cannot be compared with that in the sustain period is generated in the sustain period, so that all sustain electrode FPCs 549 are reliably connected to the corresponding lead electrodes 28. It is important that each connector 544 is securely connected.

  At this time, for example, if there is a sustain electrode FPC 549 that has a poor connection with the corresponding lead electrode 28, the current that should flow through the sustain electrode FPC 549 is normally connected to the sustain electrode FPC 549. It flows through the FPC 549. In such a case, an excessive load is applied to the normally connected sustain electrode FPC 549, and therefore it is necessary to promptly take measures such as correctly reconnecting the sustain electrode FPC 549 in which the connection failure has occurred. is there. That is, when a plasma display device is configured using a panel having a huge display screen size such as the panel 10 in the present embodiment, it can be immediately detected when a connection failure with respect to the sustain electrode FPC 549 occurs. It is important to configure in this way.

  Therefore, in this embodiment, the connection failure detection circuit 500 described above is mounted on each of the sustain pulse generation printed board 541 and the two relay printed boards 542. As a result, when a connection failure related to the sustain electrode FPC 549 occurs, it can be immediately detected. Next, this configuration will be described.

  FIG. 11 is a schematic diagram showing a state of connection between sustain electrode FPC 549, sustain electrode drive circuit 54, and connection failure detection circuit 500 of plasma display apparatus 1 in accordance with the exemplary embodiment of the present invention.

  As shown in FIG. 11, in the sustain electrode FPC 549, each of the electrode terminals provided at one end is electrically connected to each of the lead electrodes 28 drawn from the short-circuit wiring 27. It is fixed to the front plate 20 with an adhesive. An electrode terminal is formed so that the other end of the sustain electrode FPC 549 can be connected to the connector 544. The connector 544 is electrically connected to the sustain electrode drive circuit 54 and the connection failure detection circuit 500. When the sustain electrode FPC 549 is connected to the connector 544, the drive conductor 547 and the sustain electrode drive circuit 54 Are electrically connected, and the connection confirmation lead 548 and the connection failure detection circuit 500 are electrically connected.

  Note that all the connectors 544 mounted on the sustain pulse generating printed circuit board 541 and the relay printed circuit board 542 are electrically connected to the sustain electrode driving circuit 54 mounted on the sustain pulse generating printed circuit board 541. The drive voltage from the sustain electrode drive circuit 54 is applied to the short-circuit wiring 27 via all these connectors 544. Further, the connection failure detection circuit 500 is mounted on each of the sustain pulse generation printed circuit board 541 and the two relay print circuit boards 542, and one connection failure detection circuit 500 provides all ( In the present embodiment, the connection failure relating to the sustain electrode FPC 549 connected to the four pairs of connectors 544 can be monitored.

  When the sustain electrode FPC 549 is normally connected, the drive voltage output from the sustain electrode drive circuit 54 is supplied to the short-circuit wiring 27 via the connector 544, the drive conductor 547, and the lead electrode 28. Further, the voltage is applied to the connection failure detection circuit 500 via the lead electrode 28, the connection confirmation lead 548, and the connector 544. On the other hand, when a connection failure occurs with respect to any of the sustain electrode FPCs 549, the drive voltage output from the sustain electrode drive circuit 54 is applied to the short-circuit wiring 27 via the normally connected sustain electrode FPC 549. In the sustain electrode FPC 549 in which the connection failure has occurred, the electrical connection between the sustain electrode drive circuit 54 and the short-circuit wiring 27 is cut off. Therefore, the drive voltage output from the sustain electrode drive circuit 54 is not transmitted to the connection confirmation conductor 548 of the sustain electrode FPC 549 in which the connection failure has occurred, but is driven from the connection confirmation conductor 548 to the connection failure detection circuit 500. There is no voltage input. In the present embodiment, the connection failure detection circuit 500 detects whether or not the drive voltage output from the sustain electrode drive circuit 54 is output from the connection confirmation lead 548, and detects a connection failure related to the FPC 549 for the sustain electrodes. ing.

  Details of the connection failure detection circuit 500 will be described next. FIG. 12 is a circuit diagram showing details of connection failure detection circuit 500 of plasma display device 1 according to the embodiment of the present invention.

  The connection failure detection circuit 500 includes a switching circuit 501 and connection circuits 510, 520, 530, and 540. The connection circuit 510 is connected to the connection points of the resistors R10 and R11 and the resistors R10 and R11 for resistance-dividing the sustain electrode drive voltage output from the connection confirmation lead 548, and the resistance-divided sustain electrode drive voltage Capacitor C10 for smoothing and a backflow prevention diode D10 having a cathode connected to a connection point between resistors R10 and R11. Each of the connection circuits 520, 530, and 540 has the same configuration as that of the connection circuit 510. The connection circuit 520 includes resistors R20 and R21, a capacitor C20, and a diode D20. The connection circuit 530 includes resistors R30 and R31. The capacitor C30 and the diode D30 are included, and the connection circuit 540 includes resistors R40 and R41, a capacitor C40, and a diode D40.

  The switching circuit 501 smoothes a PNP transistor Q1 for performing a switching operation, a resistor R1 disposed between the base of the transistor Q1 and the voltage source V1, and a voltage input to the base of the transistor Q1. And a resistor R2 for taking out a predetermined voltage (hereinafter referred to as “data Hi”) when the transistor Q1 operates.

  The anodes of the diodes D10, D20, D30, and D40 are connected to each other and to the base of the transistor Q1 of the switching circuit 501.

  The resistors R10 and R11 are configured so that the voltage applied to the diode D10 is suppressed within the rating of the diode D10 when a sustain pulse having an amplitude of about 200 (V) is applied, and the cathode voltage of the diode D10 is the anode voltage. Each resistance value is set to be higher than the voltage (here, the voltage of the voltage source V1). Capacitor C10 sets the capacitance value so that the sustain pulse can be smoothed. Further, the resistance value of the resistor R1 is set so that the voltage applied to the base of the transistor Q1 becomes a voltage for operating the transistor Q1 when one end of the resistor R10 is opened. The resistance value of the resistor R2 is set so that the output voltage becomes “data Hi” (for example, 5 (V)) when the transistor Q1 operates. In this embodiment, the resistors R10 and R11 are 47 kΩ, the capacitor C10 is 0.1 μF, the resistor R1 is 22 kΩ, the resistor R2 is 10 kΩ, the capacitor C1 is 1 μF, and the voltage source V1 is 5 (V). This value is merely an example, and it is desirable to set it to an optimum value according to the specifications of the plasma display device.

  In the connection failure detection circuit 500 having such a configuration, if all the sustain electrode FPCs 549 are normally connected, for example, in the connection circuit 510, the sustain electrode drive voltage that has passed through the connection confirmation lead 548 and the connector 544. Is divided by the resistors R10 and R11, smoothed by the capacitor C10, and applied to the cathode of the diode D10. As a result, the diode D10 becomes electrically disconnected because the cathode voltage is higher than the anode voltage. A similar operation occurs in the connection circuits 520, 530, and 540, and all of the diodes D10, D20, D30, and D40 are electrically cut off. Therefore, the transistor Q1 has a base potential almost the same as the voltage source V1, that is, almost the same potential as the emitter, the current between the emitter and the collector is cut off, and the output voltage of the switching circuit 501 is almost the ground potential (hereinafter referred to as the ground potential). , “Data Lo”).

  On the other hand, if a connection failure occurs in any of the sustain electrode FPCs 549, for example, if the connection portion between the sustain electrode FPC 549 and the lead electrode 28 is peeled off or the sustain electrode FPC 549 is disconnected from the connector 544, the resistance One end of R10 is in an open state. As a result, the diode D10 becomes conductive with the cathode grounded via the resistor R11, and the voltage of the capacitor C10 is set to a predetermined voltage, that is, the voltage of the voltage source V1 via the diode D10. The voltage is divided by resistance. As a result, the voltage applied to the base of the transistor Q1 becomes a voltage for operating the transistor Q1, a current flows between the emitter and collector of the transistor Q1, and the voltage from the switching circuit 501 by the current and the resistor R2, that is, “Data Hi” is output.

  Further, when a connection failure occurs in the connector 544 connected to the connection circuit 510 and the connector 544 connected to the connection circuit 520, one ends of the resistor R10 and the resistor R20 are opened, and the resistor R11, the resistor R21, Are connected in parallel with each other, and the voltages of the capacitor C10 and the capacitor C20 become lower than the predetermined voltage. Also in this case, as described above, a current flows between the emitter and collector of the transistor Q1, and the switching circuit 501 outputs “data Hi”. That is, when a connection failure occurs in at least one of the sustain electrode FPCs 549 connected to the four connectors 544 monitored by the connection circuit 510, “data Hi” is output from the switching circuit 501.

  In the present embodiment, this connection failure detection circuit 500 is mounted on each of the sustain pulse generating printed circuit board 541 and the two relay printed circuit boards 542. Therefore, in the plasma display device 1, when a connection failure related to the sustain electrode FPC 549 occurs at any one location, the “data Hi” is output from the connection failure detection circuit 500 to immediately detect that a connection failure has occurred. Can do.

  As described above, in the present embodiment, the sustain electrode FPC 549 is provided with the drive conductor 547 and the connection confirmation conductor 548, and the drive voltage output from the sustain electrode drive circuit 54 is supplied to the drive conductor 547, By detecting the connection failure detection circuit 500 via the short-circuit wiring 27 and the connection confirmation lead 548, for example, the connection portion between the sustain electrode FPC 549 and the lead electrode 28 may be peeled off, and the like. When a connection failure occurs, it can be immediately detected that a connection failure has occurred. As a result, for example, it is possible to perform a display such as displaying a notification of the occurrence of a connection failure or forcibly turning off the power of the plasma display device.

  13 and 14 are diagrams showing another example of the sustain electrode FPC in the present invention.

  In the example shown in FIG. 13, the sustain electrode FPC 549 a is configured to include a drive conductor 547 and two connection confirmation conductors 548 on both sides thereof. With this configuration, it is possible to monitor a connection failure related to the sustain electrode FPC 549 with higher accuracy.

  In the example shown in FIG. 14, the sustain electrode FPC 549b has two drive conductors 547 and a connection confirmation conductor 548 between them.

  In this embodiment, the configuration in which the connection failure detection circuit 500 includes the four connection circuits 510, 520, 530, and 540 has been described. This is because the connection failure of the four sustain electrode FPCs 549 is monitored. The connection failure detection circuit 500 is configured as described above, and may have other configurations. Note that the number of connection circuits in the connection failure detection circuit 500 is desirably changed according to the number of sustain electrode FPCs 549 monitored by the connection failure detection circuit 500.

  In the present embodiment, the connection failure detection circuit 500 is described in which one switching circuit 501 is electrically connected to the four connection circuits 510, 520, 530, and 540. However, the same number as the connector 544 is used. The switching circuit 501 may be provided, and the connection failure of one sustain electrode FPC 549 may be monitored by one switching circuit 501. Alternatively, all the connection circuits may be connected to one switching circuit 501, and all the sustain electrode FPCs 549 may be monitored by one switching circuit 501.

  In the present embodiment, the connection failure detection circuit 500 has been described with respect to the configuration in which the “data Hi” is output using the switching circuit 501, but the present invention is not limited to this configuration, and other detection means, For example, a configuration in which the presence or absence of a drive voltage is detected using a microcomputer having a voltage detection function may be used. In addition, an operation similar to that of the switching circuit 501 can be performed using an NPN transistor, a Zener diode, or the like. In the present embodiment, the circuit configuration for performing the switching operation in the connection failure detection circuit 500 is not limited to the circuit configuration shown in FIG. 12, and an output signal is output when one of the connection circuits does not detect the drive voltage. Any circuit configuration may be used as long as it can be displaced.

  In the present embodiment, the configuration in which “data Hi” is output from the connection failure detection circuit 500 when a connection failure is detected has been described. However, the polarity of the signal output from the switching circuit 501 is reversed. The switching circuit 501 may be configured so that “data Lo” is output when a connection failure is detected.

  As described above, the present invention can be immediately detected when a connection failure occurs between the sustain electrode driving circuit and the short-circuit wiring, and is useful for improving the reliability of the plasma display device. It is an invention.

The disassembled perspective view which shows the structure of the panel of the plasma display apparatus in one embodiment of this invention. Electrode arrangement of the panel Partial enlarged view of the panel Schematic showing the FPC connected to the panel The figure which shows an example of the circuit block of the plasma display apparatus of this invention Circuit diagram showing details of sustain electrode drive circuit of same plasma display device Driving voltage waveform diagram of the plasma display device The figure which shows an example of arrangement | positioning of the printed circuit board carrying each electrode drive circuit of the plasma display apparatus Schematic showing the state of connection between the connector mounted on the sustain pulse generating printed circuit board of the plasma display device and the sustain electrode FPC Schematic showing how the drive voltage supplied from the sustain electrode drive circuit of the plasma display device is supplied Schematic showing a state of connection between sustain electrode FPC, sustain electrode drive circuit, and connection failure detection circuit of the plasma display device Circuit diagram showing details of connection failure detection circuit of same plasma display device The figure which shows another example of FPC for sustain electrodes The figure which shows another example of FPC for sustain electrodes

Explanation of symbols

10 Panel (Plasma Display Panel)
DESCRIPTION OF SYMBOLS 20 Front plate 22 Scan electrode 23 Sustain electrode 24 Display electrode pair 27 Short-circuit wiring 28 Lead electrode 54 Sustain electrode drive circuit 200 Sustain pulse generation part 500 Connection failure detection circuit 501 Switching circuit 510,520,530,540 Connection circuit 529,539 FPC
541 Printed circuit board for sustain pulse generation 547 Drive lead 548 Connection check lead 549, 549a, 549b FPC for sustain electrode
Q211, Q212, Q221, Q222, Q231, Q232, Q241, Q242 Switching element C200 Capacitor for power recovery C241 Capacitor for charging D10, D20, D30, D40, D201, D202, D231 (For backflow prevention) ) Diode L200 (for resonance) Inductor R1, R2, R10, R11, R20, R21, R30, R31, R40, R41 Resistor C1, C10, C20, C30, C40 Capacitor Q1 (PNP type) transistor

Claims (3)

A plasma display panel in which a plurality of scan electrodes and sustain electrodes are formed on a front plate and a short-circuit wiring commonly connected to one end of the plurality of sustain electrodes is formed, and a drive voltage is supplied to the sustain electrodes A sustain electrode drive circuit, and a flexible wiring board that electrically connects the sustain electrode drive circuit and the short-circuit wiring,
Confirmation of connection between the driving lead for supplying a driving voltage to the sustain electrode and the driving lead on the flexible wiring board and electrically connected to the short-circuiting wire. And a connection failure detection circuit that is electrically connected to the connection wire for connection confirmation of the flexible wiring board and detects an electrical connection failure between the sustain electrode drive circuit and the short-circuiting wire. A plasma display device. The connection failure detection circuit includes a plurality of resistors for resistance-dividing the drive voltage output from the connection confirmation lead, a capacitor for smoothing the resistance-divided drive voltage, a diode having a cathode connected to the capacitor, The plasma display apparatus according to claim 1, further comprising a switching circuit connected to an anode of the diode and configured to displace an output signal when a voltage of the capacitor becomes a predetermined voltage or less. The plasma display apparatus according to claim 1, wherein the sustain electrode driving circuit and the connection failure detection circuit are mounted on the same substrate.

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