JP2008052000A - Electro-optical device and electronic apparatus - Google Patents

Abstract

A voltage drop in a power supply line is suppressed while reducing the cost of an electro-optical device.
An element portion including a plurality of electro-optic elements is formed on a substrate. The IC chip 60 outputs a control signal S for controlling each electro-optical element E. The plurality of signal lines 32 formed on the surface of the substrate 10 transmits the control signal S output from the IC chip 60 to the element unit 20. The power supply terminal 44 is formed in the gap between the signal lines 32 adjacent to each other on the surface of the substrate 10. A power supply potential VEL is supplied to the power supply terminal 44 via a power supply wiring substrate 70 fixed to the substrate 10 and straddling the IC chip 60. The power supply line 34 supplies the power supply potential VEL from the power supply terminal 44 to the element unit 20.
[Selection] Figure 5

Description

  The present invention relates to a structure of an electro-optical device using an electro-optical element such as a light emitting element.

Conventionally, an electro-optical device in which an element portion in which a plurality of electro-optical elements are arranged is formed on the surface of a substrate has been proposed. For example, Patent Document 1 discloses a configuration in which an IC chip 91 for driving each electro-optic element is mounted on the surface of a substrate 95 together with an element portion 93 as shown in FIG. On the surface of the substrate 95, a power supply line 97 for supplying a power supply potential to each electro-optical element is formed. The power line 97 is formed in a substantially U shape (substantially C shape) along the periphery of the substrate 95 so as to surround the IC chip 91 and the element portion 93.
JP 2004-127924 A

  However, in the configuration of Patent Document 1, since the total length of the power supply line 97 is long, a voltage drop in the power supply line 97 becomes significant, and the difference in power supply potential supplied to each electro-optical element increases. If the power supply potential is different for each electro-optic element, there is a problem that unevenness occurs in the light amount of each electro-optic element. In order to solve the above problem, as illustrated in FIG. 18, a configuration in which a wiring 99 that crosses the element portion 93 and is connected to a middle portion of the power supply line 97 may be employed. However, in the configuration of FIG. 18, since it is necessary to disperse and arrange the plurality of IC chips 91A and 91B so as to sandwich the wiring 99, there is a problem that the manufacturing cost of the electro-optical device increases. In view of the above circumstances, an object of the present invention is to solve the problem of suppressing a voltage drop in a feeder line while reducing the cost of an electro-optical device.

  In order to solve the above problems, an electro-optical device according to one aspect of the present invention includes a substrate on which an element unit including a plurality of electro-optical elements is formed, and a control signal for controlling each electro-optical element. An IC chip to be output, a plurality of signal lines that are formed on the surface of the substrate and transmit control signals output from the IC chip to the element portion, and a gap between two adjacent signal lines on the surface of the substrate A first power supply terminal (for example, power supply terminal 44 in each drawing) formed on the first wiring board and a first wiring board that is fixed to the substrate and supplies a predetermined potential to the first power supply terminal (for example, power supply wiring board 70 in each drawing). And a power supply line for supplying a predetermined potential from the first power supply terminal to the element portion.

  According to the above configuration, since the first power supply terminal formed in the gap between the two adjacent signal lines is used for supplying a potential to the power supply line, for example, the potential is applied to the power supply line only from both sides of the element unit. Compared with the supplied configuration, the voltage drop in the feeder line is suppressed. In addition, since the potential is supplied to the first power supply terminal via the first wiring board, it is not necessary to disperse and arrange a plurality of IC chips at positions sandwiching the first power supply terminal. Therefore, it is possible to reduce the cost required for manufacturing the electro-optical device. However, this is not intended to exclude a configuration including a plurality of IC chips from the scope of the present invention.

  The electro-optical device according to the first aspect of the present invention includes a terminal group (for example, a terminal group G1 in FIG. 5) including a plurality of connection terminals arranged on the surface of the substrate, and a second wiring substrate ( For example, the second wiring board transmits a control signal output from the IC chip to each connection terminal, and the plurality of signal lines transmits the control signal from each connection terminal to the element portion. Transmit to. The IC chip is mounted on the second wiring board, for example.

  In the electro-optical device according to the first aspect, for example, the first power supply terminal is formed at a position separated from a straight line in which the plurality of connection terminals are arranged, and the plurality of connection terminals are the first power supply on the surface of the substrate. It is not formed in a region (for example, region 16 in FIG. 7) extending from the terminal along the direction perpendicular to the arrangement of the plurality of connection terminals. According to the above aspect, since the plurality of connection terminals are formed so as to avoid the first power supply terminal, the first power supply is provided even in the configuration in which the first power supply terminal is disposed close to the arrangement of the plurality of connection terminals. It is possible to reliably insulate the terminal and each connection terminal. Therefore, there is an advantage that the space required for the arrangement of the first power supply terminal and the plurality of connection terminals is reduced, and as a result, the substrate (and also the electro-optical device) can be downsized. A specific example of this aspect will be described later as a second embodiment.

  In the electro-optical device according to the first aspect, for example, the first power supply terminal is formed on a straight line in which a plurality of connection terminals are arranged, and a portion of the second wiring board corresponding to the first power supply terminal is notched ( For example, a notch 521) in FIG. 11 is formed, and the first wiring board is bonded to the substrate inside the notch. According to the above aspect, since the first power supply terminals are arranged on a straight line together with the plurality of connection terminals, the first power supply terminals are separated from the arrangement of the plurality of connection terminals, compared with the configuration in which the first power supply terminals are formed. There is an advantage that the space required for the arrangement of the power supply terminal and the plurality of connection terminals is reduced, and as a result, the substrate (and also the electro-optical device) can be downsized. A specific example of this aspect will be described later as a third embodiment.

  The electro-optical device according to the second aspect of the present invention includes a terminal group (for example, a terminal group G2 in FIG. 13) including a plurality of connection terminals arranged on the surface of the substrate, and a signal transmitted to each connection terminal. The IC chip is mounted on the surface of the substrate and outputs a control signal corresponding to a signal supplied from the second wiring substrate to each connection terminal to each signal line. A specific example of this aspect will be described later as a fourth embodiment.

  In the electro-optical device according to each of the above aspects, a plurality of second power feeds that are formed at positions on the surface of the substrate that sandwich the terminal group along the arrangement direction of the plurality of connection terminals and that are supplied with a predetermined potential. A terminal is further provided, and the power supply line includes a first portion (for example, the portion 341 in FIG. 1) extending along the arrangement of the electro-optic elements, and a plurality of ends connecting each end of the first portion to the second power supply terminal. The second part (for example, the part 342 in FIG. 1) and the third part (for example, the part 343 in FIG. 1) for connecting the middle part of the first part to the first power supply terminal. According to the above aspect, since the first power supply terminal and the plurality of second power supply terminals are used for supplying a potential to the power supply line, a voltage drop in the power supply line is effectively suppressed.

  In a further preferred aspect, the first wiring board and the second wiring board overlap each other. According to this aspect, there is an advantage that the electro-optical device is reduced in size as a whole as compared with the configuration in which the first wiring board and the second wiring board do not overlap. For example, in the configuration in which the IC chip is mounted on the second wiring board, the first wiring board overlaps with the IC chip.

  In another aspect, the first wiring board and the second wiring board are fixed to one circuit board. For example, the first wiring board is fixed to one surface of the circuit board, and the second wiring board is fixed to the other surface of the circuit board. According to this aspect, since the first wiring board and the second wiring board are formed on separate surfaces of the circuit board, the circuit board is compared with the configuration in which each wiring board is formed on one surface of the circuit board. Is miniaturized.

  The electro-optical device according to each aspect described above is used in various electronic apparatuses. A typical example of the electronic apparatus according to the present invention is an electrophotographic image forming apparatus in which the electro-optical device according to each of the above embodiments is used for exposure of an image carrier such as a photosensitive drum. This image forming apparatus is realized by adding an image carrier on which a latent image is formed by exposure, the electro-optical device of the present invention that exposes the image carrier, and a developer (for example, toner) to the latent image on the image carrier. And a developing unit for forming an image. However, the use of the electro-optical device according to the present invention is not limited to the exposure of the image carrier. For example, in an image reading apparatus such as a scanner, the electro-optical device according to the present invention can be used for illuminating a document. The image reading apparatus includes an electro-optical device according to each of the above aspects, and a light-receiving device (for example, a CCD (Charge Coupled Device) element that converts light emitted from the electro-optical device and reflected by a reading target (original) into an electric signal. Etc.). Furthermore, an electro-optical device in which electro-optical elements are arranged in a matrix is also used as a display device for various electronic devices such as a personal computer and a mobile phone.

<A: First Embodiment>
FIG. 1 is a plan view showing the configuration of the electro-optical device according to the first embodiment of the invention. The electro-optical device D is employed in an electrophotographic image forming apparatus as an exposure device (line head) that exposes a photosensitive drum. As shown in FIG. 1, the electro-optical device D includes a head module H that emits a light beam according to a desired image toward a photosensitive drum, and various signals and power sources that are used to drive the head module H. The circuit board 65 on which the circuit (not shown) is mounted, the wiring board 50 for electrically connecting the head module H and the circuit board 65, and the power supply wiring board 70 are provided. The head module H includes a substantially rectangular substrate 10 arranged with the X direction (main scanning direction) as a longitudinal direction, and an element unit 20 and a feeder line 34 formed on the surface of the substrate 10. In FIG. 1 and the following plan views, the feeder line 34 is hatched for convenience.

  FIG. 2 is a circuit diagram showing an electrical configuration of the element unit 20. As shown in the figure, the element section 20 is composed of n (n is a natural number of 2 or more) unit circuits U each including an electro-optic element E and a driving transistor TDR. The n electro-optic elements E are formed on the surface of the substrate 10 and arranged in a straight line (single row or multiple rows) along the X direction. Each electro-optical element E is an organic light-emitting diode element in which a light-emitting layer of an organic EL (Electroluminescence) material is interposed between an anode and a cathode facing each other.

  The electro-optical element E of each unit circuit U is disposed on a path connecting the power supply line 34 to which the higher power supply potential VEL is supplied and the ground line to which the ground potential GND is supplied, and the drive current flowing through the path Light is emitted with a light amount (luminous intensity) corresponding to the current amount of IDR. The drive transistor TDR is an n-channel transistor disposed on the path of the drive current IDR (between the power supply line 34 and the electro-optical element E). The drains of the drive transistors TDR are commonly connected to the power supply line 34.

  On the surface of the substrate 10, n signal lines 32 each corresponding to a separate unit circuit U are formed. Each signal line 32 extends in the Y direction orthogonal to the X direction as shown in FIG. 1, and is connected to the gate of the drive transistor TDR in the unit circuit U corresponding to the signal line 32 as shown in FIG. Is done. A drive current IDR corresponding to the potential of the control signal S supplied to the signal line 32 flows between the drain and source of the drive transistor TDR. Therefore, the electro-optical element E is driven to a light amount corresponding to the control signal S.

  FIG. 3 is an enlarged plan view showing the vicinity of the peripheral edge 12 corresponding to one long side of the substrate 10. In the figure, a state in which the wiring board 50 and the power supply wiring board 70 are not installed is shown. As shown in FIG. 3, n connection terminals 42 (hereinafter referred to as these) connected to separate signal lines 32 in the region 14 on the wiring board 50 side of the surface of the substrate 10 when viewed from the element unit 20. The set is referred to as “terminal group G1”). These connection terminals 42 are arranged in the X direction along the peripheral edge 12 of the wiring board 50. The pitch P 1 of the connection terminals 42 is narrower than the pitch P 2 of the signal lines 32 in the element unit 20. Therefore, the n signal lines 32 extending from the element portion 20 to the positive side in the Y direction and reaching the region 14 approach the central portion of the substrate 10 in the X direction as they approach the connection terminals 42 (that is, The n signal lines 32 are connected to each connection terminal 42 via a portion 321 extending in an oblique direction so that the signal lines 32 converge toward the terminal group G1.

  As shown in FIG. 3, three power supply terminals 44 are formed in a region (a gap between the terminal group G1 and the element unit 20) of the region 14 of the substrate 10 that is separated from the terminal group G1 on the negative side in the Y direction. The These power supply terminals 44 are arranged in the X direction in the vicinity of the central portion of the substrate 10 along the X direction. As shown in FIG. 3, each power supply terminal 44 is formed inside a region where the signal lines 32 are distributed. More specifically, each power supply terminal 44 is located in a gap between two signal lines 32 adjacent to each other and arranged in parallel at a pitch P2. In this embodiment, the gap between each group obtained by dividing the n number of signal lines 32 by the same number (that is, the (n / 2) + 1th and (n / 2) th signal lines 32 counted from the left in FIG. 1). The three power supply terminals 44 are formed in a gap with the signal line 32. Further, there are two power supply terminals 46 at each position (that is, on a straight line on which the connection terminals 42 are arranged) sandwiching the terminal group G1 along the arrangement direction (X direction) of the n connection terminals 42 on the surface of the substrate 10. Individually formed.

  As shown in FIGS. 1 and 3, the power supply line 34 includes a portion 341 extending in the X direction in a region on the surface of the substrate 10 opposite to the region 14 with the element portion 20 interposed therebetween, and the element portion 20. At each position across the X direction, a portion 342 extending in the Y direction from both ends of the portion 341 toward the region 14, and a Y portion toward the region 14 from an intermediate portion (central portion) in the X direction of the portion 341 And a portion 343 extending in the direction. As shown in FIG. 3, the end of the portion 342 reaching the region 14 is connected to each power supply terminal 46. Similarly, the end of the portion 343 reaching the region 14 is connected to each power supply terminal 44.

  The power supply line 34 is formed of a conductive layer common to the elements constituting the element unit 20, for example. Accordingly, the portion 343 existing inside the element portion 20 extends in the Y direction through the gap between the adjacent element portions 20 (unit circuits U). However, when the feeder line 34 is formed of a conductive layer that is separate from the elements of the element unit 20, a configuration in which the electro-optic element E, the drive transistor, and the feeder line 34 overlap when viewed from the direction perpendicular to the substrate 10 is also employed. The

  Next, FIG. 4 is a plan view showing a state in which the wiring board 50 is fixed to the board 10. As shown in the figure, the wiring board 50 (for example, FPC (Flexible Printed Circuit)) includes a film-like base material 52 having flexibility. A region along one periphery of the base material 52 is joined to the region 14 of the substrate 10 so as to overlap the connection terminal 42 and the power supply terminal 46, and a region along the periphery on the opposite side of the substrate 52 is the circuit substrate 65. Bonded to the surface. The wiring board 50 is fixed to the board 10 or the circuit board 65 via an anisotropic conductive film, for example.

  As shown in FIG. 4, n wirings 54, four wirings 55, and a plurality of wirings 56 are formed on the surface of the base material 52 facing the substrate 10. An IC (Integrated Circuit) chip 60 is mounted on the surface of the base material 52 opposite to the substrate 10. The IC chip 60 includes a drive circuit that outputs n systems of control signals S based on various signals (for example, a clock signal and an image signal) supplied from the circuit board 65 via the wirings 56. Each wiring 54 has one end electrically connected to the output terminal of the IC chip 60 through the through hole of the base 52 and the other end of the base 52 reaching the region facing the substrate 10. Is electrically connected to the connection terminal 42. Therefore, the control signal S output from the IC chip 60 is supplied to the signal line 32 via the wiring 54 and the connection terminal 42.

  Each wiring 55 extends in the Y direction from the peripheral edge on the circuit board 65 side to the peripheral edge on the substrate 10 side in the wiring board 50. An end of the wiring 55 that overlaps the substrate 10 is electrically connected to each power supply terminal 46. Each wiring 55 is supplied with a power supply potential VEL generated by a power supply circuit (not shown) mounted on the circuit board 65. The power supply potential VEL is supplied to the power supply line 34 (part 342) through the wiring 55 and the power supply terminal 46.

  FIG. 5 is a plan view showing a state where the power supply wiring board 70 is further fixed to the board 10 from the state of FIG. As shown in the figure, a power supply wiring board 70 (for example, FFC (Flexible Flat Cable)) includes a film-like base material 72 having flexibility. 6 is a cross-sectional view taken along line VI-VI in FIG. As shown in FIGS. 5 and 6, the base material 72 is a long member arranged with the Y direction as the longitudinal direction. The total length of the base material 72 is longer than the dimension of the wiring board 50 in the Y direction.

  As shown in FIG. 6, one end portion of the base material 72 is bonded to a region of the substrate 10 that overlaps the power supply terminal 44, and the opposite end portion is bonded to the surface of the circuit board 65. The power supply wiring substrate 70 is bonded to the substrate 10 and the circuit substrate 65 through, for example, an anisotropic conductive film. As shown in FIGS. 5 and 6, the power supply wiring substrate 70 and the wiring substrate 50 overlap each other when viewed from the direction perpendicular to the substrate 10. Further, the power supply wiring board 70 extends in the Y direction across the IC chip 60 having the X direction as a longitudinal direction.

  Three wirings 74 are formed on the base material 72. These wirings 74 extend linearly over the entire length of the base material 72. One end of each wiring 74 is electrically connected to the power supply terminal 44 on the substrate 10, and the other end is electrically connected to the wiring (not shown) of the circuit board 65. . Each wiring 74 is supplied with the power supply potential VEL generated by the power supply circuit mounted on the circuit board 65. The power supply potential VEL is supplied to the power supply line 34 (part 343) through the wiring 74 and the power supply terminal 44.

  As described above, in this embodiment, in addition to the two power supply terminals 46 formed at both ends of the substrate 10, the power supply potential VEL is also applied to the power supply line 34 from the power supply terminal 44 formed at the center. Since the power supply potential VEL is supplied only from each power supply terminal 46, the voltage drop in the power supply line 34 is suppressed. Therefore, the difference in the power supply potential VEL supplied to each unit circuit U is reduced, whereby the light quantity of each electro-optical element E can be made uniform.

  In this embodiment, since the power supply potential VEL is supplied to the power supply terminal 44 via the power supply wiring board 70 installed so as to three-dimensionally intersect with the IC chip 60, a power supply is supplied to the central portion of the power supply line 34. Even if the potential VEL is supplied, it is not necessary to disperse a plurality of IC chips (90A and 90B) on both sides of the wiring 99 as shown in FIG. Therefore, it is possible to obtain the expected effect of suppressing the voltage drop in the feeder line 34 while reducing the cost required for manufacturing the electro-optical device D from the configuration of FIG.

<B: Second Embodiment>
Next, a second embodiment of the present invention will be described. In addition, about the element in which a function and an effect | action are the same as 1st Embodiment in each following form, the same code | symbol as the above is attached | subjected and each detailed description is abbreviate | omitted suitably.

  FIG. 7 is an enlarged plan view showing a region of the substrate 10 to which the wiring substrate 50 is bonded. In the first embodiment, a configuration in which n connection terminals 42 are arranged at equal intervals is illustrated. On the other hand, in this embodiment, as shown in FIG. 7, in the region 14 on the substrate 10, the region 16 on the positive side in the Y direction (direction perpendicular to the arrangement of the connection terminals 42) as viewed from each power supply terminal 44 is present. The connection terminal 42 is not formed. That is, n / 2 connection terminals 42 formed in each of the negative region and the positive region in the X direction with respect to the region 16 are arranged at equal intervals. The three power supply terminals 44 are arranged on the substrate 10 so that the positive ends in the Y direction of each of the three power supply terminals 44 are positioned on a straight line L connecting the negative ends of the connection terminals 42 in the Y direction. Is done.

  FIG. 8 is a plan view showing a state in which the wiring board 50 and the power supply wiring board 70 are mounted on the board 10. As shown in FIGS. 7 and 8, the power supply wiring substrate 70 extends in the Y direction so as to overlap the region 16 where the connection terminals 42 are not formed when viewed from the direction perpendicular to the substrate 10.

  In the configuration in which n connection terminals 42 are arranged at equal intervals as in the first embodiment (FIG. 3), in particular, the signal line 32 connected to the connection terminal 42 located at the center of the arrangement is connected to each power supply terminal 44. Therefore, it is necessary to secure an interval Δ (see FIG. 3) between the arrangement of the connection terminals 42 and the power supply terminals 44. On the other hand, in this embodiment, the connection terminal 42 does not exist on the positive side in the Y direction when viewed from the power supply terminal 44, and therefore a space Δ is not ensured between the array of the connection terminals 42 and the power supply terminals 44. In addition, each signal line 32 can be formed at a position separated from the power supply terminal 44. Therefore, according to the present embodiment, there is an advantage that the electro-optical device D can be reduced in size by reducing the area of the substrate 10.

<C: Third Embodiment>
Next, a third embodiment of the present invention will be described. FIG. 9 is an enlarged plan view showing a region of the substrate 10 to which the wiring substrate 50 is bonded. As shown in the figure, the three power supply terminals 44 in the present embodiment are formed on a straight line on which n connection terminals 42 are arranged. That is, n connection terminals 42, four power supply terminals 46, and three power supply terminals 44 are linearly arranged along the peripheral edge 12 of the substrate 10.

  FIG. 10 is a plan view showing a state in which the wiring board 50 is bonded to the substrate 10. Similar to the first embodiment, the wiring substrate 50 is mounted so as to overlap with the region along the peripheral edge 12 of the substrate 10. However, as shown in FIG. 10, the wiring board 50 of this embodiment has a substantially rectangular notch 521 formed in a region corresponding to each power supply terminal 44 (region facing the power supply terminal 44). Accordingly, when viewed from a direction perpendicular to the substrate 10, each power supply terminal 44 is exposed from the wiring substrate 50 inside the notch 521.

  FIG. 11 is a plan view showing a state in which the power supply wiring substrate 70 is bonded to the substrate 10. As shown in the figure, the power supply wiring substrate 70 is joined to the substrate 10 inside the notch 521 when viewed from the direction perpendicular to the substrate 10. The power supply potential VEL is supplied to each power supply terminal 44 via the wiring 74 of the power supply wiring board 70.

  As described above, in the present embodiment, since each power supply terminal 44 is linearly arranged together with the connection terminal 42 and the power supply terminal 46, the power supply terminal 44 is located at a position separated from the arrangement of the connection terminal 42 and the power supply terminal 46. The area of the substrate 10 is reduced as compared with the configurations of the formed first and second embodiments. Therefore, there is an advantage that the electro-optical device D can be reduced in size.

  Further, in the present embodiment, in addition to the configuration of FIG. 11 in which the power supply wiring board 70 is disposed so as to face the mounting surface of the IC chip 60 in the wiring board 50, as shown in FIG. The power supply wiring board 70 is passed through the gap between the inner peripheral edge of the notch 521 and the peripheral edge 12 of the substrate 10 so that the power supply wiring board 70 faces the surface of the wiring board 50 opposite to the IC chip 60. It is also possible to employ an arrangement that is arranged. Therefore, there is also an advantage that the degree of freedom of the configuration for joining the wiring board 50 and the power supply wiring board 70 to the circuit board 65 can be sufficiently secured.

<D: Fourth Embodiment>
Next, a fourth embodiment of the present invention will be described. FIG. 13 is an enlarged plan view of the vicinity of the power supply terminal 44 in the electro-optical device D of the present embodiment. In each of the above embodiments, the configuration in which the IC chip 60 is mounted on the wiring board 50 by the COF (Chip On Film) technique is exemplified. On the other hand, in this embodiment, as shown in FIG. 13, the IC chip 60 is mounted on the surface of the substrate 10 by COG (Chip On Glass) technology. The function of the IC chip 60 is the same as that of the above embodiments. Each of the n signal lines 32 is electrically connected to the output terminal of the IC chip 60. The three power supply terminals 44 are formed in the gap between the two adjacent signal lines 32 on the surface of the substrate 10.

  Further, in the region along the peripheral edge 12 of the substrate 10, a terminal group G2 including a plurality of connection terminals 48 and a plurality of power supply terminals 46 sandwiching the terminal group G2 along the X direction are formed. The wiring board 50 is bonded to the board 10 so as to overlap the connection terminals 48 and the power supply terminals 46. Each connection terminal 48 is connected to the wiring 56 of the wiring board 50, and each power supply terminal 46 is connected to the wiring 55 of the wiring board 50. Similarly to the above embodiments, the power supply wiring board 70 is joined to the substrate 10 so that each wiring 74 is connected to the power supply terminal 44, and extends in the Y direction to extend to the wiring board 50 and the IC chip 60. And overlap.

  Various signals (for example, a clock signal and an image signal) output from the circuit board 65 are supplied to the IC chip 60 via the wiring 56 and the connection terminal 48. The IC chip 60 generates n systems of control signals S corresponding to the signals and outputs them to the signal lines 32. The power supply potential VEL is supplied to each power supply terminal 46 via the wiring 55. The power supply potential VEL is supplied to each power supply terminal 44 via the power supply wiring board 70. Therefore, also in this embodiment, the same operation and effect as the first embodiment are exhibited.

<E: Modification>
Various modifications can be made to each of the above embodiments. An example of a specific modification is as follows. In addition, you may combine each following aspect suitably.

(1) Modification 1
In each of the above embodiments, the configuration in which the wiring board 50 and the power supply wiring board 70 are bonded to one surface of the circuit board 65 as illustrated in FIG. 6 is illustrated. However, as illustrated in FIG. The wiring board 50 may be fixed to one surface S1 and the power supply wiring board 70 may be fixed to the other surface S2. More specifically, the region of the surface S 1 where the wiring substrate 50 is bonded and the region of the surface S 2 where the power supply wiring substrate 70 is bonded overlap each other when viewed from the direction perpendicular to the circuit substrate 65. According to the configuration of FIG. 14, it is not necessary to individually secure a region for joining the wiring board 50 and a region for joining the power supply wiring board 70 on one surface of the circuit board 65. Is possible.

(2) Modification 2
In the above embodiment, the configuration in which the wiring 55 for supplying the power supply potential VEL to the power supply terminal 46 is formed on the wiring substrate 50 on which the IC chip 60 is mounted is illustrated. However, as shown in FIG. The wiring 55 may be formed on a power supply wiring board 58 different from the power supply wiring board 58. Each power supply wiring board 58 (for example, FFC) has one end joined to the substrate 10 and the other end joined to the circuit board 65. The power supply potential VEL is supplied to the power supply terminal 46 via the wiring 55 of each power supply wiring board 58.

(3) Modification 3
The organic light emitting diode element is merely an example of an electro-optical element. The electro-optic element applied to the present invention is distinguished from a self-light-emitting type that emits light itself and a non-light-emitting type (for example, a liquid crystal element) that changes the transmittance of external light, or a current-driven type that is driven by supplying current And the voltage driven type driven by voltage application are unquestionable. For example, inorganic EL elements, field emission (FE) elements, surface-conduction electron (SE) elements, ballistic electron surface emitting (BS) elements, and light emitting diode (LED) elements Various electro-optical elements such as a liquid crystal element, an electrophoretic element, and an electrochromic element can be used in the present invention.

<F: Application example>
A specific form of an electronic apparatus (image forming apparatus) using the electro-optical device according to the invention will be described.
FIG. 16 is a cross-sectional view illustrating a configuration of an image forming apparatus employing the electro-optical device D according to each of the above embodiments. The image forming apparatus is a tandem type full-color image forming apparatus, and the four electro-optical devices D (DK, DC, DM, DY) according to the above-described form and the four photosensitive devices corresponding to the respective electro-optical devices D. Body drum 80 (80K, 80C, 80M, 80Y). One electro-optical device D is disposed so as to face the image forming surface (outer peripheral surface) of the corresponding photosensitive drum 80. Note that the subscripts “K”, “C”, “M”, and “Y” of each symbol are used for forming each visible image of black (K), cyan (C), magenta (M), and yellow (Y). Means.

  As shown in FIG. 16, an endless intermediate transfer belt 82 is wound around the driving roller 811 and the driven roller 812. The four photosensitive drums 80 are arranged around the intermediate transfer belt 82 with a predetermined interval therebetween. Each photosensitive drum 80 rotates in synchronization with driving of the intermediate transfer belt 82.

  In addition to the electro-optical device D, a corona charger 831 (831K, 831C, 831M, 831Y) and a developing device 832 (832K, 832C, 832M, 832Y) are disposed around each photosensitive drum 80. The corona charger 831 uniformly charges the image forming surface of the photosensitive drum 80 corresponding thereto. Each electro-optical device D exposes this charged image forming surface to form an electrostatic latent image. Each developing unit 832 forms a visible image (visible image) on the photosensitive drum 80 by attaching a developer (toner) to the electrostatic latent image.

  As described above, the visible images of the respective colors (black, cyan, magenta, yellow) formed on the photosensitive drum 80 are sequentially transferred (primary transfer) to the surface of the intermediate transfer belt 82 to form a full-color visible image. Is done. Four primary transfer corotrons (transfer devices) 84 (84K, 84C, 84M, 84Y) are arranged inside the intermediate transfer belt 82. Each primary transfer corotron 84 electrostatically attracts a visible image from the corresponding photosensitive drum 80, thereby developing a visible image on the intermediate transfer belt 82 that passes through the gap between the photosensitive drum 80 and the primary transfer corotron 84. Transcript.

  The sheets (recording material) 85 are fed one by one from the paper feed cassette 862 by the pickup roller 861 and conveyed to the nip between the intermediate transfer belt 82 and the secondary transfer roller 87. The full-color visible image formed on the surface of the intermediate transfer belt 82 is transferred (secondary transfer) to one side of the sheet 85 by the secondary transfer roller 87, and is fixed to the sheet 85 by passing through the fixing roller pair 88. . The discharge roller pair 89 discharges the sheet 85 on which the visible image is fixed through the above steps.

  Since the image forming apparatus exemplified above uses an organic light emitting diode element as a light source (exposure means), the apparatus is made smaller than a configuration using a laser scanning optical system. Note that the electro-optical device D can also be applied to an image forming apparatus having a configuration other than those exemplified above. For example, a rotary development type image forming apparatus, an image forming apparatus that directly transfers a visible image from a photosensitive drum to a sheet without using an intermediate transfer belt, or an image forming that forms a monochrome image The electro-optical device D can also be used as the device.

  The use of the electro-optical device D is not limited to the exposure of the image carrier. For example, the electro-optical device D is employed in an image reading device as an illumination device that irradiates light to a reading target such as a document. As this type of image reading apparatus, there is a scanner, a copying machine or a reading part of a facsimile, a barcode reader, or a two-dimensional image code reader for reading a two-dimensional image code such as a QR code (registered trademark).

  In addition, the electro-optical device in which the electro-optical elements E are arranged in a matrix is also used as a display device for various electronic devices. Examples of the electronic device to which the present invention is applied include a portable personal computer, a mobile phone, a personal digital assistant (PDA), a digital still camera, a television, a video camera, a car navigation device, a pager, and an electronic notebook. , Electronic paper, calculators, word processors, workstations, videophones, POS terminals, printers, scanners, copiers, video players, devices with touch panels, and the like.

1 is a plan view illustrating a configuration of an electro-optical device according to a first embodiment of the invention. It is a circuit diagram which shows the electrical structure of an element part. It is a top view which expands and shows the area | region where a wiring board is mounted among boards. It is a top view which shows the state by which the wiring board was mounted in the board | substrate. It is a top view which shows the state by which the wiring board for electric power feeding was mounted in the board | substrate. It is sectional drawing seen from the VI-VI line in FIG. FIG. 10 is an enlarged plan view illustrating a substrate of an electro-optical device according to a second embodiment of the invention. It is a top view which shows the state by which the wiring board and the wiring board for electric power feeding were mounted on the board | substrate. FIG. 10 is an enlarged plan view illustrating a substrate of an electro-optical device according to a third embodiment of the invention. It is a top view which shows the state by which the wiring board was mounted in the board | substrate. It is a top view which shows the state by which the wiring board for electric power feeding was mounted in the board | substrate. It is a top view which shows the other aspect of 3rd Embodiment. FIG. 10 is an enlarged plan view illustrating a substrate of an electro-optical device according to a fourth embodiment of the invention. It is sectional drawing which shows the relationship of each board | substrate in a modification. FIG. 10 is a plan view illustrating a configuration of an electro-optical device according to a modification. It is sectional drawing which shows one form (image forming apparatus) of an electronic device. It is a top view which shows the structure of the conventional electro-optical apparatus. It is a top view which shows the structure for solving the problem of the conventional electro-optical apparatus.

Explanation of symbols

D: Electro-optical device, 10: Substrate, 20: Element portion, U: Unit circuit, E: Electro-optical element, 32: Signal line, 34: Feed line, 42: Connection terminal, 44 , 46... Power supply terminal, 50... Wiring board, 60... IC chip, 65.

Claims (10)

A substrate on which an element portion including a plurality of electro-optic elements is formed;
An IC chip that outputs a control signal for controlling each of the electro-optic elements;
A plurality of signal lines that are formed on the surface of the substrate and transmit a control signal output from the IC chip to the element unit;
A first power supply terminal formed in a gap between two signal lines adjacent to each other on the surface of the substrate;
A first wiring substrate fixed to the substrate and supplying a predetermined potential to the first power supply terminal;
An electro-optical device comprising: a power supply line that supplies the predetermined potential from the first power supply terminal to the element unit. A terminal group including a plurality of connection terminals arranged on the surface of the substrate;
A second wiring board fixed to the board;
The second wiring board transmits a control signal output from the IC chip to the connection terminals,
The electro-optical device according to claim 1, wherein the plurality of signal lines transmit a control signal from the connection terminals to the element unit. The first power supply terminal is formed at a position separated from a straight line where the plurality of connection terminals are arranged,
The electro-optical device according to claim 2, wherein the plurality of connection terminals are not formed in a region along a direction perpendicular to the arrangement of the plurality of connection terminals from the first power supply terminal on the surface of the substrate. The first power supply terminal is formed on a straight line in which the plurality of connection terminals are arranged,
A notch is formed in a portion of the second wiring board corresponding to the first power supply terminal,
The electro-optical device according to claim 2, wherein the first wiring substrate is bonded to the substrate inside the notch. A terminal group including a plurality of connection terminals arranged on the surface of the substrate;
A second wiring board that is fixed to the board and supplies a signal to each connection terminal;
2. The electro-optic according to claim 1, wherein the IC chip is mounted on a surface of the substrate and outputs a control signal corresponding to a signal supplied from the second wiring substrate to the connection terminals to the signal lines. apparatus. A plurality of second power supply terminals which are formed at positions sandwiching the terminal group along the direction of arrangement of the plurality of connection terminals on the surface of the substrate and to which the predetermined potential is supplied;
The power supply line includes a first portion extending along the arrangement of the electro-optic elements, a plurality of second portions connecting each end of the first portion to the second power supply terminal, and the first portion. The electro-optical device according to claim 2, further comprising: a third portion that connects a middle portion of the first power supply terminal to the first power supply terminal. The electro-optical device according to claim 2, wherein the first wiring board and the second wiring board overlap each other. The electro-optical device according to claim 2, wherein the first wiring board and the second wiring board are fixed to one circuit board. The electro-optical device according to claim 8, wherein the first wiring board is fixed to one surface of the circuit board, and the second wiring board is fixed to the other surface of the circuit board. An electronic apparatus comprising the electro-optical device according to claim 1.

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