JP2008040203A - Electro-optic device and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electro-optic device and electronic equipment of which the power consumption can be reduced in a partial display mode. <P>SOLUTION: The electro-optic device 1 can select a full picture display mode for setting the whole area of a display screen A as a display area and a partial display mode for setting a part of the whole area of the display screen A as a display area and setting the other area as a non-display area. Each pixel 50 has a TFD 51 connected to a data line X. In the full picture display mode, a data line drive circuit 12 supplies a voltage level composed of a voltage VHN and a voltage VHP1 higher than the potential of the voltage VHN to a plurality of data lines X as an image signal, and in the partial display mode, supplies a voltage level composed of the voltage VHN and a voltage VHP2 higher than the potential of the voltage VHN and lower than the potential of the voltage VHP1 to the plurality of data lines X as an image signal. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an electro-optical device and an electronic apparatus.

  Conventionally, electro-optical devices such as liquid crystal devices are known. The electro-optical device includes, for example, a plurality of scanning lines provided at predetermined intervals, and a plurality of data lines that intersect the plurality of scanning lines and are provided at predetermined intervals. Pixels are provided at intersections between the scanning lines and the data lines.

The pixel includes a thin film diode (hereinafter referred to as TFD (Thin Film Diode)) and a pixel capacitor. A plurality of these pixels are arranged in a matrix to form a display screen.
The pixel capacitor includes a pair of electrodes, and a liquid crystal is sandwiched between the pair of electrodes. A scanning line is connected to one of the pair of electrodes of the pixel capacitor, and a data line is connected to the other electrode of the pair of electrodes of the pixel capacitor via the TFD.

  The scanning line driving circuit sequentially supplies a selection voltage for selecting the scanning line to the plurality of scanning lines. When the selection voltage is supplied to the scanning line, all the TFDs connected to the scanning line are turned on.

  The data line driving circuit supplies an image signal to the plurality of data lines in synchronization with the TFD being turned on, and supplies an image voltage based on the image signal to the pixel capacitor via the TFD in the on state. .

The above electro-optical device operates as follows.
That is, by sequentially supplying a selection voltage to a plurality of scanning lines, all the TFDs connected to a certain scanning line are turned on, and all pixels related to the scanning line are selected. Then, image signals are supplied to the plurality of data lines in synchronization with the selection of these pixels. Then, an image signal is supplied to all the selected pixels, and an image voltage based on the image signal is supplied to the pixel capacitance.

  When an image voltage is supplied to the pixel capacitor, a driving voltage based on a potential difference between the image voltage and the selection voltage is applied to the liquid crystal by a pair of electrodes included in the pixel capacitor. When a driving voltage is applied to the liquid crystal, the alignment and order of the liquid crystal change, the light transmitted through the liquid crystal changes, and gradation display is performed.

  Such an electro-optical device is required to reduce power consumption. Therefore, gradation display is not performed on the entire surface of the display screen including a plurality of pixels (hereinafter, this case is referred to as a full screen display mode), but gradation display is performed only on a part of the display screen (hereinafter, this The case is referred to as a partial (partial) display mode) to reduce power consumption (see, for example, Patent Document 1).

  The electro-optical device described in Patent Document 1 divides a display screen into a display area and a non-display area in the partial display mode. In the display area, for example, an image signal corresponding to an image such as a remaining battery level or a time display is supplied to each pixel, and a gradation corresponding to the image signal is displayed from each pixel. On the other hand, in the non-display area, each pixel is supplied with an image signal corresponding to the minimum gradation, such as a white image in a normally white electro-optical device and a black image in a normally black electro-optical device. Displays the minimum gradation.

Here, in the partial display mode, since a constant image signal corresponding to the minimum gradation is supplied to the pixels in the non-display area, the image signal is supplied at a period slower than the period in which the image signal is supplied to the pixels in the display area. Even so, the deterioration of the display is not noticeable. Therefore, in the partial display mode, compared to the cycle of supplying image signals to the pixels in the display area, the cycle of supplying image signals to the pixels in the non-display area is delayed to reduce power consumption while suppressing display deterioration. it can.
JP 2000-276093 A

  However, the above electro-optical device is required to further reduce power consumption.

  SUMMARY An advantage of some aspects of the invention is that it provides an electro-optical device and an electronic apparatus that can further reduce power consumption in a partial display mode.

  An electro-optical device of the present invention includes a plurality of scanning lines, a plurality of data lines, and a plurality of pixels provided corresponding to intersections of the plurality of scanning lines and the plurality of data lines. An electro-optical device capable of selecting a full-screen display mode in which a screen is a display area and a partial display mode in which a part of the entire screen is a display area and another area is a non-display area, A scanning line driving circuit for sequentially supplying a selection voltage for selecting the scanning lines to the plurality of scanning lines; and a data line driving circuit for supplying an image signal to the plurality of data lines when the scanning line is selected. The pixel has a non-linear element as a switching element connected to the data line, and the data line driving circuit has a first voltage and a voltage higher than the first voltage in the full screen display mode. A second voltage having a high potential. A pressure level is supplied as an image signal to the plurality of data lines, and in the partial display mode, the first voltage and a third potential that is higher than the first voltage and lower than the second voltage. And a voltage level including the voltage is supplied to the plurality of data lines as an image signal.

  According to the present invention, the data line driving circuit supplies the voltage level including the first voltage and the second voltage to the plurality of data lines as the image signal in the full screen display mode, and the first voltage in the partial display mode. And the third voltage are supplied as image signals to a plurality of data lines. For this reason, in the partial display mode, the power consumption can be further reduced by the amount that the voltage level of the image signal is lower than in the full screen display mode.

By the way, the non-linear element has a characteristic that the leakage current increases as the ambient temperature increases. The leakage current increases as the potential of the data line increases. When the leakage current increases, the drive voltage applied from the pixel capacitance to the electro-optical material decreases, and the contrast may decrease.
Therefore, according to the present invention, since the voltage level of the image signal is lowered in the partial display mode as compared with the case of the full screen display mode as described above, the potential of the data line to which the image signal is supplied is lowered. . Therefore, in the partial display mode, even when the ambient temperature is high, an increase in leakage current can be suppressed and a decrease in contrast can be suppressed.

  An electro-optical device of the present invention includes a plurality of scanning lines, a plurality of data lines, and a plurality of pixels provided corresponding to intersections of the plurality of scanning lines and the plurality of data lines. An electro-optical device capable of selecting a full-screen display mode in which a screen is a display area and a partial display mode in which a part of the entire screen is a display area and another area is a non-display area, A scanning line driving circuit for sequentially supplying a selection voltage for selecting the scanning lines to the plurality of scanning lines; and a data line driving circuit for supplying an image signal to the plurality of data lines when the scanning line is selected. And a temperature sensor for measuring an ambient temperature, wherein the pixel has a non-linear element as a switching element connected to the data line, and the data line driving circuit is configured to use the temperature sensor in the partial display mode. The circumference measured by When the temperature is lower than a predetermined temperature, an image signal composed of a first voltage and a second voltage having a higher potential than the first voltage is supplied to the plurality of data lines. In the partial display mode, the temperature is When the ambient temperature measured by the sensor is higher than a predetermined temperature, a voltage comprising the first voltage and a third voltage having a potential higher than the first voltage and lower than the second voltage. A level is supplied to the plurality of data lines as an image signal.

In the partial display mode, when the potential of the data line is lowered as described above, it is possible to suppress an increase in the leakage current in the nonlinear element, so that a reduction in contrast can be suppressed even when the ambient temperature is high. However, when the image signal is composed of the first voltage and the third voltage in order to lower the potential of the data line, the amplitude of the image signal is larger than that in the case where the image signal is composed of the first voltage and the second voltage. Since it becomes smaller, the contrast is lowered.
Here, when the ambient temperature is lower than a predetermined temperature, the leakage current in the non-linear element is relatively small, so that the contrast is reduced by reducing the amplitude of the image signal compared to the degree of decrease in contrast due to the increase in leakage current. The degree of decrease becomes larger. On the other hand, when the ambient temperature is higher than the predetermined temperature, the leakage current in the nonlinear element increases, so the contrast decreases due to the reduction in the amplitude of the image signal compared to the degree that the contrast decreases due to the increase in the leakage current. The degree to do becomes smaller.
Therefore, according to the present invention, when the ambient temperature is measured by the temperature sensor and the ambient temperature is lower than the predetermined temperature in the partial display mode, a plurality of voltage levels including the first voltage and the second voltage are used as image signals. When the ambient temperature is higher than a predetermined temperature, the voltage level composed of the first voltage and the third voltage is supplied as an image signal to the plurality of data lines. That is, in the partial display mode, if the ambient temperature is lower than the predetermined temperature, the contrast that decreases due to the reduction in the amplitude of the image signal is taken into consideration. If the ambient temperature is higher than the predetermined temperature, the leakage current increases. The amplitude of the image signal was changed in consideration of contrast. Therefore, in the partial display mode, a decrease in contrast can be suppressed not only when the ambient temperature is higher than the predetermined temperature but also when the ambient temperature is low.

  In the electro-optical device according to the aspect of the invention, the data line driving circuit may stop image display when switching from the full screen display mode to the partial display mode, and supply image signals to the plurality of data lines. It is preferable to change from a voltage level composed of the first voltage and the second voltage to a voltage level composed of the first voltage and the third voltage.

For example, in one frame period, image signals are supplied to a plurality of data lines, and the amplitude of the image signals is changed while gradation display is performed on a plurality of pixels related to the plurality of data lines. Then, in this one frame period, the pixels supplied with the image signal before changing the amplitude and the pixels supplied with the image signal after changing the amplitude are mixed. For this reason, in these pixels, the displayed gradation differs depending on the change in the amplitude of the image signal, and the gradation display may become unnatural. Also, when switching at the head of the frame, there was a sense of incongruity that the brightness changed instantaneously.
Therefore, according to the present invention, when switching from the full screen display mode to the partial display mode, the gradation display is stopped and the amplitude of the image signal is changed. For this reason, even if a pixel supplied with an image signal before changing amplitude and a pixel supplied with an image signal after changing amplitude are mixed in one frame period, Key is not displayed. Therefore, the gradation display can be prevented from becoming unnatural.

  In the electro-optical device according to the aspect of the invention, it is preferable that the scanning line driving circuit supplies the selection voltage with a voltage level lowered in the partial display mode.

  According to the present invention, in the partial display mode, the voltage level of the selection voltage is lowered and sequentially supplied to the plurality of scanning lines. Therefore, in the partial display mode, by reducing the voltage level of the selection voltage by the amount that the voltage level of the image signal is reduced, the potential difference between the image signal and the selection voltage in the full screen display mode, and the partial display mode The potential difference between the image signal and the selection voltage can be made the same. Therefore, gradation display can be performed in the partial display mode, as in the full screen display mode.

An electronic apparatus according to an aspect of the invention includes the above-described electro-optical device.
According to the present invention, there are effects similar to those described above.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following description of embodiments and modifications, the same constituent elements are denoted by the same reference numerals, and the description thereof is omitted or simplified.

<First Embodiment>
FIG. 1 is a block diagram showing a configuration of an electro-optical device 1 according to the first embodiment of the present invention.
The electro-optical device 1 includes a liquid crystal panel AA, a liquid crystal panel drive device 5 that drives the liquid crystal panel AA, and a drive voltage generation circuit 6 that generates a drive voltage to be supplied to the liquid crystal panel drive device 5. The electro-optical device 1 operates in a normally black mode.

  The liquid crystal panel AA includes 200 rows of scanning lines Y1 to Y200 provided at predetermined intervals, and 160 columns of data lines X1 to X160 that intersect the scanning lines Y1 to Y200 and are provided at predetermined intervals. . Pixels 50 are provided at the intersections between the scanning lines Y and the data lines X.

The pixel 50 includes a thin film diode (hereinafter referred to as TFD (Thin Film Diode)) 51 as a nonlinear element, and a pixel capacitor 54. A plurality of the pixels 50 are arranged in a matrix to constitute the display screen A.
The pixel capacitor 54 includes a pair of electrodes, and a liquid crystal as an electro-optical material is sandwiched between the pair of electrodes. The scanning line Y is connected to one of the pair of electrodes of the pixel capacitor 54, and the data line X is connected to the other electrode of the pair of electrodes of the pixel capacitor 54 via the TFD 51. .

  Here, the pixel 50 provided corresponding to the intersection of the scanning line Yn (n is an integer satisfying 1 ≦ n ≦ 200) and the data line Xm (m is an integer satisfying 1 ≦ m ≦ 160). Focusing on the above, the above liquid crystal panel AA operates as follows.

  That is, when a selection voltage is supplied as a scanning signal from the scanning line Yn, all the TFDs 51 connected to the scanning line Yn are turned on. When an image signal is supplied from the data line Xm in synchronization with the selection voltage being supplied from the scanning line Yn, the pixel 50 provided corresponding to the intersection of the scanning line Yn and the data line Xm is displayed. An image voltage based on this image signal is supplied to the pixel capacitor 54 provided. Then, a driving voltage based on the potential difference between the image voltage and the selection voltage is applied to the liquid crystal by the pair of electrodes included in the pixel capacitor 54.

  On the other hand, when a non-selection voltage is supplied as a scanning signal from the scanning line Yn, all the TFDs 51 connected to the scanning line Yn are turned off. Then, the pixel capacitor 54 holds the drive voltage when the TFD 51 is in the on state. Therefore, the same drive voltage as that applied when the TFD 51 is on is applied to the liquid crystal related to the pixel capacitor 54 provided in the pixel 50 provided corresponding to the intersection of the scanning line Yn and the data line Xm. Continue to be applied.

  As described above, when a driving voltage is applied to the liquid crystal, the alignment and order of the liquid crystal change, and the light transmitted through the liquid crystal changes to perform gradation display.

The electro-optical device 1 including the above liquid crystal panel AA has a full-screen display mode in which all areas of the display screen A are displayed areas, and a part of all areas of the display screen A is set as a display area. It is possible to select a partial display mode in which another area is a non-display area.
Specifically, the electro-optical device 1 operates as a full screen display mode when a display switching signal CHG described later is at an H level, and operates as a partial display mode when the display switching signal CHG is at an L level.

FIG. 2 is a diagram showing the display screen A in the partial display mode.
In the partial display mode, the display screen A is divided into a display area 71 and a non-display area 72 that sandwiches the display area 71. In the display area 71, an image such as a remaining battery level and a time display is displayed with a smaller number of gradations than the number of gradations that can be displayed in the full-screen display mode. Black gradation is displayed.
In the present embodiment, the display area 71 includes pixels 50 from the 50th line to the 100th line, and the non-display area 72 includes the pixels 50 from the 1st line to the 49th line and the 101st line to the 200th line. And up to 50 pixels.

Returning to FIG. 1, the drive voltage generation circuit 6 sends a plurality of voltages to the scanning line drive circuit 11 and the data line drive circuit 12 described later based on the display switching signal CHG output from the control circuit 30 described later. A predetermined voltage is selected and supplied.
The display voltage signal CHG output from the control circuit 30 is input to the drive voltage generation circuit 6.

When the display switching signal CHG is at the H level, the drive voltage generation circuit 6 supplies the scanning line drive circuit 11 with the voltage VSN1, the voltage VHN as the first voltage, VHP1 as the second voltage that is higher than the voltage VHN, And the voltage VSP are supplied, and the voltage VHN and the voltage VHP1 are supplied to the data line driving circuit 12. On the other hand, if the display switching signal CHG is at the L level, the scanning line driving circuit 11 and the data line driving circuit 12 have the potential higher than the voltage VHN and lower than the voltage VHP1 instead of the voltage VHP1. A voltage VHP2 as three voltages is supplied, and a voltage VSN2 having a potential lower than the voltage VSN1 is supplied instead of the voltage VSN1 by the potential difference between the voltage VHP1 and the voltage VHP2.
The above-described voltages will be described later.

  The liquid crystal panel drive device 5 includes a liquid crystal driver 10 having a scanning line drive circuit 11 and a data line drive circuit 12, and a control circuit 30 that controls the drive voltage generation circuit 6 and the liquid crystal driver 10.

The control circuit 30 supplies the display switching signal CHG to the drive voltage generation circuit 6. Further, the clock signal YCLK, the start pulse YD, the polarity instruction signal POL, and the display switching signal CHG are supplied to the scanning line driving circuit 11. Further, the polarity instruction signal POL and the gradation code pulse GCP are supplied to the data line driving circuit 12.
The above-described signals will be described later.

The scanning line driving circuit 11 sequentially supplies a selection voltage and a non-selection voltage as the above-described scanning signal to the plurality of scanning lines Y.
The scanning line driving circuit 11 may vary the frequency of sequentially supplying the selection voltage to the plurality of scanning lines Y in the full screen display mode and the partial display mode. In the present embodiment, the scanning line driving circuit 11 sequentially supplies a selection voltage at a frequency of 60 Hz to all the scanning lines Y of the display screen A in the full screen display mode. On the other hand, in the partial display mode, the selection voltage is sequentially supplied to all the scanning lines Y on the display screen A at a frequency of 45 Hz.

FIG. 3 is a block diagram showing a configuration of the scanning line driving circuit 11. 4, 5, and 6 are timing charts of the scanning line driving circuit 11.
The scanning line driving circuit 11 includes a shift register 111, a voltage selection signal generation circuit 112, and a scanning signal voltage selection circuit 113.

The shift register 111 is a shift register having the number of stages equal to the number of scanning lines Y, that is, 200 stages in this embodiment.
The shift register 111 receives the clock signal YCLK, the start pulse YD, and the display switching signal CHG output from the control circuit 30. The clock signal YCLK is a reference signal for the timing at which the scanning line driving circuit 11 operates. The clock signal YCLK is alternately switched to H level or L every half period of one horizontal scanning period (hereinafter referred to as 1/2 horizontal scanning period). This is a level signal. The start pulse YD is a signal that becomes H level from the start of one frame period to one horizontal scanning period.

  The shift register 111 operates as a full screen display mode when the display switching signal CHG is at an H level, and operates as a partial display mode when the display switching signal CHG is at an L level.

  If the display switching signal CHG is at H level, that is, the full screen display mode, the shift register 111 sequentially shifts the start pulse YD in synchronization with the clock signal YCLK becoming H level, as shown in FIG. Pulse signals that are at the H level over one horizontal scanning period are sequentially output as transfer signals YS1 to YS200 at a frequency of 60 Hz.

  On the other hand, if the display switching signal CHG is at the L level, that is, the partial display mode, the shift register 111 sequentially shifts the start pulse YD in synchronization with the clock signal YCLK becoming the H level, over one horizontal scanning period. The pulse signals that become the H level are sequentially output as the transfer signals YS1 to YS200 at a frequency of 45 Hz.

Returning to FIG. 3, the voltage selection signal generation circuit 112 outputs a signal for selecting the voltage of the scanning signal supplied to the scanning line Y.
The voltage selection signal generation circuit 112 receives the clock signal YCLK and the polarity instruction signal POL output from the control circuit 30 and the transfer signals YS1 to YS200 output from the shift register 111. The polarity instruction signal POL alternately becomes H level or L level every horizontal scanning period. In two one horizontal scanning periods sandwiching the boundary between two consecutive one frame periods, either the H level or the L level is used. Are signals having the same level.

  As shown in FIG. 4, the voltage selection signal generation circuit 112 refers to the polarity instruction signal POL in synchronization with the clock signal YCLK becoming L level during the period when the transfer signal YSn is at H level.

If the polarity instruction signal POL is at the H level, the first voltage selection signal YAn is first set to the H level, the second voltage selection signal YBn, the third voltage selection signal YCn, and the fourth voltage. The selection signal YDn is set to L level and output.
Next, after the ½ horizontal scanning period elapses, the first voltage selection signal YAn is set to L level and the second voltage selection signal YBn is set in synchronization with the clock signal YCLK becoming H level. Output at H level.
Next, after the ½ horizontal scanning period has passed, the second voltage selection signal YBn is set to L level and output in synchronization with the clock signal YCLK becoming L level.

On the other hand, if the polarity instruction signal POL is at L level, first, the third voltage selection signal YCn is set to H level, and the first voltage selection signal YAn, second voltage selection signal YBn, and fourth voltage are set. The selection signal YDn is set to L level and output.
Next, after the ½ horizontal scanning period has elapsed, the third voltage selection signal YCn is set to L level and the fourth voltage selection signal YDn is set in synchronization with the clock signal YCLK becoming H level. Output at H level.
Next, after the ½ horizontal scanning period has elapsed, the fourth voltage selection signal YDn is set to L level and output in synchronization with the clock signal YCLK becoming L level.

Returning to FIG. 3, the scanning signal voltage selection circuit 113 selects one voltage from a plurality of voltages and outputs it as a scanning signal.
The scanning signal voltage selection circuit 113 includes first voltage selection signals YA1 to YA200 output from the voltage selection signal generation circuit 112, second voltage selection signals YB1 to YB200, third voltage selection signals YC1 to YC200, The fourth voltage selection signals YD1 to YD200 are input. Further, the scan signal voltage selection circuit 113 receives the voltage VSP, the voltage VHP1 or the voltage VHP2, the voltage VHN, and the voltage VSN1 or the voltage VSN2 output from the drive voltage generation circuit 6. . Specifically, when the display switching signal CHG is at the H level, the voltages VSP, VHP1, VHN, and VSN1 are input. When the display switching signal CHG is at the L level, the voltage VHP1 is substituted for the voltage VHP1. A voltage VHP2 having a low potential is input, and a voltage VSN2 having a potential lower than that of the voltage VSN1 is input instead of the voltage VSN1.

First, the operation of the scanning signal voltage selection circuit 113 in the case where the display switching signal CHG is at the H level, that is, the full screen display mode will be described with reference to FIG.
In the full screen display mode, when the first voltage selection signal YAn becomes H level, the scanning signal voltage selection circuit 113 sets the voltage level of the scanning signal supplied to the scanning line Yn to the voltage VSP, and the second voltage selection signal YBn. Becomes H level, the voltage level of the scanning signal supplied to the scanning line Yn is output as the voltage VHP1.
On the other hand, when the third voltage selection signal YCn becomes H level, the voltage level of the scanning signal supplied to the scanning line Yn is set to the voltage VSN1, and when the fourth voltage selection signal YDn becomes H level, it is supplied to the scanning line Yn. The voltage level of the scanning signal is output as the voltage VHN.

Next, the operation of the scanning signal voltage selection circuit 113 in the partial display mode when the display switching signal CHG is at the L level will be described with reference to FIG.
In the partial display mode, the scanning signal voltage selection circuit 113 sets the voltage level of the scanning signal supplied to the scanning line Yn to the voltage VHP1 during the period in which the voltage level of the scanning signal supplied to the scanning line Yn is output as the voltage VHP1 in FIG. Is output as a voltage VHP2 having a lower potential. In the partial display mode, the scanning signal voltage selection circuit 113 sets the voltage level of the scanning signal supplied to the scanning line Yn in the period in which the voltage level of the scanning signal supplied to the scanning line Yn in FIG. 5 is output as the voltage VSN1. The voltage VSN2 having a lower potential than the voltage VSN1 is output.

The above scanning line driving circuit 11 operates as follows.
That is, the scanning line driving circuit 11 supplies either the voltage VSN1 or the voltage VSN2 as the selection voltage or the voltage VSP to the scanning line Y as the selection voltage according to the polarity instruction signal POL, and the voltage VHP1 as the non-selection voltage. Either VHP2 or the voltage VHN is supplied to the scanning line Y.

  Specifically, voltages VSP, VHP1, VHN, and VSN1 are supplied from the drive voltage generation circuit 6 to the scanning line drive circuit 11 in the full screen display mode.

  If the polarity instruction signal POL is H level during the period during which the selection voltage is supplied to the scanning line Yn, the voltage VSP as the selection voltage is applied to the scanning line Yn over the half horizontal scanning period of the latter half of one horizontal scanning period. Then, the voltage VHP1 is supplied to the scanning line Yn as a non-selection voltage.

  On the other hand, if the polarity instruction signal POL is at the L level during the period during which the selection voltage is supplied to the scanning line Yn, the voltage VSN1 as the selection voltage is applied to the scanning line Yn over the half horizontal scanning period of the latter half of one horizontal scanning period. Then, the voltage VHN is supplied as a non-selection voltage to the scanning line Yn.

  Further, in the partial display mode, the scanning line driving circuit 11 is supplied with voltages VSP, VHP2, VHN, and VSN2 from the driving voltage generation circuit 6.

  In the partial display mode, the voltage VSN2 having a potential lower than the voltage VSN1 is supplied to the scanning line Yn instead of the voltage VSN1 during the period in which the voltage VSN1 is supplied as the selection voltage to the scanning line Yn in the full screen display mode. At the same time, during the period in which the voltage VHP1 is supplied as the non-selection voltage to the scanning line Yn in the full screen display mode, the voltage VHP2 having a lower potential than the voltage VHP1 is supplied to the scanning line Yn instead of the voltage VHP1.

  Returning to FIG. 1, the data line driving circuit 12 supplies the above-described image signal to the data line X.

FIG. 7 is a block diagram showing a configuration of the data line driving circuit 12. 8 and 9 are timing charts of the data line driving circuit 12.
The data line driving circuit 12 includes a display data RAM 121, a PWM decoder 122, and an image signal voltage selection circuit 123.

The display data RAM 121 is composed of a volatile memory and stores an image signal DATA.
Specifically, the display data RAM 121 includes a storage area for storing the image signal DATA for one frame, and the image signal DATA output from an image signal generation circuit (not shown) is input thereto. Then, when the image signal DATA for one frame is input, the display data RAM 121 overwrites and stores another one frame of the image signal DATA already stored, and corresponds to the data lines X1 to X160. And output as image signals DATA1 to DATA160.
In the present embodiment, the image signal DATAm is assumed to be 3-bit digital data.

The PWM decoder 122 generates and outputs voltage selection signals XD1 to XD160 that become H level over a period corresponding to the image signals DATA1 to DATA160.
Specifically, the polarity indication signal POL and the gradation code pulse GCP output from the control circuit 30 and the image signals DATA1 to DATA160 output from the display data RAM 121 are input to the PWM decoder 122. The PWM decoder 122 generates and outputs voltage selection signals XD1 to XD160 that become H level over a period according to the image signals DATA1 to DATA160 based on the gradation code pulse GCP and the polarity instruction signal POL.
Note that the interval between the individual GCP pulses of the gradation code pulse GCP varies depending on the liquid crystal characteristics of the liquid crystal panel AA.

  First, the operation of the PWM decoder 122 when the display switching signal CHG is at the H level, that is, in the full screen display mode will be described with reference to FIG.

  In FIG. 8, during the period from time t1 to t15, the polarity of the polarity instruction signal POL is H level.

  If the image signal DATAm is any one of “000” to “110” at the time t1, that is, at the start of one horizontal scanning period in the period from the time t1 to the time t15, the gradation code pulse GCP is set to the H level. In synchronization with this, the voltage selection signal XDm is set to L level. On the other hand, if the image signal DATAm is “111”, the voltage selection signal XDm is set to H level in synchronization with the gradation code pulse GCP becoming H level.

If the image signal DATAm is “000”, the voltage selection signal XDm is set to H level at time t8 in synchronization with the gradation code pulse GCP becoming H level.
That is, if the image signal DATAm is “000”, the voltage selection signal XDm is set to the H level during the period from time t8 to t15 in one horizontal period from time t1 to t15.

If the image signal DATAm is “001”, the voltage selection signal XDm is set to H level at time t7 in synchronization with the gradation code pulse GCP becoming H level, and the voltage selection signal XDm is set to L at time t14. Level.
That is, if the image signal DATAm is “001”, the voltage selection signal XDm is set to the H level during the period from time t7 to t14 in one horizontal period from time t1 to t15.

  Further, even if the image signal DATAm is “010” to “111”, as in the case where the image signal DATAm is “000” or “001”, in one horizontal period from time t1 to t15, The period during which the voltage selection signal XDm is at the H level is changed.

  On the other hand, in FIG. 8, in the period from time t15 to t29, the polarity of the polarity instruction signal POL is L level.

  These times t15 to t29 correspond to the above-described times t1 to t15, respectively. The PWM decoder 122 inverts the polarity of the voltage selection signal XDm in the period from time t15 to t29 compared to the period from time t1 to t15 described above.

  Next, the operation of the PWM decoder 122 when the display switching signal CHG is at the L level, that is, in the partial display mode will be described with reference to FIG.

  In FIG. 9, in the period from time t30 to time t44, the polarity instruction signal POL is at H level, and in the period from time t44 to t58, the polarity instruction signal POL is at L level.

  Times t30 to t44 in FIG. 9 correspond to times t1 to t15 in FIG. 8, respectively, and times t44 to t58 in FIG. 9 correspond to times t15 to t29 in FIG. 8, respectively. The PWM decoder 122 operates in the period from time t30 to t58 in the same manner as in the period from time t1 to t29 in FIG.

  That is, the PWM decoder 122 operates similarly in the full screen display mode and the partial display mode.

Returning to FIG. 7, the image signal voltage selection circuit 123 selects one voltage from a plurality of voltages over a predetermined period and outputs it as an image signal.
The image signal voltage selection circuit 123 receives voltage selection signals XD1 to XD160 output from the PWM decoder 122. The image signal voltage selection circuit 123 receives the voltage VHN output from the drive voltage generation circuit 6 and one of the voltages VHP1 and VHP2. Specifically, when the display switching signal CHG is at the H level, the voltages VHP1 and VHN are input, and when the display switching signal CHG is at the L level, the voltage VHP1 is substituted for the voltage VHP1. A low-potential voltage VHP2 is input.

First, the operation of the image signal voltage selection circuit 123 when the display switching signal CHG is at the H level, that is, the full screen display mode will be described with reference to FIG.
In the full screen display mode, the image signal voltage selection circuit 123 outputs the voltage level of the image signal supplied to the data line Xm as the voltage VHP1 during the period when the voltage selection signal XDm is at the H level, and the voltage selection signal XDm is During the period of L level, the voltage level of the image signal supplied to the data line Xm is output as the voltage VHN.

Next, the operation of the image signal voltage selection circuit 123 when the display switching signal CHG is at the L level, that is, the partial display mode will be described with reference to FIG.
In the partial display mode, the image signal voltage selection circuit 123 sets the voltage level of the image signal supplied to the data line Xm to the voltage VHP1 during the period of outputting the voltage level of the image signal supplied to the data line Xm as the voltage VHP1 in FIG. Is output as a voltage VHP2 having a lower potential.

The above data line driving circuit 12 operates as follows.
That is, the data line drive circuit 12 supplies either the voltage VHP1 or the voltage VHP2 or the voltage VHN to the data line X as an image signal in accordance with the polarity instruction signal POL.

  Specifically, the data line drive circuit 12 is supplied with voltages VHP1 and VHN from the drive voltage generation circuit 6 in the full screen display mode.

  If the polarity instruction signal POL is at the H level, the voltage VHN is supplied to the data line Xm for a longer period in the half horizontal scanning period, which is the latter half of one horizontal scanning period, as the value of the image signal DATAm increases. As the value of the image signal DATAm is smaller, the voltage VHP1 is supplied to the data line Xm over a longer period in the ½ horizontal scanning period, which is the latter half of one horizontal scanning period.

  On the other hand, if the polarity instruction signal POL is at the L level, the voltage VHP1 is supplied to the data line Xm for a longer period in the half horizontal scanning period of the latter half of one horizontal scanning period as the value of the image signal DATAm is larger. As the value of the image signal DATAm is smaller, the voltage VHN is supplied to the data line Xm over a longer period in the ½ horizontal scanning period, which is the latter half of one horizontal scanning period.

  In the partial display mode, the data line drive circuit 12 is supplied with voltages VHP2 and VHN from the drive voltage generation circuit 6.

  In the partial display mode, the voltage VHP2 having a potential lower than the voltage VHP1 is supplied to the data line Xm instead of the voltage VHP1 during the period in which the voltage VHP1 is supplied to the data line Xm as the image signal in the full screen display mode. .

  FIG. 10 is a timing chart showing the operation of the electro-optical device 1 in the full screen display mode.

  First, if the voltage level of the scanning line Yn is the voltage VSP as in the period from the time t61 to t64 in the half horizontal scanning period of the latter half of one horizontal scanning period, the voltage level of the data line Xm is the voltage VHP1. The longer the period, the darker the pixel 50 provided corresponding to the intersection of the scanning line Yn and the data line Xm, and the shorter the period in which the voltage level of the data line Xm is the voltage VHP1, The pixel 50 provided corresponding to the intersection of the scanning line Yn and the data line Xm displays a bright gradation.

  Specifically, in the period from time t61 to t64 in FIG. 10, when attention is paid to the three data lines X1, X2, and X160, the voltage of the data line X1 extends over the period from time t61 to t63. The voltage of the data line X2 is the voltage VHP1, and there is no period of the voltage VHP1, and the voltage of the data line X160 is the voltage VHP1 over the period from time t61 to t62. That is, in the period from time t61 to t64, the longest period of the voltage VHP1 is the data line X1, the next longest is the data line X160, and the shortest is the data line X2. .

  Therefore, the pixel 50 provided corresponding to the intersection of the scanning line Yn and the data line X1 displays the darkest gradation. Next, the dark gradation is displayed by the pixel 50 provided corresponding to the intersection of the scanning line Yn and the data line X160. The brightest gradation is displayed by the pixel 50 provided corresponding to the intersection of the scanning line Yn and the data line X2.

  Next, if the voltage level of the scanning line Yn is the voltage VSP as in the period from time t61 to t64, then the voltage level of the scanning line Yn is set to the voltage VHP1 as in the period from time t64 to t66. . Thus, in the period from time t64 to t66, the pixel 50 provided corresponding to the intersection of the scanning line Yn and the data line Xm continues to display the gradation displayed in the period from time t61 to t64.

  On the other hand, if the voltage level of the scanning line Yn is the voltage VSN1 as in the period from the time t66 to the time t70 in the half horizontal scanning period that is the latter half of one horizontal scanning period, the voltage level of the data line Xm is the voltage VHP1. The longer the period, the brighter the pixel 50 provided corresponding to the intersection of the scanning line Yn and the data line Xm, and the shorter the period during which the voltage level of the data line Xm is the voltage VHP1, The pixel 50 provided corresponding to the intersection of the scanning line Yn and the data line Xm displays a dark gradation.

  Specifically, in the period from time t66 to time t70 in FIG. 10, when attention is paid to the three data lines X1, X2, and X160, the voltage of the data line X1 extends over the period from time t68 to time t70. The voltage VHP1, the voltage of the data line X2 is the voltage VHP1 over the period from time t69 to t70, and the voltage of the data line X160 is the voltage VHP1 over the period from time t67 to t70. That is, in the period from time t66 to time t70, the longest period of the voltage VHP1 is the data line X160, the next longest is the data line X1, and the shortest is the data line X2. .

  Therefore, the pixel 50 provided corresponding to the intersection of the scanning line Yn and the data line X160 displays the brightest gradation. The next bright gradation is displayed by the pixel 50 provided corresponding to the intersection of the scanning line Yn and the data line X1. The darkest gradation is displayed by the pixel 50 provided corresponding to the intersection of the scanning line Yn and the data line X2.

  Next, if the voltage level of the scanning line Yn is the voltage VSN1 as in the period from time t66 to t70, then the scanning is performed as in the period from the time t70 until the voltage level of the scanning line Yn becomes the voltage VSP. The voltage level of the line Yn is set to the voltage VHN. Thereby, in the period from time t70 until the voltage level of the scanning line Yn becomes the voltage VSP, the pixel 50 provided corresponding to the intersection of the scanning line Yn and the data line Xm is in the period from time t66 to t70. Continues to display the gradation displayed at.

  FIG. 11 is a timing chart showing the operation of the electro-optical device 1 in the partial display mode.

  The period from time t80 to t90 in FIG. 11 corresponds to the period from time t60 to t70 in FIG. In the period when the voltage level of the scanning line Yn is the voltage VSN1 in FIG. 10, the electro-optical device 1 sets the voltage level of the scanning line Yn to the voltage VSN2 having a lower potential than the voltage VSN1, and the voltage of the scanning line Yn in FIG. During the period of VHP1, the voltage level of the scanning line Yn is set to a voltage VHP2 having a lower potential than the voltage VHP1. Further, the electro-optical device 1 sets the voltage level of the data line X to the voltage VHP2 during the period in which the voltage level of the data line Xm is the voltage VHP1 in FIG.

The electro-optical device 1 operates as follows when switching from the full screen display mode to the partial display mode.
That is, in the full screen display mode, first, over one frame period, the scanning line drive circuit 11 sets the voltage VSP or the voltage VSN1 as the selection voltage and the voltage VHP1 or the voltage VHN as the non-selection voltage to all the scanning lines. Sequentially supplied to Y. Further, in synchronization with the scanning line driving circuit 11 sequentially supplying the voltage VSP or the voltage VSN1 as the selection voltage to all the scanning lines Y, the data line driving circuit 12 applies all the voltages VHP1 or VHN as the image signals. To the data line X. As a result, black gradation is displayed from all the pixels 50 constituting the display screen A.

  Next, the scanning line driving circuit 11 supplies a voltage VHN as a non-selection voltage to all the scanning lines Y over one frame period following the above-described one frame period, and the data line driving circuit 12 The voltage VHN is supplied to all the data lines X. Thereby, the gradation display is stopped in all the pixels 50 constituting the display screen A.

  In the one frame period in which the gradation display is stopped, the control circuit 30 outputs an L level display switching signal to switch the electro-optical device 1 from the full screen display mode to the partial display mode. Further, the voltages VSP, VHP2, VHN, and VSN2 are output by the drive voltage generation circuit 6 to which the L-level display switching signal is input.

  As a result, after one frame period in which the gray scale display is stopped, the scanning line driving circuit 11 applies the voltage VSP2 having a potential lower than the voltage VSP or the voltage VSN1 to the scanning line driving circuit 11. The voltage VHP2 or the voltage VHN having a lower potential than the voltage VHP1 is sequentially supplied as a non-selection voltage. Further, a voltage VHP2 or a voltage VHN having a lower potential than the voltage VHP1 is supplied as an image signal to all the data lines X by the data line driving circuit 12.

According to this embodiment, there are the following effects.
(1) The data line driving circuit 12 supplies a voltage level composed of the voltage VHP1 and the voltage VHN to the plurality of data lines X as an image signal in the full screen display mode, and the voltage VHP2 and the voltage VHN in the partial display mode. The voltage level consisting of is supplied to the plurality of data lines X as image signals. For this reason, in the partial display mode, the power consumption can be reduced by the amount that the voltage level of the image signal is lower than in the full screen display mode.

  (2) As described above, in the partial display mode, the voltage level of the image signal is lowered as compared with the case of the full screen display mode, so the potential of the data line X to which the image signal is supplied is lowered. Therefore, in the partial display mode, even if the ambient temperature of the electro-optical device 1 is high, it is possible to suppress an increase in leakage current at the TFD 51 and suppress a decrease in contrast.

  (3) The gradation display is stopped when switching from the full screen display mode to the partial display mode, and the image signal supplied to the data line X is changed from the voltage level consisting of the voltage VHP1 and the voltage VHN to the voltage VHP2 and the voltage VHN. The voltage level was changed to For this reason, even if the pixel 50 supplied with the image signal before changing the amplitude and the pixel 50 supplied with the image signal after changing the amplitude are mixed in one frame period, these pixels 50 Then, gradation display is not performed. Therefore, the gradation display can be prevented from becoming unnatural.

(4) In the partial display mode, the voltage VSN1 is supplied as a selection voltage to the scanning line Yn in the full screen display mode in the partial display mode, and the voltage is lower than the voltage VSN1 in place of the voltage VSN1. VSN2 was supplied to the scanning line Yn. Here, the potential difference between the voltage VSN1 and the voltage VSN2 is equal to the potential difference between the voltage VHP1 and the voltage VHP2. For this reason, the potential difference between the image signal and the selection voltage in the full screen display mode and the potential difference between the image signal and the selection voltage in the partial display mode can be made the same. Therefore, gradation display can be performed in the partial display mode, as in the full screen display mode.
In the electro-optical device 1, in the partial display mode, when the selection voltage is changed from the voltage VSN1 to the voltage VSN2, the amplitude of the scanning signal increases, and thus the power consumption increases. However, in the electro-optical device 1, as described above, the power consumption is reduced by the amount that the voltage level of the image signal is lowered.
Here, when the scanning signal and the image signal are compared, the number of times that the voltage level of the scanning signal changes is smaller than the number of times that the voltage level of the image signal changes as shown in FIGS. For this reason, the power consumption increased by increasing the amplitude of the scanning signal is smaller than the power consumption decreased by lowering the voltage level of the image signal. That is, when the voltage VSN2 is supplied to the plurality of scanning lines Yn instead of the voltage VSN1 as the selection voltage, the power consumption increases. The increased power consumption causes the voltage VHP2 to be used as the image signal instead of the voltage VHP1 to the plurality of data lines. Compared to the power consumption reduced by supplying Xm. Therefore, as a result, the electro-optical device 1 can reduce power consumption in the partial display mode.

<Second Embodiment>
FIG. 12 is a block diagram showing a configuration of an electro-optical device 1A according to the second embodiment of the present invention.
The present embodiment is different from the liquid crystal panel drive device 5 of the first embodiment in that the liquid crystal panel drive device 5A includes the temperature sensor 20. About another structure, it is the same as that of 1st Embodiment, and abbreviate | omits description.

  The control circuit 30A supplies the display switching signal CHG to the drive voltage generation circuit 6A. Further, the clock signal YCLK, the start pulse YD, the polarity instruction signal POL, and the display switching signal CHG are supplied to the scanning line driving circuit 11. Further, the polarity instruction signal POL and the gradation code pulse GCP are supplied to the data line driving circuit 12. Further, a measurement start command CHK is supplied to the temperature sensor 20.

The temperature sensor 20 measures the ambient temperature of the electro-optical device 1A.
The temperature sensor 20 receives a measurement start command CHK output from the control circuit 30A. The measurement start command CHK is a signal for starting the measurement of the ambient temperature of the electro-optical device 1A by the temperature sensor 20.

When the measurement start command CHK becomes H level, the temperature sensor 20 starts measuring the ambient temperature of the electro-optical device 1A. If the temperature sensor 20 is lower than a predetermined temperature T (see FIG. 13), the ambient temperature signal TMP at H level. If the temperature is higher than the predetermined temperature T, an L level ambient temperature signal TMP is output.
The operation of the temperature sensor 20 will be described in detail later with reference to FIG.

  Based on the ambient temperature signal TMP output from the temperature sensor 20 and the display switching signal CHG output from the control circuit 30A, the drive voltage generation circuit 6A sends a scan voltage drive circuit 11 and a data line drive circuit 12 to A predetermined voltage is supplied from a plurality of voltages.

  Specifically, when the display switching signal CHG is at the H level, and when the display switching signal CHG is at the L level and the ambient temperature signal TMP is at the H level, the scanning line driving circuit 11 receives the voltage. VSN 1, VHN, VHP 1, and VSP are supplied, and voltages VHN and VHP 1 are supplied to the data line driving circuit 12. On the other hand, when the display switching signal CHG is at the L level and the ambient temperature signal TMP is at the L level, the scanning line driving circuit 11 and the data line driving circuit 12 are supplied with a potential higher than the voltage VHN instead of the voltage VHP1. The voltage VHP2 having a higher potential and lower than the voltage VHP1 is supplied, and the voltage VSN2 having a potential lower than the voltage VSN1 is supplied instead of the voltage VSN1 by the potential difference between the voltage VHP1 and the voltage VHP2.

The electro-optical device 1A described above operates as follows when switching from the full screen display mode to the partial display mode.
That is, in the full screen display mode, first, over one frame period, the scanning line drive circuit 11 sets the voltage VSP or the voltage VSN1 as the selection voltage and the voltage VHP1 or the voltage VHN as the non-selection voltage to all the scanning lines. Sequentially supplied to Y. Further, in synchronization with the scanning line driving circuit 11 sequentially supplying the voltage VSP or the voltage VSN1 as the selection voltage to all the scanning lines Y, the data line driving circuit 12 applies all the voltages VHP1 or VHN as the image signals. To the data line X. As a result, black gradation is displayed from all the pixels 50 constituting the display screen A.

  Next, the scanning line driving circuit 11 supplies a voltage VHN as a non-selection voltage to all the scanning lines Y over one frame period following the above-described one frame period, and the data line driving circuit 12 The voltage VHN is supplied to all the data lines X. Thereby, the gradation display is stopped in all the pixels 50 constituting the display screen A.

  In one frame period in which the gradation display is stopped, the control circuit 30A outputs an L level display switching signal to switch the electro-optical device 1A from the full screen display mode to the partial display mode, A measurement start command CHK is output.

  Then, the temperature sensor 20 to which the H level measurement start command CHK is input starts measuring the ambient temperature of the electro-optical device 1A, and outputs an H level ambient temperature signal TMP if the temperature sensor 20 is lower than the predetermined temperature T. If it is higher than the predetermined temperature T, an L level ambient temperature signal TMP is output.

If the temperature sensor 20 outputs the H level ambient temperature signal TMP, the drive voltage to which the H level ambient temperature signal TMP and the L level display switching signal CHG output from the control circuit 30A are input. The generation circuit 6A outputs voltages VSP, VHP1, VHN, and VSN1.
Accordingly, the scanning line driving circuit 11 sequentially supplies the voltage VSP or the voltage VSN1 as the selection voltage and the voltage VHP1 or the voltage VHN as the non-selection voltage to all the scanning lines Y. Further, the voltage VHP1 or the voltage VHN is supplied to all the data lines X as an image signal by the data line driving circuit 12.

On the other hand, if the temperature sensor 20 outputs the L level ambient temperature signal TMP, the drive voltage to which the L level ambient temperature signal TMP and the L level display switching signal CHG output from the control circuit 30A are input. The generation circuit 6A outputs voltages VSP, VHP2, VHN, and VSN2.
As a result, the scanning line driving circuit 11 applies the voltage VSP2 having a potential lower than the voltage VSP or the voltage VSN1 and the voltage VHP2 or voltage having a potential lower than the voltage VHP1 as the non-selection voltage. VHN are sequentially supplied. Further, a voltage VHP2 or a voltage VHN having a lower potential than the voltage VHP1 is supplied as an image signal to all the data lines X by the data line driving circuit 12.

FIG. 13 is a graph showing the relationship between the ambient temperature of the electro-optical device 1A and the contrast in the partial display mode.
In FIG. 13, the vertical axis indicates the contrast, and the horizontal axis indicates the ambient temperature of the electro-optical device 1A.

  The image signal composed of the voltage VHP1 and the voltage VHN indicated by the solid line is compared with the image signal composed of the voltage VHP2 and the voltage VHN indicated by the one-dot chain line. Then, if the ambient temperature of the electro-optical device 1A is lower than the predetermined temperature T, the image signal indicated by the solid line has higher contrast, and if it is higher than the predetermined temperature T, the image signal indicated by the one-dot chain line. The contrast is higher.

  Therefore, in the electro-optical device 1A, as described above, in the partial display mode, if the ambient temperature of the electro-optical device 1A is lower than the predetermined temperature T, the voltage VHP1 and the voltage VHN are applied to all the data lines X. When an image signal is supplied and the ambient temperature of the electro-optical device 1A is higher than a predetermined temperature T, an image signal composed of the voltage VHP2 and the voltage VHN is supplied to all the data lines X.

  (5) The ambient temperature of the electro-optical device 1A was measured by the temperature sensor 20. In the partial display mode, when the ambient temperature of the electro-optical device 1A is lower than the predetermined temperature T, a voltage level composed of the voltage VHP1 and the voltage VHN is supplied as an image signal to the plurality of data lines X, and the electro-optical device When the ambient temperature of 1A is higher than the predetermined temperature T, the voltage level composed of the voltage VHP2 and the voltage VHN is supplied to the plurality of data lines X as image signals. That is, in the partial display mode, if the ambient temperature of the electro-optical device 1A is lower than the predetermined temperature T, the ambient temperature of the electro-optical device 1A is set to the predetermined temperature T in consideration of the contrast that decreases due to the reduction in the amplitude of the image signal. If it is higher, the amplitude of the image signal is changed in consideration of the contrast that decreases due to the increase in leakage current in the TFD 51. Therefore, in the partial display mode, it is possible to suppress a decrease in contrast not only when the ambient temperature of the electro-optical device 1A is higher than the predetermined temperature T but also when the ambient temperature of the electro-optical device 1A is low.

<Modification>
Note that the present invention is not limited to the above-described embodiments, and modifications, improvements, and the like within a scope in which the object of the present invention can be achieved are included in the present invention.
For example, in each of the above-described embodiments, 200 rows of scanning lines Y1 to Y200 and 160 columns of data lines X1 to X160 are provided, but the present invention is not limited thereto. For example, 480 rows of scanning lines Y1 to Y480 and 640 columns of data lines X1 to X640 may be provided.

  In each of the above-described embodiments, the electro-optical devices 1 and 1A operate in the normally black mode. However, the present invention is not limited to this. For example, the electro-optical devices 1 and 1A may operate in the normally white mode.

  In each of the above-described embodiments, the image signal DATAm is 3-bit digital data. However, the image signal DATAm is not limited to this, and may be 8-bit or 10-bit digital data, for example.

  In each of the above-described embodiments, the display area 71 includes the pixels 50 from the 50th line to the 100th line, and the non-display area 72 includes the pixels 50 from the 1st line to the 49th line and the 101st line. To the 200th row of pixels 50, but is not limited thereto. For example, the display area 71 may include pixels 50 from the first line to the 150th line, and the non-display area 72 may include pixels 50 from the 151st line to the 200th line.

  Further, in each of the above-described embodiments, the gradation display is stopped for one frame period when switching from the full screen display mode to the partial display mode. However, the present invention is not limited to this. For example, the gradation display is performed for two frame periods. The display may be stopped.

  Further, in each of the above-described embodiments, the black gradation is displayed over one frame period before the gradation display is stopped. However, the present invention is not limited to this. For example, a white gradation may be displayed. .

  In the second embodiment described above, when the measurement start command CHK of H level is output from the control circuit 30A, the ambient temperature of the electro-optical device 1A is measured by the temperature sensor 20, but this is not restrictive. For example, the ambient temperature of the electro-optical device 1A may be measured by the temperature sensor 20 every time a predetermined period elapses regardless of the signal output from the control circuit 30A.

<Application example>
Next, an electronic apparatus to which the electro-optical device 1 according to the above-described embodiment is applied will be described.
FIG. 14 is a perspective view illustrating a configuration of a mobile phone 3000 to which the electro-optical device 1 is applied. The cellular phone 3000 includes a plurality of operation buttons 3001, scroll buttons 3002, and the electro-optical device 1. By operating the scroll button 3002, the screen displayed on the electro-optical device 1 is scrolled.

  Note that electronic devices to which the electro-optical device 1 is applied include those shown in FIG. 14, personal computers, portable information terminals, digital still cameras, liquid crystal televisions, viewfinder type, monitor direct view type video tape recorders, car navigation systems. Examples of the apparatus include a device, a pager, an electronic notebook, a calculator, a word processor, a workstation, a video phone, a POS terminal, and a touch panel. The electro-optical device described above can be applied as a display unit of these various electronic devices.

1 is a block diagram illustrating a configuration of an electro-optical device according to a first embodiment of the invention. FIG. FIG. 4 is a diagram illustrating a display screen in a partial display mode of the electro-optical device. FIG. 3 is a block diagram illustrating a configuration of a scanning line driving circuit included in the electro-optical device. 4 is a first timing chart of the scanning line driving circuit. 6 is a second timing chart of the scanning line driving circuit. 6 is a third timing chart of the scanning line driving circuit. FIG. 3 is a block diagram illustrating a configuration of a data line driving circuit included in the electro-optical device. 3 is a first timing chart of the data line driving circuit. 6 is a second timing chart of the data line driving circuit. 3 is a first timing chart of the electro-optical device. 6 is a second timing chart of the electro-optical device. FIG. 6 is a block diagram illustrating a configuration of an electro-optical device according to a second embodiment of the invention. 6 is a graph showing a relationship between ambient temperature and contrast of the electro-optical device in a partial display mode. It is a perspective view which shows the structure of the mobile telephone to which the said electro-optical apparatus is applied.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 1A ... Electro-optical device 6, 6A ... Drive voltage generation circuit, 11 ... Scan line drive circuit, 12 ... Data line drive circuit, 20 ... Temperature sensor, 30, 30A ... Control circuit, 50 ... Pixel, 51 ... TFD (Nonlinear element), 71 ... display area, 72 ... non-display area, 3000 ... mobile phone (electronic device), A ... display screen (full screen), X ... data line, Y ... scanning line.

Claims (5)

A full screen comprising a plurality of scanning lines, a plurality of data lines, and a plurality of pixels provided corresponding to intersections of the plurality of scanning lines and the plurality of data lines, wherein the entire screen is a display area. An electro-optical device capable of selecting a display mode and a partial display mode in which a partial area of the entire screen is a display area and another area is a non-display area,
A scanning line driving circuit for sequentially supplying a selection voltage for selecting the scanning line to the plurality of scanning lines;
A data line driving circuit for supplying an image signal to the plurality of data lines when the scanning line is selected;
The pixel has a non-linear element as a switching element connected to the data line,
The data line driving circuit includes:
In the full screen display mode, a voltage level including a first voltage and a second voltage having a higher potential than the first voltage is supplied as an image signal to the plurality of data lines,
In the partial display mode, the plurality of data using the voltage level including the first voltage and a third voltage having a potential higher than the first voltage and lower than the second voltage as an image signal. An electro-optical device that is supplied to a wire. A full screen comprising a plurality of scanning lines, a plurality of data lines, and a plurality of pixels provided corresponding to intersections of the plurality of scanning lines and the plurality of data lines, wherein the entire screen is a display area. An electro-optical device capable of selecting a display mode and a partial display mode in which a partial area of the entire screen is a display area and another area is a non-display area,
A scanning line driving circuit for sequentially supplying a selection voltage for selecting the scanning line to the plurality of scanning lines;
A data line driving circuit for supplying an image signal to the plurality of data lines when the scanning line is selected;
A temperature sensor for measuring the ambient temperature,
The pixel has a non-linear element as a switching element connected to the data line,
The data line driving circuit includes:
In the partial display mode, when the ambient temperature measured by the temperature sensor is lower than a predetermined temperature, an image signal including a first voltage and a second voltage having a potential higher than the first voltage is the plurality of data. Supply to the wire,
In the partial display mode, when the ambient temperature measured by the temperature sensor is higher than a predetermined temperature, the potential is higher than the first voltage and the first voltage, and lower than the second voltage. An electro-optical device that supplies a voltage level including the third voltage to the plurality of data lines as an image signal. The electro-optical device according to claim 1,
The data line driving circuit stops gradation display when switching from the full-screen display mode to the partial display mode, and supplies an image signal supplied to the plurality of data lines to the first voltage and the second voltage. An electro-optical device that changes from a voltage level composed of a voltage to a voltage level composed of the first voltage and the third voltage. The electro-optical device according to claim 1,
2. The electro-optical device according to claim 1, wherein the scanning line driving circuit supplies the selection voltage with a voltage level lowered in the partial display mode. An electronic apparatus comprising the electro-optical device according to claim 1.

Images