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JP2007324088A - Capacitance detector device - Google Patents

Capacitance detector device Download PDF

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JP2007324088A
JP2007324088A JP2006156120A JP2006156120A JP2007324088A JP 2007324088 A JP2007324088 A JP 2007324088A JP 2006156120 A JP2006156120 A JP 2006156120A JP 2006156120 A JP2006156120 A JP 2006156120A JP 2007324088 A JP2007324088 A JP 2007324088A
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capacitance
detection
wiring
frequency signal
detection device
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Mikio Fujimura
幹雄 藤村
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Tokai Rika Co Ltd
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Tokai Rika Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a capacitance detection device capable of reducing parasitic capacitance and of improving detection precision of the capacitance. <P>SOLUTION: The capacitance detection device has a sensor electrode 14 to form the capacitance between a ground electrode, an oscillator 22 mounted on a printing board 10, an inner wiring (wiring 24, electrode pad 26) to supply a high frequency signal generated in the oscillator 22 to the sensor electrode 14, and a substrate 21 in which the oscillator 22 and the inner wiring are installed, and detects the capacitance based on a detection signal a in which the high frequency signal is fluctuated according to the capacitance. The capacitance detection device is installed between the interior wiring and the substrate 21, and provided with shield layers 31, 32 to which a shield signal b of the same phase and the same amplitude as those of the detection signal a is supplied. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、静電容量検出装置に関するものである。   The present invention relates to a capacitance detection device.

従来、静電容量検出装置として、センサ電極に高周波信号を供給するとともに、該センサ電極がグランド電極との間に形成する静電容量に応じて変動する検出信号に基づいて当該静電容量を検出し得るものが提案されている(例えば特許文献1など)。こうした静電容量検出装置では、センサ電極に高周波信号を供給等するための検出用集積回路がプリント基板に実装されるとともに、センサ電極と検出用集積回路とがプリント基板上の配線パターンで接続されることが一般的である。   Conventionally, as a capacitance detection device, a high-frequency signal is supplied to a sensor electrode, and the capacitance is detected based on a detection signal that varies according to the capacitance that the sensor electrode forms with a ground electrode. What can be done is proposed (for example, patent document 1 etc.). In such a capacitance detection device, a detection integrated circuit for supplying a high-frequency signal to a sensor electrode is mounted on a printed circuit board, and the sensor electrode and the detection integrated circuit are connected by a wiring pattern on the printed circuit board. In general.

また、このような静電容量検出装置において、配線パターンの寄生容量を低減するために、プリント基板と配線パターンとの間にシールド層を設けるとともに、該シールド層に検出信号と同位相、且つ、同振幅のシールド信号を供給するものが提案されている。この場合、配線パターンの寄生容量が低減されることで、静電容量の検出精度が向上される。
特開2001−264194号公報
Further, in such a capacitance detection device, in order to reduce the parasitic capacitance of the wiring pattern, a shield layer is provided between the printed circuit board and the wiring pattern, and the shield layer has the same phase as the detection signal, and A device that supplies a shield signal having the same amplitude has been proposed. In this case, the capacitance detection accuracy is improved by reducing the parasitic capacitance of the wiring pattern.
JP 2001-264194 A

ところで、静電容量の検出精度に影響を及ぼす寄生容量は、配線パターンのみならず、検出用集積回路内部の電極パッドや配線にも生じる。従って、検出用集積回路内部の電極パッド及び配線の寄生容量によって、静電容量の検出精度が低下する可能性がある。特に、数pF程度の微小な静電容量を検出する場合には、このような内部の寄生容量が静電容量の検出精度に著しい影響を及ぼすことになる。   By the way, the parasitic capacitance that affects the detection accuracy of the electrostatic capacitance is generated not only in the wiring pattern but also in the electrode pad and the wiring inside the detection integrated circuit. Therefore, there is a possibility that the detection accuracy of the capacitance is lowered due to the parasitic capacitance of the electrode pad and the wiring inside the detection integrated circuit. In particular, when a very small capacitance of about several pF is detected, such an internal parasitic capacitance significantly affects the capacitance detection accuracy.

本発明の目的は、寄生容量を低減して、静電容量の検出精度を向上することができる静電容量検出装置を提供することにある。   An object of the present invention is to provide a capacitance detection device capable of reducing parasitic capacitance and improving capacitance detection accuracy.

上記問題点を解決するために、請求項1に記載の発明は、グランド電極との間に静電容量を形成するセンサ電極と、プリント基板に実装され、高周波信号源、該高周波信号源で発生した高周波信号を前記センサ電極に供給する内部配線、並びにこれら高周波信号源及び内部配線の設けられる基板を有し、前記静電容量に応じて前記高周波信号の変動された検出信号に基づいて当該静電容量を検出する検出用集積回路とを備える静電容量検出装置において、前記内部配線及び前記基板の間に設けられ、前記検出信号と同位相、且つ、同振幅のシールド信号が供給されるシールド層を備えたことを要旨とする。   In order to solve the above-mentioned problems, the invention according to claim 1 is mounted on a printed circuit board with a sensor electrode for forming a capacitance between the ground electrode and a high-frequency signal source, and is generated by the high-frequency signal source. An internal wiring that supplies the high-frequency signal to the sensor electrode, and a substrate on which the high-frequency signal source and the internal wiring are provided, and the static signal is detected based on the detection signal in which the high-frequency signal is changed according to the capacitance. A capacitance detection device including a detection integrated circuit for detecting a capacitance, wherein the shield is provided between the internal wiring and the substrate and is supplied with a shield signal having the same phase and the same amplitude as the detection signal. The gist is that a layer is provided.

請求項2に記載の発明は、請求項1に記載の静電容量検出装置において、前記内部配線は、外部接続用の電極パッド及び該電極パッドと前記高周波信号源とを接続する配線の少なくとも一方であることを要旨とする。   According to a second aspect of the present invention, in the capacitance detection device according to the first aspect, the internal wiring is at least one of an electrode pad for external connection and a wiring for connecting the electrode pad and the high-frequency signal source. It is a summary.

上記各構成によれば、前記内部配線及び前記基板の間に設けられたシールド層に、前記検出信号と同位相、且つ、同振幅のシールド信号が供給されることで、前記内部配線の寄生容量を低減し、静電容量の検出精度を向上することができる。   According to each of the above-described configurations, a shield signal having the same phase and the same amplitude as the detection signal is supplied to the shield layer provided between the internal wiring and the substrate, so that the parasitic capacitance of the internal wiring is obtained. And the detection accuracy of the capacitance can be improved.

請求項3に記載の発明は、請求項1又は2に記載の静電容量検出装置において、前記シールド層の少なくとも一部は、前記基板の表面に垂直な視線で見たときに、前記内部配線を内包することを要旨とする。   According to a third aspect of the present invention, in the capacitance detection device according to the first or second aspect, at least a part of the shield layer is the internal wiring when viewed in a line of sight perpendicular to the surface of the substrate. The gist is to include

同構成によれば、前記シールド層の少なくとも一部は、前記内部配線を内包し得るに十分な面積が確保されていることで、前記内部配線の寄生容量をより確実に低減することができる。   According to this configuration, at least a part of the shield layer has a sufficient area that can enclose the internal wiring, whereby the parasitic capacitance of the internal wiring can be more reliably reduced.

請求項4に記載の発明は、請求項1〜3のいずれか1項に記載の静電容量検出装置において、前記検出用集積回路は、前記静電容量との間でローパスフィルタを構成する抵抗を備え、前記検出信号は、前記静電容量に応じて減衰された前記高周波信号であることを要旨とする。   According to a fourth aspect of the present invention, in the capacitance detection device according to any one of the first to third aspects, the detection integrated circuit is a resistor that forms a low-pass filter with the capacitance. The detection signal is the high-frequency signal attenuated according to the capacitance.

同構成によれば、前記静電容量を検出するための前記検出用集積回路の構成を極めて簡易なものにできる。   According to this configuration, the configuration of the detection integrated circuit for detecting the capacitance can be made extremely simple.

請求項1乃至4に記載の発明では、寄生容量を低減して、静電容量の検出精度を向上することができる静電容量検出装置を提供することができる。   According to the first to fourth aspects of the present invention, it is possible to provide a capacitance detection device that can reduce parasitic capacitance and improve capacitance detection accuracy.

以下、本発明を具体化した一実施形態を図1〜図2に従って説明する。なお、図1は、例えばタッチパネルなどにおいて、その操作の検出に供される静電容量検出装置の電気的構成を示す平面図であり、図2は、図1のA−A線に沿った断面図である。図1では、四角板状をなすプリント基板10の実装面であるその表面に垂直な視線で見た状態を模式的に示している。同図に示したように、プリント基板10には、四角板状をなす検出用集積回路11が平面視において該プリント基板10に内包される態様で実装されるとともに、該検出用集積回路11の外側(図1においてハッチングを描画した四角枠状の領域)において、長尺状をなす複数(本実施形態では、2つ)のシールド層12が外側に向かって延出成形され、更に各シールド層12の長手方向に沿ってその表面上に成形される態様で配線パターン13が設けられている。なお、これらシールド層12及び配線パターン13は、例えば銅などの導体にて成形されており、各シールド層12上の配線パターン13は、図示しない絶縁膜を介して該シールド層12と電気的に絶縁されている。上記検出用集積回路11は、これら配線パターン13を介してプリント基板10外部に配設された複数(2つ)の平板状のセンサ電極14にそれぞれ電気的に接続されている。各センサ電極14は、所定の電位を有するグランド電極(例えば接地導体)との間に静電容量を形成するとともに、例えば人体(手指など)の近接又は接触に伴い該人体との間に静電容量を形成する。つまり、人体を通してグランド電極に接地される各センサ電極14は、人体との距離に応じて該人体との間に形成する静電容量が変動される。   Hereinafter, an embodiment embodying the present invention will be described with reference to FIGS. FIG. 1 is a plan view showing an electrical configuration of a capacitance detection device used for detecting an operation of the touch panel, for example, and FIG. 2 is a cross section taken along line AA in FIG. FIG. FIG. 1 schematically shows a state viewed from a line of sight perpendicular to the surface, which is a mounting surface of a printed board 10 having a square plate shape. As shown in the drawing, a detection integrated circuit 11 having a square plate shape is mounted on the printed circuit board 10 so as to be included in the printed circuit board 10 in a plan view. A plurality of (in this embodiment, two in this embodiment) shield layers 12 having an elongated shape are extended outwardly on the outer side (the rectangular frame-like region in which hatching is drawn in FIG. 1), and each shield layer is further formed. The wiring pattern 13 is provided in such a manner that it is formed on the surface along the longitudinal direction of 12. The shield layer 12 and the wiring pattern 13 are formed of a conductor such as copper, for example, and the wiring pattern 13 on each shield layer 12 is electrically connected to the shield layer 12 via an insulating film (not shown). Insulated. The detection integrated circuit 11 is electrically connected to a plurality (two) of flat sensor electrodes 14 disposed outside the printed circuit board 10 via the wiring patterns 13. Each sensor electrode 14 forms an electrostatic capacitance with a ground electrode (for example, a ground conductor) having a predetermined potential, and electrostatically flows between the sensor electrode 14 and the human body as the human body (such as a finger) approaches or comes into contact. Form a capacity. That is, the capacitance formed between each sensor electrode 14 grounded to the ground electrode through the human body and the human body varies according to the distance from the human body.

前記検出用集積回路11は、例えば半導体からなる基板21を備えるとともに、該基板21には、高周波信号源としての発振器22が設置されている。上記発振器22には、抵抗23の一端が電気的に接続されるとともに、該抵抗23の他端には、例えばアルミニウムやポリシリコンなどの導体にて成形された配線24の一端が電気的に接続されている。なお、上記配線24の他端は、セレクタ25を介して前記センサ電極14と同数(2つ)に分岐された互いに独立の配線部24aを形成するとともに、各配線部24aにおいて、例えばアルミニウムやポリシリコンなどの導体にて成形された外部接続用の複数(2つ)の電極パッド26の1つと電気的に接続されている。これら配線24及び電極パッド26は、検出用集積回路11の内部配線を構成する。そして、前記検出用集積回路11は、各電極パッド26において、対応する配線パターン13、即ちセンサ電極14と電気的に接続されている。これにより、発振器22で発生した高周波信号は、セレクタ25において選択されたいずれか1つの電極パッド26(配線部24a)及び配線パターン13を介して対応するセンサ電極14に供給される。   The detection integrated circuit 11 includes a substrate 21 made of, for example, a semiconductor, and an oscillator 22 as a high-frequency signal source is installed on the substrate 21. One end of a resistor 23 is electrically connected to the oscillator 22, and one end of a wiring 24 formed of a conductor such as aluminum or polysilicon is electrically connected to the other end of the resistor 23. Has been. The other end of the wiring 24 forms an independent wiring portion 24a branched into the same number (two) as the sensor electrode 14 via the selector 25, and in each wiring portion 24a, for example, aluminum or poly It is electrically connected to one of a plurality (two) of electrode pads 26 for external connection formed of a conductor such as silicon. The wiring 24 and the electrode pad 26 constitute an internal wiring of the detection integrated circuit 11. The detection integrated circuit 11 is electrically connected to the corresponding wiring pattern 13, that is, the sensor electrode 14 in each electrode pad 26. As a result, the high-frequency signal generated by the oscillator 22 is supplied to the corresponding sensor electrode 14 via any one electrode pad 26 (wiring portion 24 a) selected by the selector 25 and the wiring pattern 13.

また、各電極パッド26(配線部24a)は、セレクタ25を介して個別に増幅器27の入力端子に電気的に接続されるとともに、該増幅器27の出力端子は、信号処理回路28と電気的に接続されている。前記各センサ電極14の形成する静電容量は、前記抵抗23との間でローパスフィルタを構成しており、当該静電容量に応じて減衰された前記発振器22からの高周波信号が検出信号aとして前記増幅器27へと出力される。そして、増幅器27において増幅等された検出信号aは、前記信号処理回路28において、例えば整流等の処理が施されることで、前記静電容量に応じた出力レベルを有する信号に変換されるとともに、各センサ電極14の形成する静電容量が検出される。   Each electrode pad 26 (wiring portion 24 a) is individually electrically connected to the input terminal of the amplifier 27 via the selector 25, and the output terminal of the amplifier 27 is electrically connected to the signal processing circuit 28. It is connected. The capacitance formed by each sensor electrode 14 forms a low-pass filter with the resistor 23, and a high-frequency signal from the oscillator 22 attenuated according to the capacitance is a detection signal a. Output to the amplifier 27. Then, the detection signal a amplified by the amplifier 27 is converted into a signal having an output level corresponding to the capacitance, for example, by performing processing such as rectification in the signal processing circuit 28. The capacitance formed by each sensor electrode 14 is detected.

図2に示したように、本実施形態では、配線24及び基板21間、並びに各電極パッド26及び基板21間に、例えばアルミニウムやポリシリコンなどの導体にて成形されたシールド層31,32が配設されている。基板21上のシールド層31,32は、これら基板21及びシールド層31,32間に介装された、例えばSiOからなる絶縁膜33にて該基板21と電気的に絶縁されるとともに、シールド層31,32上の内部配線(配線24、電極パッド26)は、これらシールド層31,32及び内部配線間に介装された、例えばSiOからなる絶縁膜34にてシールド層31,32と電気的に絶縁されている。つまり、これらシールド層31,32及び内部配線は、絶縁膜33,34により絶縁される態様で基板21上に順次積層されている。図1にドットのパターンで示したように、これらシールド層31,32は、前記基板21(プリント基板10)の表面に垂直な視線で見たときに、前記配線24及び電極パッド26をそれぞれ内包する。 As shown in FIG. 2, in the present embodiment, shield layers 31 and 32 formed of a conductor such as aluminum or polysilicon are provided between the wiring 24 and the substrate 21 and between each electrode pad 26 and the substrate 21. It is arranged. The shield layers 31 and 32 on the substrate 21 are electrically insulated from the substrate 21 by an insulating film 33 made of, for example, SiO 2 interposed between the substrate 21 and the shield layers 31 and 32, and are shielded. The internal wiring (wiring 24, electrode pad 26) on the layers 31 and 32 is connected to the shield layers 31 and 32 by an insulating film 34 made of, for example, SiO 2 interposed between the shield layers 31 and 32 and the internal wiring. It is electrically insulated. That is, the shield layers 31 and 32 and the internal wiring are sequentially laminated on the substrate 21 in a manner insulated by the insulating films 33 and 34. As shown by the dot pattern in FIG. 1, the shield layers 31 and 32 contain the wiring 24 and the electrode pads 26 when viewed in a line of sight perpendicular to the surface of the substrate 21 (printed substrate 10). To do.

図1に示すように、前記増幅器27の出力端子は、増幅器35の入力端子に電気的に接続されるとともに、該増幅器35の出力端子は、電極パッド36を介して前記複数のシールド層12及びシールド層32の全てと電気的に接続されている。なお、増幅器27において増幅等された検出信号aは、増幅器35及び電極パッド36を介して、前記検出信号aと同位相、且つ、同振幅のシールド信号bとして前記複数のシールド層12及びシールド層31,32に供給される。この増幅器35は、増幅器27において増幅等された検出信号aに影響を及ぼすこととなく検出信号aと同位相、且つ、同振幅のシールド信号bとしてシールド層12,31,32に供給するためのものである。このシールド信号bが前記シールド層12に供給されることで前記配線パターン13の寄生容量が低減され、前記シールド層31,32に供給されることで内部配線(配線24、電極パッド26)の寄生容量が低減される。従って、前記信号処理回路28では、前記配線パターン13のみならず、内部配線の寄生容量が低減された検出信号aに基づいて、各センサ電極14の形成する静電容量がより高精度に検出される。この検出された静電容量は、各センサ電極14への人体の近接又は接触の検出に供され、例えばタッチパネルなどにおいてその操作の検出に供される。   As shown in FIG. 1, the output terminal of the amplifier 27 is electrically connected to the input terminal of the amplifier 35, and the output terminal of the amplifier 35 is connected to the plurality of shield layers 12 and the electrode pad 36. All of the shield layers 32 are electrically connected. The detection signal a amplified by the amplifier 27 is passed through the amplifier 35 and the electrode pad 36 as the shield signal b having the same phase and the same amplitude as the detection signal a and the plurality of shield layers 12 and shield layers. 31 and 32. The amplifier 35 is used to supply the shield layers 12, 31, 32 as the shield signal b having the same phase and the same amplitude as the detection signal a without affecting the detection signal a amplified by the amplifier 27. Is. By supplying this shield signal b to the shield layer 12, the parasitic capacitance of the wiring pattern 13 is reduced, and by supplying the shield signal b to the shield layers 31 and 32, the parasitic of the internal wiring (wiring 24, electrode pad 26) is reduced. Capacity is reduced. Therefore, the signal processing circuit 28 detects the capacitance formed by each sensor electrode 14 with higher accuracy based on the detection signal a in which the parasitic capacitance of the internal wiring is reduced as well as the wiring pattern 13. The The detected capacitance is used to detect the proximity or contact of the human body to each sensor electrode 14, and is used to detect the operation of the touch panel, for example.

以上詳述したように、本実施形態によれば、以下に示す効果が得られるようになる。
(1)本実施形態では、内部配線(配線24、電極パッド26)及び基板21の間に設けられたシールド層31,32に、前記検出信号aと同位相、且つ、同振幅のシールド信号bが供給されることで、前記内部配線の寄生容量を低減し、静電容量の検出精度を向上することができる。特に、数pF程度の微小な静電容量を検出する場合において、内部配線の微小な寄生容量を好適に低減することができる。
As described above in detail, according to the present embodiment, the following effects can be obtained.
(1) In the present embodiment, a shield signal b having the same phase and the same amplitude as the detection signal a is applied to the shield layers 31 and 32 provided between the internal wiring (wiring 24 and electrode pad 26) and the substrate 21. Is supplied, the parasitic capacitance of the internal wiring can be reduced, and the capacitance detection accuracy can be improved. In particular, when detecting a minute capacitance of about several pF, the minute parasitic capacitance of the internal wiring can be suitably reduced.

(2)本実施形態では、前記シールド層31,32は、前記基板21の表面に垂直な視線で見たときに、前記内部配線を内包し得るに十分な面積が確保されていることで、前記内部配線の寄生容量をより確実に低減することができる。   (2) In the present embodiment, the shield layers 31 and 32 have a sufficient area to contain the internal wiring when viewed with a line of sight perpendicular to the surface of the substrate 21. The parasitic capacitance of the internal wiring can be reduced more reliably.

(3)本実施形態では、前記検出用集積回路11は、各センサ電極14の形成する静電容量及び抵抗23の間でローパスフィルタを構成し、該静電容量に応じて減衰された前記高周波信号を前記検出信号aとするため、当該静電容量を検出するための検出用集積回路11の構成を極めて簡易なものにできる。   (3) In the present embodiment, the detection integrated circuit 11 forms a low-pass filter between the capacitance formed by each sensor electrode 14 and the resistor 23, and the high frequency attenuated according to the capacitance. Since the signal is the detection signal a, the configuration of the detection integrated circuit 11 for detecting the capacitance can be made extremely simple.

なお、上記実施形態は以下のように変更してもよい。
・前記実施形態において、シールド層31,32のいずれか一方を割愛してもよい。
・前記実施形態において、セレクタ25と増幅器27の入力端子とを接続する信号線L1(図1参照)及び基板21の間にシールド層を設けてもよい。
In addition, you may change the said embodiment as follows.
In the embodiment, either one of the shield layers 31 and 32 may be omitted.
In the embodiment, a shield layer may be provided between the substrate 21 and the signal line L1 (see FIG. 1) that connects the selector 25 and the input terminal of the amplifier 27.

・前記実施形態において、センサ電極14及び対応する配線パターン13等は、1つ又は3つ以上であってもよい。
・前記実施形態において、静電容量を検出するための検出用集積回路11の回路構成は一例である。
-In the said embodiment, the sensor electrode 14 and the corresponding wiring pattern 13 grade | etc., May be 1 or 3 or more.
In the embodiment, the circuit configuration of the detection integrated circuit 11 for detecting the capacitance is an example.

・本発明は、人体の近接又は接触を検出する適宜のタッチセンサや自動車などの車両に搭載される乗員検知センサに適用してもよい。   -You may apply this invention to the passenger | crew detection sensor mounted in vehicles, such as a suitable touch sensor and a motor vehicle, which detects the proximity | contact or contact of a human body.

本発明の一実施形態の電気的構成を示す平面図。The top view which shows the electrical constitution of one Embodiment of this invention. 図1のA−A線に沿った断面図。Sectional drawing along the AA line of FIG.

符号の説明Explanation of symbols

10…プリント基板、11…検出用集積回路、14…センサ電極、21…基板、22…高周波信号源としての発振器、23…抵抗、24…内部配線を構成する配線、26…内部配線を構成する電極パッド、28…信号処理回路、31,32…シールド層。   DESCRIPTION OF SYMBOLS 10 ... Printed circuit board, 11 ... Detection integrated circuit, 14 ... Sensor electrode, 21 ... Board | substrate, 22 ... Oscillator as a high frequency signal source, 23 ... Resistance, 24 ... Wiring which comprises internal wiring, 26 ... Internal wiring Electrode pads, 28... Signal processing circuit, 31, 32... Shield layer.

Claims (4)

グランド電極との間に静電容量を形成するセンサ電極と、
プリント基板に実装され、高周波信号源、該高周波信号源で発生した高周波信号を前記センサ電極に供給する内部配線、並びにこれら高周波信号源及び内部配線の設けられる基板を有し、前記静電容量に応じて前記高周波信号の変動された検出信号に基づいて当該静電容量を検出する検出用集積回路とを備える静電容量検出装置において、
前記内部配線及び前記基板の間に設けられ、前記検出信号と同位相、且つ、同振幅のシールド信号が供給されるシールド層を備えたことを特徴とする静電容量検出装置。
A sensor electrode that forms a capacitance with the ground electrode;
A high-frequency signal source mounted on a printed circuit board; an internal wiring for supplying a high-frequency signal generated by the high-frequency signal source to the sensor electrode; and a substrate on which the high-frequency signal source and the internal wiring are provided. In response, a capacitance detection apparatus comprising an integrated circuit for detection that detects the capacitance based on a detection signal in which the high-frequency signal is changed,
An electrostatic capacity detection device comprising a shield layer provided between the internal wiring and the substrate, to which a shield signal having the same phase and the same amplitude as the detection signal is supplied.
請求項1に記載の静電容量検出装置において、
前記内部配線は、外部接続用の電極パッド及び該電極パッドと前記高周波信号源とを接続する配線の少なくとも一方であることを特徴とする静電容量検出装置。
The capacitance detection device according to claim 1,
The capacitance detection device according to claim 1, wherein the internal wiring is at least one of an electrode pad for external connection and a wiring for connecting the electrode pad and the high-frequency signal source.
請求項1又は2に記載の静電容量検出装置において、
前記シールド層の少なくとも一部は、前記基板の表面に垂直な視線で見たときに、前記内部配線を内包することを特徴とする静電容量検出装置。
In the capacitance detection device according to claim 1 or 2,
At least a part of the shield layer encloses the internal wiring when viewed with a line of sight perpendicular to the surface of the substrate.
請求項1〜3のいずれか1項に記載の静電容量検出装置において、
前記検出用集積回路は、
前記静電容量との間でローパスフィルタを構成する抵抗を備え、
前記検出信号は、前記静電容量に応じて減衰された前記高周波信号であることを特徴とする静電容量検出装置。
The capacitance detection apparatus according to any one of claims 1 to 3,
The detection integrated circuit comprises:
Comprising a resistor constituting a low-pass filter with the capacitance;
The capacitance detection device, wherein the detection signal is the high-frequency signal attenuated according to the capacitance.
JP2006156120A 2006-06-05 2006-06-05 Capacitance detector device Pending JP2007324088A (en)

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US8373672B2 (en) 2010-05-10 2013-02-12 Pure Imagination, LLC One sided thin film capacitive touch sensors
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US8471138B2 (en) 2010-06-17 2013-06-25 Pure Imagination, LLC Musical instrument with one sided thin film capacitive touch sensors
US9092096B2 (en) 2010-07-26 2015-07-28 Pure Imagination, LLC Low-cost mass-produced touch sensors
US8378203B2 (en) 2010-07-27 2013-02-19 Pure Imagination, LLC Simulated percussion instrument
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