JP2007318058A - Electronic component and manufacturing method thereof - Google Patents

Abstract

An electronic component capable of improving sealing performance is provided.
An electronic component includes (1) a substrate, (2) a functional unit formed on a main surface of a substrate, and (3) a functional unit on the main surface of the substrate. A support layer 30 disposed around the entire circumference and extending inward from the outer periphery 12b of the substrate 12 when viewed from the normal direction of the main surface 12a of the substrate 12, and (4) the main surface 12a of the substrate 12 A cover layer 52 disposed on the support layer 30 so as to be opposed to each other and extending inward from the outer periphery 12b of the substrate 12 when viewed from the normal direction of the main surface 12a of the substrate 12, and (5 ) It extends so as to straddle between the substrate 12 and the support layer 30, between the support layer 30 and the cover layer 52, between the substrate 12 and the support layer 30, and between the support layer 30 and the cover layer 52. And a metal film 60 covering the gap.
[Selection] Figure 1

Description

  The present invention relates to an electronic component and a manufacturing method thereof, and more particularly, to an electronic component having a space inside and a manufacturing method thereof.

  In recent years, for electronic components such as SAW (surface acoustic wave) filters, development of a wafer level chip size package (WLCSP) in which the package is downsized to the element chip size has been promoted.

With regard to the structure of the wafer level chip size package of the SAW filter, for example, a surface acoustic wave device shown in FIG. 22 is disclosed. This surface acoustic wave device forms a conductive pattern including electrodes (SAW electrodes) of surface acoustic wave elements (SAW electrodes), that is, comb-shaped electrodes 2 and reflector electrodes 3, and pad electrodes 4 on a wafer to be a piezoelectric substrate 1. The cover layer 7 is bonded and sealed with a support layer of the resins 6a and 6b arranged around the electrodes 2 and 3 with a space between the electrodes 1 and 3 to form the vibration space 5 therein. In addition, a conductor pattern penetrating the support layers 6a and 6b and connected to the pad electrode 4 is formed, and the SAW electrodes 2 and 3 and the external terminals 8 on the cover layer 7 are electrically connected, and then one package unit is formed by dicing. It is produced by cutting into individual pieces (for example, see Patent Document 1).
JP 2003-37471 A

  22, the boundary line between the cover layer 7 and the support layer 6b or the boundary line between the support layer 6a and the piezoelectric substrate 1 is exposed on the outer peripheral surface of the surface acoustic wave device. . For this reason, when the adhesion between the interface between the cover layer 7 and the support layer 6b or the interface between the support layer 6a and the piezoelectric substrate 1 deteriorates due to a thermal cycle or the like, the vibration is generated from the boundary line exposed on the outer peripheral surface of the surface acoustic wave device. Problems such as moisture entering the space 5 and corrosion of the SAW electrodes 2 and 3 are likely to occur. In particular, when the support layers 6a and 6b are made of resin, moisture enters the vibration space 5 from the resin itself, and therefore the corrosion of the SAW electrodes 2 and 3 is more likely to occur.

  In view of such circumstances, the present invention intends to provide an electronic component that can improve sealing performance.

  In order to solve the above problems, the present invention provides an electronic component configured as follows.

  The electronic component includes (1) a substrate, (2) a functional unit formed on the main surface of the substrate, and (3) an entire periphery around the functional unit on the main surface of the substrate. And a support layer extending inward from the outer periphery of the substrate when viewed from the normal direction of the main surface of the substrate, and (4) facing the main surface of the substrate with a gap. A cover layer disposed on the support layer and extending inward from the outer periphery of the substrate when viewed from a normal direction of the main surface of the substrate; and (5) between the substrate and the support layer. , A metal film that extends between the support layer and the cover layer and covers the space between the substrate and the support layer and the space between the support layer and the cover layer (hereinafter referred to as “peripheral sealing”). A metal film).

  In the above configuration, the substrate and the cover layer are coupled via the support layer, and the periphery of the functional unit is sealed. The outer peripheral sealing metal film covers the space between the substrate and the support layer, and the space between the support layer and the cover layer, so that sealing between the substrate and the support layer or between the support layer and the cover layer is performed. Can be strengthened.

  Since the outer peripheral sealing metal film is in contact with the substrate, the support layer, and the cover layer and there is no space between them, it can be made compact. Such a configuration is advantageous for downsizing of electronic components.

  In addition, although the outer periphery sealing metal film does not need to extend on the cover layer, when it extends on the cover layer, wiring can be formed on the cover layer.

  Preferably, the cover layer is formed of a polyimide-based material on at least a part of a main surface facing the support layer, and an adhesive layer that joins the cover layer and the support layer is provided.

  Since polyimide has high heat resistance, the temperature condition in the process after bonding the cover layer can be increased. Therefore, for example, when the outer peripheral sealing metal is formed by vacuum deposition or the like, the pretreatment temperature can be increased, the adhesion strength of the outer peripheral sealing metal can be increased, and the sealing performance can be further improved.

  Note that the support layer may be provided with a metal film, an insulating film, or the like at a portion facing the adhesive layer provided on the cover layer. In this case, the adhesive layer provided on the cover layer bonds the cover layer and the support layer by adhering to a metal film or an insulating film provided on the support layer.

  Preferably, the outer peripheral sealing metal film includes a first metal film disposed between the substrate and the support layer, and a second metal film disposed between the support layer and the cover layer. Are connected to at least one of them.

  In this case, airtightness and package strength are further improved.

  Preferably, the outer peripheral sealing metal film is a multilayer film, and the innermost film is formed by a vacuum process.

  Since the film formed by the vacuum process has high adhesion, the airtightness of the interface between the substrate and the support layer and the interface between the support layer and the cover layer can be improved.

  Preferably, the outermost film of the outer peripheral sealing metal film is a plating film.

  Since the plating film can be formed thicker than the vacuum process, the outer peripheral sealing metal film can be formed thick to increase the strength.

  Preferably, the outer peripheral sealing metal film includes a film containing Cu as a main component.

  In this case, since the film containing Cu as a main component has low electric resistance, an electronic component having good electric characteristics can be obtained. Since a film containing Cu as a main component has high density, good sealing properties can be obtained. A film containing Cu as a main component has a soft film quality, so that stress hardly remains.

  Preferably, the electronic component includes: (a) a cover layer wiring metal disposed on a main surface opposite to the substrate of the cover layer and bonded to the outer peripheral sealing metal film; and (b) the cover layer wiring. An external ground terminal connected to metal, exposed to the outside on the opposite side of the substrate with respect to the cover layer, and connected to ground.

  In this case, the grounding of the electronic component is strengthened. Further, since the outer peripheral sealing metal film and the cover layer wiring metal are joined, the strength of the package is improved.

  Preferably, the functional part and the outer peripheral sealing metal film are electrically connected by a conductive pattern provided on the main surface of the substrate.

  In this case, by taking the ground of the functional part from the outer peripheral sealing metal film, the wiring path is shortened and the ground is further strengthened.

  Preferably, the substrate is disposed adjacent to the outer periphery of the substrate on the main surface of the substrate where the functional portion is formed, and extends so as to entirely cover the outside of the support layer and the cover layer. A coating resin layer is further provided.

  In this case, the strength of the package can be improved. In addition, the moisture resistance of the package can be increased.

  Preferably, the material of the cover layer is glass or quartz.

  Glass or quartz has a high electric resistance value, excellent strength, can be easily thinned, has high airtightness, and is inexpensive, and is advantageous for high reliability and cost reduction.

  Preferably, the substrate is a piezoelectric substrate, and a surface acoustic wave element is formed as the functional unit.

  Piezoelectric substrates have a large coefficient of linear expansion and have a large effect on electrical characteristics due to thermal stress, but because the sealing performance is improved, the thermal stress of the piezoelectric substrate is alleviated without sacrificing sealing performance, and the characteristics of electronic components Can be improved.

  An electronic component including a surface acoustic wave element is particularly suitable when it is used in a portable device and requires miniaturization, low profile, and high airtightness.

  A bulk wave piezoelectric resonator element may be formed as the functional part formed on the substrate. An electronic component including a bulk wave piezoelectric resonator element is particularly suitable when it is used in a portable device and requires miniaturization, low profile, and high airtightness.

  In addition, a sensor element may be formed as a functional unit formed on the substrate. An electronic component including a sensor element is particularly suitable for automobile applications that require high airtightness and high reliability.

  Preferably, a spacer layer made of a material different from that of the support layer is provided inside the support layer.

  In this case, since the thickness of the support layer necessary for the three-dimensional wiring can be ensured, the occurrence of crown in the support layer can be prevented and the reliability of the adhesion between the support layer and the cover layer can be improved. It is possible to obtain an electronic component having excellent stopping properties.

  Preferably, the spacer layer is formed to face the interface between the support layer and the cover layer.

  In this case, the thickness of the support layer at the portion between the interface between the support layer and the cover layer and the spacer layer can be reduced to suppress the generation of crown and improve the sealing performance.

  Preferably, the support layer is formed only on the cover side with respect to the spacer layer.

  In this case, since the support layer is formed between the spacer layer and the cover layer, and no support layer is formed between the spacer layer and the substrate, the generation of crown can be prevented more effectively.

  Preferably, in the spacer layer, a part of the outer peripheral side of the substrate is exposed from the support layer.

  When a plurality of electronic components are assembled and processed by sandblasting etc. from the cover layer side along the boundary line of the electronic components, damage to the substrate wafer is reduced by the spacer layer, and the substrate wafer cracks Can be reduced.

  Preferably, the support layer includes a resin layer having a thickness of 4 μm or less formed using a resin between the spacer layer and the cover layer.

  If the thickness of the resin layer exceeds 4 μm, a crown may be generated even if a spacer layer is provided. Therefore, the thickness of the resin layer formed on the spacer layer is preferably 4 μm or less.

  Preferably, the spacer layer is made of a metal film.

  In this case, the spacer layer can be formed without increasing the number of manufacturing steps by configuring the spacer layer with, for example, the same metal film as the wiring electrode.

  Preferably, the spacer layer is covered with the support layer at a peripheral portion on the functional part side.

  In this case, the wiring connected to the functional unit can be formed on the support layer.

  Preferably, the support layer has a tapered portion at a peripheral portion on the functional portion side.

  In this case, the taper-shaped portion of the support layer extends non-perpendicular to the main surface of the substrate and faces the cover layer, so that the wiring connected to the functional portion from the cover layer side to the taper-shaped portion Can be easily formed.

  Preferably, an adhesive layer made of a polyimide-based adhesive film is provided on at least a part of the main surface of the cover layer facing the support layer.

  In this case, the adhesive strength can be increased by using a resin similar to the adhesive layer for the support layer.

  Preferably, the material of the cover layer is glass.

  In this case, since the boundary line of the electronic component can be recognized through the transparent cover layer, it is possible to simplify the process of forming the alignment mark used in the processes after the cover layer formation on the cover layer.

  Preferably, a photosensitive polyimide resin is used as the support layer.

  In this case, the support layer can be formed with high accuracy by a photolithography method.

  Preferably, on the support layer, a plurality of element wirings connected to the plurality of functional units, respectively, and a routing wiring connected to the element wirings are formed.

  In this case, since the routing wiring can be formed on both surfaces of the cover layer and the routing wiring can be crossed three-dimensionally, it is easy to reduce the size of the electronic component.

  Moreover, in order to solve the said subject, this invention provides the manufacturing method of the electronic component comprised as follows.

  The electronic component manufacturing method is a type of method in which a plurality of electronic components are manufactured simultaneously. In the electronic component manufacturing method, (1) corresponding to each of the plurality of electronic components, a functional portion and a support layer extending around the entire circumference of the functional portion are formed on the main surface. A first step of arranging one cover member on each support layer of each of the plurality of electronic components for one substrate; and (2) a portion adjacent to a boundary line of the plurality of electronic components. A second step of removing by sandblast until reaching the substrate from the cover member or until reaching the outer periphery of the conductive pattern formed on the substrate; and (3) exposed by the second step. And a third step of forming a metal film (hereinafter referred to as “peripheral sealing metal film”) so as to cover between the substrate and the support layer and between the support layer and the cover layer.

  In the electronic component, the substrate and the cover layer are coupled via a support layer, and the periphery of the functional unit is sealed. The outer peripheral sealing metal film covers the space between the substrate and the support layer, and the space between the support layer and the cover layer, so that the sealing between the substrate and the support layer or between the support layer and the cover layer is not performed. Strengthened.

  According to the above method, in the second step, it can be efficiently removed by sandblasting until it reaches the substrate from the cover member. In addition, since the section removed by sandblasting has a mortar shape (substantially V-shaped), it is easy to form the outer peripheral sealing metal film in the third step.

  Preferably, the substrate used in the first step is provided with a spacer layer made of a material different from that of the support layer inside the support layer.

  In this case, since the thickness of the support layer necessary for the three-dimensional wiring can be ensured, the occurrence of crown in the support layer can be prevented and the reliability of the adhesion between the support layer and the cover layer can be improved. It is possible to obtain an electronic component having excellent stopping properties.

  Preferably, the substrate used in the first step is formed using the same material at the same time as the spacer layer and at least a part of the wiring connected to the functional unit.

  In this case, the spacer layer can be formed on the substrate without increasing the number of manufacturing steps of the substrate.

  The electronic component of the present invention can improve sealing performance.

  Embodiments of the present invention will be described below with reference to FIGS.

  Example 1 A SAW device 10 of Example 1 will be described with reference to FIGS.

  As shown in the cross-sectional view of FIG. 1, the SAW device 10 has an IDT (Inter Digital Transducer) 24, a pad portion 26, and a lead wiring constituting a surface acoustic wave element on an upper surface 12 a that is one main surface of the piezoelectric substrate 12. A conductive pattern 20 including such as is formed. In the conductive pattern 20, the second layer 22 is formed on the first layer 21 only in a portion where the wiring resistance is desired to be lowered. A support layer 30 is provided on the upper surface 12 a of the piezoelectric substrate 12 so as to surround the periphery of the IDT 24, and a cover 50 is disposed on the support layer 30. The cover 50 is bonded to the support layer 30 by an adhesive layer 54 provided on one main surface of the cover substrate 52.

  In this way, the sealed vibration space 13 is formed around the IDT 24, and the surface acoustic wave freely propagates in a portion adjacent to the vibration space 13 on the upper surface 12 a of the piezoelectric substrate 12.

  The cover substrate 52 is preferably made of glass or quartz. Glass or quartz has a high electric resistance value, excellent strength, can be easily thinned, has high airtightness, and is inexpensive, and is advantageous for high reliability and cost reduction.

  When the heat resistance of the adhesive layer 54 is high, the pretreatment temperature when forming the inner film 61 of the metal film 60 described later by sputtering or vapor deposition is increased, the adhesion strength of the metal film 60 is increased, and the sealing property is improved. be able to. Therefore, it is preferable to use a material having high heat resistance, such as a polyimide material, for the adhesive layer 54.

  The support layer 30 and the cover 50 are located inside the outer periphery 12b of the piezoelectric substrate 12 and between the outer periphery 12b of the piezoelectric substrate 12 when viewed from the normal direction (vertical direction in the drawing) of the upper surface 12a of the piezoelectric substrate 12. They are arranged at intervals.

  The cover 50 and the support layer 30 are entirely covered with a coating resin layer 70. That is, the coating resin layer 70 extends to the outside of the cover 50 and the support layer 30 when viewed from the normal direction (vertical direction in the drawing) of the upper surface 12 a of the piezoelectric substrate 12. The coating resin layer 70 extends to the peripheral portion of the piezoelectric substrate 12. The support layer in the vicinity of the outer edge is removed from the upper surface 12a of the piezoelectric substrate 12, and the coating resin layer 70 is also disposed at the removed portion and is adjacent to the outer periphery 12b of the piezoelectric substrate 12. The coating resin layer 70 can improve the strength of the package and increase the moisture resistance.

  From the coating resin layer 70, the solder balls 84 are exposed to the outside, and the SAW device 10 can be mounted on a circuit board such as an electric device.

  A metal film 60 is formed inside the coating resin layer 70, that is, between the coating resin layer 70 and the piezoelectric substrate 12, the support layer 30, the cover 50, and the like. The metal film 60 crosses between the piezoelectric substrate 12 and the support layer 30 and crosses between the support layer 30 and the cover 50.

  Specifically, an outer frame portion 28 formed in a frame shape on the periphery of the upper surface 12a of the piezoelectric substrate 12 is disposed as a part of the conductive pattern 20 between the piezoelectric substrate 12 and the support layer 30. The outer frame portion 28 is bonded to the metal film 60. Further, a part 41 of the wiring 40 on the support layer formed on the support layer 30 is bonded to the metal film 60 between the support layer 30 and the cover 50.

  The metal film 60 makes it difficult for the piezoelectric substrate 12, the support layer 30, and the cover 50 to be separated from each other, that is, the bonding between the piezoelectric substrate 12, the support layer 30, and the cover 50 is strengthened. Has improved.

  In addition, in order for the vibration space 13 inside the SAW device 10 to communicate with the outside of the SAW device 10 and the sealing is impaired, between the piezoelectric substrate 12 and the support layer 30 and between the support layer 30 and the cover 50. In addition, there must be a gap between the metal film 60 and the piezoelectric substrate 12, the support layer 30, and the cover 50. Further, since the bonding between the piezoelectric substrate 12, the support layer 30, and the cover 50 is reinforced by the metal film 60, the connection between the piezoelectric substrate 12 and the support layer 30 or between the support layer 30 and the cover 50 is performed. Is less likely to generate a gap. Therefore, the vibration space 13 inside the SAW device 10 becomes difficult to communicate with the outside of the SAW device 10, and the sealing performance of the vibration space 13 is improved.

  The metal film 60 is a multilayer film, and an outer film 62 is disposed on the inner film 61. The inner film 61 is a sputtering film formed by a vacuum process and has high adhesion, so that the airtightness between the piezoelectric substrate 12 and the support layer 30 and between the support layer 30 and the cover 50 can be improved. it can. The outer film 62 is a plating film that can be formed thicker than in a vacuum process, and the strength can be increased by forming the metal film 60 thick. The inner film 61 is also a multilayer film and includes a main film mainly composed of Cu. The outer film 62 is also a multilayer film and includes a main film mainly composed of Cu. Since the main film mainly composed of Cu has low electric resistance, an electronic component having good electric characteristics can be obtained. Since the main film containing Cu as a main component has high density, good sealing properties can be obtained.

  The metal film 60 is also formed on the cover 50 and forms routing wiring and a circuit (for example, L component).

  Under bump metal films 80 and 82 are formed on the metal film 60 on the cover 50. Solder balls 84 are formed on the outer under bump metal film 82.

  In the cover 50 and the support layer 30, the partially removed via part 14 is formed, and the metal film 60 is formed along the via part 14. The support layer upper wiring 40 formed on the support layer 30 is bonded to the metal film 60 formed along the via portion 14 in the via portion 14.

  The support layer upper wiring 40 formed on the support layer 30 extends to the pad portion 26 of the conductive pattern 20 and is joined to the pad portion 26, and is electrically connected to the IDT 24 of the conductive pattern 20.

  That is, the IDT 24 and the solder ball 84 are electrically connected through the conductive pattern 20, the support layer upper wiring 40, the metal film 60, and the under bump metal films 80 and 82.

  A plurality of SAW devices 10 can be manufactured at the same time using a wafer of piezoelectric substrates 12, and in the plan view of FIG. 2, two SAW devices 10 are illustrated together with a boundary line 11 when the two SAW devices 10 are manufactured.

  As shown by a broken line in FIG. 2, the metal film 60 is separated into an inner portion 64 and an outer portion 66 by removing a portion exposed to the opening 74 provided in the coating resin layer 70. The outer portion 66 is disposed along the outer periphery 18 of the SAW device 10, that is, along the boundary line 11.

  The outer portion 66 of the metal film 60 is connected to a part of the inner portion 64 of the metal film 60 via the conductive pattern 20 and a part of the wiring 40 on the support layer. Is electrically connected to an external ground terminal connected to Thereby, the grounding of the SAW device 10 is strengthened.

  Further, since the outer portion 66 of the metal film 60 is connected to a part of the IDT 24 of the conductive pattern 20 via the outer frame portion 28 of the conductive pattern 20, the grounding is further strengthened.

  Next, a method for manufacturing the SAW device 10 will be described with reference to FIGS.

  After a plurality of SAW devices 10 are simultaneously fabricated from the wafer-state piezoelectric substrate 12, the SAW device 10 is divided into chips (pieces) by dicing along the boundary line 11.

  (1) First, as shown in the cross-sectional view of FIG. 3, the first layer 21 and the second layer 22 of the conductive pattern 20 are formed on the piezoelectric substrate 12.

That is, as the piezoelectric substrate 12, a substrate on which a piezoelectric thin film such as LiTaO ₃ , quartz, or ZnO is formed is used depending on the desired characteristics. On one main surface 12a of the piezoelectric substrate 12, a lift-off resist pattern is formed by opening a portion where the conductive pattern 20 is to be formed, such as the IDT 24, the reflector, the routing wiring, and the pad portion 26, using a photolithography technique.

  Next, after depositing a metal containing Al as a main component, the first layer 21 of the conductive pattern 20 is formed by peeling (lifting off) the resist pattern by immersing and swinging in a stripping solution.

  Next, after forming a resist pattern in which a portion where the metal film is to be formed in order to reduce the wiring resistance, such as the pad portion 26 and the lead wiring portion, is formed, the metal film is deposited, and then lifted off, thereby forming the conductive pattern 20. The second layer 22 is formed. The metal film of the second layer 22 is a single layer of Al, Cu, Ni, Au, Pt, Ti, or NiCr, or a multilayer that combines these.

  When the first layer 21 and the second layer 22 of the conductive pattern 20 are formed, the outer frame portion 28 is formed on the outer peripheral portion of the chip (the vicinity of the boundary line 11). At this time, if necessary, the ground line of the surface acoustic wave element formed by the conductive pattern 20 and the outer frame portion 28 may be continuous and short-circuited. This eliminates the need to route the ground signal line on the cover 50.

Next, a protective film (not shown) of SiO ₂ or SiN is formed on the IDT 24 of the conductive pattern 20.

  (2) Next, as shown in the sectional view of FIG. 4, a support layer 30 is formed.

  That is, by applying photosensitive polyimide to one main surface 12a of the piezoelectric substrate 12, and performing exposure and development, the IDT 24 of the conductive pattern 20 and its periphery and a part of the pad portion 26 of the conductive pattern 20 are exposed. An open polyimide pattern is formed. After the pattern formation, the polyimide support layer 30 is formed by curing the polyimide by heating. Subsequently, the organic matter adhering to the IDT 24 (strictly not shown protective film) of the conductive pattern 20 and the pad portion 26 is removed by oxygen plasma.

  At this time, the support layer 30 selects photolithography conditions such that the cross-sectional shape of the slope 32 continuous to the exposed portion of the pad portion 26 of the conductive pattern 20 is a forward tapered shape. For this purpose, a photomask having a grating portion may be used.

  The support layer 30 is not limited to polyimide, and other materials may be used as long as outgas generation, halogen ions are sufficiently small, and heat resistance and strength are sufficient. For example, benzocyclobutene or silicone may be used.

  At this time, the height of the support layer 30 is preferably 3 μm to 30 μm.

  (3) Next, as shown in the cross-sectional view of FIG. 5, the on-support-layer wiring 40 is formed on the support layer 30 and on the exposed portion of the pad portion 26 of the conductive pattern 20.

  That is, a photoresist that can easily be formed in a reverse taper shape is applied to one main surface 12a of the piezoelectric substrate 12, and after prebaking, exposure, development, and ashing with ozone, the wiring 40 on the support layer is formed by vapor deposition. To do. As the vapor deposition material, Cu, Ti, Al, Au, NiCr, Pt, and a multilayer film containing them are preferable. For example, a base film of Ti (thickness 0.1 μm) and a main film of Cu (thickness 5 μm) are deposited.

  (4) Next, as shown in the sectional view of FIG. 6, the cover 50 is disposed on the support layer 30.

  That is, a cover 50 is prepared in which a polyimide adhesive layer film to be an adhesive layer 54 is attached to one main surface of a cover substrate 52 of borosilicate glass having a thickness of 50 μm to be a cover layer by a roll laminating method. The laminating temperature at this time shall be 90 degreeC.

  The cover layer may be a substrate made of Si, alumina or the like instead of the glass substrate. The adhesive layer 54 is preferably a material that does not emit outgas. In addition to the polyimide material, a cyclic olefin material, a benzocyclobutene material, a silicone material, polyimide amide, or the like may be used.

  The cover 50 is bonded to the piezoelectric substrate 12 (strictly, the support layer 30) so that the adhesive layer 54 faces one main surface of the piezoelectric substrate 12. A roll laminating method is used as a bonding method. Moreover, the temperature at this time is 120 degreeC.

  Further, the bonding method may be a press method instead of the roll laminating method. At this time, if the substrate atmosphere at the time of pressing is performed under a reduced-pressure atmosphere, there is no adhesion failure such as voids, so that it can be applied at a low temperature, which is effective in reducing warpage.

  (5) Next, as shown in the cross-sectional view of FIG. 7, the groove 58 in the inter-chip line portion and the hole 56 in the via portion are processed.

  First, a sandblast resist is formed on the cover substrate 52 bonded to the piezoelectric substrate 12 by a roll laminating method, exposed, and developed to process via portions and inter-chip line portions (parts adjacent to the boundary line 11). ) Is formed. For example, a resist pattern having a thickness of 50 μm is formed using a rubber resist.

  Subsequently, the cover 50, the support layer 30, and a part of the piezoelectric substrate 12 are removed from the opening of the resist pattern by sandblasting. At this time, processing is simultaneously performed from the opening of the inter-chip line portion of the resist pattern and the opening of the via portion, and the groove 58 reaching the piezoelectric substrate 12 is processed from the opening of the inter-chip line portion of the resist pattern. A hole 56 reaching the support layer 30 is processed from the opening of the part. Since the grooves 58 and the holes 56 having different depths can be processed at the same time, they can be efficiently removed.

  When processing by sand blasting, the processing speed varies depending on the opening shape of the resist pattern and the size of the opening. When the opening area is small, the processing speed is slow, and when the opening area is large, the processing speed is high. Further, since not only the workpiece but also the vicinity of the opening of the resist pattern is removed by the sandblasting abrasive grains, the workpiece is removed in a wider range than the initial opening of the resist pattern. In consideration of these, the processing can be performed into a desired shape by selecting processing conditions such as the size and shape of the opening of the resist pattern.

  For example, when sandblasting is performed using a resist pattern formed so that the diameter of the opening in the via portion is 80 μm and the width of the opening in the inter-chip line portion is 70 μm, the hole 56 and the groove 58 having a desired depth are processed. The maximum diameter of the via hole 56 is 100 μm, and the width of the groove 58 in the inter-chip line portion is 120 μm.

  In addition, although a cross section is processed into a taper shape by the sandblast method, the taper angle at this time is about 70 ° to 80 ° with respect to a perpendicular (for example, the boundary line 11). The drawings are schematically shown and exaggerated so that the taper angle is smaller than the actual taper angle.

  When the processing by the sandblast method is completed, the resist for sandblasting is peeled off.

Next, in order to completely cure the adhesive layer 54 of the cover 50, heating is performed at 200 ° C. for 3 hours in an oven in an N ₂ atmosphere. The N ₂ atmosphere is used to prevent oxidation of the conductive pattern 20 and the wiring on the support layer 40.

  Next, as a cleaning process for cleaning the surface processed by sandblasting, wet processing such as HF and oxygen plasma processing are performed.

  (6) Next, as shown in the cross-sectional view of FIG. 8, an inner film 61 and an outer film 62 of the metal film 60 are formed.

  That is, a sputtering film or a vapor deposition film is formed as the inner film 61 on the cover substrate 52 and the entire surface of the sand blast processing portion. A metal film is directly formed on the side surfaces of the cover substrate 52 and the support layer 30 by sputtering or vapor deposition. For example, as the inner film 61, a Cu (thickness 1000 nm) main film is formed on a base film of Ti (thickness 100 nm) by sputtering. Since the section removed by sandblasting has a mortar shape (substantially V-shaped), a sputtering film or a vapor deposition film can be easily formed on the entire surface of the sandblasted portion.

  Next, the outer film 62 is formed on the inner film 61. The outer film 62 is formed by electrolytic plating. For example, after forming a Cu plating film having a thickness of 10 μm, a Ni or Au plating film of about 0.03 μm is formed on the surface of the Cu plating film to prevent oxidation.

  Since the metal film 60 is directly formed on the side surfaces of the cover substrate 52, the support layer 30, and the like, at this time, the outer frame portion 28 of the conductive pattern 20 on the piezoelectric substrate 12, the metal film 60, and the cover 50 are formed. Thus, the vibration space 13 is hermetically sealed.

  (7) Next, as shown in the sectional view of FIG. 9, a part 65 of the metal film 60 formed in the previous step is removed.

  That is, an etching resist is formed on the metal film 60 formed in the previous step by using a photolithography method so as to cover a portion along the groove 58 of the inter-chip line portion or a portion left as a wiring on the cover 50. At this time, in order to perform electroplating in a later step, a pattern is formed so that a metal film is left for the power supply line.

  Next, by immersing in an etching solution, a portion where the metal film 60 is exposed from the opening of the resist is removed.

  (8) Next, as shown in the sectional view of FIG. 10, a coating resin layer 70 is formed.

  That is, by applying a solder resist as a surface coating layer on the metal film 60 and the cover substrate 52, and exposing and developing, an opening 72 of the under bump metal forming portion and an opening 74 of the feed line are opened. A coating resin layer 70 is formed. For the surface coating layer, a heat-resistant polyimide material, cyclic olefin material, benzocyclobutene material, silicone material, polyimide amide, or the like may be used.

  (9) Next, as shown in the cross-sectional view of FIG. 11, under bump metal films 80 and 82 are formed.

  That is, after forming a resist pattern that fills the power supply line opening 74 of the coating resin layer 70, an Ni film is formed as the under bump metal films 80 and 82 on the metal film 60 exposed in the opening 72 of the under bump metal formation portion. An Au film 82 is formed on 80 by electrolytic plating. At this time, the metal films 60 of the respective SAW devices 10 are continuous with each other, and the inner film 61 (sputtering film) of the metal film 60 is connected to the cathode of the power source and used as a power supply film.

  Next, the resist is stripped by dipping in an alkaline stripping solution.

  (10) Next, as shown in the cross-sectional view of FIG. 12, the portion of the metal film 60 exposed at the opening 74 of the power supply line is removed by etching using an aqueous ammonium persulfate solution and a 1% HF solution. As a result, the inner portion 64 of the metal film 60 formed as a wiring on the cover substrate 52 is separated from the outer portion 66 of the metal film 60 formed in the peripheral portion of each SAW device 10. .

  (11) Next, as shown in the cross-sectional view of FIG. 13, after forming the solder balls 84, dicing is performed.

  That is, solder balls 84 are formed by printing a solder paste on the under bump metal film 82 and its vicinity using a metal mask, followed by reflow and flux cleaning.

  Next, dicing along the boundary line 11 completes a hermetically sealed chip (piece) of the SAW device 10.

  The SAW device 10 manufactured as described above has the inner film 61 of the metal film 60 in contact with the side surface of the support layer 30 and can be configured compactly because there is no space between them, which is advantageous for downsizing. It is a simple configuration.

  Further, the metal film 60 is directly attached to the piezoelectric substrate 12 and the side surface of the support layer 30 and is disposed so as to surround the surface acoustic wave element. When the metal film 60 is grounded and the surface acoustic wave element is grounded from the metal film 60 by the conductive pattern 20 on the piezoelectric substrate 12, the wiring path is shortened and the grounding effect is strong.

  In addition, in a device using a piezoelectric substrate such as the SAW device 10, since the linear expansion coefficient of the piezoelectric substrate is large, the sealing tends to be damaged at the outer peripheral portion. The effect of improving the sex is particularly great.

  Example 2 A BAW (bulk wave) device 100 of Example 2 will be described with reference to a cross-sectional view of FIG.

In the BAW device 100, a SiO ₂ film stop layer 102 is formed on one main surface of the Si substrate 106 by thermal oxidation or the like, and the stop layer 102 is formed by partially etching from the other main surface of the Si substrate 106. An exposed cavity 105 is formed. A sealing substrate 108 is bonded to the other main surface of the Si substrate 106 to seal the cavity 105.

On the stop layer 102, an Al ₂ O ₃ film support layer 104 is formed, and on that, a ZnO piezoelectric thin film 110 sandwiched between upper and lower electrode portions 112 and 116 forms a BAW vibrating portion 111. Yes. The upper and lower electrode portions 112 and 116 are connected to the upper and lower electrode wiring portions 114 and 118, respectively. On the piezoelectric thin film 110, a support layer 120 is formed around the vibrating portion 111, and a glass cover layer 130 is disposed on the support layer 120.

  As in the first embodiment, the outer peripheral portions of the Si substrate 106, the support layer 120, the cover layer 130, and the like are partially removed, and a metal film 136 is formed along the removed portions. The metal film 136 traverses between the Si substrate 106 and the support layer 120, or between the support layer 120 and the cover layer 130, and the lower electrode part 114 disposed between the Si substrate 106 and the support layer 120, The support layer 120 is coupled to the support layer upper wiring 122 disposed between the support layer 120 and the cover layer 130. As a result, the space 117 on the side opposite to the cavity 115 of the vibration part 111 is hermetically sealed.

  The metal film 136 and the cover layer 130 are covered with a coating resin layer 140. From the coating resin layer 140, the solder balls 150 arranged on the under bump metal 144 are exposed. The solder ball 150 is electrically connected to the upper and lower electrode portions 112 and 114 of the vibrating portion 111 via via-hole conductors 132 and 142 formed in the cover layer 130 and the coating resin layer 140.

  <Example 3> The sensor device 200 of Example 3 will be described with reference to a cross-sectional view of FIG.

  In the sensor device 200, a glass substrate 202 on which a conductive pattern 210 including a sensor element 212 is formed and a glass cover layer 230 are bonded to each other with a support layer 220 therebetween, and the sensor element 212 is bonded to the cover layer 230. Opposite to. The support layer 220 is formed so as to surround the entire circumference of the sensor element 212.

  Similar to the first embodiment, the outer peripheral portions of the glass substrate 202, the support layer 220, the cover layer 230, and the like are partially removed, and a metal film 236 is formed along the removed portions. The metal film 236 traverses between the glass substrate 202 and the support layer 220 or between the support layer 220 and the cover layer 230 and is disposed between the glass substrate 202 and the support layer 220. The support layer 220 is coupled to the support layer upper wiring 222 disposed between the support layer 220 and the cover layer 230. Thereby, the space 214 around the sensor element 212 is hermetically sealed.

  The metal film 236 and the cover layer 230 are covered with a coating resin layer 240, and solder balls 250 exposed to the outside are disposed on the under bump metal 244 provided on the coating resin layer 240. The solder ball 250 is electrically connected to the sensor element 212 via via hole conductors 232 and 242 formed in the cover layer 230 and the coating resin layer 240.

  The sensor device 200 can hermetically seal the sensor element 212 in a low temperature load process of about 250 ° C., and is particularly effective when the heat resistance of the sensor element 212 is low.

  Example 4 A SAW device 300 of Example 4 will be described with reference to FIGS. 16 and 19 to 21.

  The SAW device 300 according to the fourth embodiment is configured in substantially the same manner as the SAW device 10 according to the first embodiment.

  That is, as shown in the cross-sectional view of FIG. 16, the SAW device 300 has a conductive surface including an IDT 322, a pad portion 324, a lead wiring, and the like constituting a surface acoustic wave element on an upper surface 312 that is one main surface of the piezoelectric substrate 310. A pattern 320 is formed. Although the conductive pattern 320 is not shown, the second layer may be formed on the first layer only in a portion where the wiring resistance is desired to be lowered. A support layer 330 is provided on the upper surface 312 of the piezoelectric substrate 310 so as to surround the periphery of the IDT 312, and a cover 350 is disposed on the support layer 330. The cover 350 is bonded to the support layer 330 by an adhesive layer 354 provided on one main surface of the cover substrate 352. As a result, a sealed vibration space 313 is formed around the IDT 322, and surface acoustic waves can freely propagate in a portion adjacent to the vibration space 313 on the upper surface 312 of the piezoelectric substrate 310.

  The cover substrate 352 is preferably made of glass or quartz. Glass or quartz has a high electric resistance value, excellent strength, can be easily thinned, has high airtightness, and is inexpensive, and is advantageous for high reliability and cost reduction. In particular, in the case of the glass cover substrate 352, the boundary line of the electronic component can be recognized through the transparent cover substrate 352, so that the process of forming alignment marks used in the subsequent processes on the cover substrate 352 is simplified. be able to.

  When the heat resistance of the adhesive layer 354 is high, the pretreatment temperature when forming the metal film 360 described later by sputtering or vapor deposition can be increased, the adhesion strength of the metal film 360 can be increased, and the sealing performance can be improved. Therefore, a material having high heat resistance, for example, a polyimide material is preferably used for the adhesive layer 354.

  When viewed from the normal direction (vertical direction in the drawing) of the upper surface 312 of the piezoelectric substrate 310, the support layer 330 is provided inside the outer periphery 311 of the piezoelectric substrate 310 and spaced from the outer periphery 311 of the piezoelectric substrate 310. And a cover 350 is disposed. The support layer 330 and the cover 350 are partially removed to form via holes 314 and 315, and a metal film 360 is formed on the inner surfaces of the via holes 314 and 315 and in the vicinity thereof. The metal film 360 crosses between the piezoelectric substrate 310 and the support layer 330, and crosses between the support layer 330 and the cover 350.

  Unlike the SAW device 10 of Example 1, spacer layers 326 and 328 are formed inside the support layer 330 using a material different from that of the support layer 330. The spacer layers 326 and 328 are formed using the same material as the conductive pattern 320. In this case, a special process for forming only the spacer layers 326 and 328 does not increase, which is preferable. However, the spacer layers 326 and 328 may be formed of a material different from that of the conductive pattern 320.

  By forming plating on the metal film 360, the lead electrode 362 and the sealing metal 366 are formed in the via holes 314 and 315, and the lead wiring 364 is formed on the cover 350.

  In substantially the same manner as the SAW device 10 of the first embodiment, a metal film 380 and a UBM layer (under bump metal layer) 382 are formed on the routing wiring 364. Solder bumps 384 are formed on the UBM layer 382. The cover 350, the extraction electrode 362, the sealing metal 366, and the routing wiring 364 are entirely covered with the surface protective resin 370. From the surface protective resin 370, solder bumps 384 are exposed to the outside, so that the SAW device 300 can be mounted on a circuit board such as an electric device.

  Next, an example of manufacturing the SAW device 300 of Example 4 will be described. A plurality of SAW devices 300 according to the fourth embodiment can be simultaneously manufactured by the same method as the SAW device 10 according to the first embodiment.

  A piezoelectric element having at least one vibration part (IDT 322) and an element wiring connected to the vibration part is formed on a wafer-like piezoelectric substrate 310 having a thickness of 250 μm. Spacer layers 326 and 328 are formed immediately below the resin layer (support layer 330). The spacer layers 326 and 328 are formed of, for example, a material with high accuracy and flatness such as a vapor deposition metal film (Cu, Al, etc.) and have a thickness of about 5 μm. The spacer layers 326 and 328 are wider than the resin layer 330 by 5 μm or more except for the portions where the routing wiring is formed. This reduces the crown. In order to form the hermetic sealing space (vibration space 313), the resin layer 330 is formed so as not to reach the vibration part (IDT 322). At this time, the resin layer 330 is also formed on the spacer layers 326 and 328. The resin layer 330 has a thickness of 3.5 μm on the spacer layers 326 and 328. The resin layer 330 is formed in a tapered shape around the spacer layers 326 and 328. Although the photosensitive polyimide resin is used for the resin layer 330, a photosensitive epoxy resin or a photosensitive silicone resin may be used. A lead wiring 340 is formed on the surface of the resin layer 330 so as to be connected to the wiring element. The lead wiring 340 is made of Cu, Al or the like and has a thickness of about 5 μm.

  An adhesive layer 354 is formed by adhering an adhesive film having a thickness of 10 μm to a glass substrate 352 having a thickness of 100 μm by laminating or the like, and the adhesive layer 354 is formed on the resin layer 330 formed on the piezoelectric substrate 310. Bonding is performed so as to be in contact with the wiring 340. Via holes 314 having an upper diameter of 100 μm and a lower diameter of 60 μm are formed on the glass substrate 352 by sandblasting so that the three-dimensional wiring 340 formed on the surface of the resin layer 330 is exposed at the bottom, and at the same time, via holes 315 are formed along the boundary line of the SAW device 300. And the glass substrate 352 is separated into chips.

  After physically removing the resist for sandblasting, washing is performed with water, and the adhesive layer 354 is heated at 180 ° C. to 210 ° C. over 3 hours to bond the glass substrate 352 and the resin layer 330. The temperature is raised to the bonding temperature over 5 hours.

  The surface of the support metal film exposed by sandblasting is etched to remove dirt such as organic matter on the surface of the support metal film.

  A metal film 360 used as a power supply film for forming the extraction electrode 362, the sealing metal 366, and the lead-out wiring 364 on the wafer surface where the hermetic sealing space (vibration space 313) is formed by the glass substrate 352 and the resin layer 330. As described above, a Cu film having a thickness of 1.5 μm is formed by sputtering on a Ti film having a thickness of 0.2 μm. The metal film 360 may be formed using an evaporation method. On the metal film 360, an extraction electrode 362, a sealing metal 366, and a routing wiring 364 are formed by electrolytic plating of Cu, Ni, etc., so that only a power supply line portion connecting the extraction electrode 362 and the sealing metal 366 is left. The power supply film 60 is removed by wet etching or the like.

  A surface protective resin 370 having a thickness of 30 μm to 50 μm is formed so as to cover the extraction electrode 362, the sealing metal 366, and the routing wiring 364. A photosensitive epoxy resin is used as the surface protective resin 370, but a photosensitive polyimide resin or a photosensitive silicone resin may be used. In the surface protective resin 370, via holes 372 and 374 are formed at the external terminal positions and the power supply line portion.

  The via hole 374 on the power supply line portion is covered with a resist, and a metal film 380 is formed in the via hole 372 at the external terminal position by vapor deposition lift-off. A resist is formed again, and a UBM layer (under bump metal layer) 382 is formed by electrolytic plating. The UBM layer 382 is formed of Cu, Ni, or the like, and Au (thickness: about 0.5 μm) for preventing oxidation is formed on the surface. The resist formed in the via hole 374 on the power supply line is peeled off, the surface protective resin 370 is used as a mask, and the metal film 60 on the dicing line is cut simultaneously with the power supply line by wet etching or the like.

  A solder paste such as Sn-Ag-Cu is printed directly on the UBM layer 382 formed on the surface protective resin 370 through a metal mask, and heated at a temperature at which the solder paste dissolves, for example, about 260 ° C. Solder is fixed to the UBM layer 382, the flux is removed by a flux cleaning agent, and spherical solder bumps 384 are formed.

  A chip is cut out by a method such as dicing to complete the SAW device 300.

  Incidentally, the height of the support layer 30 in the embodiment 1 shown in FIG. 1 is preferably 3 μm to 30 μm as described above. However, the support layer 30 has a height of, for example, 4 μm or more for three-dimensional wiring. When the support layer 30 is formed so as to be thick, the end portion of the upper surface of the support layer 30 (the surface opposite to the piezoelectric substrate 12) protrudes when the support layer 30 contracts during thermosetting, and the upper surface of the support layer 30 There is a possibility that a so-called crown may be formed in the center.

  The generation of the crown causes a gap between the adhesive layer 54 and the support layer 30, and reduces the adhesion area between the adhesive layer 54 and the support layer 30. There is sex.

  In the state sealed with the metal film 60, the influence is considered to be extremely small. However, in the process before sealing with the metal film 60, an adverse effect (for example, inflow of cleaning liquid such as acid or alkali) is caused in the vibration space 13. It is thought to affect.

  As the support layer 30 is thicker, the shrinkage becomes larger, so that the crown is more likely to be generated, and the crown becomes larger. Conversely, the thinner the support layer 30, the smaller the shrinkage, so that the crown is less likely to occur and the crown becomes smaller.

  The height of the support layer 30 is preferably as small as possible in order to prevent the generation of crowns, but it is necessary to ensure a certain height or more for three-dimensional wiring.

  That is, the crown is generated due to the shrinkage of the resin of the support layer 30 when the resin is thermally cured. Therefore, if the resin of the support layer 30 is thinned, the crown can be reduced. However, when the resin film thickness of the support layer 30 is reduced, the distance between the piezoelectric substrate 12 and the cover 50 is reduced, and it is difficult to secure the vibration space 13.

  Therefore, in the SAW device 300 of Example 4, as shown in FIG. 16, the spacer layers 326 and 328 are formed of a metal film under the resin of the support layer 330, and the resin of the support layer 330 is used as the spacer layers 326 and 328. By raising the bottom, the thickness of the resin of the support layer 330 is reduced, and at the same time, the thickness of the support layer 330 itself is secured.

  If the support layer is made of only metal, no crown will be generated. In that case, however, it becomes impossible to form a three-dimensional wiring on the support layer, and it becomes weak against stress (shear) from the side. The connection is broken. By relaxing the stress with the resin support layer 330, the disconnection of the wiring can be reduced.

  As shown in the enlarged views of the main part in FIGS. 16 and 19, the support layer 330 has a spacer layer 326, 328 on the vibration space 313 side formed in a tapered shape and connected to the pad portion 324 of the conductive pattern 320. A wiring 340 is formed on the support layer 330.

  When the thickness T (see FIG. 19) of the portion formed on the spacer layer of the support layer 330 exceeds 4 μm, a crown may be generated in the support layer 330, so that the thickness T is preferably 4 μm or less.

  FIG. 20 shows the shape measurement result of the support layer in which the spacer layer (support metal film) is provided. The horizontal axis is a direction parallel to the upper surface of the piezoelectric substrate, and the vertical axis is a direction perpendicular to the upper surface of the piezoelectric substrate. When the support layer is formed using a resin, the upper surface of the support layer is formed flat. After the resin is cured and shrunk, a crown is generated at the upper end of the support layer as shown in FIG. In the inside of the support layer, a spacer layer is provided only on the left side in FIG. 20, and the thickness of the support layer on the spacer layer (the left side in FIG. 20) is the part without the spacer layer (the right side in FIG. 20). Is smaller than the thickness of the support layer. For this reason, the crown formed on the left support layer raised by the spacer layer is smaller than the crown formed on the right support layer not raised by the spacer layer.

  FIG. 21 is a photograph taken from the cover side in a state where the cover is attached to the resin layer as the support layer. When the thickness of the resin layer is 10 μm, voids are observed, but when the thickness of the resin layer is 5.5 μm, no voids are observed. The thinner the resin layer, the smaller the crown, and the generation of voids can be suppressed.

  <Example 5> A SAW device 302 of Example 5 will be described with reference to FIG.

  As shown in the sectional view of FIG. 17, the SAW device 302 of the fifth embodiment is configured in substantially the same manner as the SAW device 300 of the fourth embodiment. In FIG. 17, the same reference numerals are used for the same components as in the fifth embodiment of FIG. 16, and the differences will be mainly described below.

  In the SAW device 302 of the fifth embodiment, an LGA (land grid array) external terminal 386 is formed instead of the solder bump 384 of the SAW device of the fourth embodiment.

  The SAW device 302 according to the fifth embodiment can be manufactured in substantially the same manner as the SAW device according to the fourth embodiment.

  That is, the SAW device of Example 4 is manufactured in the same manner until a via hole is formed in the surface protection resin at the external terminal position and the power supply line portion. Next, unlike the SAW device of Example 4, the via hole on the power supply line part is covered with a resist, and a metal film (a 200 nm thick Cu film on a 100 nm thick Ti film is formed on the via hole part at the external terminal position by evaporation lift-off. ). A resist is formed again, and an LGA external terminal is formed by electroplating. For the LGA external terminal, an Au film having a thickness of 0.1 to 0.3 μm is formed on the surface of a Ni film having a thickness of 20 μm to prevent oxidation.

  Next, as in the SAW device of Example 4, the resist formed in the via hole on the power supply line is peeled off, the surface protective resin is used as a mask, and the metal film on the dicing line is wet etched or the like simultaneously with the power supply line. Disconnect. A chip is cut out by a method such as dicing to complete the SAW device 302.

  As in the SAW device 300 of the fourth embodiment, the SAW device 302 of the fifth embodiment can reduce the crown and improve the sealing performance by the spacer layers 326 and 328 provided in the support layer 330.

  Example 6 A SAW device 304 of Example 6 will be described with reference to FIG.

  As shown in the sectional view of FIG. 17, the SAW device 304 of the sixth embodiment is configured in substantially the same manner as the SAW device 300 of the fourth embodiment. In FIG. 18, the same reference numerals are used for the same components as in the fourth embodiment of FIG.

  Unlike the SAW device 300 of the fourth embodiment, the SAW device 304 of the sixth embodiment is provided with spacer layers 327 and 329 in which the outer periphery 311 side of the piezoelectric substrate 310 is exposed from the support layer 330 in the support layer 330.

  These spacer layers 327 and 329 are originally formed up to the vicinity of the boundary line of the SAW device 304, but the via hole 315 extends from the cover 350 side to the piezoelectric substrate 310 along the boundary line of the SAW device 304. A part of the piezoelectric substrate 310 is removed and the outer periphery 311 side of the piezoelectric substrate 310 is exposed from the support layer 330. The spacer layers 327 and 329 reduce damage to the piezoelectric substrate 310 when the via hole 315 is formed by sandblasting or the like.

  <Summary> As described above, by providing the metal films 60, 136, and 236 near the outer periphery of the devices 10, 100, and 200, the sealing performance of the spaces 13, 117, and 214 inside the device can be improved. it can.

  In addition, this invention is not limited to above-described embodiment, Of course, a various change can be added.

  For example, when the SAW device is SAWDPX (SAW duplexer), a matching inductor is formed in the cover layer. At this time, the inductor includes a plurality of stacked insulating layers and a conductor pattern stacked on the insulating layers.

  Further, the groove in the inter-chip line portion and the hole in the via portion may be processed by a method other than sandblasting. For example, it is possible to dice the groove in the inter-chip line portion or laser process the hole in the via portion.

It is sectional drawing of a SAW device. Example 1 It is a top view of a SAW device. Example 1 It is explanatory drawing of the manufacturing process of a SAW device. Example 1 It is explanatory drawing of the manufacturing process of a SAW device. Example 1 It is explanatory drawing of the manufacturing process of a SAW device. Example 1 It is explanatory drawing of the manufacturing process of a SAW device. Example 1 It is explanatory drawing of the manufacturing process of a SAW device. Example 1 It is explanatory drawing of the manufacturing process of a SAW device. Example 1 It is explanatory drawing of the manufacturing process of a SAW device. Example 1 It is explanatory drawing of the manufacturing process of a SAW device. Example 1 It is explanatory drawing of the manufacturing process of a SAW device. Example 1 It is explanatory drawing of the manufacturing process of a SAW device. Example 1 It is explanatory drawing of the manufacturing process of a SAW device. Example 1 It is sectional drawing of a BAW device. (Example 2) It is sectional drawing of a sensor device. (Example 3) It is sectional drawing of a SAW device. (Example 4) It is sectional drawing of a SAW device. (Example 5) It is sectional drawing of a SAW device. (Example 6) It is a principal part expanded sectional view of a SAW device. (Example 4) It is explanatory drawing of a crown. It is the photograph of the void generation by a crown. It is sectional drawing of a SAW device. (Conventional example)

Explanation of symbols

10 SAW device 12 Piezoelectric substrate 20 Conductive pattern 24 IDT
26 Pad part 28 Outer frame part 30 Support layer 50 Cover 52 Cover substrate (cover layer)
54 Adhesive layer 60 Metal film (peripheral sealing metal film)
61 Sputtering film 62 Plating film 70 Coating resin layer 84 Solder ball (external terminal)
100 BAW device 106 Si substrate 120 Support layer 130 Cover layer 140 Coating resin layer 136 Metal film (peripheral sealing metal film)
200 sensor device 202 glass substrate 220 support layer 230 cover layer 240 coating resin layer 236 metal film (peripheral sealing metal film)
300, 302, 304 SAW device (electronic component)
310 Piezoelectric substrate 320 Conductive pattern 322 IDT
324 Pad part 330 Support layer 350 Cover 352 Cover substrate (cover layer)
354 Adhesive layer 360 Metal film (peripheral sealing metal film)

Claims (26)

A substrate,
A functional part formed on the main surface of the substrate;
A support layer disposed over the entire periphery of the functional portion on the main surface of the substrate and extending inward from the outer periphery of the substrate when viewed from the normal direction of the main surface of the substrate. When,
A cover layer that is disposed on the support layer so as to face the main surface of the substrate with a gap and extends inward from the outer periphery of the substrate when viewed from the normal direction of the main surface of the substrate. When,
Extending between the substrate and the support layer, between the support layer and the cover layer, between the substrate and the support layer, and between the support layer and the cover layer. A covering metal film (hereinafter referred to as “peripheral sealing metal film”);
An electronic component comprising:   The adhesive layer for joining the cover layer and the support layer is provided on at least a part of a main surface of the cover layer facing the support layer, which is made of a polyimide-based material. Electronic components described in   The outer peripheral sealing metal film is at least one of a first metal film disposed between the substrate and the support layer, and a second metal film disposed between the support layer and the cover layer. The electronic component according to claim 1, wherein the electronic component is connected to the electronic component.   4. The electronic component according to claim 1, wherein the outer peripheral sealing metal film is a multilayer film, and the innermost film is formed by a vacuum process.   The electronic component according to claim 4, wherein an outermost film of the outer peripheral sealing metal film is a plating film.   The electronic component according to claim 4, wherein the outer peripheral sealing metal film includes a film containing Cu as a main component. A cover layer wiring metal disposed on the main surface of the cover layer opposite to the substrate and bonded to the outer peripheral sealing metal film;
An external ground terminal connected to the cover layer wiring metal, exposed to the outside on the opposite side of the substrate with respect to the cover layer, and connected to ground;
The electronic component according to any one of claims 1 to 6, further comprising:   The function part and the outer peripheral sealing metal film are electrically connected by a conductive pattern provided on the main surface of the substrate, according to any one of claims 1 to 7. The electronic component described.   A coating resin layer disposed adjacent to the outer periphery of the substrate on the main surface side where the functional part of the substrate is formed and extending so as to entirely cover the outside of the support layer and the cover layer The electronic component according to claim 1, further comprising:   The electronic component according to claim 1, wherein a material of the cover layer is glass or quartz.   The electronic component according to claim 1, wherein the substrate is a piezoelectric substrate, and a surface acoustic wave element is formed as the functional unit. A method of manufacturing an electronic component for simultaneously manufacturing a plurality of electronic components,
Corresponding to each of the plurality of electronic components, the plurality of electrons on one substrate on which a functional portion and a support layer extending around the entire circumference of the functional portion are formed on the main surface. A first step of disposing a cover member on each said support layer of the component;
Removing the portion adjacent to the boundary lines of the plurality of electronic components by sandblasting until reaching the substrate from the cover member or until reaching the outer periphery of the conductive pattern formed on the substrate; and ,
A metal film (hereinafter, referred to as “peripheral sealing metal film”) is formed so as to cover between the substrate and the support layer exposed in the second step and between the support layer and the cover layer. A third step;
A method for manufacturing an electronic component, comprising:   The electronic component according to claim 13, wherein a spacer layer made of a material different from that of the support layer is provided inside the support layer.   The electronic component according to claim 13, wherein the spacer layer is formed to face an interface between the support layer and the cover layer.   15. The electronic component according to claim 13, wherein the support layer is formed only on the cover side with respect to the spacer layer.   16. The electronic component according to claim 13, wherein a part of the outer peripheral side of the substrate is exposed from the support layer.   The support layer includes a resin layer having a thickness of 4 μm or less formed using a resin between the spacer layer and the cover layer. Electronic components.   The electronic component according to claim 13, wherein the spacer layer is made of a metal film.   13. The method of manufacturing an electronic component according to claim 12, wherein the substrate used in the first step is provided with a spacer layer made of a material different from that of the support layer inside the support layer. .   The substrate used in the first step is characterized in that the spacer layer is formed using the same material simultaneously with at least a part of the functional part and the wiring connected to the functional part. The manufacturing method of the electronic component of description.   The electronic component according to any one of claims 13 to 18, wherein the spacer layer is covered with the support layer at a peripheral portion on the functional portion side.   The electronic component according to any one of claims 13 to 18, wherein the support layer has a tapered portion at a peripheral portion on the functional portion side.   The adhesive layer which consists of a polyimide-type adhesive film was provided in at least one part of the main surface where the said cover layer opposes the said support layer, The any one of Claim 13 thru | or 18, 21 and 22 characterized by the above-mentioned. Electronic components described in   The electronic component according to any one of claims 13 to 18, 21, 22, and 23, wherein the cover layer is made of glass.   The electronic component according to claim 13, wherein a photosensitive polyimide resin is used as the support layer.   A plurality of element wirings respectively connected to the plurality of functional units and lead wirings connected to the element wirings are formed on the support layer. The electronic component according to any one of 25.