JP2007221433A - OFDM signal receiving method and OFDM signal receiver - Google Patents

Abstract

The power consumption of an OFDM signal receiver is reduced.
When an OFDM signal receiver detects the first packet, A / D converters 107 and 108 perform oversampling, and an FFT operation circuit 109 performs 256-point DFT. During packet reception, the switching signal generation circuit 111 monitors the noise (the sum of the squares of the spectrum components of fs / 2 to fs) output from the FFT operation circuit 109. When the noise is less than a predetermined level, At the time of packet detection, the A / D converters 107 and 108 are switched to the Nyquist sampling mode, and the FFT operation circuit 109 is switched to a 128-point DFT.
[Selection] Figure 2

Description

  The present invention relates to a signal receiving method and a signal receiver in an OFDM system that transmits a modulated digital information signal using a plurality of carrier waves.

  The OFDM (orthogonal frequency division multiplexing) scheme is a frequency division multiplexing digital modulation scheme that transmits digital information using a plurality of orthogonal carrier waves. This method is resistant to multipath, has high frequency utilization efficiency, and is applied to terrestrial digital TV broadcasting and IEEE802.11a / g wireless LAN. The plurality of carriers are generated on the transmitting side using an IFFT circuit that performs inverse Fourier transform, and on the receiving side, the carriers are separated by an FFT circuit that performs Fourier transform.

  FIG. 15A shows a configuration of a modulation device in conventional OFDM transmission (see, for example, Patent Document 1). The transmission data is encoded by the encoding circuit 20, and the encoded signal is input to the real (R) input terminal and the imaginary (I) input terminal of the IFFT circuit 21. The output signal of the IFFT circuit 21 is converted into an analog signal by the D / A conversion circuits 22 and 23, and the aliasing signal is removed by the low-pass filter (LPF) circuits 24 and 25, and then the output of the LPF circuit 24 and the local oscillator 28 The output is multiplied by a multiplier 26 to output a time series signal I. The output of the local oscillator 28 is multiplied by the output of the LPF circuit 25 by the output of which the phase is rotated by the 90-degree phase shift circuit 29, and the time-series signal Q whose phase is rotated by 90 degrees with respect to the I signal. Is output. As shown in FIG. 15B, the OFDM wave generated by the orthogonal modulation is modulated and transmitted by the center frequency ω0.

  FIG. 15C shows a configuration of a demodulator in conventional OFDM transmission. The OFDM wave transmitted by OFDM transmission is input to the demodulator, and then multiplied by the output of the local oscillator 9 by the multiplier 7 to output a time-series signal I. Similarly, the output obtained by rotating the phase of the local oscillator 9 by the 90-degree phase shift circuit 10 and the OFDM wave are multiplied by the multiplier 8, and the time-series signal Q whose phase is rotated by 90 degrees with respect to the I signal is obtained. Output. The oscillation frequency of the local oscillator 9 is the same center frequency ω0 as that during modulation. The aliasing signals included in both signals obtained by orthogonal demodulation are removed by low-pass filter (LPF) circuits 11 and 12, and then converted into digital signals by A / D conversion circuits 13 and 14. Digital signals Q and I are input to the real part and imaginary part of the FFT operation circuit 15 and the real part and imaginary part obtained by Fourier transform are input to the decoding circuit 16 to decode PSK, QAM, etc. After the above, the decoded data is output.

  By the way, an oversampling technique is used to facilitate the design of an analog circuit (particularly LPF). When sampling an analog signal having a spectral distribution as shown in FIG. 1A, when sampling is performed at a sampling frequency fs, the spectrum is repeated for each fs as shown in FIG. 1B. For this reason, when the original signal has a frequency component equal to or higher than fs / 2, the spectrum is folded back at fs / 2, and the spectrum of the original signal cannot be reproduced. For this reason, before sampling (A / D conversion), it is necessary to perform filtering so that the frequency component of fs / 2 or more included in the original analog signal becomes sufficiently small. A filter that performs such filtering is called an anti-aliasing filter. As shown in FIG. 1B, when the maximum frequency in the required signal band is close to fs / 2, the amplitude characteristic of the anti-aliasing filter is steep as shown by the dotted line in FIG. Something is necessary.

  FIG. 1C shows a spectral distribution when the sampling frequency is 2 fs. In this case, the spectrum is repeated every 2 fs. In order to reproduce the original signal, it is sufficient that the input signal to the A / D converter does not include a frequency component equal to or higher than fs. For this reason, in the filtering before sampling, it is only necessary to sufficiently attenuate the signal component equal to or higher than fs, and the anti-aliasing filter at that time has an amplitude characteristic such as a dotted line as shown in FIG. It will be good.

  The filter characteristic shown in FIG. 1 (c) may have a gentle attenuation characteristic as compared with the filter characteristic shown in FIG. 1 (b), which facilitates filter design and further simplifies the filter configuration. That is, the necessary filter characteristics can be relaxed by performing oversampling.

Japanese Patent Laid-Open No. 9-294115

  The above-described oversampling method does not require the anti-aliasing filter to have a steep cutoff characteristic, so that the filter circuit can be easily designed and the circuit configuration can be simplified, but high-speed A / D conversion is performed. Therefore, there is a disadvantage that power consumption increases and the load of digital signal processing after A / D conversion becomes heavy.

With respect to digital signal processing after A / D conversion, the OFDM signal receiving apparatus performs DFT (Discrete) performed after A / D conversion to prevent aliasing.
Even in Fourier Transform (discrete Fourier transform) computation (usually FFT computation circuit), it is necessary to perform DFT computation with a larger number of points by the amount of oversampling.

  However, in order to cope with this, it is necessary to parallelize the DFT arithmetic circuit or increase the processing speed. However, any of the measures is taken, the power consumption increases, and the OFDM signal receiver is especially portable. This is a problem when mounted on a type of equipment.

The present invention has been made in view of the above problems,
An object of the present invention is to provide an OFDM signal receiving method and an OFDM signal receiver with reduced power consumption.

  The present invention is an OFDM signal receiving method for receiving an orthogonal frequency division multiplexing (OFDM) transmission signal using N (N is a positive integer) number of subcarriers, and obtains a necessary analog signal band. Sampling the OFDM signal at a sampling frequency (M × fs) that is M times (M is an integer of 2 or more) a sampling frequency (frequency indicated by the sampling theorem, hereinafter referred to as fs) required at Performing M × N-point discrete Fourier transform (DFT) on the sampled signal, and setting the sampling frequency to L × fs (L is an integer between 1 and M) based on the result of the discrete Fourier transform Resetting and resetting the number of points of the discrete Fourier transform to L × N based on the result of the discrete Fourier transform The most important feature to be.

  In the OFDM signal receiving method of the present invention (claims 1 to 3), the spectral distribution included in the analog signal to be sampled is measured in advance, and then the sampling frequency and the number of data points used for the DFT calculation are determined. When oversampling is unnecessary, the sampling frequency can be lowered, so that power consumption can be reduced. Further, since the DFT operation can be executed with a small number of points, the power consumption can be reduced.

  The OFDM signal receiving method of the present invention (Claim 4) measures the error rate of the demodulated data in a state where the OFDM signal is received in advance at a low sampling frequency and the number of DFT calculation points, and if the error rate is sufficiently low, it remains as it is. If the error rate is high and the OFDM signal is received by increasing the sampling frequency and the number of DFT calculation points, the OFDM signal can be received with the minimum sampling rate and the number of DFT calculation points, and the power consumption Can be kept low.

  The OFDM signal receiving method of the present invention (Claim 5) measures the error rate of the decoded data and resets the sampling rate and the number of DFT calculation points even when there is a problem with the set sampling rate and the number of DFT calculation points. Therefore, the correct setting can be performed again.

  The OFDM signal receiving method of the present invention (Claim 6) can simplify the algorithm by setting M = 2, and is easy to implement.

  Since the OFDM signal receiving apparatus according to the present invention (Claims 7 and 12) can measure the spectral distribution included in the analog signal to be sampled in advance and determine the sampling frequency and the number of data points used for the DFT calculation. When oversampling is unnecessary, the sampling frequency can be kept low, and power consumption is reduced. Further, since the DFT operation can be executed with a small number of points, the power consumption can be kept low. In addition, since the OFDM signal receiving apparatus includes a plurality of (more than two) DFT arithmetic circuits, the circuit scale increases, but appropriate settings can be made in more detail.

  In the OFDM signal receiving apparatus according to the present invention (claims 8 and 11), the operation of the switching circuit can be executed by the CPU, so that the circuit scale can be reduced.

  The OFDM signal receiving apparatus according to the present invention (claims 9 and 12) measures the error rate of demodulated data in a state where the OFDM signal is received in advance at a low sampling frequency and the number of DFT calculation points, and the error rate is sufficiently low. Can be received as it is, and when the error rate is high, the OFDM signal can be received by increasing the sampling frequency and the number of DFT calculation points, so the OFDM signal can be received with the minimum sampling rate and the number of DFT calculation points. A signal can be received and power consumption is reduced. In addition, since the OFDM signal receiving apparatus includes a plurality of (more than two) DFT arithmetic circuits, the circuit scale increases, but appropriate settings can be made in more detail.

  Even if there is a problem with the set sampling rate and the number of DFT calculation points, the OFDM signal receiving apparatus according to the present invention (claims 10 and 12) measures the error rate of the decoded data, Since the setting is performed, the correct setting can be performed again. In addition, since the OFDM signal receiving apparatus includes a plurality of (more than two) DFT arithmetic circuits, the circuit scale increases, but appropriate settings can be made in more detail.

  In the OFDM signal receiving apparatus of the present invention (claim 13), since a plurality of point outputs can be obtained from one M-point DFT operation circuit, it is not necessary to prepare a plurality of DFT operation circuits independently, and the circuit scale is reduced. it can.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the OFDM signal receiver of the present embodiment, data transmission is performed using 128 subcarriers, but the present invention is not limited to the number of subcarriers described above, and any number of subcarriers may be used. In addition, in order to sample a signal necessary for OFDM data transmission, it is necessary to sample at a sampling frequency of at least fs (fs is a sampling frequency required by the sampling theorem).

Example 1:
FIG. 2 shows a configuration of an OFDM signal receiver according to the first embodiment of the present invention. In FIG. 2, 101 and 102 are multipliers, 103 is a local oscillator, 104 is a 90 degree phase shift circuit, 105 and 106 are low-pass filters (LPF), 107 and 108 are analog / digital (A / D) converters, 109 Is an FFT operation circuit, 110 is a decoding circuit, 111 is a switching signal generation circuit, and 112 is a frequency divider.

  Multiplier 101 multiplies the OFDM signal input by the output signal of local oscillator 103 and outputs the result. Multiplier 102 multiplies the OFDM signal input by the 90-degree phase shift circuit 104 and outputs the result. The local oscillator 103 outputs a sine wave, and its oscillation frequency is the same frequency ω0 as the modulation frequency in the OFDM transmitter. The 90-degree phase shift circuit 104 outputs a sine wave in which the phase of the sine wave input from the local oscillator 103 is shifted by 90 degrees.

  The low-pass filters (LPF) 105 and 106 are anti-aliasing filters, and their amplitude characteristics are assumed to have the filter characteristics (dotted line) shown in FIG.

  In this embodiment, the minimum sampling frequency required for sampling the signal required for decoding is fs (the maximum frequency in the required signal band is fs / 2). Therefore, when a signal (noise) from another device or the like exists in the fs / 2 to fs band adjacent to the target signal, the low-pass filter cannot sufficiently attenuate the signal. In such a case, aliasing occurs when sampling is performed at the sampling frequency fs. Therefore, in such a situation, in order to prevent aliasing, oversampling twice or more is necessary.

  Here, aliasing (folding distortion) will be described. When a signal is evaluated under conditions that do not satisfy the sampling theorem, distortion occurs due to the high-frequency component being folded into the low-frequency region. The sampling theorem is that when the maximum frequency existing in a signal to be sampled is fmax, information on all signals can be collected if data is collected at a sampling frequency fs of 2 fmax or more.

  A specific example will be described with reference to FIG. As shown in FIG. 3A, the spectrum of the signal before sampling is distributed, and when this signal is sampled at the sampling frequency fs, a false frequency component called aliasing is not satisfied because the sampling theorem is not satisfied. Will appear. Specifically, as shown in FIG. 3B, the spectrum component of the original signal is folded around fs / 2 and appears in a frequency region lower than fs / 2. For this reason, the spectrum of the signal actually observed during sampling is observed with the original signal spectrum overlapped with the folded spectrum component.

  On the other hand, when the signal of FIG. 3A is sampled at a sampling frequency of 2 fs, the spectrum distribution after sampling is folded around fs as shown in FIG. If a higher frequency component is not included, a false frequency component does not appear in the low frequency region.

  Hereinafter, sampling at a sampling frequency higher than fs is referred to as oversampling, and sampling at fs is referred to as Nyquist sampling.

  The analog / digital (A / D) converters 107 and 108 convert the analog signals output from the low-pass filters 105 and 106 into digital signals in synchronization with the sampling clock output from the frequency divider 112 and output the digital signals. The FFT operation circuit 109 performs 256-point FFT operation using the output of the A / D conversion circuit 107 as an input of a real part and the output of the A / D conversion circuit 108 as an input of an imaginary part. Further, it has a data number switching input, and can also be used as an FFT operation circuit that performs a 128-point FFT operation by a control signal input to the data number switching input. When used as a 128-point FFT arithmetic circuit, current consumption can be kept low by stopping the operation of blocks that are not required. The detailed configuration of the FFT operation circuit 109 will be described later (FIG. 4).

  The decoding circuit 110 performs decoding such as QPSK and error correction from the output of the FFT operation circuit 109, and then outputs decoded data. The switching signal generation circuit 111 determines from the output of the FFT operation circuit 109 whether to perform oversampling + 256 point FFT operation or Nyquist sampling + 128 point FFT operation, and divides the control signal for that with the FFT operation circuit 109. Output to the instrument 112. The detailed configuration of the switching signal generation circuit 111 will be described later (FIG. 6).

  The frequency divider 112 divides and outputs the output of the local oscillator 103 and outputs it to the A / D converters 107 and 108. The frequency division ratio is determined so that the frequency of the output clock is 2 fs when the output signal of the switching signal generation circuit 111 indicates oversampling and fs when the output signal indicates Nyquist sampling.

  FIG. 4 shows the configuration of the FFT operation circuit 109 of this embodiment. The data input in FIG. 4 corresponds to the output of the A / D conversion circuits 107 and 108 in FIG. 2, and here, each output is regarded as a real part and an imaginary part and is displayed as a single line. . In addition, the data number switching signal can select either 256 points or 128 points as the number of data in the FFT operation.

  In FIG. 4, 201 is a serial / parallel conversion circuit, 202 is a selection circuit, 203 and 204 are 128-point FFT operation circuits, 205 is a rotation operation circuit, 206 is a 2-point FFT operation circuit, and 207 and 208 are rearrangement circuits. , 209 are parallel / serial conversion circuits, and 210 is a selection circuit.

  The serial / parallel conversion circuit 201 converts the input serial data input into two columns of parallel data. The serial / parallel conversion circuit 201 can be switched between an operation state and a sleep state by a data number switching signal. In the sleep state, the operation is completely stopped (for example, the clock frequency is lowered, the clock is stopped, power is not supplied) Therefore, the current consumption can be kept low.

  The selection circuit 202 selects the output signal of the S / P conversion circuit 201 when the number of data is selected by the data number switching signal, and selects the output signal of the A / D conversion circuit when 128 points are selected. And output.

  The operating frequency of the pipeline type FFT operation circuits 203 and 204 that perform 128-point FFT operation is the sampling frequency fs of the A / D conversion circuit at the time of Nyquist sampling (when oversampling, the input data is input by the S / P conversion circuit 201). (Since serial-parallel conversion is performed, the input signals to the FFT conversion circuits 203 and 204 also have the fs rate). Further, the FFT operation circuit 204 can completely stop the operation when the 128-point FFT is selected by the data number switching signal, and the current consumption can be kept low.

  In this embodiment, a 256-point FFT operation is divided into two 128-point FFT operations and a 2-point FFT operation. However, it is necessary to multiply the necessary rotation operators. . The rotation calculation circuit 205 is a circuit that performs the calculation.

  In the following equation, X (k) represents a 256 point DFT (discrete Fourier transform) of x (n). The curly braces are 128 points, which are multiplied by a rotation operator, and finally a 2 point DFT is performed. The rotation calculation circuit 205 performs this rotation calculation.

回転演算回路２０５はデータ数切替信号により１２８ポイントのＦＦＴが選択されたときには動作を完全に停止することが可能となっており、消費電流を低く抑えることができる。

The rotation calculation circuit 205 can completely stop the operation when the 128-point FFT is selected by the data number switching signal, and the current consumption can be kept low.

  The 2-point FFT operation circuit 206 is a circuit that performs 2-point FFT operation using the above formula. The 2-point FFT operation circuit 206 can completely stop the operation when 128-point FFT is selected by the data number switching signal, and can reduce the current consumption.

  The FFT operation results are output in the order of bit inversion, and the rearrangement circuits 207 and 208 are circuits that rearrange them in a normal order. The rearrangement circuit 207 can completely stop the operation when the 128-point FFT is selected by the data number switching signal, and the current consumption can be kept low. On the contrary, the rearrangement circuit 208 can completely stop the operation when 256-point FFT is selected by the data number switching signal, and the current consumption can be kept low.

  The parallel / serial conversion circuit 209 is a circuit that converts two columns of parallel data into serial data (hereinafter referred to as a P / S conversion circuit). The P / S conversion circuit 209 can completely stop the operation when the 128-point FFT is selected by the data number switching signal, and the current consumption can be kept low.

  The selection circuit 210 selects the output signal of the P / S conversion circuit 209 when 256 points are selected by the data number switching signal, and selects and outputs the output signal of the rearrangement circuit 208 when 128 points are selected. .

  Next, the overall operation of this embodiment will be described. The path from the OFDM signal input to the decoded data output is almost the same as the conventional OFDM signal receiver described above. The difference is that the sampling frequency of the A / D conversion circuits 107 and 108 and the number of calculation points of the FFT calculation circuit 109 are determined by determining whether or not oversampling is necessary from the output of the FFT calculation circuit 109. For this reason, when oversampling is unnecessary, Nyquist sampling is performed, whereby the power consumption of the A / D conversion circuits 107 and 108 and the FFT operation circuit 109 can be reduced.

  The main reason for oversampling with a conventional OFDM signal receiver is that aliasing occurs when sampling is performed at the sampling frequency fs when there is a signal component between fs / 2 and fs in the frequency domain. It is in. Therefore, when the signal component existing in fs / 2 to fs is sufficiently small, it is not necessary to perform oversampling. Therefore, in this embodiment, oversampling is performed when the first packet is detected (such as the first packet part in a wireless LAN), and the FFT operation circuit 109 performs 256-point DFT, and the input signal obtained as a result The switching signal generation circuit 111 checks whether or not the signal component included between fs / 2 to fs of the spectrum distribution up to fs is sufficiently small (less than a predetermined threshold), and the sufficiently small level (of FIG. 5A) State), Nyquist sampling (128-point FFT operation) is selected. When the signal component included between fs / 2 and fs is large (greater than a predetermined threshold) and there is a possibility that a problem may occur in decoding (the state of FIG. 5B), oversampling (256-point FFT calculation) ) Is selected. That is, if Nyquist sampling is performed in the state of FIG. 5B, the noise component between fs / 2 and fs is folded around fs / 2 and overlapped with the original signal, and the original signal cannot be reproduced. Therefore, oversampling is performed in the state of FIG. In oversampling, fs to 2fs is folded around fs, and the noise component between fs / 2 to fs is not folded, so that the original signal is not affected by aliasing distortion.

  By adopting the above-described configuration, when oversampling is unnecessary, the sampling frequency of the A / D conversion circuits 107 and 108 can be lowered, so that power consumption can be reduced. Further, since reception is possible by using only a part of the FFT operation circuit 109, power consumption can be further reduced.

  FIG. 6 shows the configuration of the switching signal generation circuit 111. In FIG. 6, 301 and 302 are multipliers, 303 and 304 are adders, 305 is a D flip-flop (DFF) with synchronous reset and clock enable. DFF305 has D input, res input, en input, ck input, and Q output. When res input becomes valid at the rising edge of ck input, Q output is cleared to zero. When res input is not effective, en input is valid. When this happens, the D input is output to the Q output, and the Q output is held in other cases.

  Reference numeral 306 denotes a switching noise level holding register, reference numeral 307 denotes a comparison circuit that compares the outputs of the DFF 305 and the switching noise level holding register 306, and reference numeral 308 denotes a DFF with a synchronous set and a clock enable. When the synchronous reset of the DFF 305 is replaced with the synchronous set and the set input is valid, the output becomes high level in synchronization with the clock input. Reference numeral 309 denotes a counter, 310 denotes a reset period holding register, 311 denotes a comparison circuit, and 312 and 313 denote AND circuits.

  FIG. 7 shows a received signal format and an operation timing chart of the switching signal generation circuit. (A) shows the packet configuration of the received signal, (b) shows the configuration of one packet, (c) shows one OFDM symbol (one unit of information, one bit transmitted by one modulation or The structure of (multi-bit data) is shown.

  Data transmission is performed in units of packets as shown in FIG. Each packet is composed of symbols from Sym0 to SymN as shown in FIG. The packet detection signal is a high level signal when a packet is detected as shown in FIG. 7B, and the switching determination enable 1 signal is transmitted with Symm as shown in FIG. 7B. This signal becomes high level at the timing.

  When each symbol shown in FIG. 7B is sampled in the oversampling mode and a 256-point FFT operation is performed, data of f0 to f255 is output as shown in FIG. 7C. Here, f0 to f255 correspond to the frequency spectrum included in the symbol, and are f0, f1,..., F255 from the lowest frequency. In this embodiment, since data transmission is performed using 128 subcarriers, data information and noise components to be transmitted are included in f0 to f127, but only noise components are included in f128 to f255. Will be. As shown in FIG. 7C, the switching determination enable 2 signal is a signal that becomes high level at the timing when f128 to f255 are output.

  The real part data and the imaginary part data output serially from the FFT operation circuit 109 are squared by the multiplication circuits 301 and 302, respectively, and the outputs of the multiplication circuits 301 and 302 are added by the addition circuit 303. Data output from the adder circuit 303 is integrated by a circuit composed of the adder circuit 304 and the DFF 305.

  Here, if the jth real part data of the FFT operation circuit 109 is Rj and the imaginary part data is Ij, the data output from the DFF 305 is

である。積算はＤＦＦ３０５のｒｅｓ入力のタイミングでリセットされ、ｅｎ入力が有効になっている期間積算される。ＤＦＦ３０５のｒｅｓ入力には、パケット検出時に有効になるパケット検出信号（図７（ｂ））が入力し、パケット先頭で積算値をクリアしておく。

It is. The integration is reset at the res input timing of the DFF 305, and integration is performed during the period when the en input is valid. To the res input of the DFF 305, a packet detection signal (FIG. 7B) that is valid at the time of packet detection is input, and the integrated value is cleared at the beginning of the packet.

  The integration interval is generated by the logical product of three signals. The first signal is a switching determination enable 1 signal, and is a signal that becomes valid at the timing when data of a certain symbol (M + 1th symbol Symm in FIG. 7B) is output from the FFT operation circuit. . The second signal is a switching determination enable 2 signal, and is a signal that becomes valid at a timing when a high frequency component (f128 to f255 in FIG. 7C) of the FFT output signal is output. The third signal is a switching signal output from the DFF 308.

  By taking these logical products, in the DFF 305, the switching signal is at a high level (mode in which oversampling and 256-point FFT is performed), and the high frequency components of the M + 1th symbol Symm are integrated, and the spectral components f128 to f255 are integrated. The square of the absolute value of is integrated.

  The comparator 307 compares the output of the DFF 305 with a value set in the switching noise level holding register 306 in advance. Here, a low level is output when the value of the DFF 305 is small (less than the set value), and a high level is output when it is large (greater than the set value). The value output from the comparison circuit 307 is taken into the DFF 308 at the next packet detection timing and output as a switching signal.

  With the above configuration, when the noise component (root mean square) of f128 to f255 is small, the switching signal becomes a low level and the Nyquist sampling is set to the 128-point FFT mode, and when it is large, the oversampling and the 256 FFT mode are set. In this embodiment, the switching signal is generated by using the mean square of the spectrum. However, the switching signal may be generated by another evaluation function such as the maximum value of the spectrum or the integrated value of the absolute value.

  Here, once the Nyquist sampling mode and the 128-point FFT mode are entered, the amount of noise on the high frequency side cannot be measured. For this reason, even when the amount of noise increases on the high frequency side as time elapses, it cannot be detected and the apparatus cannot return to the oversampling mode.

  Therefore, the configuration of FIG. 6 is configured to forcibly return to the oversampling mode after a predetermined time has elapsed after entering the Nyquist sampling and 128-point FFT mode.

  That is, in the Nyquist sampling mode, the counter 309 is incremented by the input of the packet detection signal, and the comparison circuit 311 compares with the reset period set in the reset period holding register 310 in advance. When the output value of the counter 309 becomes larger than the value held in the reset period holding register 310, the set input of the DFF 308 becomes valid, and the switching signal is forcibly set to the oversampling mode. Here, the return period is determined by elapse of a predetermined time (every fixed time), but other methods such as returning after detecting a packet a predetermined number of times may be used.

Example 2:
FIG. 8 shows a configuration of an OFDM signal receiver according to the second embodiment of the present invention. The difference from the first embodiment is that a spectrum recording register 113 is provided instead of the switching signal generator. The spectrum recording register 113 is added so that spectrum information output from the FFT operation circuit 109 can be referred to by a control unit (CPU) (not shown), thereby controlling the processing performed by the switching signal generation circuit 111. Can be executed in the department. In the second embodiment, when the switching signal generation timing is not short (an application that can be processed by the CPU processing capability), the same effect as the first embodiment can be obtained, and the circuit can be further reduced.

  FIG. 9 shows the configuration of the spectrum recording register. In FIG. 9, 401 is an AND circuit, 402 is a shift register in which 128 registers are serially connected, and 403 selects and outputs one of the outputs of each register constituting the shift register according to an address input. It is a selector to do. With this configuration, the high frequency side spectral component of the FFT output signal can be retained.

  FIG. 10 shows a flowchart of processing performed by a control unit (not shown). In step 501, the oversampling mode is set. In step 502, spectrum information is acquired in the spectrum recording register 113 in the oversampling mode. In step 503, the control unit (CPU) determines the mode based on the spectrum information as in the first embodiment. The switching signal is generated by executing the above-described processing at a certain time interval or when detecting the first packet of data transmission.

Example 3:
FIG. 11 shows a configuration of an OFDM signal receiver according to the third embodiment of the present invention. The difference from the first embodiment is that the switching signal is generated not from the output of the FFT operation circuit 109 but from the output of the error detection circuit 114. From the error detection circuit 114, the number of errors included in one block of error detection (correction) unit is detected (the description of the error detection circuit is omitted because it is used in conventional wireless communication).

  Therefore, in the third embodiment, data demodulation is performed once by Nyquist sampling + 128-point FFT operation, and a signal output from the switching signal generation circuit 111 is determined based on the number of errors output from the error detection circuit 114 at that time. To do.

  When the number of detected errors is less than the predetermined number of errors, the switching signal is generated by setting the switching signal to the Nyquist sampling + 128-point FFT operation mode, and conversely, the number of detected errors is the predetermined number of errors. When the number is larger than the number, the switching signal is switched so as to be in the oversampling + 256 point FFT operation mode.

  FIG. 12 illustrates a configuration of the switching signal generation circuit 111 according to the third embodiment. The switching signal generation circuit 111 includes an error threshold holding register 601 that holds an error threshold, and a comparator 602 that compares the number of errors from the error detection circuit with the threshold of the error threshold holding register 601. The output of the error detection circuit 114 may be stored in a register that can be referred to by a control unit (not shown), and the operation of the switching signal generation circuit 111 may be executed by the control unit.

  In the first and second embodiments, since the switching signal is generated based on the spectrum information output from the FFT operation circuit 109, there is a possibility that an incorrect switching signal is set. In contrast, in this embodiment, the switching signal is generated based on the error rate of the actually demodulated data, so that erroneous determination can be prevented.

Example 4:
FIG. 13 shows a configuration of an OFDM signal receiver according to the fourth embodiment of the present invention. In the fourth embodiment, the signal generation of the switching signal generation circuit 111 is determined from the output of the FFT operation circuit 109 (spectrum information of the input signal) and the output of the error detection circuit 114 (error rate).

  FIG. 14 illustrates a configuration of the switching signal generation circuit according to the fourth embodiment. The difference from the switching signal generation circuit shown in FIG. 6 (Embodiment 1) is that the output of the error detection circuit 114 is input to the set input of the DFF 308. Other than that, the configuration is the same.

  With the above configuration, when the sum of the squares of the spectrum components of fs / 2 to fs, which is the output of the FFT circuit 109, is smaller than the value of the switching noise level holding register 306, the output of the switching signal generation circuit 111 is The low level is set from the packet, and the Nyquist sampling mode is set. This state is maintained until an error is detected by the error detection circuit 114. When an error is detected, the switching signal level becomes high and the oversampling mode is set.

The overall operation of the fourth embodiment will be described. The output of the switching signal generation circuit 111 is
(1) When the current sampling mode is the oversampling mode,
(1-a) When the sum of the squares of the spectrum components of fs / 2 to fs, which is the output of the FFT circuit 109, is smaller than the value of the switching noise level holding register 306, the switching signal becomes low level, To Nyquist sampling mode.
(1-b) When the sum of the squares of the spectrum components fs / 2 to fs, which is the output of the FFT circuit 109, is larger than the value of the switching noise level holding register 306, the switching signal holds the high level. , Keep oversampling mode.
(2) When the current sampling mode is the Nyquist sampling mode,
(2-a) When the output of the error detection circuit 114 detects an error, the switching signal becomes high level, and the oversampling mode is set from the next packet.
(2-b) When the output of the error detection circuit 114 does not detect an error, the switching signal is held at a low level, and the Nyquist sampling mode is held.

  Thus, in this embodiment, since the oversampling mode is set after an error is actually detected, it is possible to execute signal processing without waste.

  In the above-described embodiments, two 128-point FFT operation circuits have been described. However, the present invention is not limited to this, and an FFT operation configured by combining a plurality of power-of-two FFT operation circuits. It may be a circuit. In this case, since the selection can be made in more detail with respect to the setting of the sampling rate and the number of DFT points, the number of points can be set more appropriately.

It is a figure for demonstrating oversampling. 1 shows a configuration of an OFDM signal receiver according to Embodiment 1 of the present invention. It is a figure for demonstrating aliasing (folding distortion). The structure of the FFT arithmetic circuit of a present Example is shown. The frequency spectrum example for demonstrating the mode switching of this invention is shown. 1 shows a configuration of a switching signal generation circuit. 2 shows a received signal format and an operation timing chart of a switching signal generation circuit. 2 shows a configuration of an OFDM signal receiver according to Embodiment 2 of the present invention. The structure of the register for spectrum recording is shown. 9 is a flowchart illustrating processing performed by the control unit according to the second embodiment. 7 shows a configuration of an OFDM signal receiver according to a third embodiment of the present invention. 4 shows a configuration of a switching signal generation circuit according to a third embodiment. 8 shows a configuration of an OFDM signal receiver according to Embodiment 4 of the present invention. The structure of the switching signal generation circuit of Example 4 is shown. 1 shows a conventional OFDM receiver.

Explanation of symbols

101, 102 Multiplier 103 Local oscillator 104 90 degree phase shift circuit 105, 106 Low pass filter (LPF)
107, 108 Analog / digital (A / D) converter 109 FFT operation circuit 110 Decoding circuit 111 Switching signal generation circuit 112 Frequency divider

Claims (13)

  An OFDM signal receiving method for receiving an orthogonal frequency division multiplexing (hereinafter referred to as OFDM) transmission signal using N (N is a positive integer) subcarriers, which is M times the sampling frequency fs indicated by the sampling theorem Sampling the OFDM signal at a sampling frequency (M × fs) (M is an integer of 2 or more), performing M × N-point discrete Fourier transform on the sampled signal, and the discrete Fourier transform Resetting the sampling frequency to L × fs (L is an integer of 1 or more and M or less) based on the result of, and setting the number of points of the discrete Fourier transform to L × N based on the result of the discrete Fourier transform An OFDM signal receiving method comprising the step of resetting.   In a mode in which the sampling frequency is reset to L × fs and the number of points of the discrete Fourier transform is reset to L × N, when a predetermined condition is satisfied, the sampling frequency is set to M × fs, 2. The OFDM signal receiving method according to claim 1, further comprising the step of forcibly returning the number of points of the discrete Fourier transform to M × N points.   3. The OFDM signal receiving method according to claim 2, wherein the predetermined condition is when a predetermined time has elapsed.   An OFDM signal receiving method for receiving an orthogonal frequency division multiplexing (hereinafter referred to as OFDM) transmission signal using N (N is a positive integer) subcarriers, wherein the OFDM is received at a sampling frequency fs indicated by a sampling theorem. Sampling a signal; performing N-point discrete Fourier transform on the sampled data; decoding the output of the discrete Fourier transform; detecting an error rate of the decoded data; Resetting the sampling frequency to M × fs (M is an integer of 2 or more) based on the result of the error rate, and resetting the number of points of the discrete Fourier transform to M × N based on the result of the error rate. An OFDM signal receiving method comprising the step of setting.   An OFDM signal receiving method for receiving an orthogonal frequency division multiplexing (hereinafter referred to as OFDM) transmission signal using N (N is a positive integer) subcarriers, which is M times the sampling frequency fs indicated by the sampling theorem Sampling the OFDM signal at a sampling frequency (M × fs) (M is an integer of 2 or more), performing M × N-point discrete Fourier transform on the sampled signal, and the discrete Fourier transform Resetting the sampling frequency to L × fs (L is an integer of 1 or more and M or less) based on the result of, and setting the number of points of the discrete Fourier transform to L × N based on the result of the discrete Fourier transform Resetting; decoding the output of the discrete Fourier transform; and resetting the sampling frequency to L × fs, In a state where the number of conversion points is reset to L × N, the step of detecting the error rate of the decoded data and the sampling frequency is reset to M × fs based on the result of the error rate of the decoded data. And an OFDM signal receiving method comprising: resetting the number of points of the discrete Fourier transform to M × N based on a result of an error rate of the decoded data.   The OFDM signal receiving method according to claim 1, wherein M is two.   Multiplication means for multiplying the received OFDM signal and the local oscillation signal, filter means for performing anti-aliasing on the signal output from the multiplication means, conversion means for converting the output of the filter means into a digital signal, and A first computing means for performing a discrete Fourier transform with a first number of points on the output of the converting means; a second computing means for performing a discrete Fourier transform with a second number of points on the output of the converting means; One of a determination means for determining the sampling rate of the conversion means based on the output of the second calculation means, and an output of the first and second calculation means based on the output of the determination means. An OFDM signal receiver comprising: selection means for selecting one of them for use in data demodulation, and stopping the operation of the calculation means not used for data demodulation.   Multiplication means for multiplying the received OFDM signal and the local oscillation signal, filter means for performing anti-aliasing on the signal output from the multiplication means, conversion means for converting the output of the filter means into a digital signal, and A first computing means for performing a discrete Fourier transform with a first number of points on the output of the converting means; a second computing means for performing a discrete Fourier transform with a second number of points on the output of the converting means; Storage means for storing the spectrum output of the second calculation means, determining the sampling rate of the conversion means based on the stored spectrum output, and the output of the first and second calculation means An OFDM signal, wherein one of them is selected to determine whether to use for data demodulation, and the operation of the arithmetic means not used for data demodulation is stopped. Receiver.   Multiplication means for multiplying the received OFDM signal and the local oscillation signal, filter means for performing anti-aliasing on the signal output from the multiplication means, conversion means for converting the output of the filter means into a digital signal, and A first computing means for performing a discrete Fourier transform with a first number of points on the output of the converting means; a second computing means for performing a discrete Fourier transform with a second number of points on the output of the converting means; A decoding means for decoding the output of the second computing means; a measuring means for measuring an error rate of decoded data from the decoding means; and a sampling rate of the converting means is determined based on the output of the measuring means. Determining means; and selecting means for selecting one of the outputs of the first and second computing means based on the output of the measuring means and using it for data demodulation, OFDM signal receiver, characterized by stopping the operation of the operation means is not used in the serial data demodulation.   Multiplication means for multiplying the received OFDM signal and the local oscillation signal, filter means for performing anti-aliasing on the signal output from the multiplication means, conversion means for converting the output of the filter means into a digital signal, and A first computing means for performing a discrete Fourier transform with a first number of points on the output of the converting means; a second computing means for performing a discrete Fourier transform with a second number of points on the output of the converting means; Based on the decoding means for decoding the output of the second calculating means, the measuring means for measuring the error rate of the decoded data from the decoding means, the output of the second calculating means and the output of the measuring means Of the outputs of the first and second calculation means based on the determination means for determining the sampling rate of the conversion means, the output of the second calculation means and the output of the measurement means, Choosing one with a selection means for use in data demodulation, OFDM signal receiver, characterized by stopping the operation of the operation means that is not used for the data demodulation.   Multiplication means for multiplying the received OFDM signal and the local oscillation signal, filter means for performing anti-aliasing on the signal output from the multiplication means, conversion means for converting the output of the filter means into a digital signal, and A first computing means for performing a discrete Fourier transform with a first number of points on the output of the converting means; a second computing means for performing a discrete Fourier transform with a second number of points on the output of the converting means; A selection unit that selects an output of the first calculation unit and an output of the second calculation unit; a decoding unit that decodes the output of the selection unit; and an error rate of data decoded by the decoding unit An error rate generation means; and a storage means for storing the output of the error rate generation means, and based on the output of the storage means, the outputs of the first and second calculation means, Re or one to select and decide whether to use the data demodulation, OFDM signal receiver, characterized by stopping the operation of the operation means that is not used for the data demodulation.   The OFDM signal receiver according to any one of claims 7 to 11, wherein the second number of points is greater than the first number of points.   The second calculation means comprises a plurality of first calculation means, and is a calculation means capable of switching between a first point output and a second point output by an output selection signal. The OFDM signal receiver according to any one of 7 to 11.

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