JP2007298322A - Probe card - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a probe card capable of suppressing deformation of a silicon substrate.
A contact substrate 3 for holding a contact probe 4 is formed by cutting out a (111) plane orientation with a relatively high Young's modulus. In this way, by using as the contact substrate 3 a silicon substrate cut out with a (111) surface orientation having a higher Young's modulus than when the surface orientation is (100), the deformation of the contact substrate 3 is reduced and deformation is suppressed. can do.
[Selection] Figure 1

Description

  The present invention relates to a probe card, and more particularly to an improvement of a silicon substrate that holds an electrical contact.

There is known a probe card for electrically connecting a contact probe to an electrode to be inspected such as a semiconductor wafer to inspect the electrical characteristics of the object to be inspected (for example, Patent Document 1). As the substrate for holding the contact probe, for example, a silicon substrate formed in a thin plate shape is used. By using the silicon substrate, the coefficient of thermal expansion can be matched with the object to be inspected, so that the contact position between the object to be inspected and the contact probe can be prevented from shifting.
JP 2000-321302 A

  However, when a thin silicon substrate is used as the substrate for holding the contact probe, there is a problem that the strength is lowered and the substrate is easily deformed. In order to improve the strength of the silicon substrate, it may be possible to attach a reinforcing plate to the surface of the silicon substrate. However, if a thick reinforcing plate is attached, the difference in thermal expansion coefficient between the reinforcing plate and the silicon substrate Based on this, there is a problem that when the silicon substrate is used at a high temperature, stress is generated in the silicon substrate and the silicon substrate is deformed.

  As a result of trial and error, the inventor of the present application has focused on the plane orientation of the silicon substrate. The substrate surface of a silicon substrate used for a probe card is generally cut out with a (100) plane orientation. If the silicon substrate is cut out in an appropriate plane orientation, it becomes possible to improve the strength of the silicon substrate and suppress deformation, and the reinforcing plate can be made thin or omitted, so when attaching a thick reinforcing plate Thus, the problem of the thermal expansion coefficient can be prevented.

  In the probe card disclosed in Patent Document 1, a very thin single crystal layer of about 6 μm made of silicon is formed on the surface of the substrate, and the plane orientation is (111). It is difficult to suppress the deformation of the substrate even if the surface of such a very thin silicon film is set to the (111) plane orientation.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a probe card that can suppress deformation of a silicon substrate.

  The probe card according to the first aspect of the present invention is configured by arranging an electrical contact capable of contacting an electrode to be inspected on a silicon substrate cut out in the (111) plane orientation.

  With such a configuration, the silicon substrate holding the electrical contact can be cut out with a (111) plane orientation with a relatively high Young's modulus. Thus, by cutting out the silicon substrate with the (111) surface orientation having a higher Young's modulus than when the surface orientation is (100), the strength of the silicon substrate can be improved and deformation can be suppressed. If the strength of the silicon substrate is improved, the reinforcing plate can be made thin or can be omitted, so that the problem of thermal expansion as in the case of attaching a thick reinforcing plate can be prevented.

  In the probe card according to the second aspect of the present invention, a multilayer wiring in which a plurality of wirings are stacked with an insulating film interposed therebetween is formed on the substrate surface of the silicon substrate, and the electrical contact is electrically connected to the multilayer wiring. It is connected to the.

  With such a configuration, deformation of the silicon substrate in which the multilayer wiring is formed on the substrate surface can be suppressed. That is, in the configuration in which the multilayer wiring is formed on the substrate surface, stress is generated in the silicon substrate and the silicon substrate is easily deformed, but the Young's modulus is higher than the case where the surface orientation is (100) as in the present invention ( By cutting out the silicon substrate with the (111) plane orientation, deformation of the silicon substrate can be effectively suppressed.

  According to the present invention, by cutting a silicon substrate with a (111) plane orientation having a higher Young's modulus than when the plane orientation is (100), it is possible to improve the strength of the silicon substrate and suppress deformation. In the case where the multilayer wiring is formed on the substrate surface, stress is generated in the silicon substrate, and the silicon substrate is easily deformed. Therefore, the (111) surface having a higher Young's modulus than the surface orientation of (100). By cutting the silicon substrate in the orientation, deformation of the silicon substrate can be effectively suppressed.

  FIG. 1 is a view showing an example of a probe card 1 according to an embodiment of the present invention. FIG. 1A is a side view showing a state before contact with a silicon wafer 2 as an object to be inspected. ) Shows a cross-sectional view of the contact substrate 3. The probe card 1 includes a contact substrate 3 made of a thin silicon substrate formed in a flat plate shape, and a contact probe 4 as an electric contactor is held on a lower surface 31 of the contact substrate 3.

  The lower surface 31 and the upper surface 32 of the contact substrate 3 are flat substrate surfaces, and the multilayer wiring 33 is formed on the lower surface 31. Specifically, two or more layers of wirings are stacked on the lower surface 31 of the contact substrate 3 at a predetermined interval, and an insulating film is formed between the wirings of each layer, so that the multilayer wiring 33 is formed on the lower surface 31. Is formed. On the upper surface 32 of the contact substrate 3, a plate-like warpage suppressing member 34 for suppressing warpage of the contact substrate 3 is formed.

  A probe support plate 37 is attached to the lower surface 31 of the contact substrate 3, and a large number of contact probes 4 are cantilevered at the center of the lower surface of the probe support plate 37. A large number of contact probes 4 are arranged in two rows, and the contact probes 4 in each row are aligned at regular intervals along the front-rear direction in FIG. Each contact probe 4 is electrically connected to a multilayer wiring 33 formed on the lower surface 31 of the contact substrate 3.

  A large number of electrode pads 35 corresponding to each contact probe 4 are formed on the peripheral edge of the lower surface of the contact support plate 37. These electrode pads 35 are electrically connected to the contact probes 4 via the multilayer wiring 33. Thereby, the multilayer wiring 33 plays a role of drawing the wiring from the contact probe 4 in order to secure a region where the electrode pad 35 is disposed.

  Above the contact substrate 3, a glass epoxy main substrate 6 is disposed so as to face the contact substrate 3 at a predetermined interval. The main substrate 6 holds the contact substrate 3 so as to be movable up and down. Has been. A plate-shaped reinforcing plate 61 is formed on the upper surface of the main substrate 6. As an example of wiring for electrically connecting the contact substrate 4 and the main substrate 6, one end portions of a plurality of flexible substrates 7 are attached to the lower surface of the multilayer wiring 33. The other end of each flexible substrate 7 is attached to the lower surface of the main substrate 6.

  The wiring of each flexible substrate 7 is connected to the corresponding electrode pad 35 by so-called wire bonding. Thereby, each contact probe 4 is electrically connected to the main substrate 6 via the multilayer wiring 33, the electrode pad 35, and the flexible substrate 7. Therefore, by attaching the main board 6 to a tester device (not shown), the tester device and each contact probe 4 can be electrically connected.

  At the time of inspection, the silicon wafer 2 is placed on the movable table 5 with the surface on which the electrode 21 of the semiconductor integrated circuit is formed facing up. Then, the movable table 5 is moved or rotated in a horizontal plane to align the contact probe 4 and the silicon wafer 2, and then the movable table 5 is raised to bring the contact probe 4 into contact with the silicon wafer 2. At this time, only a part of the contact probes 4 is in contact with the electrode 21 due to a difference in height of the electrode 21 formed on the silicon wafer 2. Thereafter, the contact probe 4 is further pressed to perform so-called overdrive. With all the contact probes 4 in contact with the electrodes 21 of the silicon wafer 2, the electrical characteristics of the integrated circuit are inspected by the tester device. Done.

  2A and 2B are diagrams for explaining the crystal structure of silicon, in which FIG. 2A is a perspective view showing the crystal structure of silicon, and FIG. 2B is a surface having a (111) plane orientation in a cubic lattice. FIG. In FIG. 2B, <100>, <010>, <001>, <110>, and <111> each represent an orientation with the origin of the XYZ coordinate system as a base point, and a plane orientation The (111) plane is shown with hatching.

  As shown in FIG. 2A, the crystal structure of silicon is a so-called diamond structure, and the number of nearest neighbor atoms is 4 and the number of second neighbor atoms is 12. A silicon single crystal having such a crystal structure is immersed in a silicon solution as a seed crystal, and the plane orientation of the silicon single crystal is pulled up to the <111> orientation which is the normal direction of the plane that becomes (111). An ingot is manufactured by the method (Czochralski method). If the cylindrical ingot manufactured in this way is sliced in a direction orthogonal to the axial direction, a silicon substrate cut out in the (111) plane orientation is obtained as shown in FIG. Can do.

  In the present embodiment, a silicon substrate having a (111) cut surface formed as described above is used as the contact substrate 3. Thereby, the surface orientations of the lower surface 31 and the upper surface 32 of the contact substrate 3 are respectively (111). The contact substrate 3 formed in this way is mainly made of silicon single crystal, and the surface orientations of the lower surface 31 and the upper surface 32 which are the surfaces of the contact substrate 3 itself are (111). The multilayer wiring 33 is formed on the lower surface 31 of the contact substrate 3 and the warp suppressing member 34 is formed on the upper surface 32, whereby a substrate surface having a (111) surface orientation is formed inside the probe card 1.

  Here, the Young's modulus of a silicon material having a surface with a (100) plane orientation is 131 GPa, whereas the Young's modulus of a silicon material having a surface with a (111) plane orientation is 188 GPa. The Young's modulus is higher in the case of (111) than in the case of (100). Since a material having a higher Young's modulus is harder and more difficult to bend, using a silicon substrate cut out in the (111) plane orientation as the contact substrate 3 can improve the strength of the contact substrate 3 and suppress deformation. When the contact substrate 3 having improved strength is used as described above, the warp suppressing member 34 can be made thinner than when a silicon substrate having a (100) plane orientation is used. It is possible to prevent the problem of the coefficient of thermal expansion as in the case of attaching the. However, the warp suppressing member 34 may be omitted.

  Further, in the configuration in which the multilayer wiring 33 is formed on the substrate surface 31 of the contact substrate 3 as in this embodiment, the contact substrate 3 is easily deformed due to stress, but the surface orientation is (100 ), The deformation of the contact substrate 3 can be effectively suppressed by using, as the contact substrate 3, a silicon substrate cut out in the (111) plane orientation having a higher Young's modulus than in the case of the above.

  In the present embodiment, the configuration in which the contact probe 4 is held on the lower surface 31 of the contact substrate 3 via the multilayer wiring 33 has been described. However, the present invention is not limited to this configuration. The configuration may be such that 4 is directly attached.

  In FIG. 1, the configuration in which the probe card 1 is in contact with the silicon wafer 2 from above has been described. However, the probe card 1 is in a state where the substrate surface on which the contact probe 4 is formed faces upward. It can also be used in a state where the top and bottom are reversed with respect to FIG.

  Further, in the present embodiment, the case where the probe card 1 is brought into contact with the silicon wafer 2 as an example of the object to be inspected has been described. However, the probe card 1 is not limited to the semiconductor integrated circuit such as the silicon wafer 2 and the like. It is also possible to use it in contact with the electrodes of the semiconductor device.

BRIEF DESCRIPTION OF THE DRAWINGS It is the figure which showed an example of the probe card 1 by embodiment of this invention, (a) is the side view which showed the state before contact with the silicon wafer 2 as a to-be-inspected object, (b) is a contact board | substrate. 3 is a cross-sectional view. It is a figure for demonstrating the crystal structure of silicon, (a) is the perspective view which showed the crystal structure of silicon, (b) is the figure showing the surface whose surface orientation is (111) in a cubic lattice. It is.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Probe card 2 Silicon wafer 3 Contact substrate 4 Contact probe 5 Movable table 6 Main substrate 7 Flexible substrate 21 Electrode 31 Lower surface 32 Upper surface 33 Multilayer wiring 34 Warpage suppression member 35 Electrode pad 37 Probe support plate 61 Reinforcement plate

Claims (2)

  An electrical contact that can contact an electrode to be inspected is arranged on a silicon substrate cut out in a (111) plane orientation. On the substrate surface of the silicon substrate, a multilayer wiring in which a plurality of wirings are stacked with an insulating film interposed therebetween is formed,
The probe card according to claim 1, wherein the electrical contact is electrically connected to the multilayer wiring.

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