JP2007281691A - Power amplifier - Google Patents

Abstract

A power amplifier capable of reducing the frequency dependence of power load efficiency is provided.
A bipolar transistor that amplifies an input signal, a third-order harmonic suppression circuit that suppresses a third-order harmonic contained in an amplified signal that is an output of the bipolar transistor, and an amplification that is an output of the bipolar transistor. A second harmonic suppression circuit 107 that suppresses the second harmonic contained in the signal, and the third harmonic suppression circuit 106 is a PN diode that includes a base layer 305 and an emitter layer 304 that constitute the bipolar transistor 105. 309, and a variable reverse voltage is applied to the PN diode 309.
[Selection] Figure 3

Description

  The present invention relates to a power amplifier, and more particularly to a circuit technology of a semiconductor power amplifier used for a signal transmission unit of a wireless portable terminal using a high frequency band mainly for a cellular phone.

  In recent years, cellular phones have become wider due to the lack of frequency bands. Accordingly, power amplifiers used in mobile phones are required to improve power load efficiency, which is a main characteristic, over a wide band.

The power load efficiency is largely influenced mainly by the output circuit of the power amplifier. In the output circuit, since the final stage semiconductor amplifying element in the circuit performs a non-linear operation when the output is high, a harmonic processing circuit that is a non-linear component generated in the semiconductor amplifying element is important. In particular, processing circuits for the second harmonic and the third harmonic, which are main harmonics, are important. Generally, a technique is used in which a resonance circuit having a resonance frequency set to a harmonic frequency is configured, and the resonance circuit is provided in the output circuit as a harmonic processing circuit. In this technique, a harmonic output level is suppressed by short-circuiting or opening a target harmonic by a resonance circuit (see, for example, Patent Document 1).
JP 2000-260783 A

  However, as the fundamental frequency becomes wider, the harmonic bandwidth is twice that of the fundamental frequency for the second harmonic and is three times the bandwidth of the fundamental frequency for the third harmonic. Therefore, suppression of harmonics becomes difficult.

  In particular, the third harmonic has a correlation with the power load efficiency, which is the main performance of the power amplifier, and the power load efficiency tends to increase as the suppression level of the third harmonic becomes good. Therefore, in the output circuit in which the resonance frequency of the resonance circuit is fixed to a certain harmonic frequency, the suppression level of the third harmonic varies depending on the frequency as the fundamental frequency becomes wider. There is a problem that the dependency becomes large.

  In view of the above problems, an object of the present invention is to provide a power amplifier capable of reducing the frequency dependency of power load efficiency.

  The present invention is to achieve the above object, and includes a bipolar transistor that amplifies an input signal and a first suppression circuit that suppresses a first harmonic contained in an amplified signal that is an output of the bipolar transistor. The first suppression circuit has a PN diode composed of a p-type semiconductor layer and an n-type semiconductor layer constituting the bipolar transistor, and a variable reverse voltage is applied to the PN diode. It is characterized by.

  Here, the power amplifier further includes a second suppression circuit that suppresses a second harmonic included in the amplified signal, and the distance between the first suppression circuit and the bipolar transistor is the second suppression circuit. It may be shorter than the distance between the circuit and the bipolar transistor. The PN diode may be composed of a p-type base layer and an n-type emitter layer of the bipolar transistor.

  Thereby, a resonant circuit is constituted by the PN diode, and the capacitance value of the PN junction capacitance of the PN diode is changed by changing the reverse voltage applied to the PN diode together with the change of the fundamental frequency of the input signal for power amplification. Since the resonance frequency of the resonance circuit changes, the frequency dependence of the power load efficiency can be reduced. As a result, the frequency characteristic of the output level in the power amplifier can be reduced. Further, since the capacitance of the resonance circuit is formed by the PN diode formed in the bipolar transistor, the area of the resonance circuit is reduced, and the power amplifier can be miniaturized.

  In addition, the first suppression circuit may include a resonance circuit that includes the PN diode and resonates at a frequency of the third harmonic as the first harmonic. Further, the resonance circuit may be connected to the bipolar transistor, and the first harmonic may be short-circuited to the ground.

  Since a diode is a non-linear device and causes distortion of a circuit, it is necessary to consider that point in use. For example, when a PN diode is used in a resonance circuit that suppresses the fundamental frequency and the second harmonic, since the signal power is large, a distortion component is easily generated, which causes distortion of the output signal. However, since the PN diode is used in a resonance circuit that suppresses the third harmonic with a small output, and the influence on the distortion of the PN diode is reduced, no distortion occurs and the output signal is not affected.

  The first suppression circuit may include an inductor element, and may form a resonance circuit that resonates at a third harmonic frequency by combining the PN diode and the inductor element.

  Further, a series resonance circuit of the PN diode and the inductor element may be connected to the bipolar transistor, or a parallel resonance circuit of the PN diode and the inductor element may be connected in series to the bipolar transistor. .

  According to the present invention, power load efficiency can be maintained high in a wide band. Therefore, even a power amplifier designed in one basic frequency band can be used in a wide band frequency by using the technique of the present invention, and can flexibly cope with an increase in frequency band.

  Hereinafter, power amplifiers according to embodiments of the present invention will be described with reference to the drawings.

  The output circuit of the power amplifier includes a GaAs-based bipolar transistor using GaAs, which is the most commonly used compound semiconductor, as a semiconductor constituting a power amplifier for a mobile phone. The applicable frequency band of the output circuit can be applied to any frequency, but here, a case where the fundamental frequency to be used is 1.7 GHz to 2 GHz will be described.

  FIG. 1 is a cross-sectional view showing the structure of a GaAs bipolar transistor 105 of the same output circuit.

  As shown in FIG. 1, the bipolar transistor 105 includes a sub-collector layer 307 made of an n-type semiconductor, a collector layer 306 made of an n-type semiconductor, and a p-type semiconductor on a semi-insulating semiconductor substrate (GaAs substrate) 308. The base layer 305 made of and the emitter layer 304 made of an n-type semiconductor are sequentially epitaxially grown. On the emitter layer 304, the base layer 305, and the subcollector layer 307, an emitter electrode 301, a base electrode 302, and a collector electrode 303, which are ohmic contact electrodes, are formed. In this structure, a PN diode 309 is formed by an emitter electrode 301, a base electrode 302, an emitter layer 304 made of an n-type semiconductor, and a base layer 305 made of a p-type semiconductor. The PN diode 309 is particularly a part related to the present invention.

  FIG. 2 shows the correlation characteristics between the reverse voltage applied to the PN diode 309 and the capacitance value. In FIG. 2, the voltage on the horizontal axis is the potential of the emitter layer 304 as an n-type layer with respect to the base layer 305 as a p-type layer.

From FIG. 2, the PN diode 309 has a capacitance value of 2.4 pF when the contact area of the emitter layer 304 with the base layer 305 is 240 μm ² and the reverse voltage is −0.9 V. When the directional voltage is +1.2 V, it can be seen that the device has a characteristic having a capacitance value of 1.8 pF. This capacitance value can be varied by the contact area of the emitter layer 304 and the applied voltage, and is adjusted by the frequency used.

  Next, an output circuit using the PN diode 309 will be described.

  FIG. 3 is a circuit diagram showing a configuration of the output circuit.

  The output matching circuit of this output circuit has a circuit configuration similar to that of a general output matching circuit except that a PN diode 309 is used for the third harmonic suppression circuit 106. In the output matching circuit, from the output terminal 111 side of the output circuit, a second-order harmonic suppression circuit 107 composed of a series capacitor 110, a shunt capacitor 109, a resonance inductor 107A and a resonance capacitor 108B in series. The series inductor 108 and the third harmonic suppression circuit 106 are connected. The connection position of the second harmonic suppression circuit 107 as a shunt circuit is not limited to this.

  The collector of the bipolar transistor 105 is connected to a collector voltage (power supply voltage) 102 that supplies a power supply voltage Vcc through a power supply inductor 103 and is connected to the output matching circuit. The base of the bipolar transistor 105 is connected to the base voltage 104 and to the input terminal 101 of the output circuit. A signal from the driver stage is input to the input terminal 101.

  In this case, since the base voltage 104 is generally given by the output of the bias circuit, it is actually more complicated. The collector voltage 102 for supplying the collector power of the bipolar transistor 105 and the power supply inductor 103 are outside the output circuit. Hereinafter, a case where the power supply voltage Vcc is 3.5V is considered.

  The third harmonic suppression circuit 106 is provided as a shunt circuit, and suppresses the third harmonic included in the amplified signal that is an output signal from the bipolar transistor 105. The third-order harmonic suppression circuit 106 resonates at the third-order harmonic frequency, and controls to supply a series resonance circuit of a PN diode 309 and an inductor 106A that short-circuits the third-order harmonic to the ground, and a variable voltage value Vcont. A voltage 106D, a choke coil 106C, and a DC cut capacitor 106E having a control voltage 106D are included. In the third harmonic suppression circuit 106, the PN diode 309 is connected to the collector of the bipolar transistor 105 via the inductor 106A and functions as a capacitor. The control voltage 106D applies a reverse voltage to the PN diode 309 via the choke coil 106C.

  At this time, the inductor portion described above may be configured by a microstrip line and a strip line which are distributed constant circuits. The control voltage 106D may be shared with the collector voltage 102 of the bipolar transistor 105, or a series DC cut capacitor and a shunt choke coil are provided between the inductor 106A and the PN diode 309 and supplied from the outside. May be.

  A semiconductor integrated circuit 112 is configured by the input terminal 101, the bipolar transistor 105, the base voltage 104, and the PN diode 309.

  The output circuit is characterized in that a PN diode 309 is also formed in the semiconductor integrated circuit 112 in which the bipolar transistor 105 is formed, and the junction capacitance of the PN diode 309 is connected to the bipolar transistor 105 in the suppression circuit of the output matching circuit. It is to be used as the capacity of the third harmonic suppression circuit 106 having the shortest distance.

  The resonance frequency of the resonance circuit in the third harmonic suppression circuit 106 is designed to be three times the fundamental frequency. That is, when the fundamental frequency is 1.7 GHz, the inductor 106A of the third harmonic suppression circuit 106 is set to 0.7 nH, and the voltage value Vcont of the control voltage 106D is set to 2.6V. As a result, the value of the reverse voltage applied to the PN diode 309 is −0.9 V, and the value of the junction capacitance of the PN diode 309 is 2.4 pF, so that the resonance of the resonance circuit in the third harmonic suppression circuit 106 is achieved. The frequency is 5.1 GHz, which is three times the fundamental frequency 1.7 GHz. Further, when the fundamental frequency is 2 GHz, the inductor 106A is set to 0.7 nH, and the voltage value Vcont of the control voltage 106D is set to 4.7V. As a result, the value of the reverse voltage applied to the PN diode 309 is +1.2 V, and the value of the junction capacitance of the PN diode 309 is 1.8 pF. Therefore, the resonance frequency of the resonance circuit in the third harmonic suppression circuit 106 Is a resonance frequency of 6 GHz, which is three times the basic frequency of 2 GHz.

  FIG. 4 shows the third harmonic transmission characteristics (curves 41, 43) indicating the suppression level of the third harmonic in the output circuit, and the power load efficiency (curves 42, 43) at the fundamental frequency at which the third harmonic is generated. 44). In FIG. 4, the values on the horizontal axes of the curves 42 and 44 are considered to be the fundamental frequency corresponding to the frequency of the third harmonic, that is, one third of the value on the horizontal axis shown in FIG. FIG. 4A shows the case where the power supply voltage Vcc of the collector voltage 102 is 3.5V and the voltage value Vcont of the control voltage 106D is 2.6V. FIG. 4B shows the case where the power supply voltage Vcc of the collector voltage 102 is 3.5V and the voltage value Vcont of the control voltage 106D is 4.7V.

  In FIG. 4A, the suppression level is good (the output level is low) when the frequency of the third harmonic is 5.1 GHz, as shown by the pass characteristic of the third harmonic (curve 41). The power load efficiency (curve 42) is the highest at 1.7 GHz, which is 1/3 of 5.1 GHz. However, when the frequency of the third harmonic is 6 GHz, the suppression level is poor, and accordingly, it is deteriorated by about 5% as compared with the case where the power load efficiency is 1.7 GHz at 2 GHz which is 1/3 of 6 GHz. ing. Thus, in a non-dynamic suppression circuit in which a normal resonance frequency is fixed, the frequency characteristic of the suppression level of the third harmonic is large.

  However, as shown in FIG. 4B, if the voltage value Vcont of the control voltage 106D is changed to 4.7V, this time, as shown in FIG. The suppression level when the frequency of the third harmonic is 6 GHz is improved. As a result, the power load efficiency (curve 44) at 2 GHz, which is 1/3 of 6 GHz, is improved by about 5% from the power load efficiency (curve 42) of FIG. 4A, and the power load efficiency (curve 42). The value is equivalent to that at 1.7 GHz.

  As described above, according to the power amplifier of the present embodiment, in the output circuit, the voltage value Vcont of the control voltage 106D is changed, and the resonance frequency of the resonance circuit in the third harmonic suppression circuit 106 is changed. Therefore, even if the fundamental frequency changes, the suppression level of the third harmonic can be kept low and constant by changing the resonance frequency of the resonance circuit in the third harmonic suppression circuit 106. As a result, the power amplifier can be operated while maintaining high power load efficiency.

  In addition, according to the power amplifier of the present embodiment, the capacitance of the third harmonic suppression circuit 106 that suppresses the third harmonic with a small output is configured by the PN diode 309 in the output circuit. As described in the section of the means for solving the problem, the diode is a non-linear device. However, in the power amplifier according to the present embodiment, the diode is used for a suppression circuit that suppresses a third harmonic having a small output. There is no effect on the distortion of the output signal.

  Further, according to the power amplifier of the present embodiment, the capacitance of the third harmonic suppression circuit 106 is configured by the PN diode 309 formed in the bipolar transistor 105 in the output circuit. Therefore, the area of the output circuit is reduced, so that the power amplifier can be reduced in size.

  Although the power amplifier of the present invention has been described based on the embodiment, the present invention is not limited to this embodiment. The present invention includes various modifications made by those skilled in the art without departing from the scope of the present invention.

  For example, in the power amplifier of the above embodiment, the voltage value of the control voltage is assumed to be a binary value of 4.7V and 2.6V in the output circuit. However, several kinds of voltage values of the control voltage may be provided so that they can be set more finely. By changing the voltage value of the control voltage in conjunction with the fluctuation of the fundamental frequency, the resonance frequency of the resonance circuit in the third harmonic suppression circuit can be changed, and the power load efficiency can be optimized according to each fundamental frequency. it can.

  In the power amplifier of the above embodiment, the bipolar transistor is a single-stage power amplifier, but it may be a multi-stage power amplifier using a plurality of bipolar transistors. At this time, the junction capacitance of the PN diode formed in the bipolar transistor is used as the capacitance of the suppression circuit having the shortest distance from the last-stage bipolar transistor.

  In the power amplifier of the above embodiment, the pass characteristic of the third harmonic in the output circuit is assumed to have minimum values at 5.1 GHz and 6 GHz, which are three times the fundamental frequency. However, when the fundamental frequency is f, the present invention is not limited to this as long as the local frequency has a minimum value within the frequency range of 3 × f−50 MHz to 3 × f + 50 MHz.

  The power amplifier of the above embodiment further includes a monitoring unit that monitors the change in the fundamental frequency, and a voltage control unit that changes the voltage value of the control voltage based on the monitoring result of the monitoring unit, and automatically The resonance frequency of the third harmonic suppression circuit may be optimized.

  The present invention can be used for a power amplifier, and in particular, for a signal transmission unit of a wireless portable terminal such as a cellular phone.

It is sectional drawing which shows the structure of the GaAs type bipolar transistor in the output circuit of the power amplifier which concerns on embodiment of this invention. It is a figure which shows the correlation characteristic of the reverse voltage applied to the PN diode in the output circuit, and a capacitance value. It is a circuit diagram which shows the structure of the output circuit. It is a figure which shows the relationship between the passage characteristic of the 3rd harmonic in the output circuit, and electric power load efficiency.

Explanation of symbols

101 Input terminal 102 Collector voltage (power supply voltage)
DESCRIPTION OF SYMBOLS 103 Power supply inductor 104 Base voltage 105 Bipolar transistor 106 3rd harmonic suppression circuit 106A Inductor 106C Choke coil 106D Control voltage 106E DC cut capacity 107 2nd harmonic suppression circuit 107A Resonance inductor 108 Series inductor 108B Resonance capacity 109 Shunt capacity 110 Series Capacitor 111 Output Terminal 112 Semiconductor Integrated Circuit 301 Emitter Electrode 302 Base Electrode 303 Collector Electrode 304 Emitter Layer 305 Base Layer 306 Collector Layer 307 Subcollector Layer 308 Semiconductor Substrate 309 PN Diode

Claims (5)

A bipolar transistor for amplifying the input signal;
A first suppression circuit that suppresses a first harmonic contained in an amplified signal that is an output of the bipolar transistor;
The first suppression circuit has a PN diode composed of a p-type semiconductor layer and an n-type semiconductor layer constituting the bipolar transistor,
A power amplifier, wherein a variable reverse voltage is applied to the PN diode. 2. The power amplifier according to claim 1, wherein the first suppression circuit includes a resonance circuit that includes the PN diode and resonates at a frequency of a third harmonic as the first harmonic. The power amplifier according to claim 2, wherein the resonant circuit is connected to the bipolar transistor and short-circuits the first harmonic. The power amplifier further includes a second suppression circuit that suppresses a second harmonic included in the amplified signal,
The distance between the first suppression circuit and the bipolar transistor is shorter than the distance between the second suppression circuit and the bipolar transistor. Power amplifier. The power amplifier according to any one of claims 1 to 4, wherein the PN diode includes a p-type base layer and an n-type emitter layer of the bipolar transistor.

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