JP2007114662A - Liquid crystal display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve reliability and to achieve a narrow frame or higher yield in a liquid crystal display device in which a common potential is supplied from a first substrate side to a second substrate side. <P>SOLUTION: The first substrate 10 and the second substrate 20 are stuck with a sealing resin 30 that is applied in a sealing region outside the region where a common potential line COM1 is formed. The sealing resin 30 contains spacer particles 31. A transparent electrode pad 16 formed in the first substrate 10 side as separated from the common potential line COM1 is connected to the common potential line COM1 through a contact hole H1, and is extended to be partially superposed on a vertical driving circuit 102 above a flattening film 15. Conductive particles 41 are disposed between the transparent electrode pad 16 above the flattening film 15 and a counter electrode 21 to electrically connect these electrodes. This configuration results in improvement in the reliability of the liquid crystal display device and reduction in the device frame size. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a liquid crystal display device, and in particular, a liquid crystal display device having a connection structure for electrically connecting a counter electrode pad portion formed on a TFT substrate and a counter electrode formed on a CF substrate facing the TFT substrate. About.

  Conventionally, in an active matrix liquid crystal display device, a TFT substrate on which a TFT (Thin Film Transistor) is formed and a CF substrate on which a counter electrode and a color filter are formed are bonded via a seal resin. . Liquid crystal is sealed in a space surrounded by the TFT substrate, the CF substrate, and the sealing resin. Although it is necessary to apply a common potential Vcom (counter electrode potential) to the counter electrode, since there is no terminal portion on the CF substrate side, the common potential Vcom cannot be supplied from the CF substrate side to the counter electrode.

  Therefore, a counter electrode pad portion composed of an electrode connected to a common potential line to which a common potential Vcom is supplied is formed on the end portion of the TFT substrate, and the counter electrode pad portion and the counter electrode are mixed with an organic resin. Electrical connection was made through the particles.

  Next, a conventional liquid crystal display device having a counter electrode pad portion will be described with reference to the drawings. FIG. 4 is a plan view of a liquid crystal display device according to a conventional example. FIG. 5 is a cross-sectional view taken along line YY of FIG.

  As shown in FIG. 4, a pixel region 101 including a plurality of display pixels (not shown) arranged in a matrix is arranged at a substantially central position on the first substrate 10 which is a TFT substrate. On the first substrate 10 around the pixel region 101, drive circuits such as a vertical drive circuit 102 and a horizontal drive circuit 103 connected to each display pixel via scanning lines and data lines (not shown) are arranged. ing. Further, four counter electrode pad portions 104 are arranged on the frame of the first substrate 10 (that is, the region of the end portion of the first substrate 10 where the pixel region 101 is not formed).

  As will be described later, each counter electrode pad 104 is configured to be connected to the counter electrode 21 of the second substrate 20 which is a CF substrate. The counter electrode pads 104 are connected to each other by a common potential line COM2. The common potential line COM2 is connected to one terminal 105A in the terminal portion 105 disposed adjacent to the pixel region 101. Yes. Therefore, if the common potential Vcom is applied to the terminal 105A, the common potential Vcom can be supplied to the counter electrode 21 of the second substrate 20 via the counter electrode pad 104.

  Next, details of the counter electrode pad unit 104 will be described. As shown in FIG. 5, an electrode 104 </ b> E connected to the common potential line COM <b> 2 is formed on the first substrate 10 via a buffer film 11 and a gate insulating film 13 (not shown). An interlayer insulating film 14 and a planarizing film 15 are formed so as to cover the electrode 104E and the vertical drive circuit 102. Further, a transparent electrode pad 116 made of, for example, ITO (Indium Tin Oxide) connected to the electrode 104E is formed through a contact hole H2 opened in the interlayer insulating film 14 and the planarizing film 15.

  Here, in the seal region provided in the region where the transparent electrode pad 116 is not formed on the first and second substrates 10 and 20, the seal resin 130 including the spacer particles 118 for adhering both substrates is provided. The liquid crystal LC is sealed in the inner space. An organic resin 140 containing conductive particles 119 is formed in a region where the transparent electrode pad 116 and the counter electrode 21 overlap. The transparent electrode pad 116 and the counter electrode 21 are electrically connected via the conductive particles 119 present in the contact hole H2.

This type of liquid crystal display device is described in Patent Document 1.
JP 2002-229058 A

  However, in the liquid crystal display device, the counter electrode pad 104 and the region where the seal resin 130 is formed (that is, the seal region of the first and second substrates 10 and 20) are in different regions without overlapping in a plane. Had been placed. Therefore, since it is necessary to provide a wide frame of the first substrate 10, so-called narrowing of the frame has been hindered.

  In addition, the conductive particles 119 on the transparent electrode pad 116 in the contact hole H2 have a particle size that protrudes from the opening of the contact hole H2. That is, the particle size is significantly larger than the particle size of the spacer particles in the seal region. Therefore, when the conductive particles 119 run on the transparent pad electrode 116 outside the contact hole H2, the gap between the planarization film 15 and the counter electrode 21 increases in the seal region or the like, and the transparent electrode pad 116 and the counter electrode 21 In some cases, poor connection occurred.

  Further, since the end portion of the transparent electrode pad 116 is exposed, moisture from the outside reaches the vicinity of the junction between the electrode 104E and the transparent electrode pad 116 via the interlayer insulating film 14 and the planarizing film 15, There has been a problem that the electrode 104E or the transparent electrode pad 116 is corroded. As a result, the reliability of the liquid crystal display device has been reduced.

  Accordingly, the present invention is intended to improve the reliability of a liquid crystal display device and to narrow the frame or improve the yield.

  The present invention is a liquid crystal display device in which a liquid crystal is sealed between a first substrate and a second substrate, and a pixel region including a plurality of display pixels arranged on the first substrate; A common potential line is formed around the pixel region to which a common potential is supplied, an insulating film that covers the common potential line, and a contact hole that is opened in the insulating film. A first transparent electrode extending on the part, and a second transparent electrode formed on the surface of the second substrate facing the first substrate, wherein the first substrate and the second substrate are The first transparent electrode and the second transparent electrode are bonded to each other through a seal resin that includes spacer particles and is disposed outside the region where the common potential line is formed. Electrically connected through conductive particles arranged between transparent electrodes of That.

  Further, the present invention is characterized in that, in the above configuration, the sealing resin formation region is spaced apart from the common potential line formation region in a planar manner.

  According to the present invention, poor connection between the first transparent electrode and the second transparent electrode due to a significant difference in the particle diameters of the spacer particles and the conductive particles as in the conventional example can be suppressed. In addition, since the seal resin is formed outside the common potential line so as to be spaced apart from the common potential line in a plan view, moisture can be prevented from entering the common potential line. Further, unlike the conventional example, it is not necessary to form the counter electrode pad portion at the end portion of the first substrate, so that the liquid crystal display device can be narrowed.

  As a result, the reliability of the liquid crystal display device can be improved as compared with the conventional example, and the frame can be narrowed or the yield can be improved.

  Next, an embodiment of the liquid crystal display device of the present invention will be described with reference to the drawings. First, the overall configuration of the first substrate 10 and the second substrate 20 bonded thereto will be described with reference to the plan view of FIG. In FIG. 1, the same components as those shown in FIGS. 4 and 5 will be described with the same reference numerals.

  That is, the pixel region 101 is arranged at the center or substantially the center of the first substrate 10 and is connected to the pixel region 101 on the surrounding first substrate 10 through scanning lines and data lines (not shown). Driving circuits such as the vertical driving circuit 102 and the horizontal driving circuit 103 are arranged. A terminal portion 105 having an input terminal for a signal supplied from an external circuit is disposed on the frame of the first substrate 10 (that is, the end portion of the first substrate 10 where the pixel region 101 is not formed). Has been. A common potential Vcom is supplied to a terminal 105A which is one of the input terminals. This terminal 105 </ b> A is connected to a common potential line COM <b> 1 formed on the first substrate 10.

  The common potential line COM1 is formed on the first substrate 10 outside the vertical drive circuit 102 and the horizontal drive circuit 103 so as to surround the pixel region 101, the vertical drive circuit 102, and the horizontal drive circuit 103. In addition, as described later, the common potential line COM1 is a second transparent electrode that is a second transparent electrode around the pixel region 101 through a contact hole H1 and a transparent electrode pad 16 that is a first transparent electrode. It is electrically connected to the counter electrode 21 of the substrate 20. The counter electrode 21 is formed on the entire surface or substantially the entire surface of the second substrate 20 excluding the terminal portion 105.

  Next, details of the plurality of display pixels in the pixel region 101 will be described with reference to the drawings. FIG. 2 is a cross-sectional view showing one of the plurality of display pixels 101A in the pixel region 101. As shown in FIG.

As shown in FIG. 2, a buffer film 11 made of an insulating film such as a SiO ₂ film is formed on a first substrate 10 (that is, a TFT substrate) made of an insulating substrate such as a glass substrate by plasma CVD, for example. On the buffer film 11, for example, an amorphous silicon film is formed to a thickness of about 50 nm, and a polysilicon film crystallized by a heat treatment such as laser annealing is formed. This polysilicon film is patterned into a predetermined pattern to become the active layer 12 of the TFT. However, the active layer 12 is not limited to the polysilicon film.

A gate insulating film 13 made of a SiO ₂ film or the like is formed by plasma CVD, for example, so as to cover the active layer 12. On the active layer 12, the gate electrode G is formed via the gate insulating film 13, and the storage capacitor line SL is formed adjacent to the gate electrode G via the gate insulating film 13. The storage capacitor line SL forms a storage capacitor together with the active layer 12 and the gate insulating film 13. At this time, the gate insulating film 13 functions as a capacitive insulating film. The gate electrode G and the storage capacitor line SL are made of chromium or molybdenum, for example.

An interlayer insulating film 14 made of a laminated film of SiO ₂ film and SiN _X is formed by plasma CVD, for example, so as to cover the gate electrode G and the storage capacitor line SL. Contact holes are opened in the interlayer insulating film 14 on the source 12s and the drain 12d of the TFT, and a source electrode S and a drain electrode D are formed in contact with the source 12s and the drain 12d through the contact holes, respectively. The source electrode S and the drain electrode D are made of, for example, an aluminum metal film (a laminated film of a Mo film and an AlNd film).

  Then, a planarizing film 15 made of, for example, a photosensitive organic material is formed on the interlayer insulating film 14. A contact hole is opened in the planarizing film 15 on the source electrode S. A pixel electrode 17 connected to the source electrode S through the contact hole and extending on the planarizing film 15 is formed.

  On the other hand, a second substrate 20 (that is, a CF substrate) made of an insulating substrate such as a glass substrate is disposed facing the first substrate 10. A counter electrode 21 made of, for example, ITO (Indium Tin Oxide) is formed on the entire surface or substantially the entire surface of the second substrate 20 facing the first substrate 10. And the 1st board | substrate 10 and the 2nd board | substrate 20 are bonded together by the sealing resin not shown, and liquid crystal LC is sealed between those board | substrates.

  Next, the structure in the vicinity of the vertical drive circuit 102 and the common potential line COM1 will be described with reference to FIG. FIG. 3 is a cross-sectional view taken along line XX in FIG. In FIG. 3, the common potential line COM1 and the vertical drive circuit 102 adjacent to the common potential line COM1 are shown. However, in this embodiment, other drive circuits such as the horizontal drive circuit 103 are adjacent to the common potential line COM1. Even in the case of being formed, it has the same configuration as FIG.

  As shown in FIG. 3, the common potential line COM <b> 1 is formed on the first substrate 10 around the pixel region 101 via the buffer film 11 and the gate insulating film 13. Further, a vertical driving circuit 102 (or other driving circuit) is formed adjacent to the common potential line COM1. On the common potential line COM1 and the vertical drive circuit 102, an interlayer insulating film 14 and a planarizing film 15 are formed in this order so as to cover them. A contact hole H1 is provided in the interlayer insulating film 14 and the planarizing film 15 located on the common potential line COM1.

  A transparent electrode pad 16 (that is, a first transparent electrode) connected to the common potential line COM1 through the contact hole H1 and extending on a part of the planarizing film 15 is formed. Here, a part of the transparent electrode pad 16 extending on a part of the planarizing film 15 extends to a position overlapping with a driving circuit such as the vertical driving circuit 102. Note that the transparent electrode pad 16 does not necessarily have to extend to a position overlapping with a driving circuit such as the vertical driving circuit 102.

  Although not shown, a pixel electrode made of the same material as the transparent electrode pad 16 is formed on the planarizing film 15 on the pixel region 101. The pixel electrode and the transparent electrode pad 16 are made of, for example, ITO.

  On the other hand, a second substrate 20 (that is, a CF substrate) is disposed facing the first substrate 10. A counter electrode 21 (that is, a second transparent electrode) made of, for example, ITO is formed on the entire surface or substantially the entire surface of the second substrate 20 facing the first substrate 10. Therefore, the transparent electrode pad 16 and the counter electrode 21 are in a positional relationship facing each other.

  A sealing resin 30 is formed in a sealing region surrounding the pixel region 101 on the first substrate 10 outside the common potential line COM1. The seal resin 30 is made of an organic resin including spacer particles 31. When the first substrate 10 and the second substrate 20 are viewed in plan, the seal resin 30 (that is, the seal region) is separated from the common potential line COM1 by a predetermined distance D (for example, 4 μm or more). Preferably it is formed.

  The sealing resin 30 is first formed on the first substrate 10 or formed on the second substrate 20. And the 1st board | substrate 10 and the 2nd board | substrate 20 are bonded together via the sealing resin 30, and liquid crystal LC is sealed between those board | substrates.

  Further, in the region where the transparent electrode pad 16 extending on the planarizing film 15 and the counter electrode 21 face each other, the conductive particles 41 mixed in the adhesive 40 are interposed between the transparent electrode pad 16 and the counter electrode 21. Has been placed. The conductive particles 41 are a contact material in which a spherical resin is coated with gold or the like. The particle diameter of the conductive particles 41 is preferably equal to or approximately equal to the particle diameter of the spacer particles 31.

  The transparent electrode pad 16 and the counter electrode 21 are electrically connected through the conductive particles 41. Accordingly, the common potential Vcom is supplied from the first substrate 10 side to the second substrate 20 side via the common potential line COM1 and the transparent electrode pad 16. In other words, the connection portion functions as a counter electrode pad portion as seen in the conventional example.

With the above configuration, it is possible to suppress poor connection between the transparent electrode pad 16 and the counter electrode 21 due to a significant difference in the particle diameters of the spacer particles 118 and the conductive particles 119 as in the conventional example.
Further, even when moisture enters the inside of the seal region, that is, the pixel region 101 side, due to a predetermined distance D between the seal region where the seal resin 30 is formed and the formation region of the common potential line COM1. Is easily diffused into the liquid crystal LC, making it difficult to reach the common potential line COM1. That is, corrosion of the common potential line COM1 due to moisture intrusion can be prevented.

  Further, since it is not necessary to form the counter electrode pad portion 104 at the end portion of the first substrate 10 as in the conventional example, the frame of the liquid crystal display device can be reduced. Furthermore, in the vicinity of the transparent electrode pad 16 in the region that covers the drive circuit such as the vertical drive circuit 102 so as to overlap, the electromagnetic generated due to the equal potential between the transparent electrode pad 16 and the counter electrode 21 facing it. Due to the shielding effect, electromagnetic interference from the drive circuit to the liquid crystal LC can be reduced. As a result, the display quality degradation of the liquid crystal LC due to the electromagnetic interference can be reduced as compared with the case where the drive circuit is not covered by the transparent electrode pad 16.

  As a result, the reliability of the liquid crystal display device can be improved as compared with the conventional example, and the frame can be narrowed or the yield can be improved.

1 is a plan view of a liquid crystal display device according to an embodiment of the present invention. It is sectional drawing of one display pixel in the pixel area | region of the liquid crystal display device which concerns on embodiment of this invention. It is sectional drawing along the XX line of FIG. It is a top view of the liquid crystal display device which concerns on a prior art example. It is sectional drawing along the YY line of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 1st board | substrate 11 Buffer film 12 Active layer 13 Gate insulating film 14 Interlayer insulating film 15 Planarizing film 16 Transparent electrode pad 20 Second substrate 21 Counter electrode 30 Organic resin 31 Spacer particle 40 Adhesive 41 Conductive particle 101 Pixel region 101A Display pixel 102 Vertical drive circuit 103 Horizontal drive circuit 104 Counter electrode pad part 105 Terminal part 105A Terminal COM1, COM2 Common potential line LC Liquid crystal SL Retention capacity S Source electrode D Drain electrode G Gate electrode H1, H2 Contact hole

Claims (4)

A liquid crystal display device in which liquid crystal is sealed between a first substrate and a second substrate,
A pixel region including a plurality of display pixels disposed on the first substrate; a common potential line to which a common potential is supplied and formed around the pixel region; and an insulating film covering the common potential line; A first transparent electrode connected to the common potential line through a contact hole opened in the insulating film and extending on a part of the insulating film, and the second transparent electrode facing the first substrate. A second transparent electrode formed on the surface of the substrate,
The first substrate and the second substrate are bonded together via a seal resin that includes spacer particles and is disposed outside the formation region of the common potential line.
The first transparent electrode and the second transparent electrode are electrically connected via conductive particles disposed between the first transparent electrode and the second transparent electrode on the insulating film. A liquid crystal display device. The liquid crystal display device according to claim 1, wherein the formation region of the sealing resin is spaced apart in plan from the formation region of the common potential line. A drive circuit formed on the first substrate between the pixel region and the common potential line;
3. The liquid crystal display device according to claim 1, wherein the first transparent electrode extends on a part of the insulating film until reaching a position overlapping with the driving circuit. 4. The liquid crystal display device according to claim 1, wherein one or both of the first transparent electrode and the second transparent electrode is made of ITO.

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