JP2007114343A - Electro-optical device and electronic apparatus - Google Patents

Abstract

An electro-optical device is reduced in size.
A pair of first and second substrates sandwiching an electro-optic material, a plurality of pixel portions arranged in a pixel region on the first substrate, and a part of the second substrate in the first substrate, On the opposite side, it is formed in a peripheral region located around the pixel region, and another part is formed on the second substrate, and includes a peripheral circuit unit that supplies signals to the plurality of pixel units. .
[Selection] Figure 1

Description

  The present invention relates to a technical field of an electro-optical device such as a liquid crystal device and an electronic apparatus such as a liquid crystal projector including the electro-optical device.

  In this type of electro-optical device, as disclosed in Patent Document 1, for example, a liquid crystal is sandwiched as an electro-optical material between a pair of element substrates and a counter substrate. In the pixel region or the pixel array region in which a plurality of pixels on the element substrate are arranged, a pixel portion including a pixel electrode corresponding to the intersection of the scanning line and the data line is formed, so that the plurality of pixel portions are They are arranged in a matrix in a plane.

  Further, in a peripheral region located around the pixel region on the element substrate, a scanning line driving circuit for driving each scanning line, a sampling circuit for sampling and supplying an image signal to each data line, and this sampling circuit A peripheral circuit portion including a data line driving circuit for driving the signal line is built in.

  On the other hand, the counter substrate side typically includes, for example, a counter electrode formed on a solid surface so as to face the pixel electrode in common with each pixel unit as its main part. Therefore, the size of the electro-optical device mainly depends on the size of the element substrate viewed in a plan view. The size of the element substrate depends on the installation area of the peripheral circuit portion in the peripheral region as viewed in plan on the element substrate.

JP 2004-139111 A

  However, in the electro-optical device as described above, even if the wiring pattern in the peripheral circuit unit and the layout pattern of the circuit element are changed, even if the installation area of the peripheral circuit unit viewed in plan is changed on the element substrate, Basically, a pitch equal to the data line pitch is required, and there is a limit to miniaturization in a peripheral circuit such as a sampling circuit that normally includes a plurality of thin film transistors (hereinafter referred to as “TFT”). is there. For this reason, it is difficult to significantly reduce the size of the element substrate. As a result, there is a problem that it is difficult to reduce the size of the electro-optical device.

  SUMMARY An advantage of some aspects of the invention is to provide an electro-optical device suitable for downsizing and an electronic apparatus including such an electro-optical device.

  In order to solve the above problems, an electro-optical device of the present invention includes a pair of first and second substrates, a plurality of pixel portions arranged in a pixel region on the first substrate, and a part of the first and second substrates. A peripheral circuit unit formed in a peripheral region located around the pixel region in the first substrate, and another part formed in the second substrate, and supplying a signal to the plurality of pixel units; Is provided.

  According to the electro-optical device of the present invention, during the operation, each pixel unit is driven based on the drive signal supplied from the peripheral circuit unit in the pixel region on the first substrate, which is an element substrate, for example. Display. For example, when a liquid crystal is sandwiched between a pair of first substrate and second substrate that sandwich an electro-optical material as an electro-optical material, the liquid crystal is connected to each pixel based on a drive signal for each pixel unit. By applying an applied voltage having a value corresponding to the image data corresponding to the drive signal, image display is performed in the entire pixel region.

  Here, a part of the peripheral circuit portion is separated from the other part of the peripheral circuit and is formed in the peripheral region on the first substrate, and the other part of the peripheral circuit is, for example, a counter substrate. It is formed in a certain peripheral region on the second substrate. Peripheral circuits including a part and other parts separated in this way are electrically connected between these parts and other parts, for example, by vertical conduction, and exist as peripheral circuits. Yes.

  Therefore, in the electro-optical device according to the aspect of the invention, the first substrate and the second substrate are compared with the configuration in which the entire peripheral circuit unit is formed in the peripheral region on one side of the first substrate and the second substrate. In at least one of the peripheral regions, it is possible to reduce the installation area of the peripheral circuit section in a plan view even when it is large or small. Therefore, it is possible to reduce the size of at least one of the first substrate and the second substrate in plan view. As a result, it is possible to reduce the overall size of these substrates when viewed in plan with the first substrate and the second substrate facing each other. In this case, at least one of the first substrate and the second substrate can be easily adjusted by adjusting the installation area of the peripheral circuit portion in plan view in the peripheral region on each of the first substrate and the second substrate. The size of can be adjusted. As a result, the size of the electro-optical device can be easily reduced and reduced in size.

  Here, when the electro-optical device of the present invention is manufactured, for example, a second substrate formed by dividing a large substrate different from the mother substrate on a mother substrate including a plurality of first substrates, After bonding to each first substrate, the mother substrate is divided into a pair of first substrate and second substrate individually. Since the electro-optical device of the present invention can be easily reduced in size, the number of electro-optical devices manufactured from one mother substrate can be increased. Therefore, the electro-optical device of the present invention can be manufactured at a low manufacturing cost.

  In one aspect of the electro-optical device according to the aspect of the invention, the part is formed on a side of the first substrate facing the second substrate, and the other part is the first part of the second substrate. It is formed on the side facing the substrate.

  According to this aspect, a part of the peripheral circuit formed on the first substrate and the other part of the peripheral circuit formed on the second substrate are bonded to face each other. A peripheral circuit may be configured. Therefore, for example, by electrically connecting one part and the other part by vertical conduction between two substrates, the peripheral circuit is formed across the two substrates relatively easily. It can be constructed as a single circuit.

  In another aspect of the electro-optical device of the present invention, the first substrate is an element substrate on which a switching element is formed for each pixel portion, and the second substrate is a counter substrate facing the element substrate. A plurality of scanning lines and a plurality of data lines formed on the element substrate so as to intersect with each other in the pixel region, and the peripheral circuit unit supplies scanning signals to the plurality of scanning lines, respectively. A scanning line driving unit that supplies the signal as an image signal; and an image signal supply unit that supplies an image signal as the signal to each of the plurality of data lines, and at least one of the scanning line driving unit and the image signal supply unit. A part is formed on the element substrate and another part is formed on the counter substrate, and the plurality of pixel portions are formed corresponding to the intersections of the scanning lines and the data lines, respectively. Is There.

  According to this aspect, in the pixel region on the element substrate, each pixel unit is arranged corresponding to, for example, the intersection of the scanning line and the data line wired vertically and horizontally, and arranged in a matrix. Each scanning line is driven for each scanning line based on a scanning signal supplied from the scanning line driving unit, and an image signal is supplied to each data line from the image signal supply unit for each data line. . Each pixel unit is driven by an image signal supplied from the data line in a state selected based on the scan signal supplied from the scan line, and displays an image based on the image signal. That is, so-called active matrix driving is performed.

  In this aspect, at least one of the scanning line driving unit and the image signal supply unit is partly separated from the other part and formed in the peripheral region on the element substrate, and the other part is opposed. It is formed in the peripheral region on the substrate. Therefore, in the peripheral region on at least one of the element substrate and the counter substrate, the installation area of at least one of the scanning line driving unit and the image signal supply unit in a plan view can be reduced even if it is larger or smaller. Is possible. Thereby, the size of at least one of the element substrate and the counter substrate can be reduced in plan view.

  In this aspect in which the peripheral circuit unit includes an image signal supply unit, the image signal supply unit sets the plurality of data lines to N (where N is a natural number of 2 or more) one group. N image signal lines to which the image signals that have undergone N-serial-parallel conversion for driving each data line group are supplied, and the image signals are formed corresponding to the plurality of data lines. A sampling circuit including a plurality of sampling switches for supplying the image signal supplied from a line to the data line in response to a sampling circuit driving signal, and the sampling circuit signal for each sampling switch corresponding to the data line group. A data line driving circuit for sequentially supplying at least a part of the N image signal lines and the sampling circuit, and the data line driving circuit. But it may be configured as being formed on said opposed substrate and the element substrate are separated from each other.

  According to this configuration, N image lines belonging to the data line group are converted into parallel N image signals obtained by serial-parallel conversion of the serial image signal into a plurality of series. Can be supplied simultaneously.

  More specifically, in this aspect, when the electro-optical device is driven, N-system image signals subjected to serial-parallel conversion are supplied to N image signal lines, and further, sampling circuits are provided from these image signal lines. Supplied to. Here, the serial-parallel conversion is typically performed by an external circuit provided outside the electro-optical device in order to realize high-definition image display while suppressing an increase in drive frequency. In this case, a serial image signal is input to the external circuit, and the serial image signal is converted into a plurality of parallel image signals such as 3-phase, 6-phase, 12-phase, 24-phase,. Is converted to Such “serial-parallel conversion” is also called “serial-parallel expansion” or “phase expansion”.

  In parallel with the supply of the N system image signals to the sampling circuit, the data line driving circuit sequentially supplies a sampling signal (that is, a sampling circuit driving signal) to each sampling switch corresponding to the data line group. . Then, by each sampling switch in the sampling circuit, N system image signals are sequentially supplied to the plurality of data lines for each data line group in accordance with the sampling signal. Accordingly, a plurality of parallel image signals are supplied to N data lines belonging to the same data line group at a time.

  In this aspect, the N image signal lines and the sampling circuit and at least a part of the data line driving circuit are separated from each other and formed on the element substrate and the counter substrate, respectively.

  Here, in this aspect, in the sampling circuit, for every N sampling switches corresponding to the data line group, these N sampling switches are electrically connected in common to a signal line to which a common sampling signal is input. Is done. In the sampling circuit, the number of signal lines of each sampling switch from which an image signal is output corresponds to the number of data lines, whereas it is provided for each of N sampling switches corresponding to the data line group. Therefore, the number of signal lines to which these N sampling switches are electrically connected in common can be reduced to a value obtained by dividing the number of data lines by N. In other words, the number of sampling signals output from the data line driving circuit can be reduced to a value obtained by dividing the number of data lines by N as compared with the number of data lines.

  For example, in the image signal supply unit, the sampling circuit is provided for each of the N sampling switches corresponding to the data line group in the sampling circuit, and the sampling circuit among the signal line to which the sampling signal is input, the element substrate, and the counter substrate. In all or a part of the data line driving circuit provided on a different substrate, a signal line from which a sampling signal is output is electrically connected to the element substrate and the counter substrate by conducting vertical conduction. Connected.

  As described above, the interval between the connection points for conducting vertical conduction with respect to the signal line to which the sampling signal is input in the sampling circuit, and the connection points adjacent to each other, that is, the pitch of the connection points, is a plurality of data lines. Compared with the interval between the adjacent data lines, that is, the pitch of the data lines, the value obtained by multiplying the pitch of the data lines by N can be increased.

  Alternatively, for example, a part of the data line driving circuit and the other part separately provided on the element substrate and the counter substrate which are separated from each other are vertically connected between the element substrate and the counter substrate. By doing so, they are electrically connected.

  Also in this case, as described above, the number of sampling signals output from the data line driving circuit can be reduced to a value obtained by dividing the number of data lines by N. The pitch of connection points for electrically connecting a part can be increased to a value obtained by multiplying the pitch of the data line by N as compared with the pitch of the data line.

  Therefore, in this aspect, in the image signal supply unit, the connection point for conducting vertical conduction for inputting the sampling signal in the sampling circuit and the connection point for conducting vertical conduction in the data line driving circuit, such as bumps and silver dots, are used. By arranging a resin with a simple metal film, electrical connection can be easily performed.

  In the aspect in which the image signal line and the sampling circuit and at least a part of the data line driving circuit are formed separately from each other, the N image signal lines and the sampling circuit are formed on the element substrate. In addition, at least a part of the data line driving circuit may be formed on the counter substrate.

  If comprised in this way, in an image signal supply part, it will be provided for every N sampling switches corresponding to a data line group in a sampling circuit between an element substrate and a counter substrate, and it will be in a signal line to which a sampling signal is inputted. Corresponding connection points, and additionally or alternatively, a part of the data line driving circuit provided separately from the element substrate and the counter substrate on different substrates and the other part are electrically connected Vertical conduction is performed at a connection point for connection. Therefore, such vertical conduction can be easily performed by arranging bumps or the like at each connection point.

  In the aspect in which the image signal supply unit includes the data line driving circuit, the data line driving circuit buffers the shift register that sequentially generates the transfer signal and the transfer signal that is sequentially output from the shift register. A buffer circuit that outputs the sampling circuit drive signal, and at least one of the shift register and the buffer circuit is different from the sampling circuit and the N image signal lines of the element substrate and the counter substrate. You may comprise so that it may be formed on the board | substrate.

  With this configuration, the sampling signal generated in the buffer circuit is sequentially output from the data line driving circuit based on the timing at which the transfer signal is output from the shift register.

  Here, in the data line driving circuit, the installation area of the buffer circuit is larger than that of the shift register as viewed in plan on the element substrate out of the element substrate and the counter substrate. In the image signal supply unit, the installation area of the sampling circuit is larger than that of the shift register when viewed in plan on the element substrate. Therefore, it is preferable that the sampling circuit and the buffer circuit of the element substrate and the counter substrate are separated from each other and formed on different substrates.

  Thus, if the sampling circuit and the buffer circuit are separated from each other and provided on different substrates, the installation area of the image signal supply unit is effectively reduced in the peripheral region on at least one of the element substrate and the counter substrate. It becomes possible to reduce to.

  On the other hand, in the data line driving circuit, the buffer circuit is arranged on the same substrate as the sampling circuit among the element substrate and the counter substrate, and the shift register is arranged on the other substrate different from the buffer circuit. In the peripheral region on at least one of the element substrate and the counter substrate, the installation area of the image signal supply unit can be reduced at least.

  In an aspect in which the data line driving circuit includes a shift register and a buffer circuit, in the data line driving circuit, at least the buffer circuit of the shift register and the buffer circuit includes, of the element substrate and the counter substrate, the The sampling circuit and the N image signal lines may be formed on a different substrate.

  With this configuration, the installation area of the image signal supply unit can be effectively reduced in the peripheral region on at least one of the element substrate and the counter substrate.

  In order to solve the above problems, an electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention (including various aspects thereof).

  Since the electronic apparatus of the present invention includes the electro-optical device of the present invention described above, it is suitable for miniaturization, such as a projection display device, a television, a mobile phone, an electronic notebook, a word processor, a viewfinder type, or a monitor. Various electronic devices such as a direct-view video tape recorder, a workstation, a videophone, a POS terminal, and a touch panel can be realized. Further, as the electronic apparatus of the present invention, for example, an electrophoretic device such as electronic paper, a display device using an electron emission device (Field Emission Display and Conduction Electron-Emitter Display), or the like can be realized.

  Such an operation and other advantages of the present invention will become apparent from the embodiments described below.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, the electro-optical device of the invention is applied to a liquid crystal device.

(Liquid crystal device)
First, the overall configuration of a liquid crystal device as an example of the electro-optical device of the present invention will be described with reference to FIGS. Here, FIG. 1A shows a TFT array substrate which is an example of the “first substrate” according to the present invention, together with the respective components formed on the opposing surface of the “second substrate” according to the present invention. It is a schematic plan view seen from the counter substrate side as an example, and for convenience of explanation, the counter substrate and components formed on the counter substrate are excluded. FIG. 1B is a schematic plan view of the counter substrate together with the respective components formed on the counter surface as viewed from the TFT array substrate side. For convenience of explanation, the TFT array substrate and the TFT array substrate are illustrated. It is shown with the components formed above excluded. FIG. 2 is a cross-sectional view taken along the line HH ′ of FIG. Here, a TFT active matrix driving type liquid crystal device with a built-in driving circuit is taken as an example. 1A, FIG. 1B, and FIG. 2, the various constituent elements are sized so that they can be recognized on the drawings. Some of these components are not exactly the same, but are illustrated differently, and the scales of these components are different. This is the same for each figure after FIG. 3 described later.

  As well shown in FIG. 2, in the liquid crystal device 100 according to the present embodiment, the TFT array substrate 10 and the counter substrate 20 are arranged to face each other. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20. In FIG. 1A or FIG. 1B, the TFT array substrate 10 and the counter substrate 20 are bonded to each other by a sealing material 52 provided in a sealing region located around the image display region 10a. In other words, in the image display region 10 a between the TFT array substrate 10 and the counter substrate 20, the liquid crystal layer 50 is sealed in a region surrounded by the sealing material 52.

  The sealing material 52 is made of, for example, an ultraviolet curable resin, a thermosetting resin, or the like for bonding the two substrates, and is applied on the TFT array substrate 10 in the manufacturing process and then cured by ultraviolet irradiation, heating, or the like. It is. Further, in the sealing material 52, a gap material (such as glass fiber or glass beads) for setting the distance between the TFT array substrate 10 and the counter substrate 20 (inter-substrate gap) to a predetermined value (in FIGS. 1 and 2). Is omitted).

  A light-shielding frame light-shielding film 53 that defines the frame area of the image display area 10a is provided on the counter substrate 20 side in parallel with the inside of the seal area where the sealing material 52 is disposed. However, part or all of the frame light shielding film 53 may be provided as a built-in light shielding film on the TFT array substrate 10 side.

  In FIG. 1A, on the surface facing the counter substrate 20 on the TFT array substrate 10 side, out of the peripheral region located in the periphery of the image display region 10a, inside the seal region where the sealing material 52 is disposed, A sampling circuit 200 is provided along one side of the seal region so as to be covered with the frame light shielding film 53. A first vertical conduction terminal 103a is provided on the outer side of the seal region along one side of the seal region. Furthermore, external circuit connection terminals 102a and 102ba are provided in parallel along the arrangement of the first vertical conduction terminals 103a in a region located outside the seal region. Signals input from an external circuit to some terminals 102ba of the external circuit connection terminals 102a are supplied to the counter substrate 20 side. In addition, second vertical conduction terminals 106 a are arranged at the four corners of the TFT array substrate 10.

  Further, the scanning line driving circuit 104 is covered with the frame light shielding film 53 on the inner side of the seal region along two sides adjacent to one side of the TFT array substrate 10 provided with the external circuit connection terminals 102a and 102ba. Is provided. Then, in order to electrically connect the two scanning line driving circuits 104 provided on both sides of the image display region 10a in this way, the TFT array substrate 10 is covered with the frame light shielding film 53 along the remaining side. A plurality of wirings 105 are provided. The scanning line driving circuit 104 may be provided along one of the two sides adjacent to the one side and covered with the frame light shielding film 53.

  On the other hand, in FIG. 1B, on the surface facing the TFT array substrate 10 on the counter substrate 20 side, the sampling circuit 200 provided on the TFT array substrate 10 side inside the seal region in the peripheral region is arranged. Correspondingly, the data line driving circuit 101 is provided so as to be covered with the frame light shielding film 53 along one side of the seal region. A first vertical conduction member 103b for conducting vertical conduction with the first vertical conduction terminal 103a is provided outside the seal area along one side of the seal area. Further, a second vertical conductive material for conducting vertical conduction with the second vertical conduction terminal 106a corresponding to the second vertical conduction terminal 106a on the TFT array substrate 10 side is provided at a corner portion of the counter substrate 20. 106b is provided. In addition, a third vertical conduction member 102bb is arranged at the end of the arrangement of the first vertical conduction member 103b, and the data line driving circuit 101 is connected to the external circuit connection terminal 102a via the third vertical conduction member 102bb. Among them, various signals for driving the data line driving circuit 101 are supplied from some terminals 102ba.

  In FIG. 2, on the opposing surface of the TFT array substrate 10, on the pixel electrode 9a after formation of pixel switching TFTs, scanning lines, data lines and the like (not shown in FIGS. 1 and 2). An alignment film (not shown in FIGS. 1 and 2) is formed. On the other hand, on the opposing surface of the opposing substrate 20, in addition to the opposing electrode 21, a lattice-shaped or striped light-shielding film 23 and an alignment film (not shown in FIGS. 1 and 2) are formed in the uppermost layer portion. ing. Further, the liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several types of nematic liquid crystals are mixed, and takes a predetermined alignment state between the pair of alignment films.

  Although not shown in FIGS. 1 and 2, on the TFT array substrate 10 or the counter substrate 20, in addition to the data line driving circuit 101, the scanning line driving circuit 104, etc., a plurality of data lines have a predetermined voltage level. A precharge circuit that supplies a precharge signal prior to the image signal, an inspection circuit for inspecting quality, defects, and the like of the electro-optical device during manufacture or at the time of shipment may be formed.

  Next, the configuration of the liquid crystal device 100 will be described in more detail with reference to FIGS. FIG. 3 is a block diagram showing a configuration of an external circuit that supplies various signals to the liquid crystal device, FIG. 4 is a block diagram showing a more detailed configuration on the TFT array substrate side, and FIG. It is a block diagram which shows the more detailed structure by the opposite board | substrate side. FIG. 6 is a circuit diagram showing a detailed configuration of the data line driving circuit.

  As shown in FIG. 3, for example, in the liquid crystal device 100, an external circuit is mounted by being electrically connected to the external circuit connection terminals 102a and 102ba. The external circuit is formed, for example, as an FPC (Flexible Printed Circuit) by being mounted on a wiring substrate including a flexible substrate. The external circuit includes an image signal supply circuit 300, a timing control circuit 400, and a power supply circuit 700.

  The timing control circuit 400 is configured to output various timing signals for driving the liquid crystal device 100. A timing signal output means that is a part of the timing control circuit 400 generates a dot clock that is a minimum unit clock and scans each pixel. Based on this dot clock, a Y clock signal CLY and an inverted Y clock signal are generated. CLYinv, X clock signal CLX, inverted X clock signal CLXinv, Y start pulse DY, and two types of X start pulses DXR and DXL are generated. Further, the timing control circuit 400 generates and outputs a first enable signal ENB1 and a second enable signal ENB2.

  One line of input image data VID is input to the image signal supply circuit 300 from the outside. The image signal supply circuit 300 performs serial-parallel conversion (that is, phase expansion or serial-parallel expansion) on one system of input image data VID to generate an N-phase image signal in this embodiment (N = 12). VID1 to VID12 are generated. Further, in the image signal supply circuit 300, the voltages of the image signals VID1 to VID12 are inverted to a positive polarity and a negative polarity with respect to a predetermined reference potential, and the image signals VID1 to VID12 whose polarities are thus inverted are output. You may be made to do.

  The power supply circuit 700 generates a common power supply of a predetermined common potential LCC supplied to the counter electrode 21 shown in FIG. 2 and generates two types of power supplies VSSX and VDDX for driving the data line driving circuit 101. To do.

  As shown in FIGS. 4 and 5, the liquid crystal device 100 is an example of the “scanning line driving unit” according to the present invention in the peripheral region on the opposing surfaces of the TFT array substrate 10 and the counter substrate 20. The scanning line driving circuit 104 is formed, and the data line driving circuit 101, the sampling circuit 200, and the image signal line 171 included in the “image signal supply unit” according to the present invention are formed. The “peripheral circuit portion” according to the present invention includes the scanning line driving circuit 104, the data line driving circuit 101, the sampling circuit 200, and the image signal line 171.

  Note that at least a part of the image signal supply circuit 300, the timing control circuit 400, and the power supply circuit 700 described with reference to FIG. 3 is a part of the “peripheral circuit unit” according to the present invention. It may be formed in the peripheral area on the counter substrate 20 together with the scanning line driving circuit 104, the data line driving circuit 101, and the like.

  FIG. 4 shows a configuration on the surface facing the counter substrate 20 on the TFT array substrate 10 side.

  In FIG. 4, the scanning line driving circuit 104 is supplied with a Y clock signal CLY, an inverted Y clock signal CLYinv, and a Y start pulse DY. When the Y start pulse DY is input, the scanning line driving circuit 104 sequentially generates and outputs the scanning signals Y1,..., Ym at a timing based on the Y clock signal CLY and the inverted Y clock signal CLYinv.

  In addition, the sampling circuit 200 includes a plurality of sampling switches 202 configured from P-channel or N-channel single-channel TFTs or complementary TFTs.

  Further, in the present embodiment, 12 image signal lines 171 that supply image signals VID1 to VID12 that are serial-parallel developed in 12 phases to the sampling circuit 200 are wired in a peripheral region on the TFT array substrate 10. Yes.

  In addition, in the image display area 10a occupying the center on the TFT array substrate 10, data lines 114 and scanning lines 112 are wired vertically and horizontally, and are arranged in a matrix in each pixel unit 70 corresponding to the intersection thereof. A pixel electrode 9a of the liquid crystal element 118 and a TFT 116 for controlling switching of the pixel electrode 9a are provided. The pixel switching element may be composed of various transistors or TFDs in addition to TFTs. In the present embodiment, in particular, the total number of scanning lines 112 is m (where m is a natural number of 2 or more), and the total number of data lines 114 is n × 12 (where n is a natural number of 2 or more). Will be described.

  Further, FIG. 5 shows a configuration on the surface facing the TFT array substrate 10 on the counter substrate 20 side.

  In FIG. 5, in the image display area 10a on the counter substrate 20, for example, the counter electrode 21 is formed on the entire surface of the image display area 10a, that is, in a solid shape. A common power supply LCC is supplied to the counter electrode 21 via the second vertical conduction terminal 106a and the second vertical conduction material 106b.

  Further, the data line driving circuit 101 includes a shift register 70 and a buffer circuit 80.

  In addition to the two types of power supplies VSSX and VDDX, the shift register 70 is supplied with four types of signals: an X clock signal CLX, an inverted X clock signal CLXinv, and two types of X start pulses DXR and DXL. Here, as shown in FIG. 6, four clocked inverters 71 driven based on these four types of signals are included in each stage of the shift register 70 from the first stage to the n-th stage.

  The shift register 70 aligns the data lines 114 formed in the image display area 10a on the TFT array substrate 10 along the arrangement direction (the direction in which the scanning lines 112 extend, the row direction, or the X direction in FIG. 4). It is configured so that it can be sequentially driven from both directions. In the shift register 70, when one X start pulse DXR of the two types of X start pulses DXR and DXL is input, the inversion direction instruction signal Dinv becomes high level, and the X clock signal CLX and the inverted X clock signal XCLXinv. 6 is sequentially shifted from right to left in FIG. 6 (that is, in the same direction as the X direction in FIG. 6), and transfer signals SR1, SR2, SR3,..., SRn are output from each stage. . In the following, it is assumed that transfer signals SR1, SR2, SR3,..., SRn are sequentially output from right to left in FIG.

  In the shift register 70, when the other X start pulse DXL of the two types of X start pulses DXR and DXL is input, the direction indicating signal D becomes high level, and one X start pulse DXR is input. As in the case of FIG. 6, the shift is sequentially performed from right to left in FIG. 6 (that is, in the direction opposite to the X direction in FIG. 6).

  In FIG. 6, each stage of the buffer circuit 80 includes a NAND circuit 81 and an inverter 82 formed corresponding to each stage of the shift register 70. Further, the first enable signal ENB 1 and the second enable signal ENB 2 are supplied to the buffer circuit 80 in order to drive the NAND circuit 81 and the inverter 82 in each stage.

  In each stage of the buffer circuit 80, the transfer signal SRi (i = 1, 2,..., N) output from the shift register 70 and one of the first and second enable signals ENB1 and ENB2 After the logical product is obtained by the NAND circuit 81, the result is inverted by the inverter 82, so that buffering is performed. By such buffering, the pulse width of the transfer signal SRi is limited to one of the first and second enable signals ENB1 and ENB2, and sequentially output as the sampling signal Si.

  The data line driving circuit 101 is not limited to the configuration shown in FIGS. 5 and 6, and for example, a level shifter circuit or the like may be provided in addition to the shift register 70 and the buffer circuit 80. Further, although an example in which two types of enable signals ENB1 and ENB2 are supplied to the buffer circuit 80 has been described, a sampling signal may be output based on one or more types of enable signals ENB.

  5 or 6, the sampling signal Si sequentially output from the data line driving circuit 101 on the counter substrate 20 side is supplied to the first vertical conduction terminal 103a through the first vertical conduction member 103b. Then, on the TFT array substrate 10, the data lines 114 wired to the image display area 10a are, as will be described below, a data line group including 12 data lines 114 as a group based on a sampling signal Si. It is driven sequentially every time.

  In the sampling circuit 200, the sampling signal Si is sequentially supplied from the first vertical conduction terminal 103a for each sampling switch 202 corresponding to the data line group, and each sampling switch 202 is turned on in accordance with the sampling signal Si. Then, the image signals VID1 to VID12 are supplied from the twelve image signal lines 171 to the data lines 114 belonging to the data line group simultaneously and sequentially for each data line group through the sampling switch 202 that is turned on. . Therefore, the data lines 114 belonging to the data line group are driven simultaneously. Therefore, in this embodiment, since each data line 114 is driven for each data line group, the driving frequency can be suppressed.

  In FIG. 4, focusing on the configuration of one pixel portion 70, the data line 114 to which the image signal VIDk (where k = 1, 2, 3,..., 12) is supplied to the source electrode of the TFT 116. Is electrically connected to the gate electrode of the TFT 116, and a scanning line 112 to which a scanning signal Yj (j = 1, 2, 3,..., M) is supplied is electrically connected. In addition, the pixel electrode 9 a of the liquid crystal element 118 is connected to the drain electrode of the TFT 116. Here, in each pixel portion 70, the liquid crystal element 118 has a liquid crystal sandwiched between the pixel electrode 9 a and the counter electrode 21. Accordingly, each pixel unit 70 is arranged in a matrix corresponding to each intersection of the scanning line 112 and the data line 114.

  Each scanning line 112 is selected line-sequentially by the scanning signals Y1,..., Ym output from the scanning line driving circuit 104. In the pixel portion 70 corresponding to the selected scanning line 112, when the scanning signal Yj is supplied to the TFT 116, the TFT 116 is turned on, and the pixel portion 70 is in a selected state. An image signal VIDk is supplied to the pixel electrode 9a of the liquid crystal element 118 from the data line 114 at a predetermined timing by closing the switch of the TFT 116 for a certain period. As a result, an applied voltage defined by the potentials of the pixel electrode 9 a and the counter electrode 21 is applied to the liquid crystal element 118. The liquid crystal modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The light transmittance is increased, and light having a contrast corresponding to the image signals VID1 to VID12 is emitted from the liquid crystal device 100 as a whole.

  Here, a storage capacitor 119 is added in parallel with the liquid crystal element 118 in order to prevent the held image signal from leaking. For example, the voltage of the pixel electrode 9a is held by the storage capacitor 119 for a time that is three orders of magnitude longer than the time when the source voltage is applied, so that the holding characteristics are improved, and as a result, a high contrast ratio is realized. Become.

  Therefore, in the present embodiment, in the liquid crystal device 100, the first vertical conduction terminal 103a and the first vertical conduction member are provided between the sampling circuit 200 on the TFT array substrate 10 side and the data line driving circuit 101 on the counter substrate 20 side. Electrical connection is established by the vertical conduction with 103b. Here, in the sampling circuit 200, for each of the twelve sampling switches 202 corresponding to the data line group, the twelve sampling switches 202 receive the sampling signal Si from the first vertical conduction terminal 103a via a common signal line. Entered. In the sampling circuit 200, the number of signal lines of each sampling switch 202 to which the image signal VIDk is output is n × 12, which is the same as the number of data lines 114, whereas the first vertical conduction terminal 103a. Further, the number of signal lines to which the sampling signal Si is input is reduced to n. That is, the number of first vertical conduction terminals 103a is reduced to n as compared with the number of data lines 114.

  Corresponding to the number of first vertical conduction terminals 103a, on the counter substrate 20 side, in the data line driving circuit 101, the number of signal lines of the shift register 70 to which the transfer signal SRi is output, and the buffer circuit 80. The number of signal lines to which the sampling signal Si is output is n, which is smaller than the number of data lines 114. Therefore, the number of first vertical conductive members 103b electrically connected to the signal line from which the sampling signal Si is output in the buffer circuit 80 is also reduced to n as compared with the number of data lines 114. .

  Therefore, on the counter substrate 20 side, the pitch ds of the first vertical conductive member 103b is a value obtained by multiplying the value of the pitch dp by N = 12, compared with the pitch dp of the data lines 114 on the TFT array substrate 10 side. Can be wide. Further, in correspondence with the pitch ds of the first vertical conduction member 103b, the pitch of the first vertical conduction terminal 103a on the TFT array substrate 10 side can be increased to a value obtained by multiplying the pitch dp of the data lines 114 by 12.

  Therefore, in the present embodiment, the first vertical conduction terminal 103a or the first vertical conduction material 103b can be formed of a resin of a metal film such as a bump or a silver dot, and as a result, the first vertical conduction terminal 103a or the first vertical conduction material 103b can be easily formed. It becomes possible to conduct vertical conduction between the conduction terminal 103a and the first vertical conduction member 103b.

  The liquid crystal device 100 as described above is formed on a mother substrate at the time of manufacture, for example, as follows. FIG. 7 is a partial plan view for explaining that the liquid crystal device of this embodiment is manufactured on a mother substrate.

  In FIG. 7, the liquid crystal device 100 is formed on the mother substrate S so as to be arranged in a matrix in the vertical and horizontal directions, and each liquid crystal device 100 has been described with reference to FIGS. 1 to 6. Various constituent elements (TFT, scanning line 112, data line 114, etc., scanning line driving circuit 104, data line driving circuit 101, etc.) are formed.

  Incidentally, the mother substrate S shown in FIG. 7 includes a plurality of TFT array substrates 10 shown in FIG. 1A, FIG. 2, and FIG. That is, on the mother substrate S shown in FIG. 7, various components on the TFT array substrate 10 side are formed. Separately, the counter electrode 21 and the orientation are arranged on a glass substrate (not shown in FIG. 7). A plurality of counter substrates 20 are formed by forming a film and the like, and each counter substrate 20 is divided individually. Then, the counter substrate 20 is individually opposed to each of the TFT array substrates 10 formed on the mother substrate S, and the pair of TFT array substrates 10 and the counter substrate 20 are individually bonded together by the sealing material 52. The liquid crystal is sealed between the TFT array substrate 10 and the counter substrate 20. Thereafter, by dividing the mother substrate S, for example, individual liquid crystal devices 100 as shown in FIGS. 1 and 2 are manufactured.

  Next, with reference to FIG. 8, only a difference from the present embodiment will be described regarding a comparative example of the liquid crystal device 100. FIG. 8 is a block diagram showing a configuration on the TFT array substrate side in the comparative example.

  In FIG. 8, a data line driving circuit 101 is formed in the peripheral region on the TFT array substrate 10 by forming a shift register 70 and a buffer circuit 80 in addition to the scanning line driving circuit 104, the sampling circuit 200, and the like. ing. Here, as viewed in plan on the TFT array substrate 10, the installation area of each of the buffer circuit 80 and the sampling circuit 200 needs to be about four times larger than the installation area of the shift register 70, for example. There is. Therefore, in the comparative example, in order to secure an area for installing the data line driving circuit 101 in addition to the sampling circuit 200 and the image signal line 171, the installation area of the image signal supply unit including these various circuits is reduced. This is limited, and it is difficult to significantly reduce the planar size of the TFT array substrate 10. As a result, it is difficult to reduce the size of the liquid crystal device 100.

  On the other hand, in this embodiment, the sampling circuit 200 and the image signal line 171 and the data line driving circuit 101 are separated from each other, and the data line driving circuit 101 is disposed on the counter substrate 20 side. Therefore, the sampling circuit 200 and the buffer circuit 80 that require a relatively large installation area are separated from each other and are formed on different substrates of the TFT array substrate 10 and the counter substrate 20, respectively. It is possible to effectively reduce the installation area of the image signal supply unit on the TFT array substrate 10 side or on the counter substrate 20 side in addition to the TFT array substrate 10 side. Therefore, the size of at least one of the TFT array substrate 10 and the counter substrate 20 in plan view can be reduced. As a result, in a state where the TFT array substrate 10 and the counter substrate 20 are arranged to face each other, it is possible to comprehensively reduce the size of these substrates when viewed in plan. As a result, the size of the liquid crystal device 100 can be reduced and downsized.

  Accordingly, when the liquid crystal device 100 is manufactured, the number of liquid crystal devices 100 manufactured from one mother substrate S as described in FIG. 7 can be increased. Therefore, in the present embodiment, the liquid crystal device 100 can be manufactured at a low manufacturing cost.

  The liquid crystal device 100 of the present embodiment is not limited to the configuration described above, and may be configured as described below, for example.

  FIG. 9 is a block diagram showing a configuration on the TFT array substrate side according to the modification, and FIG. 10 is a block diagram showing a configuration on the counter substrate side according to the modification.

  9 and 10, a buffer circuit 80 is formed in the peripheral region on the TFT array substrate 10 in addition to the scanning line driving circuit 104, the sampling circuit 200, and the like, and in the peripheral region on the counter substrate 20 side, A shift register 70 is formed. A data line driving circuit is formed including a buffer circuit 80 formed on the TFT array substrate 10 side and a shift register 70 formed on the counter substrate 20 side.

  In this case, the transfer signal SRi output from the shift register 70 is supplied to the first vertical conduction terminal 103a via the first vertical conduction member 103b. The number of first vertical conduction members 103b to which the transfer signal SRi of the shift register 70 is output and the number of first vertical conduction terminals 103a to which the transfer signal SRi is input to the buffer circuit 80 are n. Can do. Therefore, the first vertical conduction terminal 103a or the first vertical conduction member 103b can be formed of a resin of a metal film such as a bump or a silver dot, and the first vertical conduction terminal 103a and the first vertical conduction terminal 103a can be easily formed. It becomes possible to conduct vertical conduction between the conductive members 103b.

  In this case as well, the installation area of the image signal supply unit has been described with reference to FIGS. 4 and 5, for example, on the TFT array substrate 10 side or on the counter substrate 20 side in addition to the TFT array substrate 10 side. Although it is thought that the degree will be smaller than the configuration, it can be reduced.

  Further, in addition to or instead of the configuration described with reference to FIGS. 4 and 5 or 9 and 10, a part of the scanning line driving circuit 104 is also provided in the same manner as the image signal supply unit. The TFT array substrate 10 and the counter substrate 20 may be formed on different substrates separately from each other. Further, for example, if the electrical connection between each data line and the sampling circuit can be easily performed, in the image signal supply unit, the sampling circuit and the image signal line are arranged on the counter substrate side, and the data line driving circuit The sampling circuit and the image signal line are separated from at least a part of the data line driving circuit so that at least a part is arranged on the TFT array substrate side, and the TFT array substrate and the counter substrate are different from each other. It is good also as a structure formed in.

  As described above, in the liquid crystal device 100, the installation area of each of the scanning line driving circuit 104, the data line driving circuit 101, and the like is adjusted in the peripheral regions on the TFT array substrate 10 and the counter substrate 20, respectively. The size of at least one of the TFT array substrate 10 and the counter substrate 20 can be easily adjusted.

(Electronics)
Next, a case where the above-described liquid crystal device 100 is applied to various electronic devices will be described.

  First, a projector using the liquid crystal device 100 as a light valve will be described. FIG. 11 is a plan layout diagram illustrating a configuration example of a projector. As shown in this figure, a lamp unit 1102 including a white light source such as a halogen lamp is provided inside the projector 1100. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 disposed in the light guide 1104, and light valves 1110R corresponding to the respective primary colors. Incident on 1110B and 1110G. These three light valves 1110R, 1110B and 1110G are each configured by using a liquid crystal module including the liquid crystal device 100.

  In the light valves 1110R, 1110B, and 1110G, the liquid crystal device 100 is driven by R, G, and B primary color signals supplied from the image signal supply circuit 300, respectively. The light modulated by these liquid crystal devices 100 enters the dichroic prism 1112 from three directions. In this dichroic prism 1112, R and B light is refracted at 90 degrees, while G light travels straight. Accordingly, as a result of the synthesis of the images of the respective colors, a color image is projected onto the screen or the like via the projection lens 1114.

  Here, paying attention to the display images by the light valves 1110R, 1110B, and 1110G, the display image by the light valves 1110G needs to be horizontally reversed with respect to the display images by the light valves 1110R and 1110B.

  Since light corresponding to the primary colors R, G, and B is incident on the light valves 1110R, 1110B, and 1110G by the dichroic mirror 1108, it is not necessary to provide a color filter.

  Next, an example in which the liquid crystal device 100 is applied to a mobile personal computer will be described. FIG. 12 is a perspective view showing the configuration of this personal computer. In the figure, a computer 1200 includes a main body 1204 having a keyboard 1202 and a liquid crystal display unit 1206. The liquid crystal display unit 1206 is configured by adding a backlight to the back surface of the liquid crystal device 1005 described above.

  Further, an example in which the liquid crystal device 100 is applied to a mobile phone will be described. FIG. 13 is a perspective view showing the configuration of this mobile phone. In the figure, a mobile phone 1300 includes a reflective liquid crystal device 1005 together with a plurality of operation buttons 1302. In the reflective liquid crystal device 1005, a front light is provided on the front surface thereof as necessary.

  In addition to the electronic devices described with reference to FIGS. 11 to 13, a liquid crystal television, a viewfinder type, a monitor direct-view type video tape recorder, a car navigation device, a pager, an electronic notebook, a calculator, a word processor, a work Stations, videophones, POS terminals, devices equipped with touch panels, etc. Needless to say, the present invention can be applied to these various electronic devices.

  The present invention is not limited to the above-described embodiments, and can be appropriately changed without departing from the spirit or concept of the invention that can be read from the claims and the entire specification. An electronic apparatus including the electro-optical device is also included in the technical scope of the present invention.

FIG. 1A is a schematic plan view of the configuration on the TFT array substrate side as viewed from the counter substrate side. FIG. 1B shows the configuration on the counter substrate side from the TFT array substrate side. FIG. It is HH 'sectional drawing of FIG. It is a block diagram which shows the structure of the external circuit which supplies various signals to a liquid crystal device. It is a block diagram which shows the more detailed structure by the side of a TFT array substrate. It is a block diagram which shows the more detailed structure by the opposite board | substrate side. It is a circuit diagram which shows the detailed structure of a data line drive circuit. It is a fragmentary top view for demonstrating that the liquid crystal device of this embodiment is manufactured on a mother board | substrate. It is a block diagram which shows the structure by the side of the TFT array substrate in a comparative example. It is a block diagram which shows the structure by the side of the TFT array substrate which concerns on a modification. It is a block diagram which shows the structure by the side of the opposing substrate which concerns on a modification. It is a top view which shows the structure of the projector which is an example of the electronic device to which a liquid crystal device is applied. It is a perspective view which shows the structure of the personal computer which is an example of the electronic device to which the liquid crystal device is applied. It is a perspective view which shows the structure of the mobile telephone which is an example of the electronic device to which a liquid crystal device is applied.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... TFT array substrate, 10a ... Image display area, 20 ... Counter substrate, 70 ... Pixel part, 101 ... Data line drive circuit, 104 ... Scan line drive circuit, 112 ... Scan line, 114 ... Data line, 171 ... Image signal Line, 200 ... Sampling circuit

Claims (8)

A pair of first and second substrates;
A plurality of pixel portions arranged in a pixel region on the first substrate;
A part is formed in a peripheral region located around the pixel region in the first substrate, and another part is formed in the second substrate, and supplies signals to the plurality of pixel units. An electro-optical device comprising: a peripheral circuit unit that performs: The part is formed on a side of the first substrate facing the second substrate;
The electro-optical device according to claim 1, wherein the other part is formed on a side of the first substrate facing the second substrate. The first substrate is an element substrate in which a switching element is formed for each pixel unit, and the second substrate is a counter substrate facing the element substrate,
The device substrate further includes a plurality of scanning lines and a plurality of data lines formed to intersect with each other in the pixel region,
The peripheral circuit unit includes a scanning line driving unit that supplies a scanning signal to the plurality of scanning lines as the signal, and an image signal supply unit that supplies an image signal to the plurality of data lines as the signal, respectively. About at least one of the scanning line driving unit and the image signal supply unit, a part is formed on the element substrate and the other part is formed on the counter substrate,
The electro-optical device according to claim 1, wherein each of the plurality of pixel portions is formed corresponding to an intersection of the scanning line and the data line. The image signal supply unit
In order to drive the plurality of data lines for each data line group including N (where N is a natural number of 2 or more) data lines, N systems of serial-parallel converted image signals are supplied. N image signal lines to be
A sampling circuit formed corresponding to the plurality of data lines and including a plurality of sampling switches for supplying the image signals supplied from the image signal lines to the data lines in response to a sampling circuit drive signal;
A data line driving circuit that sequentially supplies the sampling circuit signal for each sampling switch corresponding to the data line group;
The N image signal lines, the sampling circuit, and at least a part of the data line driving circuit are formed on the element substrate and the counter substrate separately from each other. 4. The electro-optical device according to 3. The N image signal lines and the sampling circuit are formed on the element substrate,
The electro-optical device according to claim 4, wherein at least a part of the data line driving circuit is formed on the counter substrate. The data line driving circuit includes:
A shift register that sequentially generates transfer signals;
A buffer circuit for buffering the transfer signals sequentially output from the shift register and outputting them as the sampling circuit drive signals,
The at least one of the shift register and the buffer circuit is formed on a substrate different from the sampling circuit and the N image signal lines among the element substrate and the counter substrate. The electro-optical device according to 4 or 5. In the data line driving circuit, at least the buffer circuit of the shift register and the buffer circuit is formed on a substrate different from the sampling circuit and the N image signal lines among the element substrate and the counter substrate. The electro-optical device according to claim 6. An electronic apparatus comprising the electro-optical device according to claim 1.

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