JP2007110299A - Solid-state imaging device - Google Patents

Abstract

A memory for storing addresses of defective pixels is made smaller than the total number of pixels of a solid-state imaging device, and continuous pixel defects can be prevented.
A solid-state imaging device 2 in a two-dimensional matrix, a pixel defect detection circuit 6 for detecting a pixel defect in pixel data from the solid-state imaging device, and an address of a pixel having a detected pixel defect are stored as a defective pixel address. Based on the defective pixel address memory 7 and the defective pixel address, if the pixels are mixed in the pixel array before mixing, a continuous defective pixel array that becomes a continuous pixel defect is determined, and pixels in a region corresponding to the continuous defective pixel array are determined. On the other hand, the pixel selection circuit 8 that generates pixel mixture target address data so as to remove the selection from the pixel mixture target and the charge accumulation / charge readout control of the solid-state imaging device are performed. In the pixel mixture mode, the pixel selection circuit 8 And a sensor driving circuit 1 that performs pixel mixing by reading out charges from the pixel to be mixed indicated by the pixel mixing target address data.
[Selection] Figure 1

Description

  The present invention relates to a solid-state imaging device, and more particularly to a defect correction technique when pixel signals are mixed and read or when a horizontal line is thinned and read.

  Solid-state imaging devices are used in imaging devices such as video cameras, digital still cameras, and mobile cameras for mobile phones. The obtained image data can be recorded on a recording medium such as an SD (Secure Digital) card or a CF (Compact Flash) card, or the image data can be printed out and stored.

  In recent years, image sensors with millions of pixels have been used for digital still cameras and the like. As the number of pixels increases, the miniaturization advances and the probability of pixel defects due to manufacturing problems (dust and dust) has increased unless the cleanness of the semiconductor manufacturing apparatus is increased. For this pixel defect, pixel defect correction has been conventionally performed by replacement with peripheral pixels (see Patent Document 1).

  In addition, digital still cameras are not only for still images but also for moving images, and technically, it is possible to record moving images equivalent to TV image quality (320 TV lines = about 350,000 pixels). At this time, an image of several million pixels or more is not recorded as it is, but is recorded on an SD card or a CF card with a limited number of pixels by pixel mixing or line thinning in order to correspond to TV image quality.

However, the pixel defect caused by the increase in the number of pixels has a problem that the normal pixel and the defective pixel are added to form a pixel defect when the pixels are mixed. This has been corrected by means of replacing with normal peripheral pixels in the solid-state imaging device (see Patent Document 2).
Japanese Patent Laid-Open No. 5-41867 (page 4, FIG. 3) JP 2001-45382 A (page 3-5, FIG. 3-6)

  In a digital still camera or the like, if there is a pixel defect in a still image, the defective pixel address is stored in advance, and pixel defect correction is performed by replacing all pixel data of the defective pixel with pixel data of peripheral pixels. (Patent Document 2). However, as the number of pixels increases, it is impossible to prepare a memory capacity for all pixels, and it is impossible to correct all pixel defects. The memory capacity is determined by predicting the number of defects to some extent.

  In addition, as the number of defective pixels increases due to the increase in the number of pixels, it is difficult to replace which pixel in the solid-state imaging device. In some cases, it is necessary to replace a pixel that is distant from the surrounding pixels, resulting in image quality degradation. In addition, an increase in switches for internal replacement of the solid-state imaging device is incurred.

  As described above, since all pixel defects cannot be corrected by replacement as the number of pixels increases, pixel defect correction is performed by subsequent image signal processing as in Patent Document 1. At this time, a normal pixel and a defective pixel are added during pixel mixing. Moreover, it becomes an adjacent defective pixel at the time of mixing, and cannot be corrected, or even if it is corrected, it becomes a continuous defective pixel array, resulting in image quality deterioration.

  Similarly, in the line thinning readout, adjacent pixel defects in the vertical direction are caused.

  The present invention has been created in view of such circumstances, and it is possible to prevent continuous pixel defects while reducing the capacity of the memory for storing addresses of defective pixels to be less than the total number of pixels of the solid-state imaging device. The purpose is to do.

The solid-state imaging device according to the present invention is
A solid-state imaging device having a plurality of pixels arranged in a two-dimensional matrix;
A pixel defect detection circuit for detecting a pixel defect in the pixel data output from the solid-state imaging device;
A defective pixel address memory for storing an address of a pixel having a pixel defect detected by the pixel defect detection circuit as a defective pixel address;
Based on the defective pixel address in the defective pixel address memory, a continuous defective pixel array that becomes a continuous pixel defect is determined if pixels are mixed in the pixel array before mixing, and pixels in a region corresponding to the continuous defective pixel array are determined. A pixel selection circuit for generating pixel mixture target address data so as to deselect the pixel mixture target;
Controls charge accumulation and charge readout of the solid-state imaging device, and performs pixel mixing by reading out charges from the pixel to be mixed indicated by the pixel mixing target address data from the pixel selection circuit in the pixel mixing mode. And a sensor driving circuit.

  In this configuration, when the pixel defect detection circuit detects a pixel defect, a defective pixel address which is an address of the pixel having the pixel defect is stored in the defective pixel address memory. Based on the defective pixel address in the defective pixel address memory, the pixel selection circuit determines whether or not a continuous defective pixel array is obtained if pixels are mixed in the pixel array before mixing. Then, pixel mixture target address data is generated so as to remove the selection from the pixel mixture target for the pixels in the region determined to have a continuous defective pixel array, and is transmitted to the sensor drive circuit. The sensor drive circuit drives and controls the solid-state imaging device based on pixel mixture target address data from which pixels corresponding to the continuous defective pixel array are removed. Thereby, the plurality of pixels subjected to charge readout and subjected to pixel mixing are limited to pixels that do not cause continuous pixel defects (continuous pixel defects). As a result, continuous pixel defects can be prevented. Here, the pixel selection circuit determines the continuous defective pixel arrangement based on the defective pixel address, and performs calculation so as to avoid the continuous defective pixel arrangement to generate pixel mixture target address data. Therefore, a storage capacity smaller than the total number of pixels of the solid-state image sensor may be used. That is, according to the present invention, it is possible to prevent continuous pixel defects while reducing the capacity of the defective pixel address memory to be less than the total number of pixels of the solid-state imaging device.

The solid-state imaging device according to the present invention is
A solid-state imaging device having a plurality of pixels arranged in a two-dimensional matrix;
A pixel defect detection circuit for detecting a pixel defect in the pixel data output from the solid-state imaging device;
A defective pixel address memory for storing an address of a pixel having a pixel defect detected by the pixel defect detection circuit as a defective pixel address;
Based on the defective pixel address in the defective pixel address memory, a continuous defective pixel array that becomes a continuous pixel defect in the vertical direction if a line is thinned out in the pixel array before line thinning is determined, and an area corresponding to the continuous defective pixel array A pixel selection circuit that generates line thinning address data so as to select a target to be removed instead of a target to be left in the line thinning process for
A sensor driving circuit for controlling charge accumulation and charge reading of the solid-state imaging device, and for reading out charges from pixels of a line to be thinned out in the line thinning mode, which is indicated by the line thinning address data from the pixel selection circuit. And.

  In this configuration, when the pixel defect detection circuit detects a pixel defect, a defective pixel address which is an address of the pixel having the pixel defect is stored in the defective pixel address memory. Based on the defective pixel address in the defective pixel address memory, the pixel selection circuit determines whether or not the vertical defective pixel array is obtained if the line array is thinned out before the line thinning out. Then, line thinning address data is generated so as to select a target to be removed instead of a target to be left in the line thinning process for a line in a region determined to have a continuous defective pixel arrangement, and is transmitted to the sensor driving circuit. The sensor driving circuit drives and controls the solid-state imaging device based on line thinning address data from which pixels corresponding to the continuous defective pixel array are removed. As a result, the lines to be subjected to charge reading and left are limited to pixels that do not cause continuous pixel defects. As a result, continuous pixel defects in the vertical direction can be prevented. Here, the pixel selection circuit determines the continuous defective pixel array based on the defective pixel address, performs an operation so as to avoid the continuous defective pixel array, and generates line thinning address data. That is, according to the present invention, it is possible to prevent vertical continuous pixel defects while relatively reducing the capacity of the defective pixel address memory.

  Further, in the above configuration, the sensor drive circuit may replace the read voltage from the defective pixel with respect to the defective pixel instructing that the pixel mixing target address data from the pixel selection circuit is deselected from the pixel mixing target. There is an aspect in which the solid-state imaging device is controlled to read out a fixed voltage. According to this, for a defective pixel corresponding to the continuous defective pixel array, a fixed voltage is read instead of its original read voltage, and this fixed voltage is added and mixed with read voltages from other pixels. This also prevents continuous pixel defects, and the memory capacity of the defective pixel address memory is less than the total number of pixels of the solid-state image sensor.

  According to the present invention, when using the pixel mixing function or the line thinning function, continuous pixel defects can be prevented, and the memory capacity of the defective pixel address memory is less than the total number of pixels of the solid-state image sensor. In addition, it is not necessary to add a replacement circuit for correcting pixel defects in the image sensor, and the configuration can be simplified.

  Embodiments of a solid-state imaging device according to the present invention will be described below in detail with reference to the drawings.

(Embodiment 1)
FIG. 1 is a block diagram showing the configuration of the solid-state imaging device according to Embodiment 1 of the present invention. This solid-state imaging device includes a sensor driving circuit 1 that controls charge accumulation and charge readout of the solid-state imaging device 2, a solid-state imaging device 2 having a plurality of pixels arranged in a two-dimensional matrix, and a CDS (Correlated Double Sampling). ) -Output amplifier 3, gain control amplifier (GCA) 4, A / D converter 5, pixel defect detection circuit 6 for detecting pixel defects in the pixel data output from the solid-state imaging device 2, and defective pixel address A memory 7, a pixel selection circuit 8, and a pixel defect correction circuit 9 are provided. The pixel defect correction circuit 9 corrects pixel defects by replacing pixel data of defective pixels with pixel data of peripheral pixels correlated therewith, which is also provided in the prior art. New components in the present embodiment are a defective pixel address memory 7 and a pixel selection circuit 8.

  After the previous correction process in the feedback system from the pixel defect detection circuit 6 to the sensor driving circuit 1 via the defective pixel address memory 7 and the pixel selection circuit 8 is executed, the final correction in the pixel defect correction circuit 9 is performed. The process is supposed to work.

  The defective pixel address memory 7 stores the address of a pixel having a pixel defect detected by the pixel defect detection circuit 6 as a defective pixel address, and the storage capacity thereof is less than the total number of pixels of the solid-state imaging device 2. It has become. In the pixel mixing mode, the pixel selection circuit 8 determines a continuous defective pixel array that becomes a continuous pixel defect based on a defective pixel address in the defective pixel address memory 7 and a continuous pixel defect if pixels are mixed in the pixel array before mixing. The pixel mixture target address data is generated and transmitted to the sensor drive circuit 1 so as to remove the selection from the pixel mixture target for the pixels in the region corresponding to the defective pixel array. In addition, the pixel selection circuit 8 has a continuous defective pixel that becomes a continuous pixel defect in the vertical direction when the line is thinned out in the pixel array before the line thinning based on the defective pixel address in the defective pixel address memory 7 in the line thinning mode. A line thinning address data is generated to determine the arrangement, and a line thinning address data is generated so as to select a target to be removed instead of a target to be left in the line thinning process for a line in a region corresponding to the continuous defective pixel arrangement. Configured to communicate. The sensor driving circuit 1 reads out charges from the pixel to be mixed indicated by the pixel mixing target address data from the pixel selection circuit 8 in the pixel mixing mode, performs pixel mixing, and in the line thinning mode, the pixel selection circuit 8 The charge readout is performed from the pixel of the line to be thinned, which is indicated by the line thinning address data from.

  Here, a continuous defective pixel arrangement related to the prior correction process will be described.

  FIG. 2A shows a state before pixel mixing. The defective pixel is blacked out. None of the lines is a continuous pixel defect. That is, the pixels adjacent to each other in the horizontal direction are not pixel defects.

  FIG. 2B shows a case where 9 pixels are mixed in the situation of FIG. 9 pixel data of 9 pixels of 3 pixels in the horizontal direction × 3 pixels in the vertical direction is set as one unit, and pixel data of 9 pixels are added and mixed. Four units (36 pixels) are four pixels. After mixing, the first and second are defective pixels, resulting in continuous pixel defects.

  If such pixel mixing is performed, a pixel array before mixing when a continuous pixel defect is caused is referred to as a continuous defective pixel array. In the case of such a continuous defective pixel arrangement, continuous pixel defects after mixing are avoided by avoiding pixel mixing.

  In the present embodiment, control is performed as shown in FIG. FIG. 3A shows a state before pixel mixing. None of the lines is a continuous pixel defect. However, if a normal pixel mixture is performed, a continuous defective pixel array that becomes a continuous pixel defect is obtained. The determination of the continuous defective pixel arrangement is performed by the pixel selection circuit 8 referring to the defective pixel address stored in the defective pixel address memory 7.

  FIG. 3B shows a case where 9 pixels are mixed in the situation of FIG. The first nine pixels contain defective pixels, but these are pixel mixed. However, the adjacent second nine pixels do not mix pixels. This is because the second nine pixels also include defective pixels, and if the pixels are mixed, a continuous pixel defect occurs, and this is to be avoided. The third nine pixels are pixel mixed. The fourth 9 pixels include defective pixels, but are not a continuous defective pixel array in relation to the third 9 pixels, and therefore pixel mixing is performed.

  In other words, if a continuous defective pixel array is determined by the determination before pixel mixing, control is performed so as not to cause continuous defects after pixel mixing by avoiding pixel mixing (by not mixing defective pixels). . The pixel selection circuit 8 generates pixel mixture target address data for controlling the sensor driving circuit 1 as such.

  Next, the operation of the solid-state imaging device of the present embodiment configured as described above will be described.

  First, light is converted into electric charges by the solid-state imaging device 2 of FIG. The photoelectrically converted signal is sampled by the CDS-output amplifier 3, gained up by the gain control amplifier 4, digitally converted by the A / D converter 5, and input to the pixel defect detection circuit 6. The pixel defect detection circuit 6 detects a pixel defect by using a generally known median filter, that is, a method of detecting a pixel defect by a level difference from surrounding pixels.

  When the pixel defect detection circuit 6 detects a pixel defect, the defective pixel address which is the address of the pixel having the pixel defect is stored in the defective pixel address memory 7.

  In the pixel mixture mode, the pixel selection circuit 8 determines, based on the defective pixel address in the defective pixel address memory 7, whether or not a continuous defective pixel array is obtained if the pixels are mixed in the pixel array before mixing. To do. Then, pixel mixture target address data is generated so as to remove the selection from the pixel mixture target for the pixels in the region determined to have a continuous defective pixel array, and is transmitted to the sensor drive circuit 1. The sensor driving circuit 1 drives and controls the solid-state imaging device 2 based on pixel mixture target address data from which pixels corresponding to the continuous defective pixel array are removed. Thereby, the plurality of pixels subjected to charge readout and subjected to pixel mixing are limited to pixels that do not cause continuous pixel defects. As a result, continuous pixel defects can be prevented.

  Further, in the line thinning mode, the pixel selection circuit 8 converts the pixel arrangement before the line thinning based on the defective pixel address of the defective pixel address memory 7 into a continuous defective pixel arrangement in the vertical direction. It is determined whether or not. Then, line thinning address data is generated and transmitted to the sensor driving circuit 1 so as to select a target to be removed instead of a target to be left in the line thinning process for a line in an area determined to have a continuous defective pixel array. The sensor driving circuit 1 drives and controls the solid-state imaging device 2 based on the adjusted line thinning address data. As a result, the lines to be subjected to charge reading and remaining are limited to pixels that do not cause vertical continuous pixel defects. As a result, continuous pixel defects in the vertical direction can be prevented. Further, the storage capacity of the defective pixel address memory 7 can be smaller than the total number of pixels of the solid-state imaging device 2.

  Next, a specific circuit configuration of a pixel mixing circuit for avoiding continuous pixel defects will be described.

  FIG. 13 shows a comparative example. The vertical transfer switch SV is turned on, and the noise removal capacitor C1 is charged. Next, the vertical transfer switch SV is turned off.

  The vertical transfer switch SV is turned ON, and the charge of the first line is charged from the vertical pixel outputs 1, 2, and 3 to the noise removal capacitor C1. Next, the vertical transfer switch SV is turned off. Next, when the transmission switches Sw11, Sw12, and Sw13 are turned on, the three signal voltage holding capacitors C2 in the first line are charged.

  After the vertical transfer switch SV is turned ON again, the transfer switches Sw21, Sw22, and Sw23 are turned ON, so that the charge on the second line is charged to the three signal voltage holding capacitors C2 on the second line.

  After the vertical transfer switch SV is turned ON again, the transfer switches Sw31, Sw32, and Sw33 are turned ON, so that the charge on the third line is charged to the three signal voltage holding capacitors C2 on the third line.

  As a result, nine signal voltage holding capacitors C2 are charged with signal charges for a total of nine pixels of three lines and three pixels.

  Next, at the time of reading, the voltage at the previous stage of the output amplifier Amp is reset to the reset power source RSD by the reset switch RS, and the voltage is held in the signal output capacitor C3. After turning off the reset switch RS, the three horizontal transfer switches H2 are turned on, and the nine transmission switches Sw11, Sw12, Sw13, Sw21, Sw22, Sw23, Sw31, Sw32, Sw33 are turned on, and nine pixels for three lines. Is charged to the signal output capacitor C3, and then the voltage Vout1 is read from the output amplifier Amp. The gain is capacity distribution as shown in Equation (2). In the expression (2), a numerical value “9” corresponding to 9 pixels to be mixed is shown.

  FIG. 4 shows a specific circuit configuration of a pixel mixing circuit for avoiding continuous pixel defects in the embodiment of the present invention.

  The operation up to the point where the signal charges for a total of nine pixels of three lines and three pixels are charged to the nine signal voltage holding capacitors C2 is the same as in the case of FIG.

  Next, at the time of reading, the voltage at the previous stage of the output amplifier Amp is reset to the reset power source RSD by the reset switch RS, and the voltage is held in the signal output capacitor C3. After the reset switch RS is turned OFF, the three horizontal transfer switches H2 are turned ON, and only the transfer switch Sw33 corresponding to the defective pixel is left OFF, and the remaining eight transfer switches Sw11, Sw12, Sw13, Sw21, Sw22, Sw23, Sw31, and Sw32 are turned on to read the signal voltage. Then, except for one pixel that has not been read when the transfer switch Sw33 is turned off, the signal output capacitor C3 is charged with the charge of eight pixels for three lines, and then the voltage Vout1 is read from the output amplifier Amp. The gain is capacity distribution as shown in Equation (1). In the formula (1), a numerical value “8” corresponding to 8 pixels to be mixed with one pixel removed is shown. The gain difference between Expression (1) and Expression (2) is very small and is not a problem level.

  The algorithm of the pixel defect detection circuit 6 in this embodiment will be described with reference to the flowcharts of FIGS. 5, 6, and 8, and the pixel mixture explanatory diagrams of FIGS. In this example, 9 pixels are mixed. N is an arbitrary natural number, and (N−1), N, N + 1 lines, and 9 pixels in 0 to 2 columns, which are three consecutive lines, are mixed to form one pixel. Similarly, nine pixels in the same three lines and 3 to 5 columns are mixed into one pixel, and nine pixels in the same three lines and 6 to 8 columns are mixed into one pixel.

  First, an algorithm for pixel defects in the first line of effective pixels will be described with reference to FIGS. 5 and 7A and 7B.

  The first pixel defect is detected in steps S2 to S5, and the position is stored as an address 0 in the defective pixel address memory 7 (step S6). If there is no pixel defect in this process, detection is performed by moving in the horizontal time axis direction (steps S3 to S4).

  Next, moving in the horizontal time axis direction (step S7), a pixel defect is detected (step S8). In the case of the nine-pixel mixture in this example, the defective pixels less than six pixels from the address 0 stored in the defective pixel address memory 7 are not read so as not to cause a continuous pixel defect after mixing (FIG. 7). (A), (b)). This operation is performed up to the effective pixel end in the horizontal direction.

  Next, the pixel defect algorithm for the Nth line will be described with reference to FIGS. 6 and 7C and 7D.

  Similarly to the N-1th line, the first pixel defect is detected in steps S22 to S25, and the position is stored as an address 0 in the defective pixel address memory 7 (step S26). Next, when there is a pixel address that is a defective pixel but is not read on the (N-1) th line before one horizontal scanning time, reading is not performed even if the detected pixel is a defective pixel. (Steps S27 to S31). The same applies to the (N + 1) th line.

  Next, with reference to FIGS. 8 and 9, the case where the scanning is moved to the next 9-pixel mixture unit will be described.

  Similar to the N-1 to N + 1 lines, the first pixel defect is detected in steps S42 to S45, and the position is stored in the defective pixel address memory 7 as address 0 (step S46). Next, assuming that pixels are mixed on the N-1 to N + 1 lines, reading is performed when any of the N-1 to N + 1 lines is present so as not to be continuously defective pixels in the vertical direction. Do not.

  As described above, according to the present embodiment, charges can be read out so as not to be a continuous defective pixel.

  10 and 11 illustrate line thinning.

  FIG. 10A shows a state before line thinning. The defective pixel is blacked out. None of the lines are vertical continuous pixel defects. That is, the pixels adjacent to each other in the vertical direction are not pixel defects.

  FIG. 10B shows a case where one line is thinned out in the situation of FIG. After line thinning, the third pixel in the first line and the third pixel in the second line are defective pixels, resulting in continuous pixel defects in the vertical direction.

  If such line thinning is performed, a pixel array before line thinning when a continuous pixel defect in the vertical direction is caused is also called a continuous defective pixel array. In the case of such a continuous defective pixel arrangement, the continuous pixel defect after line thinning is avoided by replacing the line thinning target.

  In the present embodiment, control is performed as shown in FIG. FIG. 11A shows a state before line thinning. None of the lines are vertical continuous pixel defects. However, if a normal line thinning is performed, a continuous defective pixel array that becomes a continuous pixel defect in the vertical direction is obtained. The determination of the continuous defective pixel arrangement is performed by the pixel selection circuit 8 referring to the defective pixel address stored in the defective pixel address memory 7.

  FIG. 11B shows a case where one line is thinned out in the situation of FIG. For the 3rd and 4th lines, the 3rd line should be left and the 4th line should be thinned out, while the 3rd line should be thinned out and the 4th line should be left. By controlling in this way, continuous pixel defects in the vertical direction are avoided.

  In other words, when the vertical defective pixel array is determined before the line thinning, the thinning target lines are replaced so as not to cause a continuous defect after the line thinning. The pixel selection circuit 8 generates line thinning address data for controlling the sensor driving circuit 1 as such.

  FIG. 12 shows the concept of pixel mixing.

  Although the pixel defect detection circuit 6, the defective pixel address memory 7, the pixel selection circuit 8, and the sensor driving circuit 1 as described above correct the continuous pixel defect due to thinning or mixing, all the pixel defects are still not removed. In some cases. The pixel defect correction circuit 9 corrects such remaining defective pixels. That is, the pixel defect correction circuit 9 corrects pixel defects by replacing the remaining defective pixels with peripheral pixels having a correlation with the pixels.

  The solid-state imaging device of the present invention is useful as, for example, a mobile phone with a photographing function, a digital still camera, and the like.

The block diagram which shows the structure of the solid-state imaging device in embodiment of this invention Explanatory drawing of the continuous defective pixel arrangement | sequence in embodiment of this invention Explanatory drawing of the pixel mixture of the solid-state imaging device in embodiment of this invention (the 1) 1 is a circuit configuration diagram of a sensor driving circuit of a solid-state imaging device according to an embodiment of the present invention. Flowchart showing an operation of detecting a continuous defective pixel arrangement of the solid-state imaging device according to the embodiment of the present invention (No. 1) Flowchart showing the operation of detecting a continuous defective pixel array of the solid-state imaging device according to the embodiment of the present invention (part 2) Explanatory drawing of the pixel mixture of the solid-state imaging device in embodiment of this invention (the 2) Flowchart showing the operation of detecting a continuous defective pixel array of the solid-state imaging device in the embodiment of the present invention (part 3) Explanatory drawing of the pixel mixture of the solid-state imaging device in embodiment of this invention (the 3) Explanatory drawing of the line thinning of the solid-state imaging device in the embodiment of the present invention (part 1) Explanatory drawing (the 2) of the line thinning-out of the solid-state imaging device in embodiment of this invention Conceptual diagram of pixel mixing Circuit configuration diagram of sensor driving circuit of solid-state imaging device in comparative example

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Sensor drive circuit 2 Solid-state image sensor 3 CDS_output amplifier 4 Gain control amplifier (GCA)
5 A / D converter 6 Pixel defect detection circuit 7 Memory for defective pixel address 8 Pixel selection circuit 9 Pixel defect correction circuit

Claims (3)

A solid-state imaging device having a plurality of pixels arranged in a two-dimensional matrix;
A pixel defect detection circuit for detecting a pixel defect in the pixel data output from the solid-state imaging device;
A defective pixel address memory for storing an address of a pixel having a pixel defect detected by the pixel defect detection circuit as a defective pixel address;
Based on the defective pixel address in the defective pixel address memory, if a pixel is mixed in the pixel array before mixing, a continuous defective pixel array that becomes a continuous pixel defect is determined, and pixels in a region corresponding to the continuous defective pixel array are determined. A pixel selection circuit for generating pixel mixture target address data so as to deselect the pixel mixture target;
Controls charge accumulation and charge readout of the solid-state imaging device, and performs pixel mixing by reading out charges from the pixel to be mixed indicated by the pixel mixing target address data from the pixel selection circuit in the pixel mixing mode. A solid-state imaging device including a sensor driving circuit. A solid-state imaging device having a plurality of pixels arranged in a two-dimensional matrix;
A pixel defect detection circuit for detecting a pixel defect in the pixel data output from the solid-state imaging device;
A defective pixel address memory for storing an address of a pixel having a pixel defect detected by the pixel defect detection circuit as a defective pixel address;
Based on the defective pixel address in the defective pixel address memory, a continuous defective pixel array that becomes a continuous pixel defect in the vertical direction if a line is thinned out in the pixel array before line thinning is determined, and an area corresponding to the continuous defective pixel array A pixel selection circuit that generates line thinning address data so as to select a target to be removed instead of a target to be left in the line thinning process for
A sensor driving circuit for controlling charge accumulation / charge reading of the solid-state imaging device, and for reading out charges from pixels of a line to be thinned out in the line thinning mode, which is indicated by the line thinning address data from the pixel selection circuit. And a solid-state imaging device.   The sensor driving circuit reads out a fixed voltage instead of a read voltage from the defective pixel for the defective pixel instructing that the pixel mixing target address data from the pixel selection circuit is deselected from the pixel mixing target. The solid-state imaging device according to claim 1, wherein the solid-state imaging device is controlled.

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