JP2007110254A - Integrated circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an integrated circuit with a simple configuration that increases the operating speed of an operation section and reduces the power consumption by controlling a substrate voltage. <P>SOLUTION: The integrated circuit is provided with a plurality of logic circuit groups each comprising multi-stage connection of switch circuits, and at least one of the logic circuit groups is configured so as to control part or all substrate voltages of the other switch circuits by using the control signal of a particular switch circuit. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an integrated circuit, and more particularly to a technique for improving the operation speed and reducing power consumption of an operation unit in an integrated circuit.

  Conventionally, there is a substrate voltage control technique for LSI as a technique for high-speed operation or low power consumption of an integrated circuit (LSI). This substrate voltage control technology utilizes the following characteristics of the integrated circuit, thereby realizing low power consumption and high operating speed. As an integrated circuit property, when the integrated circuit is viewed at the transistor level, when the n-channel MOS transistor (N-type MOSFET) and the p-channel MOS transistor (P-type MOSFET) are in the ON state, the same voltage as each gate voltage is applied. When applied also to the substrate, the threshold voltage decreases and the current increases when the source / drain is conducting. Conversely, when the N-type MOSFET and the P-type MOSFET are in the off state, if the same voltage as the gate voltage is applied to the substrate, the threshold voltage between the source and drain is increased and the current is reduced.

  FIG. 5 shows an example of a conventional connection method for an N-type MOSFET substrate. Here, the voltage Vg is a voltage applied to the gate of the transistor, the voltage Vd is a voltage applied to the drain of the transistor, and the voltage Vb is a voltage applied to the substrate. Note that the source of the transistor is grounded.

  FIG. 5A shows a conventional general connection method, in which the substrate voltage Vb of the N-type MOSFET is grounded. In this case, since the substrate voltage Vb is fixed at the ground level (0 V), when a high level (H level, power supply voltage level) voltage (for example, +5 V) is applied to the gate voltage Vg, the source / drain of the transistor The interval is turned on. Further, in such a connection method, the threshold voltage of the transistor is a value unique to the process, and can be considered as a fixed value if manufacturing variations are ignored.

  On the other hand, FIG. 5B shows a connection method in which the substrate voltage Vb is controlled by the gate voltage Vg. In this connection method, the same potential as the voltage applied to the gate voltage Vg of the N-type MOSFET is also applied to the substrate (Vb = Vg). Although the H level is applied to the gate voltage Vg, the source / drain between the transistors is turned on, but the threshold voltage is significantly lowered because the H level is also applied to the substrate. be able to. Therefore, even in the same voltage application state, an increase in current due to a decrease in threshold voltage is expected, and high-speed operation or operation at a low voltage is possible. When the gate voltage Vg of the N-type MOSFET is at L level, that is, considering the off state of the transistor, the L level is also applied to the substrate in the case of FIG. 5B. At this time, the threshold voltage increases, and the subthreshold current between the source and drain in the off state can be reduced.

  FIG. 6 shows an example of a conventional connection method relating to a substrate of a P-type MOSFET. The voltage Vg is a voltage applied to the gate of the transistor, the voltage Vd is a voltage applied to the drain of the transistor, and the voltage Vb is a voltage applied to the substrate. Note that the source of the transistor is connected to the power supply voltage. Here, FIG. 6A shows a case where the substrate voltage Vb is fixed to the power supply voltage (Vcc), and FIG. 6B shows a case where the substrate voltage Vb is controlled by the gate voltage Vg. In the case of FIG. 6B, although the voltage (Vb) applied to the substrate is different from the N-type MOSFET shown in FIG. 5, the threshold voltage is changed together with the voltage applied to the substrate, as in the N-type MOSFET. Therefore, it is possible to operate the integrated circuit at high speed and reduce power consumption.

  In addition, as a technology related to the substrate voltage control technology, a dedicated circuit (substrate potential control circuit, substrate potential conversion circuit) for controlling the voltage Vb applied to the substrate is provided to suppress the subthreshold leakage current, A semiconductor integrated circuit device realizing low power consumption has been proposed (see, for example, Patent Document 1).

  As another substrate voltage control technology, the main circuit on the substrate is divided into a plurality of substrate voltage control blocks using a PMOS substrate bias switch and an NMOS substrate bias switch, and the substrate bias is independent for each block. Thus, there has been proposed a semiconductor integrated circuit device that controls and reduces power consumption (see, for example, Patent Document 2).

JP 2000-339047 A JP-A-10-190444

  In general, an integrated circuit can be divided into a large number of circuit blocks for each function, and it is rare that all the blocks are operating at the same time. When an integrated circuit is considered in units of very small blocks, the blocks that are actually operating during normal operation (equivalent to the following active part and selection part) are some blocks, and many other blocks are not operating. It is often in a state (equivalent to the following inactive, non-selected).

  In addition, with the recent increase in the scale of integrated circuits, the division of the operating part and the non-operating part in the circuit has become very fine units. Further, in a circuit composed of transistors having a low operating voltage and a low threshold voltage as in recent years, a subthreshold current that flows when the transistor is turned off becomes a problem in order to reduce power consumption even when the transistor is off. In the future, if the threshold value is lowered along with the lowering of the power supply voltage, the proportion of the subthreshold current in the current flowing through the entire circuit becomes more prominent.

  On the other hand, when considering the circuit in fine units, it is known in advance that there are few operating parts that operate simultaneously in the circuit, so if the circuit designer makes detailed specifications during design, high-speed operation and low power consumption are possible. is there. However, if the designer designates the operating part or non-operating part of the circuit at the time of designing, the number of man-hours for designing greatly increases due to the scale of the current integrated circuit, so the division method of the substrate voltage control unit itself is a problem. It becomes.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide an integrated circuit capable of improving the operation speed and reducing the power consumption of the operation unit by controlling the substrate voltage with a simple configuration. The point is to provide a circuit.

  In order to achieve the above object, an integrated circuit according to the present invention is an integrated circuit including a plurality of logic circuit groups in which switch circuits are connected in multiple stages, and at least one of the logic circuit groups includes the switch circuit. The control circuit is configured to control a substrate voltage of a part or all of the MOSFETs constituting the switch circuit existing in the same logic circuit group by using a control signal input to a specific switch circuit in the first switch circuit. One feature.

  The integrated circuit according to the present invention having the above characteristics is characterized in that the specific switch circuit is the switch circuit at the final stage on the output side of the logic circuit group.

  A third feature is that the switch circuit is a CMOS switch circuit in which a P-type MOSFET and an N-type MOSFET are connected in parallel.

  In the integrated circuit according to the present invention having the above characteristics, the substrate voltage of the P-type MOSFET is controlled by a control signal input to the gate of the P-type MOSFET of the specific switch circuit, and the N-type of the specific switch circuit A fourth feature is that the substrate voltage of the N-type MOSFET is controlled by a control signal input to the gate of the MOSFET.

  The integrated circuit according to the third aspect of the present invention controls the substrate voltage of the P-type MOSFET with a signal having the same polarity as the control signal input to the gate of the P-type MOSFET of the specific switch circuit, A fifth feature is that the substrate voltage of the N-type MOSFET is controlled by a signal having the same polarity as the control signal input to the gate of the N-type MOSFET of a specific switch circuit.

  According to the present invention having the above characteristics, at least one of the logic circuit groups may be a substrate voltage control signal for controlling a substrate voltage of a part or all of other switch circuits using a control signal of a specific switch circuit. Since it is configured, the operation part and the non-operation part of the circuit can be easily divided, and a control unit for controlling the substrate voltage (substrate voltage of the switch circuit) can be easily defined. In addition, with the simple configuration, it is possible to improve the operation speed during the operation of the integrated circuit, and to reduce the power consumption and the operation margin during the low voltage operation.

  In general, a large number of circuit elements serving as basic elements are formed on a substrate, and one logic circuit group is realized by connecting some of these circuit elements in combination. In the present invention, the logic circuit group is constituted by a multistage switch circuit. Here, examples of the logic circuit group that can be configured by a multi-stage switch circuit include a combinational circuit, an addition circuit, and a selection circuit.

  The integrated circuit configured in this manner controls the substrate voltage using a control signal of a specific switch circuit such as a switch switching signal at the final stage on the output side of the multi-stage switch circuit constituting the logic circuit group. There is no need for a special additional circuit for controlling. Furthermore, the threshold voltage of the signal path on the downstream side as viewed from the output side of the multi-stage connected switch circuits that do not require operation can be increased, and the power consumption can be reduced.

  DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of an integrated circuit according to the present invention (hereinafter referred to as “the present invention circuit” where appropriate) will be described below with reference to the drawings.

<First Embodiment>
First, a first embodiment of the circuit of the present invention will be described with reference to FIGS.
The circuit configuration of the circuit of the present invention will be described with reference to FIG. The logic circuit groups A1 and A2 configured by switch circuits connected in multiple stages are combinational circuits in which the CMOS switch circuits PTC1 and PTC2 are the final-stage switch circuits on the output side. In FIG. 1, when the switch circuit PTC1 is off, the switch circuit PTC2 is turned on, and the output of the logic circuit group A2 is output to the output circuit OUT1 via the switch circuit PTC2. Since the output of the logic circuit group A1 is disconnected from the output circuit OUT1 because the switch circuit PTC1 is off, the state of the logic circuit group A1 does not affect the output circuit OUT1 in this state. Thus, in this state, the substrate current (back gate voltage) is controlled to increase the threshold voltage of the logic circuit group A1, thereby reducing the leakage current without reducing the operation speed. On the contrary, the signal path of the switch circuit PTC2 that is turned on realizes a higher operation speed by controlling the substrate voltage and lowering the threshold voltage of the logic circuit group A2.

  In the circuit of the present invention, control signals for controlling on and off input to the gates of the n-channel MOS transistors (N-type MOSFETs) and p-channel MOS transistors (P-type MOSFETs) of the switch circuits PTC1 and PTC2, respectively, are logic circuits. The substrate voltage control signal BCn1 of the N-type MOSFET of the group A1 and the substrate voltage control signal BCp1 of the P-type MOSFET are connected. Accordingly, a special additional circuit for controlling the substrate voltage is not required, and the control unit for the substrate voltage is determined only by the logic circuit at the final stage, so that the control unit for the substrate voltage can be easily defined.

  In this way, by controlling the substrate voltage using the switch switching signal at the final stage on the output side of the multi-stage connected switch circuit as a control signal, the threshold voltage of the multi-stage connected switch circuit on the unselected signal path is obtained. In addition to reducing power consumption, the operation margin in low voltage operation can be improved. Furthermore, the threshold voltage of the switch circuits connected in multiple stages on the selected signal path can be lowered, and the operation speed can be increased.

  Next, FIG. 2 shows a specific method for connecting the combinational circuit AA1 shown in FIG. 1 and the substrate. As described above, the control signal CTLn1 for the N-type MOSFET of the switch circuit PTC1 is connected to the substrate voltage control signal BCn1 of the N-type MOSFET, and the control signal CTLp1 for the P-type MOSFET of the switch circuit PTC1 is connected to the substrate voltage of the P-type MOSFET. Connect to control signal BCp1. With this configuration, it is possible to easily control the substrate voltage without requiring a special additional circuit for controlling the substrate potential.

  Note that several types of substrate voltages prepared in advance, here, the control signal CTLn1 of the N-type MOSFET or the control signal CTLp1 of the P-type MOSFET are switched and used for each of the N-type MOSFET and the P-type MOSFET according to the state at that time. You may comprise as follows. This configuration will not be described in detail here.

Further, FIG. 3 shows a circuit block diagram having a large number of combinational circuits (logic circuit groups).
In the figure, groups 1, 2,..., X, y are equivalent to, for example, logic circuit groups A1, A2, etc. composed of multistage switch circuits. Either the group 1 or the group 2 is selected as the output circuit OUT1, and either the group x or the group y is selected as the output circuit OUTx, and the logic of the selected logic circuit group is output. In the example of FIG. 3, the case where the group 1 and the group y are selected is shown. The selected group 1 and group y can reduce the threshold voltage to improve the operation speed, and the unselected group 2 and group x can increase the threshold voltage and reduce the leakage current.

Second Embodiment
Next, a second embodiment of the circuit of the present invention will be described with reference to FIG.
FIG. 4 is a diagram showing a case where the circuit of the present invention is applied to an actual decoder circuit. In this embodiment, the logic of the decoder is composed of only an N-type MOSFET. Thus, in this embodiment, a logical configuration using only an N-type MOSFET is possible. As selection signals, normal rotation signals SA, SB, SC and inverted signals of the respective normal rotation signals are used. The data signals D1, D2, D3, D4, D5, D6, D7, and D8 are selected by each selection signal.

  In this embodiment, the function of the decoder is configured by a multistage switch circuit, and the substrate voltage is controlled using the switching signal of the switch circuits PTN3 and PTN4 in the final stage on the output side as a control signal. In the case of FIG. 4, the logic circuit group A4 including the signal paths of the data signals D5, D6, D7, and D8 is not selected by the switch circuit PTN4. In this case, the threshold voltage is increased to reduce the leakage current. On the contrary, the logic circuit group A3 including the signal paths of the data signals D1, D2, D3, and D4 is connected to the output circuit OUT3 by the switch circuit PTN3, so that the threshold voltage is lowered to improve the operation speed.

  In each of the above-described embodiments, a signal line for controlling the substrate voltage is required in addition to the normal power supply in the actual layout. Furthermore, it is necessary to separate the diffusion layers in groups so that the substrate voltage can be controlled in groups (logic circuit group units). It is also necessary to have a double well structure that can also separate wells that actually form transistors. However, in the case of a process capable of element isolation such as SOI (Silicon On Insulator), it is not necessary to be aware of isolation of the diffusion layer.

<Another embodiment>
Next, another embodiment of the circuit of the present invention will be described.

  <1> For example, a logic circuit group may be configured by switch circuits connected in multiple stages, such as a pass transistor logic circuit, and logic may be shared across a plurality of logic circuit groups. Even in the case of a circuit configuration, the circuit of the present invention can be realized by controlling the substrate voltage using the switching signal of the switch circuit at the final stage on the output side as a control signal. In this case, sharing of logic makes it impossible to completely separate an activated signal path connected to the output circuit OUT and an inactive signal path that is not connected in the current state. However, even if this is taken into consideration, the effect of controlling the substrate voltage in the portion to which the circuit of the present invention is applied can be expected. Furthermore, by configuring the switch circuits connected in multiple stages, the signal path to the power supply and ground becomes high resistance, and the circuit configuration itself has an effect of reducing leakage current.

  <2> The type of integrated circuit to which the present invention is applied is not particularly limited as long as a large number of transistors are formed on a semiconductor substrate, but can be applied to, for example, a microprocessor or an ASIC. It is.

  <3> In the above embodiments, for example, in FIG. 2, the control signal CTLn1 of the switch circuit PTC1 is connected to the substrate voltage control signal BCn1, and the control signal CTLp1 is connected to the substrate voltage control signal BCp1, Instead of the control signal CTLp1, a signal having the same polarity as the control signal CTLp1, for example, an inverted signal of the control signal CTLn1 of the switch circuit PTC1 is connected to the substrate voltage control signal BCp1, and instead of the control signal CTLn1, the signal having the same polarity as the control signal CTLn1 A signal, for example, an inverted signal of the control signal CTLp1 of the switch circuit PTC1 may be connected to the substrate voltage control signal BCn1. When the load of the signal path of the substrate voltage control signal BCn1 or the substrate voltage control signal BCp1 is large, the control signal CTLn1 and the control signal CTLp1, and the substrate voltage control signal BCn1 and the substrate voltage control signal BCp1 are directly connected. In addition, an increase in the load on the signal path of the control signal CTLp1 can be avoided.

1 is a schematic block diagram showing a schematic configuration of a first embodiment of an integrated circuit according to the present invention. Schematic circuit diagram for explaining a method of connecting a MOSFET and a substrate of an integrated circuit according to the present invention 1 is a schematic circuit diagram showing a schematic configuration of a first embodiment of an integrated circuit according to the present invention. The schematic block diagram which shows schematic structure in 2nd Embodiment of the integrated circuit which concerns on this invention. Schematic circuit diagram showing a schematic configuration of an N-type MOSFET in an integrated circuit according to the prior art Schematic circuit diagram showing a schematic configuration of an N-type MOSFET in an integrated circuit according to the prior art

Explanation of symbols

A1: Logic circuit group A2: Logic circuit group A3: Logic circuit group A4: Logic circuit group AA1: Combination circuit BCn1: Substrate voltage control signal BCp1: Substrate voltage control signal BCn2: Substrate voltage control signal BCp2: Substrate voltage control signal BCnx: Substrate voltage control signal BCpx: Substrate voltage control signal CTLn1: Control signal CTLp1: Control signal D1: Data signal D2: Data signal D3: Data signal D4: Data signal D5: Data signal D6: Data signal D7: Data signal D8: Data signal OUT1: output circuit OUT3: output circuit OUTx: output circuit PTC1: switch circuit PTC2: switch circuit PTCx: switch circuit PTCy: switch circuit PTN3: switch circuit PTN4: switch circuit

Claims (5)

An integrated circuit comprising a plurality of logic circuit groups formed by connecting switch circuits in multiple stages,
At least one of the logic circuit groups is a part or all of the MOSFETs constituting the switch circuit existing in the same logic circuit group using a control signal input to a specific switch circuit in the switch circuit An integrated circuit configured to control a voltage.   The integrated circuit according to claim 1, wherein the specific switch circuit is the last-stage switch circuit on the output side of the logic circuit group.   3. The integrated circuit according to claim 1, wherein the switch circuit is a CMOS switch circuit in which a P-type MOSFET and an N-type MOSFET are connected in parallel.   The control signal input to the gate of the P-type MOSFET of the specific switch circuit controls the substrate voltage of the P-type MOSFET, and the control signal input to the gate of the N-type MOSFET of the specific switch circuit 4. The integrated circuit according to claim 3, wherein the substrate voltage of the N-type MOSFET is controlled. The substrate voltage of the P-type MOSFET is controlled by a signal having the same polarity as the control signal input to the gate of the P-type MOSFET of the specific switch circuit, and input to the gate of the N-type MOSFET of the specific switch circuit. 4. The integrated circuit according to claim 3, wherein the substrate voltage of the N-type MOSFET is controlled by a signal having the same polarity as the control signal.