JP2007101570A - Driving device, electro-optical device, electronic apparatus, and driving method - Google Patents

Abstract

Provided are a driving device, an electro-optical device, an electronic apparatus, and a driving method capable of preventing AC power reduction with low power consumption while preventing a decrease in reliability, an increase in layout area, and an increase in cost.
A driving device 600 for driving an electro-optical device includes a data line driving circuit 520 that drives a data line, and a counter electrode that supplies a voltage to the counter electrode VCOM according to the polarity of an applied voltage of the electro-optical material. It includes a voltage supply circuit 560, short circuits SHT1 to SHTN for connecting the counter electrode VCOM and the data line, and a voltage setting circuit 562 for supplying the set voltage VSET to the counter electrode VCOM. When switching the polarity from positive to negative, once the set voltage VSET is supplied to the counter electrode VCOM, the counter electrode VCOM and the data line are electrically connected. Thereafter, the counter electrode VCOM and the data line are electrically cut off to supply the high potential side voltage VCOMH to the counter electrode VCOM, and the data line is driven based on the gradation data.
[Selection] Figure 11

Description

  The present invention relates to a driving device, an electro-optical device, an electronic apparatus, and a driving method.

  Conventionally, as a liquid crystal display (LCD) panel (display panel in a broad sense, an electro-optical device in a broad sense) used for an electronic device such as a cellular phone, a simple matrix type LCD panel and a thin film transistor ( 2. Description of the Related Art An active matrix type LCD panel using a switching element such as a thin film transistor (hereinafter abbreviated as TFT) is known.

  The simple matrix method is easier to reduce power consumption than the active matrix method, but it is difficult to increase the number of colors and display a moving image. On the other hand, the active matrix method is suitable for multicolor and moving image display, but it is difficult to reduce power consumption.

  In recent years, in portable electronic devices such as mobile phones, there is an increasing demand for multi-color display and moving image display in order to provide high-quality images. For this reason, an active matrix LCD panel has been used in place of the simple matrix LCD panel that has been used so far.

  In a simple matrix type LCD panel and an active matrix type LCD panel, driving is performed so that an applied voltage to liquid crystal (electro-optical material in a broad sense) constituting a pixel is an alternating current. As such AC driving methods, line inversion driving and field inversion driving (frame inversion driving) are known. In line inversion driving, driving is performed so that the polarity of the voltage applied to the liquid crystal is inverted every one or more scanning lines. In the field inversion driving, driving is performed so that the polarity of the voltage applied to the liquid crystal is inverted for each field (each frame).

  At that time, the voltage level applied to the pixel electrode is lowered by changing the counter electrode voltage (common voltage) supplied to the counter electrode (common electrode) facing the pixel electrode constituting the pixel in accordance with the inversion drive timing. Can be made.

When such AC driving is performed, an increase in power consumption accompanying charging / discharging of the liquid crystal is caused. Therefore, for example, in Patent Document 1, during inversion driving, the electric charge accumulated in the liquid crystal is initialized by short-circuiting the two electrodes sandwiching the liquid crystal, and the transition is made to the intermediate voltage of the voltage before the short-circuiting of the electrode, thereby reducing the consumption. A technique for achieving the above is disclosed.
JP 2002-244622 A

  By the way, when the high potential side voltage and the low potential side voltage of the counter electrode voltage are alternately supplied to the counter electrode according to the polarity of the voltage applied to the liquid crystal, the change in the voltage applied to the liquid crystal due to the gate-drain capacitance of the TFT In consideration of the above, the low potential side voltage is set to be lower than the ground potential VSS. For this reason, as disclosed in Patent Document 1, if the pixel electrode and the counter electrode are simply short-circuited, the potential of the intermediate voltage may be lower than the ground potential VSS.

  Therefore, a transistor to which an intermediate voltage is applied needs to be formed on a semiconductor substrate as a so-called triple well structure element, which increases the layout area as compared with the case where it is formed on a semiconductor substrate as a so-called twin well structure element. End up. Further, when the potential of the intermediate voltage becomes lower than the ground potential VSS, a current flows through a transistor for electrostatic protection added to a general semiconductor device to change the ground potential, thereby reducing the reliability of the semiconductor device. In some cases.

  In addition, when the potential of the intermediate voltage is lower than the ground potential VSS, a voltage exceeding the breakdown voltage (break breakdown voltage, gate breakdown voltage) of the transistor may be applied. For this reason, it is necessary to form all the transistors to which the intermediate voltage may be applied by a so-called high breakdown voltage manufacturing process, which increases the layout area of the transistor and increases the cost.

  The present invention has been made in view of the technical problems as described above. The object of the present invention is to prevent a decrease in reliability, an increase in layout area and an increase in cost, and an AC drive with low power consumption. It is an object to provide a driving device, an electro-optical device, an electronic apparatus, and a driving method that can be realized.

In order to solve the above problems, the present invention
A driving device for driving an electro-optical device including a data line, a pixel electrode to which a voltage of the data line is supplied, and a counter electrode facing the pixel electrode with an electro-optical material interposed therebetween,
A data line driving circuit for driving the data line based on gradation data;
A counter electrode voltage supply circuit that supplies one of a high-potential-side voltage and a low-potential-side voltage to the counter electrode according to the polarity of the applied voltage of the electro-optic material;
A short circuit for electrically connecting the counter electrode and the data line;
A voltage setting circuit for supplying a ground potential or a set voltage higher than the ground potential to the counter electrode,
When switching the polarity from positive to negative, once the voltage setting circuit supplies the set voltage to the counter electrode, the short circuit electrically connects the counter electrode and the data line,
Thereafter, the short circuit electrically cuts off the counter electrode and the data line, the counter electrode voltage supply circuit supplies the high-potential side voltage to the counter electrode, and the data line driving circuit performs the gradation. The present invention relates to a driving device that drives the data line based on data.

  In the present invention, when the polarity of the applied voltage of the electro-optic material is switched from positive to negative, first, a set voltage is supplied to the counter electrode. This set voltage is a ground potential or a voltage higher than the ground potential. Thereafter, the data line of the electro-optical device and the counter electrode set to the set voltage are electrically connected. At this time, the data line and the counter electrode have the same potential. However, since the data line generally has a potential equal to or higher than the ground potential, the potential of the data line and the counter electrode is always equal to or higher than the ground potential. Thereafter, the high potential side voltage is supplied to the counter electrode, and the data line is driven based on the gradation data.

  Thus, when the polarity is switched from positive to negative, the electric potentials of the counter electrode and the data line can be changed without supplying charges to the counter electrode and the data line from the outside. Therefore, the power consumption of the counter electrode supply circuit and the data line driving circuit can be reduced.

  Further, when the counter electrode and the data line are electrically connected, the potential can be set to a potential equal to or higher than the ground potential. As a result, the number of transistors that can be formed as an element having a so-called twin well structure can be increased, and the layout area can be reduced. In addition, a situation in which a current flows through an electrostatic protection transistor added to a general semiconductor device and the ground potential is not easily changed is prevented, and a decrease in reliability of the driving device can be prevented. Further, a voltage exceeding the withstand voltage is not applied to the transistor including the TFT. Accordingly, it is not necessary to form all of the transistors by a so-called high breakdown voltage manufacturing process, and the layout area of the transistors can be reduced and the cost can be reduced.

In the drive device according to the present invention,
When switching the polarity from negative to positive, the voltage setting circuit does not supply the setting voltage to the counter electrode, the short circuit electrically connects the counter electrode and the data line,
Thereafter, the short circuit electrically cuts off the counter electrode and the data line, the counter electrode voltage supply circuit supplies the low potential side voltage to the counter electrode, and the data line driving circuit performs the gradation. The data line can be driven based on data.

  According to the present invention, in addition to the above effect, when the polarity is switched from negative to positive, it is possible to change the potential of the counter electrode and the data line without supplying charge to the counter electrode and the data line from the outside. Therefore, the power consumption of the counter electrode supply circuit and the data line driving circuit can be further reduced.

The present invention also provides
A driving device for driving an electro-optical device including a data line, a pixel electrode to which a voltage of the data line is supplied, and a counter electrode facing the pixel electrode with an electro-optical material interposed therebetween,
A data line driving circuit for driving the data line based on gradation data;
Including a short circuit for electrically connecting the counter electrode and the data line,
When switching the polarity of the applied voltage of the electro-optic material from positive to negative, a ground potential or a set voltage higher than the ground potential is supplied to the counter electrode,
Then, after the short circuit electrically connects the counter electrode and the data line, the short circuit electrically disconnects the counter electrode and the data line, and the high potential side voltage and the low potential side voltage The data line driving circuit relates to a driving device that drives the data line based on the gradation data in a state where the high potential side voltage is supplied to the counter electrode.

  In the present invention, when the polarity of the applied voltage of the electro-optic material is switched from positive to negative, first, a set voltage is supplied to the counter electrode. This set voltage is a ground potential or a voltage higher than the ground potential. Thereafter, the data line of the electro-optical device and the counter electrode set to the set voltage are electrically connected. At this time, the data line and the counter electrode have the same potential. However, since the data line generally has a potential equal to or higher than the ground potential, the potential of the data line and the counter electrode is always equal to or higher than the ground potential. Thereafter, the high potential side voltage is supplied to the counter electrode, and the data line is driven based on the gradation data.

  Thus, when the polarity is switched from positive to negative, the electric potentials of the counter electrode and the data line can be changed without supplying charges to the counter electrode and the data line from the outside. Therefore, the power consumption of the data line driving circuit can be reduced.

  Further, when the counter electrode and the data line are electrically connected, the potential can be set to a potential equal to or higher than the ground potential. As a result, the number of transistors that can be formed as an element having a so-called twin well structure can be increased, and the layout area can be reduced. In addition, a situation in which a current flows through an electrostatic protection transistor added to a general semiconductor device and the ground potential is not easily changed is prevented, and a decrease in reliability of the driving device can be prevented. Further, a voltage exceeding the withstand voltage is not applied to the transistor including the TFT. Accordingly, it is not necessary to form all of the transistors by a so-called high breakdown voltage manufacturing process, and the layout area of the transistors can be reduced and the cost can be reduced.

In the drive device according to the present invention,
When switching the polarity from negative to positive, the set voltage is not supplied to the counter electrode, the short circuit electrically connects the counter electrode and the data line,
After that, the short-circuit circuit electrically cuts off the counter electrode and the data line, and the data line driving circuit supplies the data on the basis of the grayscale data in a state where a low potential side voltage is supplied to the counter electrode. The line can be driven.

  According to the present invention, in addition to the above effect, when the polarity is switched from negative to positive, it is possible to change the potential of the counter electrode and the data line without supplying charge to the counter electrode and the data line from the outside. Therefore, the power consumption of the data line driving circuit can be further reduced.

In the drive device according to the present invention,
The short circuit is
A first short-circuit switch circuit having one end connected to the counter electrode and the other end connected to a short-circuit voltage line;
A second short-circuit switch circuit having one end connected to the short-circuit voltage line and the other end connected to the output of the data line drive circuit;
The first and second short circuit switch circuits may be on / off controlled at the same timing.

  According to the present invention, the first and second short-circuit switch circuits are provided so that the load of the counter electrode and the load of the short-circuit voltage line can be separated by the first short-circuit switch circuit. It is possible to reduce the load on the electrode and to prevent image quality degradation caused by the voltage of the counter electrode not reaching a desired level.

The present invention also provides
Multiple data lines,
A plurality of scan lines;
A plurality of pixel electrodes specified by the plurality of scanning lines and the plurality of data lines;
A counter electrode provided across each pixel electrode of the plurality of pixel electrodes and an electro-optic material;
A scanning line driving circuit for scanning the plurality of scanning lines;
Including any one of the drive devices described above for driving the plurality of data lines,
The short circuit of the drive device is
The present invention relates to an electro-optical device that electrically connects a part or all of the plurality of data lines and the counter electrode.

The present invention also provides
Data lines,
Scanning lines;
A pixel electrode specified by the scan line and the data line;
A counter electrode provided across the pixel electrode and an electro-optic material;
A voltage setting circuit for supplying a ground potential or a set voltage higher than the ground potential to the counter electrode,
When switching the polarity of the applied voltage of the electro-optic material from positive to negative, after the voltage setting circuit supplies the setting voltage to the counter electrode, the counter electrode and the data line are electrically connected,
Thereafter, the counter electrode and the data line are electrically cut off, and the high potential side voltage of the high potential side voltage and the low potential side voltage is supplied to the counter electrode according to the polarity and the data line Relates to an electro-optical device driven based on gradation data.

The present invention also provides
Data lines,
Scanning lines;
A pixel electrode specified by the scan line and the data line;
A counter electrode provided across the pixel electrode and an electro-optic material;
Including a short circuit for electrically connecting the counter electrode and the data line,
When switching the polarity of the applied voltage of the electro-optic material from positive to negative, the short circuit electrically connects the counter electrode and the data line set to a ground potential or a potential higher than the ground potential,
Thereafter, the short circuit electrically cuts off the counter electrode and the data line, and the high potential side voltage of the high potential side voltage and the low potential side voltage is supplied to the counter electrode according to the polarity. In addition, the present invention relates to an electro-optical device in which the data line is driven based on gradation data.

In the electro-optical device according to the invention,
When switching the polarity from negative to positive, the counter voltage and the data line are electrically connected without the set voltage being supplied to the counter electrode,
Thereafter, the counter electrode and the data line are electrically disconnected, the low potential side voltage is supplied to the counter electrode, and the data line is driven based on the gradation data.

  According to any one of the above-described inventions, it is possible to provide an electro-optical device including a driving device that can prevent a decrease in reliability, an increase in layout area, and an increase in cost, and can realize AC driving with low power consumption.

The present invention also provides
The present invention relates to an electronic apparatus including any of the electro-optical devices described above.

  According to the present invention, it is possible to provide an electronic apparatus including an electro-optical device to which a driving device capable of realizing AC driving with low power consumption while preventing a decrease in reliability, an increase in layout area, and an increase in cost can be provided.

The present invention also provides
A driving method for driving an electro-optical device including a data line, a pixel electrode to which a voltage of the data line is supplied, and a counter electrode facing the pixel electrode with an electro-optical material interposed therebetween,
When switching the polarity of the applied voltage of the electro-optic material from positive to negative, once the ground voltage or a set voltage higher than the ground potential is supplied to the counter electrode, the counter electrode and the data line are electrically connected. Connect
Thereafter, the counter electrode and the data line are electrically cut off, and the high potential side voltage is supplied to the counter electrode among the high potential side voltage and the low potential side voltage, and the data based on the gradation data. It relates to a driving method for driving a line.

In the driving method according to the present invention,
When switching the polarity from negative to positive, without connecting the set voltage to the counter electrode, electrically connect the counter electrode and the data line,
Thereafter, the counter electrode and the data line are electrically cut off, the low potential side voltage is supplied to the counter electrode, and the data line can be driven based on the gradation data.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The embodiments described below do not unduly limit the contents of the present invention described in the claims. Also, not all of the configurations described below are essential constituent requirements of the present invention.

1. Liquid Crystal Display Device FIG. 1 shows a block diagram of a configuration example of the liquid crystal display device of the present embodiment.

  A liquid crystal display device (display device in a broad sense) 510 includes a display panel (LCD (Liquid Crystal Display) panel in a narrow sense, electro-optical device in a broad sense) 512, a data line driving circuit (a source driver in a narrow sense, a broad sense). A liquid crystal driving device, a driving device) 520, a scanning line driving circuit (gate driver in a narrow sense) 530, a controller 540, and a power supply circuit 542. Note that it is not necessary to include all these circuit blocks in the liquid crystal display device 510, and some of the circuit blocks may be omitted.

  Here, the display panel 512 (electro-optical device in a broad sense) is specified by a plurality of scanning lines (gate lines in a narrow sense), a plurality of data lines (source lines in a narrow sense), scanning lines, and data lines. Includes pixel electrodes. In this case, an active matrix liquid crystal display device can be configured by connecting a thin film transistor (TFT, switching element in a broad sense) to a data line and connecting a pixel electrode to the TFT.

More specifically, the display panel 512 is formed on an active matrix substrate (eg, a glass substrate). On this active matrix substrate, a plurality of scanning lines G _{1 to} G _M (M is a natural number of 2 or more) arranged in the Y direction and extending in the X direction, and a plurality of data arranged in the X direction and extending in the Y direction, respectively. Lines S _{1 to} S _N (N is a natural number of 2 or more) are arranged. The thin film transistor TFT _KL (switching in a broad sense) is located at a position corresponding to the intersection of the scanning line G _K (1 ≦ K ≦ M, K is a natural number) and the data line S _L (1 ≦ L ≦ N, L is a natural number). Element).

The gate electrode of the TFT _KL is connected to the scan line _{G K,} a source electrode of the _{TFT KL} is connected to the data line _{S L,} the drain electrode of the _{thin film transistor TFT KL} is connected with a pixel electrode _{PE KL.} Between the pixel electrode PE _KL and the counter electrode VCOM (common electrode) facing the pixel electrode PE _KL with the liquid crystal element (electro-optical material in a broad sense) interposed therebetween, a liquid crystal capacitor CL _KL (liquid crystal element) and an auxiliary A capacitor CS _KL is formed. Then, liquid crystal is sealed between the active matrix substrate on which the TFT _KL , the pixel electrode PE _{KL, and the} like are formed, and the counter substrate on which the counter electrode VCOM is formed, and the applied voltage between the pixel electrode PE _KL and the counter electrode VCOM. The transmittance of the pixel changes according to the above.

  The power supply circuit 542 includes a common electrode voltage supply circuit that generates a common electrode voltage applied to the common electrode VCOM and supplies the common electrode voltage to the common electrode VCOM. The common electrode voltage supply circuit can generate a high potential side voltage VCOMH and a low potential side voltage VCOML of the common electrode voltage. Note that the counter electrode VCOM may be formed in a strip shape so as to correspond to each scanning line without being solidly formed on the counter substrate.

The data line driving circuit 520 drives the data lines S _{1 to} S _N of the display panel 512 based on the gradation data. On the other hand, the scanning line driving circuit 530 sequentially scans drives the scan lines _G 1 ~G _M of the display panel 512.

  The controller 540 controls the data line driving circuit 520, the scanning line driving circuit 530, and the power supply circuit 542 in accordance with contents set by a host such as a central processing unit (hereinafter abbreviated as CPU) (not shown).

  More specifically, the controller 540 sets, for example, an operation mode and supplies an internally generated vertical synchronizing signal and horizontal synchronizing signal to the data line driving circuit 520 and the scanning line driving circuit 530, and a power supply circuit. For 542, the polarity inversion timing of the voltage of the counter electrode VCOM is controlled.

  The power supply circuit 542 generates various voltages (grayscale voltages) necessary for driving the display panel 512 and the voltage of the counter electrode VCOM based on a reference voltage supplied from the outside.

  In FIG. 1, the liquid crystal display device 510 includes the controller 540, but the controller 540 may be provided outside the liquid crystal display device 510. Alternatively, the host may be included in the liquid crystal display device 510 together with the controller 540. Further, part or all of the data line driver circuit 520, the scan line driver circuit 530, the controller 540, and the power supply circuit 542 may be formed over the display panel 512.

  FIG. 2 is a block diagram showing another configuration example of the liquid crystal display device according to this embodiment.

  In FIG. 2, a data line driving circuit 520, a scanning line driving circuit 530, and a power supply circuit 542 are formed on the display panel 512 (on the panel substrate). As described above, the display panel 512 includes a plurality of data lines, a plurality of scanning lines, a plurality of switching elements connected to the scanning lines of the plurality of scanning lines and the data lines of the plurality of data lines, and a plurality of switching elements. A data line driving circuit for driving the data lines and a scanning line driving circuit for scanning a plurality of scanning lines can be included. A plurality of pixels are formed in the pixel formation region 544 of the display panel 512.

  Note that in FIG. 2, a structure in which the scan line driver circuit is omitted from the display panel 512 may be employed. In FIG. 2, the controller 540 is not formed on the display panel 512, but the controller 540 may be formed on the display panel 512.

1.1 Data Line Driver Circuit FIG. 3 shows a configuration example of the data line driver circuit 520 of FIG.

  The data line driver circuit 520 includes a shift register 522, line latches 524 and 526, a DAC 528 (digital / analog conversion circuit; data voltage generation circuit in a broad sense), and an output buffer 529.

  The shift register 522 includes a plurality of flip-flops provided corresponding to the data lines and sequentially connected. When the shift register 522 holds the enable input / output signal EIO in synchronization with the clock signal CLK, the shift register 522 sequentially shifts the enable input / output signal EIO to the adjacent flip-flops in synchronization with the clock signal CLK.

  The line latch 524 receives gradation data (DIO) from the controller 540 in units of 18 bits (6 bits (gradation data) × 3 (RGB each color)), for example. The line latch 524 latches the gradation data (DIO) in synchronization with the enable input / output signal EIO sequentially shifted by each flip-flop of the shift register 522.

  The line latch 526 latches the grayscale data of one horizontal scanning unit latched by the line latch 524 in synchronization with the horizontal synchronization signal LP supplied from the controller 540.

  The DAC 528 generates an analog data voltage to be supplied to each data line. Specifically, the DAC 528 selects one of the gradation voltages from the power supply circuit 542 in FIG. 1 based on the digital gradation data from the line latch 526, and analog data corresponding to the digital gradation data. Output voltage.

The output buffer 529 buffers the data voltage from the DAC 528 and outputs it to the data line to drive the data line. Specifically, the output buffer 529, includes an operational amplifier _OPC 1 _{~OPC N} of the voltage follower connection provided for each data line, the each of these operational amplifier circuits _OPC 1 _{~OPC N,} data from DAC528 The voltage is impedance-converted and output to each data line.

  In FIG. 3, the digital gradation data is converted from digital to analog and output to the data line via the output buffer 529. However, the analog video signal is sampled and held, and the output buffer 529 is output. It may be configured to output to the data line via

1.2 Scan Line Driver Circuit FIG. 4 shows a configuration example of the scan line driver circuit 530 in FIG.

  The scanning line driver circuit 530 includes a shift register 532, a level shifter 534, and an output buffer 536.

  The shift register 532 includes a plurality of flip-flops provided corresponding to the scanning lines and sequentially connected. When the enable input / output signal EIO is held in the flip-flop in synchronization with the clock signal CLK, the shift register 532 sequentially shifts the enable input / output signal EIO to the adjacent flip-flop in synchronization with the clock signal CLK. The enable input / output signal EIO input here is a vertical synchronization signal supplied from the controller 540.

  The level shifter 534 shifts the voltage level from the shift register 532 to a voltage level corresponding to the liquid crystal element of the display panel 512 and the transistor capability of the TFT. As this voltage level, for example, a high voltage level of 20 V to 50 V is required.

  The output buffer 536 buffers the scanning voltage shifted by the level shifter 534 and outputs it to the scanning line to drive the scanning line.

1.3 Polarity Inversion Drive By the way, a liquid crystal element has a property that it deteriorates when a DC voltage is applied for a long time. For this reason, AC driving is required to reverse the polarity of the voltage applied to the liquid crystal element every predetermined period.

  FIG. 5 is an explanatory diagram of AC driving.

  As shown in FIG. 5, AC driving includes frame inversion driving, scanning (gate) line inversion driving, data (source) line inversion driving, dot inversion driving, and the like.

  Here, in the scanning line inversion driving, the polarity of the voltage applied to the liquid crystal element is inverted every scanning period (every one or a plurality of scanning lines). For example, in the Kth scanning period (selection period of the Kth scanning line), a positive voltage is applied to the liquid crystal element, and in the (K + 1) th scanning period, a negative voltage is applied and the (K + 2) th voltage is applied. A positive voltage is applied during the scanning period. On the other hand, in the next frame, a negative voltage is applied to the liquid crystal element in the Kth scanning period, a positive voltage is applied in the (K + 1) th scanning period, and the (K + 2) th scanning is performed. During the period, a negative polarity voltage is applied.

  In this scanning line inversion driving, the polarity of the voltage of the counter electrode VCOM is inverted every scanning period.

  FIG. 6 is an explanatory diagram of scanning line inversion driving.

  In the scan line inversion driving, the voltage of the counter electrode VCOM becomes the low potential side voltage VCOML in the positive period T1, and becomes the high potential side voltage VCOMH in the negative period T2.

  Here, the positive period T1 is a period in which the voltage of the data line S (pixel electrode) is higher than the voltage of the counter electrode VCOM. In this period T1, a positive voltage is applied to the liquid crystal element. On the other hand, the negative period T2 is a period in which the voltage of the data line S is lower than the voltage of the counter electrode VCOM. In this period T2, a negative voltage is applied to the liquid crystal element. The low potential side voltage VCOML is a voltage obtained by inverting the polarity of the high potential side voltage VCOMH with reference to a given voltage.

  In this way, by switching the voltage of the counter electrode VCOM between the high potential side voltage VCOMH and the low potential side voltage VCOML, the voltage necessary for driving the display panel can be lowered. Accordingly, the withstand voltage of the data line driving circuit and the scanning line driving circuit can be lowered, and the manufacturing process of the data line driving circuit and the scanning line driving circuit can be simplified and the cost can be reduced.

  Incidentally, the low potential side voltage VCOML of the counter electrode VCOM has an offset potential in a negative direction in advance with respect to the ground potential VSS, and the potential of the low potential side voltage VCOML is lower than the ground potential VSS.

FIG. 7 shows an example of a waveform of a voltage applied to the pixel including the TFT _KL . In FIG. 7, it is assumed that the same voltage is applied to the liquid crystal during the positive period T1 and the negative period T2.

In Figure 7, the period of the positive electrode T1, the period T2 of negative electrode, by selecting pulse of the scanning line _{G K} is applied, the voltage of the connected data line _{S L} is supplied to the pixel electrode _{PE KL} in _{TFT KL} . The data line S _L, for example, at a voltage between 0V to 5V, the voltage corresponding to the grayscale data is applied.

  At this time, the low potential side voltage VCOML of −2V is applied to the counter electrode VCOM during the positive period T1, and the high potential side voltage VCOMH of 4V is applied to the counter electrode VCOM during the negative period T2. That is, the low potential side voltage VCOML has an offset potential in advance in the negative direction with respect to the ground potential VSS.

The offset potential, when the scanning voltage of the scanning line G _K of TFT _KL constituting the pixel drops, a potential obtained by considering that drops also the drain voltage of the TFT _KL by capacitive coupling caused by the parasitic capacitance of the TFT _KL.

FIG. 8 is an explanatory diagram of the parasitic capacitance of the TFT _KL .

Parasitic capacitances C _SD , C _GD , and C _GS exist between the source and drain of the TFT _KL , between the gate and drain, and between the gate and source, respectively. Here, a scanning voltage having an amplitude between 15 V and −10 V, for example, is supplied to the gate of the TFT _KL . The _{TFT KL,} when the scanning voltage having, for example, 15V potential supplied, _{TFT KL} is turned on, the voltage of the maximum 5V which is applied to the data line _{S L} is supplied to the pixel electrode _{PE KL.}

Then, when the scanning voltage of the _{TFT KL} is the potential of -10 V, _{TFT KL} is turned off. Then, the capacitive coupling by the parasitic capacitance, is pulled to a very large gate voltage amplitude, it will also drop the voltage of the pixel electrode PE _KL.

Therefore, if the voltage drop, for example, 1.5V due to capacitive coupling, the scanning voltage of the scanning line G _K drops in the period T1 of positive, the voltage of the data line S _L by the capacitive coupling of the parasitic capacitance of the TFT _KL is 3. 5V (= 5V-1.5V). Therefore, in the positive electrode period T1, 5.5V (= 3.5V − (− 1.5V)) is applied to the liquid crystal as the voltage Vp.

On the other hand, when the scan voltage of the scan line _{G K} drops in the period T2 of negative polarity, the voltage of the data line _{S L} becomes -1.5V (= 0V-1.5V) by the capacitive coupling of the parasitic capacitance of the _{TFT KL.} Therefore, in the negative electrode period T2, 5.5V (= 4V − (− 1.5V)) is applied to the liquid crystal as the voltage Vm. Therefore, the same voltage is applied to the liquid crystal during the positive period T1 and the negative period T2.

  As described above, by providing an offset potential in the negative direction in advance to the low potential side voltage VCOML of the counter electrode VCOM, the effective voltage applied to the liquid crystal can be made uniform without increasing the voltage level.

1.4 Reuse of Charge However, in the polarity inversion drive as described above, the power consumption increases with the charge and discharge of the charge accumulated in the liquid crystal. Therefore, by reusing the charge stored in the liquid crystal by the following method, the amount of charge to be supplied by the power supply circuit can be reduced and the power consumption can be reduced.

  FIG. 9A is a schematic explanatory diagram of normal driving. FIG. 9B is a schematic explanatory diagram of charge recycling. 9A and 9B, the same portions as those in FIG. 1 or 2 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

  9A and 9B, the data line driver circuit 520 can drive each data line based on the grayscale voltage corresponding to the grayscale data. Further, the output of the common electrode voltage supply circuit 560 built in the power supply circuit 542 is electrically connected to or electrically cut off from the common electrode VCOM. The data line driving circuit 520 can drive each data line based on the gradation data, or can supply the counter electrode voltage generated by the counter electrode voltage supply circuit 560 to each data line instead. ing.

At the time of normal driving, as shown in FIG. 9A, the common electrode voltage supply circuit 560 supplies the common electrode voltage (high potential side voltage VCOMH or low potential side voltage VCOML) to the common electrode VCOM. Then, the data line driving circuit 520 drives on the basis of the data line _S 1 to S _N of the display panel 512 to the gray-scale data.

  On the other hand, when the charge is reused, as shown in FIG. 9B, the output of the common electrode voltage supply circuit 560 and the common electrode VCOM are electrically cut off, and the data line driving circuit 520 is connected to each data line. The counter electrode VCOM is electrically connected. Thus, the voltage of each data line becomes equal to the voltage of the counter electrode VCOM, and the data line potential can be changed without the data line driving circuit 520 supplying electric charges. Therefore, the power consumption of the data line driver circuit 520 can be reduced. In addition, the counter electrode voltage supply circuit 560 can also change the potential of the counter electrode VCOM necessary for polarity inversion driving without supplying electric charge, thereby reducing the power consumption of the counter electrode voltage supply circuit 560. be able to.

  FIG. 10 shows an example of a waveform when reusing charges.

  In the positive period, the low potential side voltage VCOML is supplied to the counter electrode VCOM, and in the negative period, the high potential side voltage VCOMH is supplied to the counter electrode VCOM. Then, the voltage of the data line is also switched according to the polarity between the positive period and the negative period. At this time, an operation during normal driving is performed as shown in FIG.

  When switching from the positive electrode period to the negative electrode period, the charge recycling period is started first. The charge reuse period is specified by a given charge reuse period designation signal. In the charge reuse period, charge reuse is performed as shown in FIG. That is, the counter electrode VCOM and the data line are electrically connected, and the voltage of the counter electrode VCOM is equal to the voltage of the data line.

  Thereafter, when the charge recycle period ends, the counter electrode VCOM and the data line are electrically disconnected, and the operation during normal driving is performed as shown in FIG.

  Then, when switching from the negative electrode period to the positive electrode period, the charge recycling period is similarly started. This charge reuse period is also specified by a given charge reuse period designation signal. In the charge reuse period, charge reuse is performed as shown in FIG. That is, the counter electrode VCOM and the data line are electrically connected, and the voltage of the counter electrode VCOM is equal to the voltage of the data line.

  Thereafter, when the charge recycle period ends, the counter electrode VCOM and the data line are electrically disconnected, and the operation during normal driving is performed as shown in FIG.

  Here, a case where so-called black display is performed on the normally white display panel 512 is considered. In this case, since the potential of the data line in the positive period is high, even if the low-potential-side voltage VCOML of the counter electrode VCOM has an offset potential, the voltage of the counter electrode VCOM and the data line in the charge recycling period is The potential is higher than the ground potential VSS.

  On the other hand, in the normally white display panel 512, when performing so-called white display, the potential of the data line is low in the positive period, and the voltage of the counter electrode VCOM and the data line is the ground potential VSS in the charge recycle period. There may be a lower potential.

  When a voltage lower than the ground potential VSS is applied to the data line, a transistor including a TFT connected to the data line needs to be formed as a so-called triple well structure element, which increases a layout area. End up. In some cases, a current flows through an electrostatic protection transistor provided in a data line driving circuit for driving the data line to change the ground potential, thereby reducing the reliability of the data line driving circuit.

  Further, when a voltage lower than the ground potential VSS is applied to the data line, a voltage exceeding the breakdown voltage (break breakdown voltage, gate breakdown voltage) of the transistor including the TFT is applied. Therefore, the transistor layout area is increased and the cost is increased.

  On the other hand, when switching from the negative electrode period to the positive electrode period, since the high potential side voltage VCOMH is applied to the counter electrode VCOM, the ground potential VSS is applied to the counter electrode VCOM and the data line even in the same charge recycling period. A lower potential voltage is not applied.

  Therefore, in the present embodiment, when switching from the positive electrode period to the negative electrode period, a voltage lower than the ground potential VSS is not applied to the counter electrode VCOM and the data line in the charge recycle period. Improvement, prevention of an increase in layout area, and cost reduction can be achieved.

2. FIG. 11 shows a main part of the configuration of the data line driving circuit and the counter electrode voltage supply circuit of the present embodiment. In FIG. 11, the same parts as those in FIG. 1 or FIG.

  The driving device 600 in the present embodiment can drive the display panel 512 as an electro-optical device. The driving device 600 includes a data line driving circuit 520 and a power supply circuit 542. The display panel 512 can include a data line, a pixel electrode to which a voltage of the data line is supplied, and a counter electrode facing the pixel electrode with an electro-optical material interposed therebetween.

  The power supply circuit 542 includes a counter electrode voltage supply circuit 560. The counter electrode voltage supply circuit 560 generates a high-potential-side voltage VCOMH and a low-potential-side voltage VCOML, and the high-potential-side voltage VCOMH and the low-potential-side voltage according to the polarity of the applied voltage of the liquid crystal (electro-optical material in a broad sense). Output one of VCOML. The polarity of the voltage applied to the liquid crystal is specified by the polarity inversion signal POL from the controller 540. The data line driving circuit 520 drives the data line based on the gradation voltage corresponding to the polarity specified by the polarity inversion signal POL even for the same gradation data.

  The power supply circuit 542 includes a voltage setting circuit 562. The voltage setting circuit 562 can supply the setting voltage VSET to the counter electrode VCOM. More specifically, the voltage setting circuit 562 supplies either the output voltage of the common electrode voltage supply circuit 560 or the set voltage VSET to the common electrode VCOM as the common electrode voltage. Here, the set voltage VSET can be a voltage of the ground potential VSS or a voltage higher than the ground potential VSS. The operation of the voltage setting circuit 562 is controlled by a control signal VSC.

The data line driving circuit 520 can drive each data line based on the grayscale voltage corresponding to the grayscale data. Data line driving circuit 520 includes short-circuit circuits SHT1 to SHTN. Short circuit SHT1~SHTN is a circuit for electrically connecting the counter electrode VCOM and the data line _S 1 to S _N. By doing so, the output of the data line driving circuit 520 is electrically connected to the counter electrode VCOM or is electrically cut off. The data line driving circuit 520 can supply the voltage of the counter electrode VCOM to each data line instead of driving each data line based on the gradation data. The operation of such short circuits SHT1 to SHTN is controlled by a control signal BSC.

In FIG. 11, the short circuit of the short circuit SHT1~SHTN is, although provided corresponding to each data line of the data lines _S 1 to S _N of the display panel 512, the data lines _S 1 ~ of the display panel 512 at least a portion of the data line S _N may be a configuration in which short circuit is provided.

  FIG. 12 shows a timing chart of an operation example of the driving device 600 of FIG.

  When the polarity of the voltage applied to the liquid crystal is switched from positive to negative, a voltage setting period is started prior to the charge recycling period.

  The voltage setting period is specified by a given voltage setting period specifying signal. The charge reuse period is specified by a given charge reuse period designation signal. The voltage setting period designation signal and the charge reuse period designation signal are generated in the driving device 600. In the driving device 600, for example, a counter is provided in the data line driving circuit 520 or the power supply circuit 542, and the voltage setting period is started at the switching timing from the positive period specified by the polarity inversion signal POL to the negative period. The voltage setting period designation signal is generated so that the voltage setting period ends after the predetermined first count number elapses. In addition, a charge recycle period is started after the voltage setting period ends, and a charge recycle period designation signal is generated so that the charge recycle period ends after a predetermined second count of the counter has elapsed.

In the voltage setting period, the voltage setting circuit 562 sets the setting voltage VSET to the counter electrode VCOM. In FIG. 12, the set voltage VSET is a voltage having the same potential as the ground potential VSS. And in charge recycle period following the voltage setting period, when the output of the voltage setting circuit 562 is set to the high impedance state, electrical short circuit SHT1~SHTN is a counter electrode VCOM and the data line _S 1 to S _N Connect to.

When charge recycle period ends, short circuit SHT1~SHTN is electrically disconnecting the counter electrode VCOM and the data line _S 1 to S _N, via a voltage setting circuit 562, a high counter electrode voltage supply circuit 560 The potential side voltage VCOMH is supplied to the counter electrode VCOM, and the data line driving circuit 520 drives the data lines S _{1 to} S _N based on the gradation data.

  Accordingly, when performing a so-called black display on the normally white display panel 512, even if the low-potential-side voltage VCOML of the counter electrode VCOM has an offset potential, the counter electrode VCOM and the data line are used in the charge recycle period. Is higher than the ground potential VSS. This is the same as FIG.

  On the other hand, in the normally white display panel 512, when performing so-called white display, the potential of the data line in the positive period is low, but the counter electrode VCOM has the same potential as the ground potential VSS in the charge recycle period. Is set. Therefore, when the counter electrode VCOM and the data line are electrically connected, the potential of both is higher than the ground potential VSS.

Next, when the polarity of the voltage applied to the liquid crystal is switched from negative to positive, the charge recycle period is started without providing the voltage setting period. That is, when the polarity of the voltage applied to the liquid crystal is switched from negative to positive, the voltage setting circuit 562 does not supply the setting voltage VSET to the counter electrode VCOM, and the short circuits SHT1 to SHTN are connected to the counter electrode VCOM and the data lines S _{1 to} S. _N is electrically connected.

More specifically, the charge recycle period, when the output of the voltage setting circuit 562 is set to the high impedance state, electrical short circuit SHT1~SHTN is a counter electrode VCOM and the data line _S 1 to S _N Connect to.

When charge recycle period ends, short circuit SHT1~SHTN is electrically disconnecting the counter electrode VCOM and the data line _S 1 to S _N, via a voltage setting circuit 562, a low counter electrode voltage supply circuit 560 supplies a potential-side voltage VCOML the counter electrode VCOM, the data line driving circuit 520 drives the data lines _S 1 to S _N based on the grayscale data.

  Therefore, in the normally white display panel 512, when performing so-called black display or white display, even if the low potential side voltage VCOML of the counter electrode VCOM has an offset potential, The voltage of VCOM and the data line is higher than the ground potential VSS. This is the same as FIG.

  As described above, according to the present embodiment, a voltage lower than the ground potential VSS is not applied to the data line during the charge recycling period. Therefore, except for the transistor to which the low potential side voltage VCOML is supplied, the transistor including the TFT connected to the data line can be formed as an element having a so-called twin well structure, and the layout area can be reduced. Accordingly, there is no situation in which a current flows through the electrostatic protection transistor and the ground potential is changed, and a decrease in the reliability of the data line driving circuit can be prevented.

  Further, a voltage exceeding the withstand voltage is not applied to the transistor including the TFT. Accordingly, it is not necessary to form all of the transistors by a so-called high breakdown voltage manufacturing process, and the layout area of the transistors can be reduced and the cost can be reduced.

In FIG. 11, the driving device 600 has been described as including the power supply circuit 542, but the present embodiment is not limited to this. For example the drive device 600, a data line driving circuit 520 and a counter electrode VCOM and the data line _S 1 to S _N may include a short circuit SHT1~STHN for electrically connecting. In this case, when the polarity of the voltage applied to the liquid crystal is switched from positive to negative, the set voltage VSET is first supplied to the counter electrode VCOM. Then, after the short circuit SHT1~SHTN is electrically connected to the counter electrode VCOM and the data line _S 1 to S _N, short circuit SHT1~SHTN is electrically and counter electrode VCOM and the data line _S 1 to S _N Cut off. Then, in a state where the high potential side voltage VCOMH is supplied to the counter electrode VCOM, the data line driving circuit 520 drives the data lines S _{1 to} S _N based on the gradation data.

Also, when switching positive polarity from negative, without setting voltage VSET is applied to the counter electrode VCOM, first short circuit SHT1~SHTN to electrically connect the counter electrode VCOM and the data line _S 1 to S _N . Thereafter, the short circuit SHT1~SHTN is electrically cut off and the counter electrode VCOM and the data line _S 1 to S _N, the data line driving circuit 520 in a state where the low-potential-side voltage VCOML is supplied to the counter electrode VCOM gradation The data lines S _{1 to} S _N are driven based on the data.

2.1 Configuration Example of Drive Device FIG. 13 is a circuit diagram showing a configuration example of the drive device shown in FIG. In FIG. 13, the same parts as those in FIG.

  The common electrode voltage supply circuit 560 includes a VCOMH generation circuit 570, a VCOML generation circuit 572, a P-type (first conductivity type in a broad sense) metal oxide semiconductor (MOS) transistor (hereinafter abbreviated as a transistor) PTr1. , N-type (second conductivity type in a broad sense) transistor NTr1. The VCOMH generation circuit 570 generates the high potential side voltage VCOMH. The VCOML generation circuit 572 generates a low potential side voltage VCOML.

  The high potential side voltage VCOMH is supplied to the source of the transistor PTr1. The low potential side voltage VCOML is supplied to the source of the transistor NTr1. The drains of the transistors PTr1 and NTr1 are connected to each other, and this connection node is electrically connected to the counter electrode VCOM. The transistor PTr1 is ON / OFF controlled by the control signal VCSELX, and the transistor NTr1 is ON / OFF controlled by the control signal VCSEL. Here, the transistor is in an on state means that the source and drain of the transistor are set in an electrically conductive state, and the transistor is in an off state in which the source and drain of the transistor is electrically connected. The state set to a non-conduction state. The control signals VCSELX and VCSEL are generated based on, for example, the polarity inversion signal POL, the voltage setting period designation signal, and the charge reuse period designation signal.

  The voltage setting circuit 562 includes an N-type transistor VSTr. A voltage of the ground potential VSS is supplied to the source of the transistor VSTr as a set voltage. The drains of the transistors VTrr are connected to the drains of the transistors PTr1 and NTr1. The transistor VSTr is ON / OFF controlled by the control signal VSC. The control signal VSC is generated based on, for example, the polarity inversion signal POL and the voltage setting period designation signal.

  The power supply circuit 542 can include a transfer switch VSW (first short-circuit switch circuit). One end of the transfer switch VSW is connected to the counter electrode VCOM (the drains of the transistors NTr1 and PTr1), and the other end of the transfer switch VSW is connected to the short-circuit voltage line SPV. Here, the state in which the transfer switch VSW is on refers to a state in which both ends of the transfer switch VSW are set to an electrically conductive state, and the state in which the transfer switch VSW is off refers to the state in which both ends of the transfer switch VSW are electrically connected. In other words, the state is set to a non-conductive state. Such a transfer switch VSW is ON / OFF controlled by a control signal BSC.

On the other hand, an N-type transistor (second short-circuit switch circuit) is connected to the output of each operational amplifier of the data line driving circuit 520. That is, the data line driving circuit 520 includes transistors BTr1 to BTrN, and each transistor is connected to an output of each operational amplifier (in a broad sense, each output of the data line driving circuit 520). The source of the transistor BTr1 (drain) is connected to the output of the operational amplifier OPC _1, the drain of the transistor BTr1 (source) is connected to a short-circuit voltage line SPV. The source of the transistor BTr2 (drain) is connected to the output of the operational amplifier OPC _2, the drain of the transistor BTr2 (source) is connected to a short-circuit voltage line SPV. Similarly, the source of the transistor BTrN (drain) is connected to the output of the operational amplifier OPC _N, the drain of the transistor BTrN (source) is connected to a short-circuit voltage line SPV. The transistors BTr1 to BTrN are on / off controlled by a control signal BSC. That is, the transfer switch VSW and the transistors BTr1 to BTrN are on / off controlled at the same timing. Such a control signal BSC is generated based on, for example, the polarity inversion signal POL and the charge reuse period designation signal.

  The functions of the short circuits SHT1 to SHTN are realized by the transfer switch VSW and the transistors BTr1 to BTrN.

  In the present embodiment, since the transfer switch VSW is provided on the power supply circuit 542 side so that the counter electrode VCOM and the short-circuit voltage line SPV can be electrically disconnected, the load on the counter electrode voltage supply circuit 560 is reduced during normal driving. In addition, it is possible to prevent deterioration in image quality due to the voltage of the counter electrode VCOM not reaching a desired level.

  FIG. 14 shows an example of the control timing of the drive device of FIG.

  The transistor PTr1 is controlled by the control signal VCSELX so as to be turned on in the negative period and after the end of the voltage setting period and the charge recycling period. The transistor NTr1 is controlled by the control signal VCSEL so as to be turned on in a positive period, which is a period after the end of the charge recycling period.

  The transistor VSTr is controlled by the control signal VSC so as to be turned on in a voltage setting period provided only in the negative period.

  The transfer switch VSW and the transistors BTr1 to BTrN are controlled to be turned on by the control signal BSC during the positive charge period and the negative charge recycle period.

  By controlling as described above, the voltage setting period can be provided prior to the charge recycle period when the positive period is switched to the negative period. In the voltage setting period, by supplying the setting voltage VSET to the counter electrode VCOM, it is possible to avoid a situation where a voltage lower than the ground potential VSS is applied to the counter electrode VCOM and the data line in the charge reuse period. Become.

Incidentally, the driving device 600 in the present embodiment may be provided on a panel substrate on which the display panel 512 is formed, as shown in FIG. Multiple this case, the display panel 512, which is specified by a plurality of data lines, a plurality of scan lines _G 1 ~G _M, a plurality of scan lines _G 1 ~G _M and a plurality of data lines _S 1 to S _N and the pixel electrode, a counter electrode VCOM provided across each pixel electrode and the liquid crystal of the pixel electrodes, a scanning line driving circuit 530 for scanning a plurality of scanning lines G ₁ ~G _M, a plurality of data lines S _{1 to SN,} and a driving device 600 for driving. The driving device 600 realizes the function of the data line driving circuit 520 and the function of at least a part of the power supply circuit 542. Then, the short circuit of the driving device 600 electrically connects a part or all of the plurality of data lines S _{1 to} S _N and the counter electrode VCOM.

  In FIG. 13, the data line driving circuit 520 includes the transistors BTr1 to BTrN, and the power supply circuit 542 includes the transistor VSTr and the transfer switch VSW. However, the present embodiment is not limited to this. .

  FIG. 15 shows a configuration example of a display panel as an electro-optical device.

  On the panel substrate on which the display panel 700 as the electro-optical device in FIG. 15 is formed, the transistors BTr1 to BTrN, the transistor VSTr, and the transfer switch VSW in FIG. 13 are provided. Then, the counter electrode voltage is supplied to the counter electrode VCOM provided in the pixel formation region 544.

In this case, the display panel 700 includes a plurality of data lines _S 1 to S _N, and a plurality of scanning lines, a plurality of pixel electrodes, and the counter electrode VCOM, the transistor BTr1～BTrN, a transfer switch VSW, voltage setting circuit As a transistor VSTr.

  Therefore, the display panel 700 includes a data line, a scan line, a pixel electrode specified by the scan line and the data line, a counter electrode VCOM provided with the pixel electrode and the liquid crystal interposed therebetween, and the counter electrode VCOM and the data line. Transistors BTr1 to BTrN and a transfer switch VSW (short circuit) for electrically connecting to the transistor, and a transistor VSTr (voltage setting circuit) for supplying a ground voltage or a set voltage higher than the ground potential to the counter electrode. ). When the polarity is switched from positive to negative, after the transistor VSTr supplies the set voltage to the counter electrode VCOM, the counter electrode VCOM and the data line are electrically connected by at least one of the transistors BTr1 to BTrN and the transfer switch VSW. Is done. Thereafter, the counter electrode VCOM and the data line are electrically disconnected by at least one of the transistors BTr1 to BTrN and the transfer switch VSW, and the high potential side of the high potential side voltage VCOMH and the low potential side voltage VCOML according to the polarity. The voltage VCOMH is supplied to the counter electrode VCOM and the data line is driven based on the gradation data.

  Note that at least one of the transistors BTr1 to BTrN, the transistor VSTr, and the transfer switch VSW in FIG. 13 may be provided on the panel substrate.

  FIG. 16 illustrates another configuration example of the display panel as the electro-optical device.

  The transistor VSTr of FIG. 13 is provided on the panel substrate on which the display panel 710 as the electro-optical device in FIG. 16 is formed. Then, the counter electrode voltage is supplied to the counter electrode VCOM provided in the pixel formation region 544. The transistors BTr1 to BTrN may be incorporated in the data line driving circuit 520. The transfer switch VSW may be incorporated in the data line driving circuit 520 or the power supply circuit 542.

  A display panel 710 in FIG. 16 includes a data line, a scan line, a pixel electrode specified by the scan line and the data line, a counter electrode VCOM provided with the pixel electrode and the liquid crystal interposed therebetween, and a ground potential or the ground. And a transistor VSTr (voltage setting circuit) for supplying a set voltage higher than the potential to the counter electrode. When the polarity is switched from positive to negative, after the transistor VSTr supplies a set voltage to the counter electrode VCOM, the counter electrode VCOM and the data line are electrically connected. Thereafter, the counter electrode VCOM and the data line are electrically disconnected, and the high potential side voltage VCOMH among the high potential side voltage VCOMH and the low potential side voltage VCOML is supplied to the counter electrode VCOM according to the polarity, and the data line is Driven based on the gradation data.

  FIG. 17 shows still another configuration example of the display panel as the electro-optical device.

  On the panel substrate on which the display panel 720 as the electro-optical device in FIG. 17 is formed, the transistors BTr1 to BTrN and the transfer switch VSW in FIG. 13 are provided. Then, the counter electrode voltage is supplied to the counter electrode VCOM provided in the pixel formation region 544. The transistor VSTr may be incorporated in the power supply circuit 542.

  The display panel 720 in FIG. 17 includes a data line, a scan line, a pixel electrode specified by the scan line and the data line, a counter electrode VCOM provided with the pixel electrode and the liquid crystal interposed therebetween, a counter electrode VCOM, and data. Transistors BTr1 to BTrN and a transfer switch VSW for electrically connecting the lines can be included. When the polarity is switched from positive to negative, the transistor BTr1 to BTrN and the transfer switch VSW electrically connect the counter electrode VCOM set to a potential higher than the ground potential VSS or the ground potential VSS and the data line. Thereafter, the counter electrodes VCOM and the data line are electrically disconnected by the transistors BTr1 to BTrN and the transfer switch VSW, and the high potential side voltage VCOMH among the high potential side voltage VCOMH and the low potential side voltage VCOML is changed according to the polarity. The data line is supplied to the counter electrode VCOM and driven based on the gradation data.

  In the display panels shown in FIGS. 15 to 17, the operation when switching the polarity from negative to positive is the same.

3. Electronic Device FIG. 18 is a block diagram showing a configuration example of an electronic device according to this embodiment. Here, a block diagram of a configuration example of a mobile phone is shown as an electronic device. In FIG. 18, the same parts as those in FIG. 1 or FIG.

  The mobile phone 900 includes a camera module 910. The camera module 910 includes a CCD camera, and supplies gradation data of an image captured by the CCD camera to the controller 540 in the YUV format.

  The mobile phone 900 includes a display panel 512. The display panel 512 (electro-optical device in a broad sense) is driven by the data line driving circuit 520 and the scanning line driving circuit 530. The display panel 512 includes a plurality of scanning lines, a plurality of data lines, and a plurality of pixels. The power supply circuit 542 is connected to the data line driving circuit 520 and the scanning line driving circuit 530, and supplies a driving power supply voltage to each driving circuit. A counter electrode voltage is supplied to the counter electrode VCOM of the display panel 512. The function of the driving device 600 in this embodiment is realized by the data line driving circuit 520 and the power supply circuit 542, for example.

  The controller 540 is connected to the data line driving circuit 520 and the scanning line driving circuit 530, and supplies gradation data in RGB format to the data line driving circuit 520.

  Host 940 is connected to controller 540. The host 940 controls the controller 540. The host 940 can supply the gradation data received via the antenna 960 to the controller 540 after demodulating the modulation / demodulation unit 950. The controller 540 causes the display panel 512 to display the data line driving circuit 520 and the scanning line driving circuit 530 based on the gradation data.

  The host 940 can instruct transmission to another communication device via the antenna 960 after the modulation / demodulation unit 950 modulates the gradation data generated by the camera module 910.

  The host 940 performs gradation data transmission / reception processing, imaging of the camera module 910, and display processing of the display panel 512 based on operation information from the operation input unit 970.

  The present invention is not limited to the above-described embodiment, and various modifications can be made within the scope of the gist of the present invention. For example, the present invention is not limited to being applied to driving the above-described liquid crystal display panel, but can be applied to driving electroluminescence and plasma display devices.

  In the invention according to the dependent claims of the present invention, a part of the constituent features of the dependent claims can be omitted. Moreover, the principal part of the invention according to one independent claim of the present invention can be made dependent on another independent claim.

1 is a block diagram of a configuration example of a liquid crystal display device of an embodiment. The block diagram of the other structural example of the liquid crystal display device in this embodiment. FIG. 2 is a diagram illustrating a configuration example of a data line driving circuit in FIG. 1. FIG. 2 is a diagram illustrating a configuration example of a scanning line driving circuit in FIG. 1. Explanatory drawing of alternating current drive. Explanatory drawing of a scanning line inversion drive. The figure which shows an example of the waveform of the voltage applied to the pixel containing TFT. Explanatory drawing of the parasitic capacitance of TFT. FIG. 9A is a schematic explanatory diagram of normal driving. FIG. 9B is a schematic explanatory diagram of charge recycling. The figure which shows the example of a waveform at the time of reuse of an electric charge. The figure which shows the principal part of the structure of the data line drive circuit of this embodiment, and a counter electrode voltage supply circuit. FIG. 12 is a timing diagram of an operation example of the drive device of FIG. 11. The circuit diagram of the structural example of the drive device of FIG. The figure which shows an example of the control timing of the drive device of FIG. FIG. 6 is a diagram illustrating a configuration example of a display panel as an electro-optical device. FIG. 10 is a diagram illustrating another configuration example of a display panel as an electro-optical device. FIG. 10 is a diagram showing still another configuration example of a display panel as an electro-optical device. 1 is a block diagram of a configuration example of an electronic device according to an embodiment.

Explanation of symbols

510 liquid crystal display device, 512, 700, 710, 720 display panel,
520 data line driving circuit, 530 data line driving circuit, 540 controller,
542 power supply circuit, 560 counter electrode voltage supply circuit, 562 voltage setting circuit,
570 VCOMH generation circuit, 572 VCOML generation circuit, 600 driving device,
BSC, VSC control signals G ₁ ~G _M scan lines, _OPC 1 ~OPC _N operational amplifiers,
PE _KL pixel electrode, POL polarity inversion signal, _S 1 to S _N data lines,
SHT1-SHTN short circuit, SPV short circuit voltage line, TFT _KL TFT,
VCOM counter electrode, VSET set voltage, VSW transfer switch

Claims (12)

A driving device for driving an electro-optical device including a data line, a pixel electrode to which a voltage of the data line is supplied, and a counter electrode facing the pixel electrode with an electro-optical material interposed therebetween,
A data line driving circuit for driving the data line based on gradation data;
A counter electrode voltage supply circuit that supplies one of a high-potential-side voltage and a low-potential-side voltage to the counter electrode according to the polarity of the applied voltage of the electro-optic material;
A short circuit for electrically connecting the counter electrode and the data line;
A voltage setting circuit for supplying a ground potential or a set voltage higher than the ground potential to the counter electrode,
When switching the polarity from positive to negative, once the voltage setting circuit supplies the set voltage to the counter electrode, the short circuit electrically connects the counter electrode and the data line,
Thereafter, the short circuit electrically cuts off the counter electrode and the data line, the counter electrode voltage supply circuit supplies the high-potential side voltage to the counter electrode, and the data line driving circuit performs the gradation. A driving apparatus that drives the data line based on data. In claim 1,
When switching the polarity from negative to positive, the voltage setting circuit does not supply the setting voltage to the counter electrode, the short circuit electrically connects the counter electrode and the data line,
Thereafter, the short circuit electrically cuts off the counter electrode and the data line, the counter electrode voltage supply circuit supplies the low potential side voltage to the counter electrode, and the data line driving circuit performs the gradation. A driving apparatus that drives the data line based on data. A driving device for driving an electro-optical device including a data line, a pixel electrode to which a voltage of the data line is supplied, and a counter electrode facing the pixel electrode with an electro-optical material interposed therebetween,
A data line driving circuit for driving the data line based on gradation data;
Including a short circuit for electrically connecting the counter electrode and the data line,
When switching the polarity of the applied voltage of the electro-optic material from positive to negative, a ground potential or a set voltage higher than the ground potential is supplied to the counter electrode,
Then, after the short circuit electrically connects the counter electrode and the data line, the short circuit electrically disconnects the counter electrode and the data line, and the high potential side voltage and the low potential side voltage The data line driving circuit drives the data line based on the gradation data in a state where the high potential side voltage is supplied to the counter electrode. In claim 3,
When switching the polarity from negative to positive, the set voltage is not supplied to the counter electrode, the short circuit electrically connects the counter electrode and the data line,
After that, the short-circuit circuit electrically cuts off the counter electrode and the data line, and the data line driving circuit supplies the data on the basis of the grayscale data in a state where a low potential side voltage is supplied to the counter electrode. A driving device for driving a line. In any one of Claims 1 thru | or 4,
The short circuit is
A first short-circuit switch circuit having one end connected to the counter electrode and the other end connected to a short-circuit voltage line;
A second short-circuit switch circuit having one end connected to the short-circuit voltage line and the other end connected to the output of the data line drive circuit;
The drive device characterized in that the first and second short-circuit switch circuits are on / off controlled at the same timing. Multiple data lines,
A plurality of scan lines;
A plurality of pixel electrodes specified by the plurality of scanning lines and the plurality of data lines;
A counter electrode provided across each pixel electrode of the plurality of pixel electrodes and an electro-optic material;
A scanning line driving circuit for scanning the plurality of scanning lines;
A driving device according to any one of claims 1 to 5 for driving the plurality of data lines;
The short circuit of the drive device is
An electro-optical device, wherein a part or all of the plurality of data lines are electrically connected to the counter electrode. Data lines,
Scanning lines;
A pixel electrode specified by the scan line and the data line;
A counter electrode provided across the pixel electrode and an electro-optic material;
A voltage setting circuit for supplying a ground potential or a set voltage higher than the ground potential to the counter electrode,
When switching the polarity of the applied voltage of the electro-optic material from positive to negative, after the voltage setting circuit supplies the setting voltage to the counter electrode, the counter electrode and the data line are electrically connected,
Thereafter, the counter electrode and the data line are electrically cut off, and the high potential side voltage of the high potential side voltage and the low potential side voltage is supplied to the counter electrode according to the polarity and the data line Is driven on the basis of gradation data. Data lines,
Scanning lines;
A pixel electrode specified by the scan line and the data line;
A counter electrode provided across the pixel electrode and an electro-optic material;
Including a short circuit for electrically connecting the counter electrode and the data line,
When switching the polarity of the applied voltage of the electro-optic material from positive to negative, the short circuit electrically connects the counter electrode and the data line set to a ground potential or a potential higher than the ground potential,
Thereafter, the short circuit electrically cuts off the counter electrode and the data line, and the high potential side voltage of the high potential side voltage and the low potential side voltage is supplied to the counter electrode according to the polarity. And the data line is driven based on gradation data. In claim 7 or 8,
When switching the polarity from negative to positive, the counter voltage and the data line are electrically connected without the set voltage being supplied to the counter electrode,
Thereafter, the counter electrode and the data line are electrically cut off, the low potential side voltage is supplied to the counter electrode, and the data line is driven based on gradation data. Electro-optic device.   An electronic apparatus comprising the electro-optical device according to claim 6. A driving method for driving an electro-optical device including a data line, a pixel electrode to which a voltage of the data line is supplied, and a counter electrode facing the pixel electrode with an electro-optical material interposed therebetween,
When switching the polarity of the applied voltage of the electro-optic material from positive to negative, once the ground voltage or a set voltage higher than the ground potential is supplied to the counter electrode, the counter electrode and the data line are electrically connected. Connect
Thereafter, the counter electrode and the data line are electrically cut off, and the high potential side voltage is supplied to the counter electrode among the high potential side voltage and the low potential side voltage, and the data based on the gradation data. A driving method characterized by driving a line. In claim 11,
When switching the polarity from negative to positive, without connecting the set voltage to the counter electrode, electrically connect the counter electrode and the data line,
Thereafter, the counter electrode and the data line are electrically cut off, the low potential side voltage is supplied to the counter electrode, and the data line is driven based on the gradation data. Method.

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