JP2007193968A - Method for manufacturing plasma display panel - Google Patents

Abstract

An object of the present invention is to provide a method for manufacturing a plasma display panel with high brightness.
Disclosed is a front substrate 1 on which a plurality of display electrodes 3 and 4 are formed, and a rear substrate 2 on which a plurality of data electrodes 8 and an insulator layer 7 covering the data electrodes 8 are formed with a discharge space therebetween. A phosphor layer 10 is formed by applying a phosphor paste on the insulator layer 7 and on the side surfaces of the partition wall 9 in the discharge space. In the method for manufacturing a plasma display panel, before forming the phosphor layer 10, the coat layer 18 has a surface property that the contact angle of the phosphor paste is larger than that of the barrier ribs 9 on the insulator layer 7. Is formed, and then a phosphor paste is applied, followed by firing.
[Selection] Figure 8

Description

  The present invention relates to a method for manufacturing a plasma display panel (hereinafter also referred to as a panel).

  This panel is roughly divided into AC type and DC type in terms of driving, and there are two types of discharge types: surface discharge type and counter discharge type. However, from the viewpoint of high definition, large screen, and ease of manufacturing. At present, the mainstream is a surface discharge type having a three-electrode structure.

  In this surface discharge type panel structure, at least a pair of substrates transparent at least on the front side are arranged to face each other so that a discharge space is formed between the substrates, and partition walls for dividing the discharge space into a plurality are arranged on the substrate. In addition, a plurality of discharge cells are configured by arranging an electrode group on the substrate so that discharge is generated in a discharge space partitioned by the partition walls, and providing phosphors that emit red, green, and blue light emitted by discharge. Thus, the phosphor is excited by vacuum ultraviolet light having a short wavelength generated by discharge, and red, green, and blue visible light is emitted from the red, green, and blue discharge cells, respectively, to perform color display.

  Such a panel is capable of high-speed display compared to a liquid crystal panel, has a wide viewing angle, is easy to increase in size, and is self-luminous, so the display quality is high. Recently, it has attracted particular attention among panel displays, and is used for various purposes as a display device at a place where many people gather or a display device for enjoying a large screen image at home.

And such a panel is hold | maintained at the front side of a metal chassis member, and the module is comprised by arrange | positioning the circuit board which comprises the drive circuit for making the panel light-emit on the back side of the chassis member. (See Patent Document 1).
JP 2003-131580 A

  By the way, in the panel as described above, in order to obtain high luminance, the phosphor layer is enlarged to increase the conversion efficiency from excitation light to visible light, and visible light is emitted from the discharge space. In order to obtain a wide viewing angle, the amount of visible light emitted without being shielded by the barrier ribs in an oblique direction must be sufficient over a wide angle range. Need to be bigger. Therefore, it is desirable that the phosphor layer be formed between the barrier ribs and the barrier ribs almost uniformly from the vicinity of the top of the barrier ribs to the base portion. When it cannot be formed in such a state, the brightness is lowered and the display screen becomes dark.

  Further, in order to obtain high luminance, the phosphor layer has a function as a reflection layer based on its own high reflectance as a function other than the function as the light emitting layer. That is, in order to obtain high brightness, it is necessary to form the inner wall of the discharge space with a thickness that can function as a reflective layer.

  The present invention has been made in view of such a current situation, and a method for manufacturing a plasma display panel that makes it possible to realize a high-luminance plasma display panel by forming a phosphor layer in a state where luminous efficiency is high. The purpose is to provide.

  In order to solve this problem, a plasma display panel manufacturing method of the present invention includes a front substrate on which a plurality of display electrodes are formed, and a rear substrate on which a plurality of data electrodes and an insulating layer covering the data electrodes are formed. And a phosphor layer formed by applying a phosphor paste on the insulator layer and on the side surface of the partition wall, with the partition wall interposed therebetween so as to form a discharge space therebetween. A method of manufacturing a plasma display panel comprising: forming a coating layer having a surface characteristic that a contact angle of the phosphor paste is larger than the barrier ribs on the insulator layer before forming the phosphor layer. Then, a phosphor paste is applied and then fired, and then the plasma display panel manufacturing method is characterized.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of a high-intensity plasma display panel can be provided.

  That is, according to the first aspect of the present invention, a front substrate on which a plurality of display electrodes are formed and a back substrate on which a plurality of data electrodes and an insulator layer covering the data electrodes are formed are discharged between them. A plasma display having a phosphor layer formed by applying a phosphor paste on the insulator layer and on the side surface of the partition wall, facing each other across the partition wall so as to form a space. In the method for manufacturing a panel, before forming the phosphor layer, a coating layer having a surface characteristic that a contact angle of the phosphor paste is larger than the partition is formed on the insulator layer, and then A method of manufacturing a plasma display panel, characterized in that a phosphor paste is applied and then fired.

  In the invention according to claim 2 of the present invention, in the invention according to claim 1, the coating layer has a thickness Ha on the insulator layer that is less than 0 <Ha with respect to the height Hr of the partition wall. It is formed so as to satisfy the relationship of ≦ 0.5 × Hr.

  The invention according to claim 3 of the present invention is the invention according to claim 1 or 2, wherein the coating layer has a height Hb in contact with a side surface of the partition wall, the height of the partition wall. It is characterized by being formed so as to satisfy the relationship of Hb ≦ 0.5 × Hr with respect to Hr.

  Further, the invention according to claim 4 of the present invention is the invention according to any one of claims 1 to 3, wherein the coat layer is formed by mixing a hydrophilic polymer and one or more solvents. It is characterized by being coated and dried with a functional polymer vehicle.

  The invention according to claim 5 of the present invention is the invention according to claim 4, wherein the drying temperature Td (° C.) at the time of drying is the boiling point of the solvent constituting the hydrophilic polymer vehicle Tb ( C.), the relationship of Tb-30 ≦ Td ≦ Tb + 30 is satisfied.

  Further, in the invention described in claim 6 of the present invention, in the invention described in claim 1, the temperature Tc (° C.) at which the resin material constituting the coat layer is thermally decomposed is the highest temperature reached during the firing. It satisfies the relationship of Tc <Tp with respect to Tp (° C.).

Hereinafter, although the manufacturing method of the plasma display panel by one Embodiment of this invention is demonstrated using FIGS. 1-9, the aspect of this invention is not limited to this.
Note that the same number is assigned to the same component.

  First, the structure of the plasma display panel will be described with reference to FIG. As shown in FIG. 1, the panel is configured by disposing a glass front substrate 1 and a back substrate 2 so as to form a discharge space therebetween. On the front substrate 1, a plurality of scanning electrodes 3 and sustaining electrodes 4 constituting display electrodes are formed in parallel with each other. A dielectric layer 5 is formed so as to cover the scan electrode 3 and the sustain electrode 4, and a protective layer 6 is formed on the dielectric layer 5. A plurality of data electrodes 8 covered with an insulator layer 7 are provided on the back substrate 2, and a grid-like partition wall 9 is provided on the insulator layer 7.

  Then, the front substrate 1 and the rear substrate 2 are disposed so as to face each other so that the scan electrode 3, the sustain electrode 4 and the data electrode 8 intersect each other with a partition wall 9 interposed therebetween so as to form a discharge space therebetween. Inside, the phosphor layer 10 is formed on the insulator layer 7 and the side surfaces of the partition walls 9 by applying a phosphor paste.

  In the discharge space, for example, a mixed gas of neon and xenon is enclosed as a discharge gas. Note that the structure of the panel is not limited to the above-described structure, and for example, a structure having a stripe-shaped partition may be used.

  FIG. 2 is an electrode array diagram of this panel. N scan electrodes SC1 to SCn (scan electrode 3 in FIG. 1) and n sustain electrodes SU1 to SUn (sustain electrode 4 in FIG. 1) are arranged in the row direction, and m data electrodes D1 to D1 are arranged in the column direction. Dm (data electrode 8 in FIG. 1) is arranged. A discharge cell is formed at a portion where a pair of scan electrode SCi and sustain electrode SUi (i = 1 to n) and one data electrode Dj (j = 1 to m) intersect, and the discharge cell is in the discharge space. M × n are formed.

  FIG. 3 is a circuit block diagram of a plasma display device using this panel. The plasma display device includes a panel 11, an image signal processing circuit 12, a data electrode drive circuit 13, a scan electrode drive circuit 14, a sustain electrode drive circuit 15, a timing generation circuit 16, and a power supply circuit (not shown).

  The image signal processing circuit 12 converts the image signal sig into image data for each subfield. The data electrode drive circuit 13 converts the image data for each subfield into signals corresponding to the data electrodes D1 to Dm, and drives the data electrodes D1 to Dm. The timing generation circuit 16 generates various timing signals based on the horizontal synchronization signal H and the vertical synchronization signal V, and supplies them to each drive circuit block. Scan electrode drive circuit 14 supplies drive voltage waveforms to scan electrodes SC1 to SCn based on timing signals, and sustain electrode drive circuit 15 supplies drive voltage waveforms to sustain electrodes SU1 to SUn based on timing signals. Here, the scan electrode drive circuit 14 and the sustain electrode drive circuit 15 include a sustain pulse generator 17.

  Next, a driving voltage waveform for driving the panel and its operation will be described with reference to FIG. FIG. 4 is a diagram showing drive voltage waveforms applied to the respective electrodes of the panel.

  In the plasma display device according to the present embodiment, one field is divided into a plurality of subfields, and each subfield has an initialization period, an address period, and a sustain period.

  In the initializing period of the first subfield, the data electrodes D1 to Dm and the sustain electrodes SU1 to SUn are held at 0 (V), and from the voltage Vi1 (V) that is lower than the discharge start voltage with respect to the scan electrodes SC1 to SCn A ramp voltage that gradually increases toward the voltage Vi2 (V) exceeding the discharge start voltage is applied. Then, the first weak initializing discharge is caused in all the discharge cells, negative wall voltages are stored on scan electrodes SC1 to SCn, and positive walls on sustain electrodes SU1 to SUn and data electrodes D1 to Dm. The voltage is stored. Here, the wall voltage on the electrode refers to a voltage generated by wall charges accumulated on the dielectric layer or the phosphor layer covering the electrode.

  Thereafter, sustain electrodes SU1 to SUn are maintained at positive voltage Vh (V), and a ramp voltage that gradually decreases from voltage Vi3 (V) to voltage Vi4 (V) is applied to scan electrodes SC1 to SCn. Then, the second weak initializing discharge is caused in all the discharge cells, the wall voltage between scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn is weakened, and the wall voltage on data electrodes D1 to Dm is reduced. Is also adjusted to a value suitable for the write operation.

  In the subsequent address period, scan electrodes SC1 to SCn are temporarily held at Vr (V). Next, negative scan pulse voltage Va (V) is applied to scan electrode SC1 in the first row, and data electrode Dk (k = 1 to 1) of the discharge cell to be displayed in the first row among data electrodes D1 to Dm. A positive write pulse voltage Vd (V) is applied to m). At this time, the voltage at the intersection between the data electrode Dk and the scan electrode SC1 is obtained by adding the wall voltage on the data electrode Dk and the wall voltage on the scan electrode SC1 to the externally applied voltage (Vd−Va) (V). And the discharge start voltage is exceeded. Then, an address discharge occurs between data electrode Dk and scan electrode SC1 and between sustain electrode SU1 and scan electrode SC1, and a positive wall voltage is accumulated on scan electrode SC1 of this discharge cell, and on sustain electrode SU1. And a negative wall voltage is also accumulated on the data electrode Dk.

  In this manner, an address operation is performed in which address discharge is caused in the discharge cells to be displayed in the first row and wall voltage is accumulated on each electrode. On the other hand, the voltage at the intersection of the data electrodes D1 to Dm and the scan electrode SC1 to which the address pulse voltage Vd (V) is not applied does not exceed the discharge start voltage, so that address discharge does not occur. The above address operation is sequentially performed until the discharge cell in the nth row, and the address period ends.

  In the subsequent sustain period, positive sustain pulse voltage Vs (V) is applied to scan electrodes SC1 to SCn as a first voltage, and ground potential, that is, 0 (V) is applied to sustain electrodes SU1 to SUn as a second voltage. Apply. In the discharge cell in which the address discharge has occurred at this time, the voltage between scan electrode SCi and sustain electrode SUi is the sustain pulse voltage Vs (V), the wall voltage on scan electrode SCi and the wall voltage on sustain electrode SUi. Is added and exceeds the discharge start voltage. Then, a sustain discharge occurs between scan electrode SCi and sustain electrode SUi, and the phosphor layer emits light due to the ultraviolet rays generated at this time. Then, a negative wall voltage is accumulated on scan electrode SCi, and a positive wall voltage is accumulated on sustain electrode SUi. At this time, a positive wall voltage is also accumulated on the data electrode Dk.

  In the discharge cells in which no address discharge has occurred in the address period, no sustain discharge occurs, and the wall voltage at the end of the initialization period is maintained. Subsequently, 0 (V) that is the second voltage is applied to scan electrodes SC1 to SCn, and sustain pulse voltage Vs (V) that is the first voltage is applied to sustain electrodes SU1 to SUn. Then, in the discharge cell in which the sustain discharge has occurred, the voltage between the sustain electrode SUi and the scan electrode SCi exceeds the discharge start voltage, so that the sustain discharge occurs again between the sustain electrode SUi and the scan electrode SCi, Negative wall voltage is accumulated on sustain electrode SUi, and positive wall voltage is accumulated on scan electrode SCi.

  Thereafter, similarly, by applying sustain pulses of the number corresponding to the luminance weight alternately to scan electrodes SC1 to SCn and sustain electrodes SU1 to SUn, the sustain discharge continues in the discharge cells that have caused the address discharge in the address period. Done. Thus, the maintenance operation in the maintenance period is completed.

  The operations in the initialization period, address period, and sustain period in the subsequent subfield are substantially the same as those in the first subfield, and thus description thereof is omitted.

  FIG. 5 shows an example of the overall configuration of a plasma display device incorporating the panel having the structure described above, and FIG. 6 shows an example of the arrangement of drive circuit blocks as viewed from the back side.

  In the figure, 21 is a chassis member as a holding plate that also serves as a heat sink made of metal such as aluminum. On the front side of the chassis member 21, a panel 11 is placed between the chassis member 21 and a heat dissipation sheet (see FIG. 5). (Not shown) is held by bonding with an adhesive or the like. Further, as shown in FIG. 6, a plurality of drive circuit blocks for driving the panel 11 are arranged on the rear side of the chassis member 21, thereby constituting a module.

  Here, the heat-dissipating sheet is for adhering and holding the panel 11 on the front side of the chassis member 21, efficiently transferring heat generated in the panel 11 to the chassis member 21, and performing heat dissipation. Is about 1 mm to 2 mm. As this heat radiating sheet, an insulating heat radiating sheet in which a synthetic resin material such as acrylic, urethane, silicon resin, or rubber contains a filler that enhances thermal conductivity, a graphite sheet, a metal sheet, or the like can be used. In addition, the heat radiation sheet itself has an adhesive force, and the panel 11 is bonded to the chassis member 21 only by the heat radiation sheet, or the heat radiation sheet has no adhesive force, and another double-sided adhesive tape is used. The structure etc. which adhere | attach can be used for the chassis member 21 can be used.

  In addition, flexible wiring boards 22 as display electrode wiring members connected to the electrode lead portions of the scan electrodes 3 and the sustain electrodes 4 are provided on both side edges of the panel 11, and the rear side passes through the outer periphery of the chassis member 21. And connected to the drive circuit block 23 of the scan electrode drive circuit 14 and the drive circuit block 24 of the sustain electrode drive circuit 15 via connectors.

  On the other hand, a plurality of flexible wiring boards 25 as data electrode wiring members connected to the electrode lead portions of the data electrodes 8 are provided on the lower and upper edges of the panel 11, and the flexible wiring boards 25 are connected to The plurality of data drivers 26 of the electrode drive circuit 13 are electrically connected to each other, routed to the back side through the outer periphery of the chassis member 21, and disposed at the lower and upper positions on the back side of the chassis member 21. The drive circuit block 27 of the data electrode drive circuit 13 is electrically connected.

  The control circuit block 28 displays image data on the basis of a video signal sent from an input signal circuit block 29 having an input terminal portion to which a connection cable for connecting to an external device such as a television tuner is detachably connected. 11 is converted into an image data signal corresponding to the number of pixels 11 and supplied to the drive circuit block 27 of the data electrode drive circuit, and a discharge control timing signal is generated, and the drive circuit block 23 and the sustain electrode of the scan electrode drive circuit 14 are generated. This is supplied to the drive circuit block 24 of the drive circuit 15 and performs display drive control such as gradation control, and is arranged at substantially the center of the chassis member 21.

  The power supply block 30 supplies a voltage to each of the circuit blocks. Like the control circuit block 28, the power supply block 30 is disposed at a substantially central portion of the chassis member 21, and is commercialized through a connector to which a power supply cable (not shown) is attached. A power supply voltage is supplied. These drive circuit blocks 23, 24, 27, control circuit block 28, input signal circuit block 29, and power supply block 30 are fixed to the boss portion provided on the back side of the chassis member 21 with screws or the like.

  Further, a cooling fan 31 is disposed in the vicinity of the drive circuit blocks 23 and 24 while being held at an angle 32 so that the drive circuit blocks 23 and 24 are cooled by the wind sent from the cooling fan 31. It is configured. Further, the drive circuit block 27 of the data electrode drive circuit 13 disposed at the upper position is cooled at the upper position of the chassis member 21, and on the rear side of the chassis member 21, the entire apparatus is moved from the lower portion toward the upper portion. Three cooling fans 33 are arranged to cool the inside of the apparatus by causing an air flow.

  Further, reinforcing angles 34 and 35 are fixed to the chassis member 21 in the horizontal direction and the vertical direction, and the angle 34 arranged in the horizontal direction is a stand for holding the apparatus in an upright state. The pole 36 is fixed with screws or the like.

  The module having the above structure is housed in a housing having a front protective cover 37 disposed on the front side of the panel 11 and a metal back cover 38 disposed on the rear side of the chassis member 21. This completes the plasma display device. Here, the front protective cover 37 is attached to the front frame 39 made of resin or metal having an opening 39a from which the image display area on the front side of the panel 11 is exposed, and the opening 39a of the front frame 39, and And a protective plate 40 made of glass or the like provided with an unnecessary radiation suppressing film for suppressing unnecessary radiation of an optical filter or electromagnetic wave, and the protective plate 40 has a front frame around the periphery of the protective plate 40. It is attached to the front frame 39 by being sandwiched between the peripheral edge portion of the opening 39 a of 39 and a protective plate pressing metal fitting (not shown). Further, the back cover 38 is provided with a plurality of vent holes (not shown) for releasing heat generated by the module to the outside.

  In FIG. 5, reference numeral 41 denotes a screw for attaching the back cover 38 to the chassis member 21, and 42 denotes a gripping part attached to the back cover 38 with a screw or the like.

  Next, a method for manufacturing a plasma display panel according to an embodiment of the present invention will be described using the plasma display panel having the above-described structure as an example.

  FIG. 7 is a cross-sectional perspective view showing a schematic structure in a state where the insulator layer 7, the data electrode 8, and the partition wall 9 are formed on the back substrate 2. FIG. 8 is a cross-sectional view taken along the line AA in FIG. 7, and is a diagram for explaining a process of forming the coat layer 18 and the phosphor layer 10. The partition wall 9 is formed on the back substrate 2 by, for example, a method of repeatedly forming screen printing and then baking. The shape of the partition wall 9 is not particularly limited, such as a stripe shape, a cross beam shape, or a hexagonal shape. Note that the height of the partition wall 9 is, for example, 120 μm.

  Then, as shown in FIG. 8A, for example, a polyvinyl alcohol (PVA) aqueous solution is applied by a printing method, and then dried at 120 ° C., thereby forming a PVA coat layer 18 on the insulator layer 7. It is formed with a thickness of about Ha = 20 μm. At this time, it is not necessary to perform the drying sufficiently, and it is sufficient that the wettability of the coating layer 18 after drying with respect to the phosphor paste of the partition wall 9 can be differentiated from the wettability of the barrier rib 9 with respect to the phosphor paste. The temperature Td (° C.) may be set so as to satisfy the relationship of Tb−30 ≦ Td ≦ Tb + 30, where Tb (° C.) is the boiling point of the solvent.

  The coating layer 18 may be applied by a screen printing method or an ink jet method and a method of discharging from a nozzle or needle. However, it is better to use the same method as the method of forming the phosphor layer 10 to be performed later. Is desirable from a technical perspective.

  Furthermore, as the resin constituting the coat layer 18, a hydrophilic polymer such as polyvinyl acetal, polyethylene oxide, polyvinyl pyrrolidone, etc. can be used in addition to PVA.

  Then, with the coat layer 18 formed, RGB phosphor pastes are applied by, for example, a screen printing method. At this time, the phosphor paste is applied to the space partitioned by the barrier ribs 9 in full. The phosphor paste is prepared by adjusting a vehicle in which 15% is dissolved in α-terpineol using ethyl cellulose (weight average molecular weight: 10,000 to 50,000) as a binder resin, and the vehicle, the phosphor powder, and the dispersant. A mixture of (glyceryl trioleate) at a ratio of 50: 49.5: 0.5 is used. In addition to α-terpineol, the organic solvent for dissolving the binder resin can be used without particular limitation as long as it has a boiling point of 100 ° C to 300 ° C and does not separate from the binder and the phosphor powder component. Alcohol-based, ether-based and ester-based ones are preferred. From this point, in addition to terpineol (boiling point 217 ° C.), benzyl alcohol (boiling point 205 ° C.), N-methylpyrrolidone (boiling point 202 ° C.), diethylene glycol monobutyl ether (boiling point 231 ° C.), triethylene glycol monomethyl ether (boiling point 245 ° C.) , Triethylene glycol dimethyl ether (boiling point 216 ° C.) and the like are preferable because of their excellent workability.

  Thus, after apply | coating fluorescent substance paste, the cross-sectional shape after making it dry for 30 minutes at 220 degreeC is a figure compared with the state of the conventional fluorescent substance layer 10 schematically shown with sectional drawing in FIG. As shown in FIG. 8B, the phosphor layer 10 is formed thick on the side surface of the partition wall 9. That is, since the viscosity of the phosphor paste is low and the fluidity is high, the phosphor paste flows down and accumulates on the insulator layer 7 side when the phosphor paste is applied and dried. The phosphor layer has been formed thicker toward the insulator layer 9 than the side surface of the barrier rib 9. According to the method of manufacturing a plasma display panel according to the embodiment of the present invention described above, the phosphor Since the contact angle (18 degrees) of the paste with respect to the barrier ribs 9 is higher than the contact angle (24 degrees) with respect to the coating layer 18 formed on the insulator layer 7, the drying of the solvent forming the phosphor paste causes the coating layer to dry. This is because it occurs strongly from the side 18 and as a result, the phosphor layer 10 is formed thick on the barrier rib 9.

  In order to obtain the effect of the coat layer 18 as described above better, the coat layer 18 has a thickness Ha on the insulator layer 7 (although distributed on the insulator layer 7), the height of the partition wall. It is preferable to form such that the relationship of 0 <Ha ≦ 0.5 × Hr is satisfied with respect to Hr. Further, the height Hb of the coat layer 18 at the contact portion with the side surface of the partition wall 9 may be formed so as to satisfy the relationship of Hb ≦ 0.5 × Hr with respect to the height Hr of the partition wall 9. preferable.

  The wettability of the phosphor paste varies depending on the constituent components of the phosphor paste, but the same effect can be obtained by appropriately selecting the material of the coating layer 18 having the wettability corresponding thereto.

  And it bakes at 520 degreeC from the state (FIG.8 (b)) after drying a fluorescent substance paste. As a result, the binder is thermally decomposed and phosphor layer formation is completed (FIG. 8C). If the relationship Tc <Tp exists between the maximum temperature Tp (° C.) of the firing temperature and the temperature Tc (° C.) at which the material constituting the coating layer is thermally decomposed, the phosphor paste is fired. At the same time, the coat layer 18 is also thermally decomposed. As a result, the discharge space can be widened (FIG. 8 (c)), and the generation of impure gas, which causes a problem as a panel, can be prevented. For example, PVA has a thermal decomposition temperature of about 500 ° C. and is decomposed when the phosphor paste is baked.

After the phosphor layer 10 is formed as described above, the back substrate 2 and the front substrate 1 on which the phosphor layer 10 is provided are bonded to each other using sealing glass, and the inside of the discharge space is temporarily set to 8 in the discharge space. The plasma display panel is completed by evacuating to a vacuum degree of about 10 ⁻² Torr and then sealing the discharge space as a discharge gas containing, for example, 10% xenon (Xe) gas at a pressure of about 500 Torr.

When the panel manufactured as described above is discharged at a discharge sustaining voltage of 170 V and a frequency of 46 KHz, the luminance (white) is 520 (cd / m ² ), which is 5% compared to the conventional 495 (cd / m ² ). % Brightness improvement was achieved. Furthermore, it was confirmed that when the entire surface was turned on, there was no uneven coating or omission of the phosphor layer, and light emission with high brightness was obtained uniformly.

  As described above, the present invention is useful for providing a large-screen, high-definition plasma display device.

The perspective view which shows the principal part of the panel used for the plasma display apparatus by one embodiment of this invention. Electrode arrangement of the panel Circuit block diagram of the plasma display device Waveform diagram showing drive voltage waveform applied to each electrode of panel Exploded perspective view showing the entire configuration of the plasma display device The top view which shows an example of arrangement | positioning which looked at the same plasma display apparatus from the back side Cross-sectional perspective view showing a schematic structure in a state in which an insulator layer, a data electrode, and a partition wall 9 are formed on a back substrate. The figure for explaining the formation process of the coat layer and the phosphor layer Sectional drawing which shows the state of the conventional fluorescent substance layer roughly

Explanation of symbols

2 Back substrate 7 Insulator layer 8 Data electrode 9 Partition 10 Phosphor layer 18 Coat layer

Claims (6)

A front substrate on which a plurality of display electrodes are formed, and a rear substrate on which a plurality of data electrodes and an insulating layer covering the data electrodes are formed are arranged opposite to each other so as to form a discharge space therebetween, In the discharge space, a method of manufacturing a plasma display panel having a phosphor layer formed by applying a phosphor paste on the insulator layer and on a side surface of the partition wall, wherein the phosphor layer is formed Before forming, a coating layer having a surface characteristic that the contact angle of the phosphor paste is larger than the barrier ribs is formed on the insulator layer, and then the phosphor paste is applied and then baked. A method for manufacturing a plasma display panel. The coat layer is formed so that a thickness Ha on the insulator layer satisfies a relationship of 0 <Ha ≦ 0.5 × Hr with respect to a height Hr of the partition wall. A method for producing a plasma display panel as described in 1. above. The coat layer is formed so that a height Hb in contact with a side surface of the partition wall satisfies a relationship of Hb ≦ 0.5 × Hr with respect to a height Hr of the partition wall. A method for manufacturing a plasma display panel according to claim 1. The plasma according to any one of claims 1 to 3, wherein the coating layer is obtained by applying and drying a hydrophilic polymer vehicle formed by mixing a hydrophilic polymer and one or more solvents. Display panel manufacturing method. The drying temperature Td (° C) at the time of drying satisfies a relationship of Tb-30 ≦ Td ≦ Tb + 30, where Tb (° C.) is a boiling point of a solvent constituting the hydrophilic polymer vehicle. 5. A method for producing a plasma display panel according to 4. The temperature Tc (° C.) at which the resin material constituting the coat layer is thermally decomposed satisfies the relationship of Tc <Tp with respect to the maximum temperature Tp (° C.) during the firing. The manufacturing method of the plasma display panel of description.

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