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JP2007189098A - Chip component for connecting between boards, manufacturing method thereof, and connecting method of wiring board using the same - Google Patents

Chip component for connecting between boards, manufacturing method thereof, and connecting method of wiring board using the same Download PDF

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Publication number
JP2007189098A
JP2007189098A JP2006006477A JP2006006477A JP2007189098A JP 2007189098 A JP2007189098 A JP 2007189098A JP 2006006477 A JP2006006477 A JP 2006006477A JP 2006006477 A JP2006006477 A JP 2006006477A JP 2007189098 A JP2007189098 A JP 2007189098A
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Japan
Prior art keywords
conductive
connection
board
chip component
inter
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Withdrawn
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JP2006006477A
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Japanese (ja)
Inventor
Bunichi Harazono
文一 原園
Motohiko Aono
元彦 青野
Yoshiharu Takaide
芳治 高出
Yoshiyuki Hotta
祥之 堀田
Masahiko Mikami
雅彦 三上
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Priority to JP2006006477A priority Critical patent/JP2007189098A/en
Priority to PCT/JP2007/050247 priority patent/WO2007080926A1/en
Publication of JP2007189098A publication Critical patent/JP2007189098A/en
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/368Assembling printed circuits with other printed circuits parallel to each other
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10378Interposers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0235Laminating followed by cutting or slicing perpendicular to plane of the laminate; Embedding wires in an object and cutting or slicing the object perpendicular to direction of the wires
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3442Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To readily mount a circuit module to a printed-wiring board without requiring a special facility, and to efficiently and easily position between boards. <P>SOLUTION: A first and a second surface facing each other of a chip component 30 for connecting between boards used for connecting wiring boards with a wiring pattern formed comprise a flat surface. A plurality of conductive regions 31 are arranged on the first and the second surface via an insulating region, and the conductive regions are formed separate so that a plurality of conductive paths for connecting from the first surface to the second surface are constituted. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は板間接続用チップ部品、その製造方法およびこれを用いた配線基板の接続方法に係り、特に、配線基板間の一括接続に用いられる接続用チップ部品に関する。   The present invention relates to a chip component for inter-board connection, a method for manufacturing the same, and a method for connecting a wiring board using the same, and more particularly to a chip component for connection used for batch connection between wiring boards.

樹脂製あるいはセラミック製の配線基板上に、半導体素子や抵抗、コンデンサなどを搭載して実装回路モジュールが広く用いられている。その構造は、一般に基板上に形成された配線層とそれを絶縁する絶縁層からなり、基板上の配線層が基板内に設けられたビア(スルー)・ホールと呼ばれる孔状の導体めっき層(導通ビア)によって相互に接続されている。   Mounting circuit modules are widely used by mounting semiconductor elements, resistors, capacitors, etc. on a resin or ceramic wiring board. The structure is generally composed of a wiring layer formed on a substrate and an insulating layer that insulates the wiring layer, and the wiring layer on the substrate is a hole-like conductor plating layer called a via (through) hole provided in the substrate ( Are connected to each other by conductive vias).

この回路基板として、近年、表層配線プリント回路(SLC)基板のような高密度なものが用いられるようになってきた。SLCとは、基板と、その表層配線層よりなり、表層配線層は配線層と絶縁層との積層体であり、配線層間は導通ビアを介して相互に接続されている。また、基板両面上の配線間の接続は、基板内の導通ビア(スルーホール)により行われる。このようなSLC基板を用いた実装回路モジュールのビルドアップ基板の下部は、キャリア接続用の半田ボール(ボール・グリッド・アレイ)を介して実装基板(マザーボード等)と電気的に接続される。一方、ビルドアップ基板の上部には、チップ接続バンプ(半田バンプ)を介して半導体チップが電気的に接続される。   In recent years, a high-density circuit board such as a surface wiring printed circuit (SLC) board has been used as the circuit board. The SLC is composed of a substrate and a surface wiring layer thereof. The surface wiring layer is a laminated body of a wiring layer and an insulating layer, and the wiring layers are connected to each other through conductive vias. Moreover, the connection between the wirings on both sides of the substrate is made by conductive vias (through holes) in the substrate. The lower part of the build-up board of the mounting circuit module using such an SLC board is electrically connected to a mounting board (motherboard or the like) via a solder ball (ball grid array) for carrier connection. On the other hand, a semiconductor chip is electrically connected to the upper part of the buildup substrate via chip connection bumps (solder bumps).

接続に際しては、図12に示すように、電子部品20の搭載されたプリント基板10を半田ボール130を介して個別に、フレキシブル基板40上の接続端子43に接続するという方法がとられる。
上記構造では、図13(a)乃至(d)にその接続工程を示すように、電子部品20の搭載されたプリント基板10(図13(a))上の所望の位置に半田ボール130を位置決めして装着し(図13(b))、これを、フレキシブル基板40上の接続端子43(図13(c))に装着してリフローすることにより形成される(図13(d))。この方法の場合、接続板間接続用の半田ボール130を接続ポイントに個別に搭載する必要がある。
For connection, as shown in FIG. 12, a method is used in which the printed circuit board 10 on which the electronic component 20 is mounted is individually connected to the connection terminals 43 on the flexible substrate 40 via the solder balls 130.
In the above structure, the solder balls 130 are positioned at desired positions on the printed circuit board 10 (FIG. 13A) on which the electronic component 20 is mounted, as shown in FIGS. 13A to 13D. Then, it is formed by attaching it to the connection terminal 43 (FIG. 13C) on the flexible substrate 40 and reflowing it (FIG. 13D). In the case of this method, it is necessary to individually mount solder balls 130 for connection between connection plates at connection points.

特開2001-102749JP2001-102749

このように上記構造では、図13にその接続工程を示すように、板間接続用の半田ボール130を接続ポイントに個別に搭載する必要があり、部品点数が増加するという問題があった。また、位置決めも重要な問題であり、搭載に多大な時間を要する上、位置ずれが生じ易いという問題もあった。
また効率よく接続するためには、半田ボールを搭載するための専用設備が必要となり、コストの高騰につながるという問題があった。
As described above, in the above-described structure, as shown in the connection process in FIG. 13, it is necessary to individually mount the solder balls 130 for connecting the plates at the connection points, and there is a problem that the number of parts increases. In addition, positioning is an important problem, and it takes a lot of time for mounting, and there is also a problem that misalignment easily occurs.
In addition, in order to connect efficiently, a dedicated facility for mounting solder balls is required, leading to a problem of increased costs.

本発明は、前記実情に鑑みてなされたもので、特別な設備を要することなく容易に回路モジュールのプリント基板への実装を可能にすることを目的とする。
また、併せて、基板間の位置合わせを効率的に容易化することを目的とする。
The present invention has been made in view of the above circumstances, and an object thereof is to enable easy mounting of a circuit module on a printed circuit board without requiring special equipment.
In addition, another object is to efficiently facilitate alignment between substrates.

本発明は、配線パターンの形成された配線基板との基板同士の接続に用いられる板間接続用チップ部品であって、相対向する第1および第2の面が平坦面を構成し、前記第1および第2の面には複数の導電性領域が、絶縁性領域を介して配列され、前記導電性領域は、前記第1の面から、前記第2の面に接続する複数の導電路を構成するように、前記絶縁性領域によって分離形成される。
この構成によれば、基板間の接続を、チップ部品によって容易に作業性よく実現でき、絶縁性領域の存在により、導電路間の短絡を確実に防止することができる。
The present invention is an inter-plate connecting chip component used for connection between substrates with a wiring substrate on which a wiring pattern is formed, wherein the first and second surfaces facing each other form a flat surface, A plurality of conductive regions are arranged on the first surface and the second surface via insulating regions, and the conductive region has a plurality of conductive paths connected to the second surface from the first surface. As formed, the insulating region is formed separately.
According to this configuration, the connection between the substrates can be easily realized by chip components with good workability, and the presence of the insulating region can surely prevent a short circuit between the conductive paths.

また本発明は、上記板間接続用チップ部品において、前記導電性領域は、前記第1および第2の面のうち少なくとも一方で、一次元配列されるものを含む。
この構成によれば、所定の長さに切断して、いかなる箇所にも装着できるため、汎用性が高い。
According to the present invention, in the above-described chip component for connecting plates, the conductive region includes at least one of the first and second surfaces arranged one-dimensionally.
According to this configuration, it can be cut into a predetermined length and can be attached to any location, so that versatility is high.

また本発明は、上記板間接続用チップ部品において、前記導電性領域は、前記第1の面から第2の面に向けて配列された柱状領域であるものを含む。
この構成によれば、柱状領域によって確実に導電路が確保される。
Further, the present invention includes the above-described chip component for board connection, wherein the conductive region is a columnar region arranged from the first surface toward the second surface.
According to this configuration, the conductive path is reliably ensured by the columnar region.

また本発明は、上記板間接続用チップ部品において、前記導電性領域は、前記第1の面から、前記第1および第2の面の端部に当接する第2の面に向けて側面に配設された導電性パターンを含む。
この構成によれば、簡単な構成でかつ製造が容易である。
Further, the present invention is the above-described chip component for inter-plate connection, wherein the conductive region is formed on a side surface from the first surface toward a second surface contacting the end portions of the first and second surfaces. It includes a conductive pattern disposed.
According to this configuration, the configuration is simple and the manufacture is easy.

また本発明は、上記板間接続用チップ部品において、前記第1および第2の面の少なくとも一方において前記導電性領域間に配設された絶縁性コーティング層を含む。
この構成によれば、絶縁性コーティング層の存在により、半田の流れ出しを抑制し短絡を防止することができる。
The present invention also includes an insulating coating layer disposed between the conductive regions on at least one of the first and second surfaces in the chip component for connecting plates.
According to this configuration, the presence of the insulating coating layer can suppress the flow of solder and prevent a short circuit.

また本発明は、上記板間接続用チップ部品において、前記第1および第2の面の少なくとも一方の近傍で、前記導電性領域は凹部を構成しているものを含む。
この構成によれば、凹部が、半田の流出を妨げる液溜めの役割を果たし、より確実に半田の流れ出しを抑制することができる。
According to the present invention, in the above chip component for connecting plates, the conductive region forms a recess in the vicinity of at least one of the first and second surfaces.
According to this configuration, the recess serves as a liquid reservoir that prevents the solder from flowing out, and the solder can be more reliably prevented from flowing out.

また本発明は、上記板間接続用チップ部品において、前記柱状領域は、両側面に第1の面から第2の面まで貫通する凹溝を具備したものを含む。
この構成によれば、凹溝が、配線基板面の接続端子上と、半田層との接触面積を増大するのに役立ち、半田層の流出を妨げる液溜めの役割を果たし、結果的に突出領域となっている絶縁性領域がダムの働きをする。これにより、半田が無制限に広がるのを抑制し、半田接合部の面積を増大することになり、電気的および物理的接続が確実かつ強固となる。
Further, the present invention includes the above-described chip component for inter-plate connection, wherein the columnar region includes concave grooves penetrating from the first surface to the second surface on both side surfaces.
According to this configuration, the concave groove serves to increase the contact area between the connection terminal on the wiring board surface and the solder layer, and serves as a liquid reservoir that prevents the solder layer from flowing out. The insulative area becomes a dam. As a result, the solder is prevented from spreading indefinitely, the area of the solder joint is increased, and the electrical and physical connection is ensured and strengthened.

また本発明は、絶縁性基板からなる絶縁性領域と、導電性基板からなる導電性領域が、第1および第2の面に直交する方向に積層された積層体で構成されたものを含む。
この構成によれば、凹部が、半田の流出を妨げる液だめの役割を果たし、より確実に半田の流れ出しを抑制することができる。
The present invention also includes a structure in which an insulating region made of an insulating substrate and a conductive region made of a conductive substrate are stacked in a direction perpendicular to the first and second surfaces.
According to this configuration, the concave portion plays a role of a liquid reservoir that prevents the solder from flowing out, and can more reliably suppress the solder from flowing out.

また本発明は、上記板間接続用チップ部品において、前記絶縁性基板はセラミック基板であるものを含む。
この構成によれば、強固で確実な板間接続用チップ部品を構成することができる。
Further, the present invention includes the above-described chip component for board connection, wherein the insulating substrate is a ceramic substrate.
According to this configuration, it is possible to configure a firm and reliable chip component for inter-plate connection.

また本発明は、上記板間接続用チップ部品において、前記絶縁性基板は樹脂基板であるものを含む。
この構成によれば、強固で確実な板間接続用チップ部品を構成することができる。
The present invention also includes the above chip component for inter-plate connection, wherein the insulating substrate is a resin substrate.
According to this configuration, it is possible to configure a firm and reliable chip component for inter-plate connection.

また本発明は、上記板間接続用チップ部品において、前記導電性基板は金属基板であるものを含む。
この構成によれば、強固で確実な板間接続用チップ部品を構成することができる。
Further, the present invention includes the above chip component for connecting plates, wherein the conductive substrate is a metal substrate.
According to this configuration, it is possible to configure a firm and reliable chip component for inter-plate connection.

また本発明は、配線パターンの形成された配線基板との基板同士の接続に用いられる板間接続用チップ部品の製造方法であって、相対向する第1および第2の面が平坦面を構成し、前記第1および第2の面には複数の導電性領域が、絶縁性領域を介して配列され、前記導電性領域が、前記第1の面から、前記第2の面に接続する複数の導電路を構成するように、前記導電性領域と前記絶縁性領域とを配列するようにした方法である。   The present invention also relates to a method of manufacturing a chip component for inter-plate connection used for connecting substrates with a wiring substrate on which a wiring pattern is formed, wherein the first and second surfaces facing each other form a flat surface. A plurality of conductive regions are arranged on the first and second surfaces through insulating regions, and the plurality of conductive regions are connected from the first surface to the second surface. The conductive region and the insulating region are arranged so as to constitute the conductive path.

また本発明は、上記板間接続用チップ部品の製造方法において、絶縁性基板と、導電性基板とを交互に積層し、積層体を形成する工程と、切断された面が第1および第2の面を構成するように、前記積層体を、積層方向に垂直に切断する工程とを含む。
この構成によれば、切断面が第1および第2の面を構成するように、前記積層体を、積層方向に垂直に切断しているため、平坦面の形成が容易となり、より確実な接続が可能となる。
Further, according to the present invention, in the method for manufacturing a chip component for inter-plate connection, a step of alternately laminating an insulating substrate and a conductive substrate to form a laminate, and the cut surfaces are first and second. Cutting the layered body perpendicularly to the stacking direction so as to constitute the surface.
According to this configuration, since the stacked body is cut perpendicularly to the stacking direction so that the cut surfaces constitute the first and second surfaces, a flat surface can be easily formed and more reliable connection can be achieved. Is possible.

また本発明は、上記板間接続用チップ部品の製造方法において、前記積層体を形成する工程後、前記切断する工程に先立ち、切断面に沿って、前記導電性基板にスルーホールを形成する工程を含み、前記切断する工程は、前記スルーホールを分断する位置で切断する工程を含む。
この構成によれば、スルーホールを形成し、これを分断するように切断することにより、側面の凹部が同時形成され、生産性が向上する。
According to the present invention, in the method for manufacturing a chip component for inter-plate connection, a step of forming a through hole in the conductive substrate along the cut surface after the step of forming the laminated body and prior to the step of cutting. And the step of cutting includes a step of cutting at a position where the through hole is divided.
According to this configuration, by forming the through hole and cutting it so as to divide it, the concave portion on the side surface is simultaneously formed, and the productivity is improved.

また本発明は、上記板間接続用チップ部品の製造方法において、絶縁性基板の表面及び裏面に、ストライプ状の第1の導電性パターンを形成する工程と、前記第1の導電性パターンに直交する方向に、前記絶縁性基板を、所定幅に切断し、所定幅の板状体を形成する工程と、前記板状体を、前記第1の導電性パターンの形成された面同士が当接するように再配列し、切断面を揃える再配列工程と、再配列された前記切断面に、前記第1の導電性パターンに符合するようにストライプ状の第2の導電性パターンを形成する工程とを含む。
この構成によれば、絶縁性基板の表面に導電性パターンをストライプ状に形成することにより、低コストで同様の効果を奏功しうるものとなる。
According to the present invention, in the method for manufacturing a chip component for inter-plate connection, a step of forming a stripe-shaped first conductive pattern on the front surface and the back surface of the insulating substrate, and orthogonal to the first conductive pattern. And cutting the insulating substrate into a predetermined width to form a plate-like body having a predetermined width, and the surfaces on which the first conductive patterns are formed in contact with the plate-like body. A rearrangement step of rearranging and aligning the cut surfaces, and a step of forming a stripe-shaped second conductive pattern on the rearranged cut surfaces so as to coincide with the first conductive pattern; including.
According to this configuration, the same effect can be achieved at low cost by forming the conductive pattern in a stripe shape on the surface of the insulating substrate.

また本発明は、上記板間接続用チップ部品の製造方法において、前記第1および第2の導電性パターンを形成する工程は、スクリーン印刷工程を含む。
この構成によれば、前記第1および第2の導電性パターンを形成する工程は、スクリーン印刷工程であるため、効率よく高精度のパターン形成を行うことが可能となる。
According to the present invention, in the method for manufacturing a chip component for inter-plate connection, the step of forming the first and second conductive patterns includes a screen printing step.
According to this configuration, since the process of forming the first and second conductive patterns is a screen printing process, it is possible to efficiently perform highly accurate pattern formation.

また本発明は、上記板間接続用チップ部品の製造方法において、前記第2の導電性パターンを形成する工程は、インクジェット法による塗布工程を含む。
この構成によれば、凹凸のある表面に対しても効率よく、高精度のパターン形成が可能となる。
Moreover, this invention is a manufacturing method of the said chip component for board connection, The process of forming a said 2nd conductive pattern includes the application | coating process by an inkjet method.
According to this configuration, it is possible to efficiently form a highly accurate pattern even on an uneven surface.

また本発明は、第1の配線基板の第1の接続用端子領域に、相対向する第1および第2の面が平坦面を構成し、前記第1および第2の面には複数の導電性領域が、絶縁性領域を介して配列され、前記導電性領域が、前記第1の面から、前記第2の面に接続する複数の導電路を構成するように、絶縁性領域で分離形成された板間接続用チップ部品を、前記第1の面が前記接続用端子領域に当接するように配置し、半田接合する第1の工程と、板間接続用チップ部品の前記第2の面が第2の配線基板の第2の接続用端子領域に当接するように配置し、半田接合する第2の工程とを含む。
この構成によれば、効率よく一括して、板間接続することが容易となる。
Further, according to the present invention, the first and second surfaces facing each other form a flat surface in the first connection terminal region of the first wiring board, and a plurality of conductive materials are formed on the first and second surfaces. The insulating region is arranged through the insulating region, and the conductive region is separated from the first surface so as to form a plurality of conductive paths connected to the second surface. A first step of arranging and soldering the inter-plate connecting chip component so that the first surface is in contact with the connecting terminal region; and the second surface of the inter-chip connecting chip component Includes a second step of placing the second wiring board in contact with the second connection terminal region of the second wiring board and soldering.
According to this structure, it becomes easy to connect between boards efficiently and collectively.

また本発明は、上記配線基板の接続方法において、前記第1および第2の工程は、前記第1および第2の接続用端子領域の前記第1および第2の面との当接面よりも外側にも半田層を形成し、それぞれ前記第1および第2の面からこれらに連接された側面にかけて接合領域を形成するものを含む。
この構成によれば、第1および第2の接続用端子領域の前記第1および第2の面との当接面だけでなく、側面でも電気的接続および物理的接続がなされるため、より確実な接続が可能となる。
In the wiring board connection method according to the present invention, the first and second steps may be performed more than the contact surfaces of the first and second connection terminal regions with the first and second surfaces. A solder layer is also formed on the outside, and a bonding region is formed from the first and second surfaces to the side surfaces connected to these.
According to this configuration, electrical connection and physical connection are made not only on the contact surfaces of the first and second connection terminal regions with the first and second surfaces, but also on the side surfaces. Connection is possible.

また本発明は、上記配線基板の接続方法において、前記導電性領域の側面に凹溝が形成されており、前記第1および第2の工程は前記凹溝内に半田が流れ込むように接合領域を形成する工程であるものを含む。
この構成によれば、凹溝内に半田が流れ込むように接合領域が形成されるため、接続面積の増大をはかることができ、接合性が高められる上、凹溝の壁面が液溜めとして作用するためより強固で信頼性の高い接合が可能となる。
In the wiring board connection method according to the present invention, a concave groove is formed on a side surface of the conductive region. In the first and second steps, a bonding region is formed so that solder flows into the concave groove. It includes what is the process of forming.
According to this configuration, since the joining region is formed so that the solder flows into the recessed groove, the connection area can be increased, the joining property is improved, and the wall surface of the recessed groove acts as a liquid reservoir. Therefore, bonding that is stronger and more reliable is possible.

また本発明は、上記配線基板の接続方法において、前記第1および第2の配線基板の少なくとも一方は、硬質基板(リジッド基板)であるものを含む。
この構成によれば、硬質基板が平坦性を維持することができるため、両配線基板間の剥がれを防止することができる。
According to the present invention, in the above wiring board connection method, at least one of the first and second wiring boards is a hard board (rigid board).
According to this configuration, since the hard substrate can maintain flatness, peeling between the two wiring substrates can be prevented.

また本発明は、上記配線基板の接続方法において、前記第1および第2の配線基板の少なくとも一方は、フレキシブル基板であるものを含む。
上記構成によれば、フレキシブル配線基板は可撓性を有し、空間の利用がし易いことから、配線基板間の接続やガラス基板等との接続に、よく用いられる。本発明を適用することにより、直接に接続されたフレキシブル基板が剥がれにくくなり、このことは、電子製品の歩留まりや信頼性の低下の抑制につながる。
According to the present invention, in the above wiring board connection method, at least one of the first and second wiring boards is a flexible board.
According to the said structure, since a flexible wiring board has flexibility and it is easy to utilize space, it is often used for the connection between wiring boards or a glass substrate. By applying the present invention, the directly connected flexible substrate is less likely to be peeled off, which leads to the suppression of the yield and reliability of electronic products.

本発明によれば、複数の板間接続ポイントを一括で接続することが可能で部品点数の削減を図ることが可能となる。また、部品搭載用の専用実装設備が不要であり、標準的な設備構成で効率よい実装を実現することができる。   According to the present invention, it is possible to connect a plurality of inter-plate connection points in a lump and to reduce the number of parts. In addition, a dedicated mounting facility for mounting components is unnecessary, and efficient mounting can be realized with a standard facility configuration.

次に、本発明の実施の形態について、図面を参照して説明する。
(実施の形態1)
Next, embodiments of the present invention will be described with reference to the drawings.
(Embodiment 1)

図1は本発明の実施の形態の板間接続用チップ部品を用いて実装された回路モジュール100を示す断面図である。図2は本実施の形態の板間接続用チップ部品、図3は図1の回路モジュール100の上面図である。図4はこの板間接続用チップ部品を用いた板間接続方法を用いた回路モジュールの実装工程を示す図、図5乃至図7は板間接続用チップ部品の製造工程を示す図である。   FIG. 1 is a cross-sectional view showing a circuit module 100 mounted using a chip part for connecting between boards according to an embodiment of the present invention. 2 is a top view of the circuit module 100 of FIG. 1, and FIG. FIG. 4 is a diagram illustrating a circuit module mounting process using the inter-plate connection method using the inter-plate connecting chip component, and FIGS. 5 to 7 are diagrams illustrating manufacturing steps of the inter-plate connecting chip component.

本実施の形態では、図1に示すように、ポリイミド樹脂系のフィルム素材42の表面及び裏面に配線パターン43,41の形成されたフレキシブル配線基板40に、板間接続用チップ部品30を介して、多層配線基板10が接続され、板間接続を達成したことを特徴とする。   In the present embodiment, as shown in FIG. 1, a flexible wiring board 40 having wiring patterns 43 and 41 formed on the front and back surfaces of a polyimide resin film material 42 is connected via a chip component 30 for inter-plate connection. The multilayer wiring board 10 is connected to achieve inter-plate connection.

ここで板間接続用チップ部品30は、図2に示すように、配線パターンの形成された配線基板との基板同士の接続に用いられる板間接続用チップ部品であって、相対向する第1および第2の面30a、30bが平坦面を構成し、前記第1および第2の面には複数の同一幅の導電性領域31が、絶縁性領域32を介して配列され、この導電性領域31は、前記第1の面から、前記第2の面に接続する複数の導電路を構成するように、絶縁性領域32によって分離形成される。   Here, the inter-plate connecting chip component 30, as shown in FIG. 2, is an inter-plate connecting chip component used for connecting the substrates with the wiring substrate on which the wiring pattern is formed, and is opposed to each other. And the second surfaces 30a and 30b constitute a flat surface, and a plurality of conductive regions 31 having the same width are arranged on the first and second surfaces with an insulating region 32 interposed therebetween. 31 is separated from the first surface by an insulating region 32 so as to constitute a plurality of conductive paths connected to the second surface.

また、この導電性領域は柱状の導電路を構成し、両側面に第1の面30aから第2の面30bまで貫通する凹溝33を具備している。   In addition, this conductive region constitutes a columnar conductive path, and has concave grooves 33 penetrating from the first surface 30a to the second surface 30b on both side surfaces.

回路モジュール100は、図3に上面図を示すように、回路モジュールの多層配線基板10の周縁部に6個の板間接続用チップ部品30が配列されている。また、この回路モジュールの多層配線基板の表面側には固体撮像素子チップ21、コンデンサ22、抵抗23などのチップ部品が半田層24によって接続されている。
この多層配線基板20は図1に示すように、積層セラミック基板で構成されており、チップ部品側から第1基板11、第2基板15、第3基板18に、それぞれ、配線パターン12a,14,17,12bこれらをつなぐスルーホール13,16,19が形成されている。
In the circuit module 100, as shown in a top view in FIG. 3, six inter-plate connecting chip components 30 are arranged on the peripheral edge of the multilayer wiring board 10 of the circuit module. Further, chip parts such as a solid-state imaging device chip 21, a capacitor 22, and a resistor 23 are connected to the surface side of the multilayer wiring board of the circuit module by a solder layer 24.
As shown in FIG. 1, the multilayer wiring board 20 is composed of a multilayer ceramic substrate, and the wiring patterns 12a, 14 and 14 are respectively formed on the first substrate 11, the second substrate 15, and the third substrate 18 from the chip component side. 17, 12b Through holes 13, 16, and 19 are formed to connect them.

次に、この板間接続用チップ部品30を用いた板間接続方法について説明する。
図4(a)に示すように、図2に示した板間接続用チップ部品30を用意する。そして図4(b)に示すように、多層配線基板10の接続端子領域に半田層24をディスペンサを用いて塗布し、板間接続用チップ部品30を載せて加熱することにより、多層配線基板10と板間接続用チップ部品30とを接合する。
続いて、図4(c)に示すように、フレキシブル配線基板40の配線パターン43上に板間接続用チップ部品30の第2の面30bが当接するように位置決めする。
そして、図4(d)に示すように、半田をディスペンサ側方から供給しながら加熱し板間接続用チップ部品とフレキシブル配線基板40とを接続する。
このようにして極めて容易に板間接続が実現される。
図3に示したように、本実施の形態では、6個の板間接続用チップ部品を用いるため、多層配線基板10の所定の箇所に6個の板間接続用チップ部品30を仮留めし、一括加熱により接合するようにすれば、より作業性よく接合することが可能となる。
Next, an inter-plate connection method using the inter-plate connection chip component 30 will be described.
As shown in FIG. 4A, the interchip connecting chip component 30 shown in FIG. 2 is prepared. Then, as shown in FIG. 4B, the solder layer 24 is applied to the connection terminal region of the multilayer wiring board 10 using a dispenser, and the chip component 30 for inter-plate connection is placed and heated, whereby the multilayer wiring board 10 is heated. And the chip component 30 for inter-plate connection.
Subsequently, as shown in FIG. 4C, positioning is performed such that the second surface 30 b of the inter-plate connecting chip component 30 comes into contact with the wiring pattern 43 of the flexible wiring board 40.
Then, as shown in FIG. 4D, heating is performed while supplying solder from the side of the dispenser, and the inter-plate connecting chip component and the flexible wiring board 40 are connected.
In this way, the inter-plate connection can be realized very easily.
As shown in FIG. 3, in the present embodiment, since six inter-plate connection chip components are used, the six inter-plate connection chip components 30 are temporarily fixed at predetermined positions of the multilayer wiring board 10. If bonding is performed by batch heating, bonding can be performed with better workability.

この構成によれば、板間接続用チップ部品30によって、一括接続することができ、しかも一次元に端子が配列されているため、汎用的に用いることができる。つまり、接続端子領域が長い場合は複数個の板間接続用チップ部品を配列して用いればよい。   According to this configuration, the chip parts 30 for connecting between plates can be connected together and the terminals are arranged one-dimensionally, so that it can be used for general purposes. That is, when the connection terminal area is long, a plurality of inter-plate connecting chip components may be arranged and used.

また、板間接続用チップ部品30の導電性領域31の側面に設けられた凹溝33が、配線基板面の接続端子領域上と、半田層との接触面積を増大するのに役立つ。また、半田層の流出を妨げる液溜めの役割を果たし、結果的に突出領域となっている絶縁性領域がダムの働きをする。これにより、半田が無制限に広がるのを抑制し、半田接合部の面積を増大することになり、電気的および物理的接続が確実かつ強固となる。
この構成によれば、基板間の接続を、チップ部品によって容易に作業性よく実現でき、絶縁性領域の存在により、導電路間の短絡を確実に防止することができる。
Further, the concave groove 33 provided on the side surface of the conductive region 31 of the inter-plate connecting chip component 30 is useful for increasing the contact area between the connection terminal region on the wiring board surface and the solder layer. Also, it acts as a liquid reservoir that prevents the solder layer from flowing out, and the insulating region that becomes the protruding region functions as a dam. As a result, the solder is prevented from spreading indefinitely, the area of the solder joint is increased, and the electrical and physical connection is ensured and strengthened.
According to this configuration, the connection between the substrates can be easily realized by chip components with good workability, and the presence of the insulating region can surely prevent a short circuit between the conductive paths.

次に、この板間接続用チップ部品の製造方法について説明する。
この方法では、絶縁性領域32を構成する絶縁性基板と、導電性領域31を構成する導電性基板とを交互に積層し、積層体を形成し、切断された面が第1の面30aおよび第2の面30bを構成するように、積層体を、積層方向に垂直に切断する工程とを含む。
この構成によれば、切断面が第1および第2の面を構成するように、前記積層体を、積層方向に垂直に切断しているため、平坦面の形成が容易となり、より確実な接続が可能となる。
Next, a method for manufacturing the chip component for inter-plate connection will be described.
In this method, the insulating substrate constituting the insulating region 32 and the conductive substrate constituting the conductive region 31 are alternately laminated to form a laminated body, and the cut surface is the first surface 30a and Cutting the stack perpendicularly to the stacking direction so as to form the second surface 30b.
According to this configuration, since the stacked body is cut perpendicularly to the stacking direction so that the cut surfaces constitute the first and second surfaces, a flat surface can be easily formed and more reliable connection can be achieved. Is possible.

まず、図5(a)に示すように絶縁性領域32を構成する絶縁性基板と、導電性領域31を構成する導電性基板とを交互に積層し、積層体を形成する。
ついで図5(b)に示すように、切断面が第1の面30aおよび第2の面30bを構成するように、ダイシングラインDLに沿って積層体を、積層方向に垂直に切断する。
First, as shown in FIG. 5A, the insulating substrate constituting the insulating region 32 and the conductive substrate constituting the conductive region 31 are alternately laminated to form a laminate.
Next, as shown in FIG. 5B, the stacked body is cut along the dicing line DL perpendicularly to the stacking direction so that the cut surfaces form the first surface 30a and the second surface 30b.

図6(a)に示すようにこのようにして得られた板間接続用チップ部品30となるベースが形成される。
そして、図6(b)に示すように第1および第2の面の絶縁性領域に塗布法により絶縁コーティング34を形成する。
As shown in FIG. 6A, a base to be the chip-to-board connecting chip component 30 obtained in this way is formed.
Then, as shown in FIG. 6B, an insulating coating 34 is formed on the insulating regions of the first and second surfaces by a coating method.

この後、図7(a)に示すように第1の面30aおよび第2の面30bにレジスト35を塗布し、導電性領域31をエッチングすることにより、導電性領域31の側面に凹溝33を形成する(図7(b))。
このようにして図2に示した板間接続用チップ部品が形成される。
After that, as shown in FIG. 7A, a resist 35 is applied to the first surface 30a and the second surface 30b, and the conductive region 31 is etched, so that a groove 33 is formed on the side surface of the conductive region 31. Is formed (FIG. 7B).
In this way, the interchip connecting chip component shown in FIG. 2 is formed.

このようにして極めて容易に制御性よく寸法精度の高い板間接続用チップ部品を形成することができる。
なお前記実施の形態では等ピッチで導電性領域31の形成された板間接続用チップ部品について説明したが、等ピッチでなくてもよく、また第1の面と第2の面とで導電性領域31のピッチが異なるように形成してもよい。
In this way, it is possible to form a chip component for connecting between plates with extremely high controllability and high dimensional accuracy.
In the above-described embodiment, the interchip connecting chip component in which the conductive regions 31 are formed at an equal pitch has been described. However, the chip parts may not be at an equal pitch, and the first surface and the second surface are electrically conductive. You may form so that the pitch of the area | region 31 may differ.

(実施の形態2)
図8は本発明の実施の形態の板間接続用チップ部品を示す図である。
前記実施の形態1では板間接続用チップ部品30の導電性領域31の側面には凹部33を形成したが、図8に示すように、凹部を形成しない直方体形状であってもよい。
製造に際しては、前記実施の形態1における図5乃至図6の工程を実行することにより形成される。
この構成によれば、実施の形態1の板間接続用チップ部品に比べて製造が容易であり製造工数の低減をはかることができる。
(Embodiment 2)
FIG. 8 is a diagram showing a chip component for connecting between plates according to an embodiment of the present invention.
In the first embodiment, the concave portion 33 is formed on the side surface of the conductive region 31 of the inter-plate connecting chip component 30. However, as shown in FIG.
In manufacturing, it is formed by executing the steps of FIGS. 5 to 6 in the first embodiment.
According to this configuration, it is easier to manufacture than the interchip connecting chip component of the first embodiment, and the number of manufacturing steps can be reduced.

(実施の形態3)
図9は本発明の実施の形態の板間接続用チップ部品を示す図である。
本実施の形態では、セラミック基板からなるベース基板36の表面にスクリーン印刷によって形成された導体パターンからなる導電性領域31Pが所定間隔で形成されたもので、ベース基板36が導電性領域31Pの間に存在して絶縁性領域を構成する。
またここでも絶縁性領域の表面には絶縁コーティング35が形成されている。
この板間接続用チップ部品30の製造方法について説明する。
図10(a)に示すように、セラミック基板36を用意し、表面にスクリーン印刷法により所定の間隔でストライプ状の導電性パターン31Pを形成する。
そして図10(b)に示すように、この導電性パターン31Pの形成されたセラミック基板をダイシングラインDLに沿って直方体形状をなすように切断する。
この後図11(a)に示すように、切断面が上にくるように再配列し、再度導電性パターン31Pに連続するように図11(b)に示すように、第2の導電性パターン31Sを形成する。
このようにして極めて作業性よく、平坦面を形成することができ、図9に示した板間接続用チップ部品が形成される。
(Embodiment 3)
FIG. 9 is a diagram showing a chip component for inter-plate connection according to an embodiment of the present invention.
In the present embodiment, conductive regions 31P made of a conductor pattern formed by screen printing are formed on the surface of a base substrate 36 made of a ceramic substrate at a predetermined interval, and the base substrate 36 is located between the conductive regions 31P. To constitute an insulating region.
Also here, an insulating coating 35 is formed on the surface of the insulating region.
A method of manufacturing the inter-plate connecting chip component 30 will be described.
As shown in FIG. 10A, a ceramic substrate 36 is prepared, and striped conductive patterns 31P are formed on the surface at a predetermined interval by screen printing.
Then, as shown in FIG. 10B, the ceramic substrate on which the conductive pattern 31P is formed is cut along a dicing line DL so as to form a rectangular parallelepiped shape.
Thereafter, as shown in FIG. 11 (a), the second conductive pattern is rearranged so that the cut surface is on top and again connected to the conductive pattern 31P as shown in FIG. 11 (b). 31S is formed.
In this way, a flat surface can be formed with extremely good workability, and the chip part for connecting between plates shown in FIG. 9 is formed.

本発明によれば、小型でかつ実装強度の高い板間接続用チップ部品を提供できることから薄型で信頼性の高い板間接続が実現する。   According to the present invention, it is possible to provide a chip-to-board connecting chip component that is small and has high mounting strength, so that a thin and highly reliable board-to-board connection is realized.

本発明の実施の形態1の板間接続用チップ部品を用いて実装した回路モジュールを示す図The figure which shows the circuit module mounted using the chip component for board connection of Embodiment 1 of this invention. 本発明の実施の形態1の板間接続用チップ部品を示す図The figure which shows the chip component for board connection of Embodiment 1 of this invention 本発明の実施の形態1の回路モジュールの上面図1 is a top view of a circuit module according to a first embodiment of the present invention. 本発明の実施の形態1の板間接続用チップ部品を用いた板間接続工程を示す図The figure which shows the board connection process using the chip | tip component for board connection of Embodiment 1 of this invention. 本発明の実施の形態1の板間接続用チップ部品の製造工程図Manufacturing process diagram of chip component for inter-plate connection according to Embodiment 1 of the present invention 本発明の実施の形態1の板間接続用チップ部品の製造工程図Manufacturing process diagram of chip component for inter-plate connection according to Embodiment 1 of the present invention 本発明の実施の形態1の板間接続用チップ部品の製造工程図Manufacturing process diagram of chip component for inter-plate connection according to Embodiment 1 of the present invention 本発明の実施の形態2の板間接続用チップ部品を示す図The figure which shows the chip component for board connection of Embodiment 2 of this invention 本発明の実施の形態3の板間接続用チップ部品を示す図The figure which shows the chip component for board connection of Embodiment 3 of this invention 本発明の実施の形態3の板間接続用チップ部品の製造工程を示す図The figure which shows the manufacturing process of the chip component for board connection of Embodiment 3 of this invention. 本発明の実施の形態3の板間接続用チップ部品の製造工程を示す図The figure which shows the manufacturing process of the chip component for board connection of Embodiment 3 of this invention. 従来例の板間接続用チップ部品を用いて実装した回路モジュールを示す図The figure which shows the circuit module mounted using the chip | tip component for board connection of a prior art example 従来例の回路モジュールの製造工程を示す図The figure which shows the manufacturing process of the circuit module of a prior art example

符号の説明Explanation of symbols

10 多層配線基板
20 チップ部品
30 板間接続用チップ部品
31 導電性領域
DESCRIPTION OF SYMBOLS 10 Multilayer wiring board 20 Chip component 30 Chip component for board-to-board connection 31 Conductive region

Claims (22)

配線パターンの形成された配線基板との基板同士の接続に用いられる板間接続用チップ部品であって、
相対向する第1および第2の面が平坦面を構成し、前記第1および第2の面には複数の導電性領域が、絶縁性領域を介して配列され、
前記導電性領域が、前記第1の面から、前記第2の面に接続する複数の導電路を構成するように、前記絶縁性領域によって分離形成された板間接続用チップ部品。
A chip component for inter-plate connection used for connection between substrates with a wiring substrate on which a wiring pattern is formed,
The first and second surfaces facing each other form a flat surface, and a plurality of conductive regions are arranged on the first and second surfaces via insulating regions,
The chip component for board-to-plate connection formed by the insulating region so that the conductive region constitutes a plurality of conductive paths connecting from the first surface to the second surface.
請求項1に記載の板間接続用チップ部品であって、
前記導電性領域は、前記第1および第2の面のうち少なくとも一方で、一次元配列される板間接続用チップ部品。
It is a chip part for board connection according to claim 1,
The conductive region is an inter-plate connecting chip component that is one-dimensionally arranged on at least one of the first and second surfaces.
請求項1または2に記載の板間接続用チップ部品であって、
前記導電性領域は、前記第1の面から第2の面に向けて配列された柱状領域である板間接続用チップ部品。
It is a chip part for board connection according to claim 1 or 2,
The inter-plate connecting chip component, wherein the conductive region is a columnar region arranged from the first surface toward the second surface.
請求項1または2に記載の板間接続用チップ部品であって、
前記導電性領域は、前記第1の面から、前記第1および第2の面の端部に当接する第2の面に向けて側面に配設された導電性パターンを含む板間接続用チップ部品。
It is a chip part for board connection according to claim 1 or 2,
The conductive region includes an inter-plate connection chip including a conductive pattern disposed on a side surface from the first surface toward a second surface that contacts the end portions of the first and second surfaces. parts.
請求項1乃至4のいずれかに記載の板間接続用チップ部品であって、
前記第1および第2の面の少なくとも一方において前記導電性領域間に配設された絶縁性コーティング層を含む板間接続用チップ部品。
A chip part for connecting between plates according to any one of claims 1 to 4,
A chip component for inter-plate connection including an insulating coating layer disposed between the conductive regions on at least one of the first and second surfaces.
請求項1乃至5のいずれかに記載の板間接続用チップ部品であって、
前記第1および第2の面の少なくとも一方の近傍で、前記導電性領域は凹部を構成している板間接続用チップ部品。
A chip part for connecting between plates according to any one of claims 1 to 5,
An inter-plate connecting chip component in which the conductive region forms a recess in the vicinity of at least one of the first and second surfaces.
請求項3に記載の板間接続用チップ部品であって、
前記柱状領域は、両側面に第1の面から第2の面まで貫通する凹溝を具備した板間接続用チップ部品。
It is a chip part for board connection according to claim 3,
The said columnar area | region is a chip component for board-to-plate connection which comprised the ditch | groove penetrated from a 1st surface to a 2nd surface on both side surfaces.
請求項1乃至7のいずれかに記載の板間接続用チップ部品であって、
絶縁性基板からなる絶縁性領域と、導電性基板からなる導電性領域が、第1および第2の面に直交する方向に積層された積層体で構成された板間接続用チップ部品。
A chip part for connecting between plates according to any one of claims 1 to 7,
An inter-plate connecting chip component comprising a laminate in which an insulating region made of an insulating substrate and a conductive region made of a conductive substrate are stacked in a direction perpendicular to the first and second surfaces.
請求項8に記載の板間接続用チップ部品であって、
前記絶縁性基板はセラミック基板である板間接続用チップ部品。
It is a chip component for board connection according to claim 8,
The chip part for board-to-board connection, wherein the insulating substrate is a ceramic substrate.
請求項8に記載の板間接続用チップ部品であって、
前記絶縁性基板は樹脂基板である板間接続用チップ部品。
It is a chip component for board connection according to claim 8,
The chip component for board-to-board connection, wherein the insulating substrate is a resin substrate.
請求項8乃至10のいずれかに記載の板間接続用チップ部品であって、
前記導電性基板は金属基板である板間接続用チップ部品。
A chip part for connecting between plates according to any one of claims 8 to 10,
The inter-plate connecting chip component, wherein the conductive substrate is a metal substrate.
配線パターンの形成された配線基板との基板同士の接続に用いられる板間接続用チップ部品の製造方法であって、
相対向する第1および第2の面が平坦面を構成し、前記第1および第2の面には複数の導電性領域が、絶縁性領域を介して配列され、
前記導電性領域が、前記第1の面から、前記第2の面に接続する複数の導電路を構成するように、前記導電性領域と前記絶縁性領域とを配列するようにした板間接続用チップ部品の製造方法。
A method of manufacturing a chip component for inter-plate connection used for connection between substrates with a wiring substrate on which a wiring pattern is formed,
The first and second surfaces facing each other form a flat surface, and a plurality of conductive regions are arranged on the first and second surfaces via insulating regions,
The inter-plate connection in which the conductive region and the insulating region are arranged so that the conductive region constitutes a plurality of conductive paths connecting from the first surface to the second surface. Of manufacturing chip parts for use.
請求項12に記載の板間接続用チップ部品の製造方法であって、
絶縁性基板と、導電性基板とを交互に積層し、積層体を形成する工程と、
切断された面が第1および第2の面を構成するように、前記積層体を、積層方向に垂直に切断する工程とを含む板間接続用チップ部品の製造方法。
It is a manufacturing method of the chip part for board connection according to claim 12,
A step of alternately laminating insulating substrates and conductive substrates to form a laminate;
A method of manufacturing a chip component for inter-plate connection, including a step of cutting the stacked body perpendicularly to the stacking direction so that the cut surfaces constitute first and second surfaces.
請求項13に記載の板間接続用チップ部品の製造方法であって、
前記積層体を形成する工程後、前記切断する工程に先立ち、切断面に沿って、前記導電性基板にスルーホールを形成する工程を含み、
前記切断する工程は、前記スルーホールを分断する位置で切断する工程である板間接続用チップ部品の製造方法。
It is a manufacturing method of the chip part for board connection according to claim 13,
After the step of forming the laminate, prior to the cutting step, including a step of forming a through hole in the conductive substrate along the cut surface,
The step of cutting is a method of manufacturing a chip component for inter-plate connection, which is a step of cutting at a position where the through hole is divided.
請求項12に記載の板間接続用チップ部品の製造方法であって、
絶縁性基板の表面及び裏面に、ストライプ状の第1の導電性パターンを形成する工程と、
前記第1の導電性パターンに直交する方向に、前記絶縁性基板を、所定幅に切断し、所定幅の板状体を形成する工程と、
前記板状体を、前記第1の導電性パターンの形成された面同士が当接するように再配列し、切断面を揃える再配列工程と、
再配列された前記切断面に、前記第1の導電性パターンに符合するようにストライプ状の第2の導電性パターンを形成する工程とを含む板間接続用チップ部品の製造方法。
It is a manufacturing method of the chip part for board connection according to claim 12,
Forming a stripe-shaped first conductive pattern on the front and back surfaces of the insulating substrate;
Cutting the insulating substrate into a predetermined width in a direction perpendicular to the first conductive pattern to form a plate-like body having a predetermined width;
A rearrangement step of rearranging the plate-like bodies so that the surfaces on which the first conductive patterns are formed are in contact with each other, and aligning the cut surfaces;
Forming a striped second conductive pattern on the rearranged cut surfaces so as to coincide with the first conductive pattern.
請求項15に記載の板間接続用チップ部品の製造方法であって、
前記第1および第2の導電性パターンを形成する工程は、スクリーン印刷工程を含む板間接続用チップ部品の製造方法。
It is a manufacturing method of the chip part for board connection according to claim 15,
The step of forming the first and second conductive patterns is a method for manufacturing a chip component for inter-board connection, which includes a screen printing step.
請求項15に記載の板間接続用チップ部品の製造方法であって、
前記第2の導電性パターンを形成する工程は、インクジェット法による塗布工程を含む板間接続用チップ部品の製造方法。
It is a manufacturing method of the chip part for board connection according to claim 15,
The step of forming the second conductive pattern is a method of manufacturing a chip component for inter-plate connection including a coating step by an ink jet method.
第1の配線基板の第1の接続用端子領域に、
相対向する第1および第2の面が平坦面を構成し、前記第1および第2の面には複数の導電性領域が、絶縁性領域を介して配列され、
前記導電性領域は、前記第1の面から、前記第2の面に接続する複数の導電路を構成するように、分離形成された板間接続用チップ部品を、
前記第1の面が前記接続用端子領域に当接するように配置し、半田接合する第1の工程と、
板間接続用チップ部品の前記第2の面が第2の配線基板の第2の接続用端子領域に当接するように配置し、半田接合する第2の工程とを含む配線基板の接続方法。
In the first connection terminal region of the first wiring board,
The first and second surfaces facing each other form a flat surface, and a plurality of conductive regions are arranged on the first and second surfaces via insulating regions,
The conductive region includes a chip component for inter-plate connection formed separately from the first surface so as to constitute a plurality of conductive paths connected to the second surface,
A first step of placing the first surface in contact with the connection terminal region and soldering;
A wiring board connecting method including a second step of arranging and soldering the second surface of the inter-plate connecting chip component so as to abut on the second connecting terminal region of the second wiring board.
請求項18に記載の配線基板の接続方法であって、
前記第1および第2の工程は、前記第1および第2の接続用端子領域の前記第1および第2の面との当接面よりも外側にも半田層を形成し、それぞれ前記第1および第2の面からこれらに連接された側面にかけて接合領域を形成してなる配線基板の接続方法。
The wiring board connection method according to claim 18, comprising:
In the first and second steps, a solder layer is formed outside the contact surface of the first and second connection terminal regions with the first and second surfaces. And a method of connecting a wiring board, wherein a bonding region is formed from the second surface to the side surface connected to these.
請求項19に記載の配線基板の接続方法であって、
前記導電性領域の側面に凹溝が形成されており、
前記第1および第2の工程は前記凹溝内に半田が流れ込むように接合領域を形成する工程である配線基板の接続方法。
The connection method for a wiring board according to claim 19,
A concave groove is formed on a side surface of the conductive region,
The wiring substrate connecting method, wherein the first and second steps are steps of forming a joining region so that solder flows into the concave groove.
請求項18乃至20のいずれか記載の配線基板の接続方法であって、
前記第1および第2の配線基板の少なくとも一方は、硬質基板(リジッド基板)であることを特徴とする配線基板の接続方法。
A method for connecting a wiring board according to any one of claims 18 to 20,
At least one of the first and second wiring boards is a hard board (rigid board).
請求項18乃至20のいずれか記載の配線基板の接続方法であって、
前記第1および第2の配線基板の少なくとも一方は、フレキシブル基板であることを特徴とする配線基板の接続方法。
A method for connecting a wiring board according to any one of claims 18 to 20,
At least one of the first and second wiring boards is a flexible board, and the wiring board connection method is characterized in that:
JP2006006477A 2006-01-13 2006-01-13 Chip component for connecting between boards, manufacturing method thereof, and connecting method of wiring board using the same Withdrawn JP2007189098A (en)

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