JP2007180115A - Manufacturing method of semiconductor device - Google Patents

Abstract

By selectively using a raw material that generates hydrogen radicals and a raw material that does not generate hydrogen radicals, an emitter layer can be grown and a base layer can be activated without deteriorating device characteristics.
A step of forming a first layer (base layer) 105 containing indium gallium arsenic as a main component and carbon as a dopant on a semiconductor substrate 101; and the first layer (base layer) 105 A second layer (low-concentration emitter layer) 106 containing indium / phosphorus as a main component is formed on the first layer (base layer) 105 by flowing a raw material containing a phosphorus raw material that generates hydrogen radicals directly on the first layer (base layer) 105. And a step of performing a heat treatment by flowing a phosphorus raw material that does not generate hydrogen radicals after the step of forming the second layer (low-concentration emitter layer) 106.
[Selection] Figure 1

Description

  The present invention relates to a method for manufacturing a semiconductor device in which activation of a base layer is easy without deteriorating device characteristics of a heterojunction bipolar transistor of an indium / phosphorus-based electronic device.

  Semiconductor electronic devices using indium-phosphorus (InP) materials are expected as next-generation high-speed device applications. A heterojunction bipolar transistor (HBT) is a p-type base layer formed on an n-type collector layer formed on a substrate, and the p-type base layer. and an n-type emitter layer. A typical material used for the p-type base layer is an indium gallium arsenide (InGaAs: C) compound containing carbon. As a method for growing the semiconductor layer constituting this indium-phosphorus-based electronic device, it is more organic than the molecular beam epitaxy method, which is a vacuum device, because of its high mass productivity and high vapor pressure of phosphorus. A metal organic chemical vapor deposition (MOCVD) method has attracted attention.

  However, in the crystal growth of InGaAs: C using the MOCVD method, carbon (C), which is a dopant, is incorporated in a carbon-hydrogen (C—H) bond and inactivated, and is P-type compared to the carbon concentration. There was a problem that the carrier concentration was lowered.

  As a method for solving this carbon deactivation problem, a method of interrupting crystal growth immediately after crystal growth of InGaAs: C and performing thermal annealing has been proposed. However, if annealing is performed immediately after crystal growth, there is a problem that part of the carbon is again deactivated during the subsequent growth of the n-type layer. This is because hydrogen radicals generated during the growth of the n-type layer are again diffused and mixed into the InGaAs: C layer. As another method, a method of sequentially growing InGaAs: C and n-type layers and then performing thermal annealing has been proposed. However, this method has a problem that activation cannot be performed sufficiently. This is because the hydrogen radicals in InGaAs: C are not easily desorbed by the thick n-type layer.

  As a countermeasure against the former, a method is disclosed that uses a raw material that does not generate hydrogen radicals such as trimethylindium as a group 13 source and trimethylphosphine as a group 15 source when an n-type layer is grown on an InGaAs: C layer ( For example, see Patent Document 1.) However, when crystal growth is performed using a raw material that does not generate hydrogen radicals, there is a problem that device characteristics deteriorate.

JP 2005-86135 A

  The problem to be solved is that the base layer cannot be activated without deteriorating the device characteristics.

  An object of the present invention is to grow an emitter layer and activate a base layer without deteriorating device characteristics by properly using a raw material that generates hydrogen radicals and a raw material that does not generate hydrogen radicals.

  The semiconductor device manufacturing method (first manufacturing method) according to the present invention includes a step of forming a first layer containing indium, gallium, and arsenic as a main component and carbon as a dopant on a semiconductor substrate; A step of forming a second layer containing indium / phosphorus as a main component on the first layer by flowing a raw material containing a phosphorus raw material for generating hydrogen radicals directly on the first layer; and forming the second layer And a step of performing a heat treatment by flowing a phosphorus raw material in which hydrogen radicals are not generated.

  In the method for manufacturing a semiconductor device of the present invention (first manufacturing method), a phosphorus raw material that generates hydrogen radicals is used when forming the second layer mainly composed of indium and phosphorus, and the hydrogen radicals are used for the heat treatment. Since a phosphorus raw material that does not occur is used, re-mixing of hydrogen radicals during heat treatment is avoided, and the activation of the first layer can be performed efficiently after the formation of the second layer. Furthermore, by forming the second layer using a phosphorus raw material from which hydrogen radicals are generated, a second layer with good crystal quality can be obtained, so that deterioration in device characteristics is avoided.

  The semiconductor device manufacturing method (second manufacturing method) according to the present invention includes a step of forming a first layer containing indium, gallium, and arsenic as a main component and carbon as a dopant on a semiconductor substrate; A step of forming a second layer containing indium / phosphorus as a main component on the first layer by flowing a raw material containing a phosphorus raw material for generating hydrogen radicals directly on the layer; and forming the second layer And a step of forming a third layer containing indium, gallium, and arsenic as a main component by flowing a raw material containing an arsenic raw material that does not generate hydrogen radicals after the step.

  In the method for manufacturing a semiconductor device of the present invention (second manufacturing method), a phosphorus raw material that generates hydrogen radicals when forming the second layer mainly composed of indium / phosphorus is used, and indium / gallium / arsenic is formed. Since the arsenic material that does not generate hydrogen radicals is used when forming the third layer as the main component, re-mixing of hydrogen radicals is avoided when forming the third layer, and the first layer Activated. Furthermore, by forming the second layer using a phosphorus raw material from which hydrogen radicals are generated, a second layer with good crystal quality can be obtained, so that deterioration in device characteristics is avoided.

  In the method for manufacturing a semiconductor device of the present invention (first manufacturing method), since the second layer mainly composed of indium and phosphorus is formed using a phosphorus raw material that generates hydrogen radicals, the second layer is excellent. It can be formed with good crystal quality. In addition, since heat treatment is performed using a phosphorus raw material that does not generate hydrogen radicals, the first layer containing indium, gallium, and arsenic as a main component and carbon as a dopant can be activated efficiently. For this reason, there is an advantage that the second layer can be grown and the first layer can be activated without deteriorating the device characteristics.

  In the semiconductor device manufacturing method (second manufacturing method) of the present invention, since the second layer mainly composed of indium and phosphorus is formed using a phosphorus raw material from which hydrogen radicals are generated, the second layer is excellent. It can be formed with good crystal quality. In addition, since the third layer is formed using an arsenic material that does not generate hydrogen radicals, the first layer containing indium, gallium, and arsenic as a main component and carbon as a dopant can be efficiently activated during the film formation. . For this reason, there is an advantage that the second layer can be grown and the first layer can be activated without deteriorating the device characteristics.

  An example (first example) of one embodiment according to a method for manufacturing a semiconductor device (first manufacturing method) of the present invention will be described with reference to a schematic sectional view of FIG.

In the heterojunction bipolar transistor (HBT) 1 of FIG. 1, a buffer layer 102, a subcollector layer 103, a collector layer 104, indium gallium doped with carbon (C), and arsenic (hereinafter referred to as InGaAs :) on a semiconductor substrate 101. A first layer (hereinafter referred to as a base layer) 105 made of C), a second layer (hereinafter referred to as a low-concentration emitter layer) 106 made of indium phosphorus (InP) doped with silicon (Si), silicon A third layer (hereinafter referred to as a high-concentration emitter layer) 107 made of indium / phosphorus (InP) doped with (Si), an indium gallium doped with silicon (Si), and arsenic (hereinafter referred to as InGaAs). An emitter cap layer 108 is sequentially formed. The doping concentration of the low-concentration emitter layer 106 is, for example, 5 × 10 ¹⁷ / cm ³ . The doping concentration of the high-concentration emitter layer 107 is, for example, 1 × 10 ¹⁹ / cm ³ .

  Next, the manufacturing method according to the present invention shown in FIG. 1 will be described. Each layer on the semiconductor substrate 101 is formed by metal organic chemical vapor deposition (MOCVD). One of the characteristics of this manufacturing method is that a low-concentration emitter layer 106 is formed by flowing a phosphorus raw material that generates hydrogen radicals, and then a heat treatment is performed by flowing a phosphorus raw material that does not generate hydrogen radicals. The high-concentration emitter layer 107 is formed by flowing a raw material containing a phosphorus raw material that generates hydrogen radicals at a temperature lower than the temperature.

First, the substrate temperature of the semiconductor substrate 101 made of indium / phosphorus (InP) is set to 600 ° C., and phosphine (PH ₃ ) and trimethylindium (TMI) are used as source gases to form indium / phosphorus ( InP) is grown to a thickness of 400 nm, for example, to form the buffer layer 102.

Next, with the substrate temperature of the semiconductor substrate 101 maintained at 600 ° C., tertiary butylarsine (TBA), trimethylgallium (TMG), trimethylindium (TMI), and disilane (Si ₂ H ₆ ) are used as source gases. On the buffer layer 102, indium gallium or arsenic (InGaAs: Si) doped with silicon (Si) at, for example, 1 × 10 ¹⁹ / cm ³ is grown to a thickness of, for example, 300 nm, and the subcollector layer 103 is formed. grow up.

Next, with the substrate temperature maintained at 600 ° C., silicon (Si) is deposited on the subcollector layer 103 using phosphine (PH ₃ ), trimethylindium (TMI), and disilane (Si ₂ H ₆ ) as source gases. The collector layer 104 is grown by growing indium phosphorus (InP: Si) doped with, for example, 2 × 10 ¹⁶ / cm ³ to a thickness of 450 nm, for example.

Next, the substrate temperature is lowered to, for example, 480 ° C. (first temperature), and tertiary butylarsine (TBA), triethylgallium (TEG), trimethylindium (TMI), and carbon bromide (CBr ₄ ) are used as source gases. On the collector layer 104, indium gallium or arsenic (InGaAs: C) doped with carbon (C) to 2 × 10 ¹⁹ / cm ³ , for example, is grown to a thickness of 75 nm, for example, and the base layer ( First layer) 105 is formed.

Next, the substrate temperature is raised to 550 ° C. (second temperature), and tertiary butylphosphine (TBP) is used as a phosphorus raw material for generating hydrogen radicals, and trimethylindium (TMI) and disilane (Si ₂ H ₆ ) are used. As a source gas, indium phosphorus (InP: Si) doped with silicon (Si) at a low concentration, for example, 5 × 10 ¹⁷ / cm ³ is grown on the base layer 105 to a thickness of 75 nm, for example. A layer (hereinafter referred to as a low-concentration emitter layer) 106 is formed.

Next, the substrate temperature is raised to 570 ° C. (third temperature), and hydrogen (H ₂ ) or nitrogen (N ₂ ) is used as a carrier gas, and trimethylphosphine is flowed as a phosphorus raw material that does not generate hydrogen radicals. For example, trimethylphosphine was flowed at 2 × 10 ⁻³ mol / min, hydrogen as a carrier gas at 50 L / min, and the pressure of the heat treatment atmosphere was set at 10.0 kPa.

  Next, while flowing trimethylphosphine, the substrate temperature is maintained at 570 ° C. for 5 minutes, and heat treatment (annealing treatment) of the base layer 105 is performed to activate carbon in the base layer 105. At that time, the carrier gas is also allowed to flow.

Next, the substrate temperature is lowered to 550 ° C., and tertiary butylphosphine (TBP) is used as a phosphorus raw material from which hydrogen radicals are generated, and trimethylindium (TMI) and disilane (Si ₂ H ₆ ) are used as a raw material gas. On the low-concentration emitter layer 106, indium / phosphorus (InP: Si) doped with silicon (Si) at a high concentration, for example, 1 × 10 ¹⁹ / cm ³ , is grown to, for example, 50 nm, and the third layer ( Hereinafter, a high-concentration emitter layer) 107 is formed. Here, in order to prevent the base layer 105 from being deactivated again, it is desirable that the growth temperature of the high-concentration emitter layer 107 be lower than the heat treatment temperature (570 ° C. in this example). In this example, the temperature was set to 550 ° C. as described above.

Next, while maintaining the substrate temperature at 550 ° C., tertiary butylarsine (TBA) is used as a phosphorus raw material for generating hydrogen radicals, and trimethylgallium (TMG), trimethylindium (TMI), and disilane (Si ₂ H ₆ ). As a source gas, indium gallium and arsenic (InGaAs: Si) doped with silicon (Si) at, for example, 1 × 10 ¹⁹ / cm ³ are grown on the high-concentration emitter layer 107 to, for example, 75 nm to form an emitter. A cap layer 108 is formed.

In the heterojunction bipolar transistor 1 manufactured by the manufacturing method described above, the carrier concentration of the base layer 105 is 1.8 × 10 ¹⁹ / cm ³ . That is, the activation rate of carbon (C) in the base layer 105 was 90%. This is because the base layer 105 is effectively activated by performing activation annealing while flowing triethylphosphine that does not generate hydrogen radicals.

  According to the manufacturing method of the heterojunction bipolar transistor 1 described above, the activation of the base layer 105 can be performed during the growth of the emitter layer (low-concentration emitter layer 106, high-concentration emitter layer 107). The manufacturing cost can be reduced.

  Further, according to the method of manufacturing the heterojunction bipolar transistor 1, the thickness of the low-concentration emitter layer 106 on the base layer 105 is as thin as 75 nm, so that the heat treatment is performed after the growth of the low-concentration emitter layer 106. Therefore, the activation of the base layer 105 can be performed efficiently.

  In addition, according to the method for manufacturing the heterojunction bipolar transistor 1, tertiary butylphosphine (TBP) having a high purity is used as a raw material for growing the low-concentration emitter layer 106 and the high-concentration emitter layer 107. The impurity concentration of the emitter layer can be lowered and the crystallinity of the emitter layer can be improved. On the other hand, in the comparative sample in which the phosphorus raw material used for the growth of the low-concentration emitter layer 106 is a raw material that does not generate hydrogen radicals such as triethylphosphine and trisdimethylaminophosphine, the base layer 105, the low-concentration emitter layer 106, The reverse leakage current between the concentration emitter layers 107 increased. This is presumably because the purity of the raw material from which hydrogen radicals are not generated is low and impurities are mixed into the low-concentration emitter layer 106. In addition, it is considered that such raw materials that do not generate hydrogen radicals are not easily decomposed and carbon (C) in these raw materials is mixed into the low-concentration emitter layer 106.

Further, according to the method of manufacturing the heterojunction bipolar transistor 1, since the temperature was lowered during the growth of the high-concentration emitter layer 107 after the activation annealing, tertiary butylphosphine (TBP) that generates hydrogen radicals was removed. Even if the high-concentration emitter layer 107 is grown by using it, the carbon (C) in the base layer 105 is hardly deactivated again. This is because diffusion hardly occurs at low temperatures.
In the method of manufacturing the heterojunction bipolar transistor 1 described above, tertiary butylphosphine is used as the phosphorus raw material used for the growth of the low-concentration emitter layer 106 and the high-concentration emitter layer 107, but phosphine can also be used. This is because phosphine is also widely used and highly pure, like tertiary butylphosphine.

  Further, in the method for manufacturing the heterojunction bipolar transistor 1, in addition to trimethylphosphine, as a raw material from which hydrogen radicals are not generated in the heat treatment step, for example, triethylphosphine, triisopropylphosphine, trinormalpropylphosphine, trinormalbutylphosphine, And trisdimethylaminophosphine can be used.

  In the method of manufacturing the heterojunction bipolar transistor 1, the temperature in the heat treatment step is set to 570 ° C. and the thickness of the low-concentration emitter layer 106 is set to 75 nm, but the temperature in the heat treatment step is set to 550 ° C. or more and 650 ° C. or less. The thickness of the emitter layer 106 can be 20 nm or more and 200 nm or less. In order to effectively perform the heat treatment, the temperature is preferably 550 ° C. or higher. That is, by setting the temperature to 550 ° C. or higher, hydrogen radicals in the base layer 105 are easily desorbed in the heat treatment step. However, when the temperature in the heat treatment step is higher than 650 ° C., the crystallinity of the base layer 105 and the low-concentration emitter layer 106 is deteriorated. In order to effectively perform the heat treatment, the film thickness of the low-concentration emitter layer 106 is preferably 200 nm or less. However, if the film thickness is less than 20 nm, the base layer 105 is formed during the growth of the high-concentration emitter layer 107. It becomes easy to inactivate again. On the contrary, if it is thicker than 200 nm, hydrogen radicals in the base layer 105 are difficult to desorb.

  Next, an example (second example) according to an embodiment of the method for manufacturing a semiconductor device (second manufacturing method) of the present invention will be described with reference to the schematic cross-sectional view of FIG.

  In the heterojunction bipolar transistor (HBT) 2 shown in FIG. 2, a buffer layer 202, a subcollector layer 203, a collector layer 204, indium gallium doped with carbon (C), and arsenic (hereinafter referred to as InGaAs) are formed on a semiconductor substrate 201. : C)), a low concentration emitter layer 206 made of indium / phosphorus (InP) doped with silicon (Si), and indium / silicon doped with silicon (Si). High concentration emitter layer 107 made of phosphorus (InP) (here, the low concentration emitter layer 206 and the high concentration emitter layer 207 are combined as a second layer), and indium gallium doped with silicon (Si) , And a third layer (hereinafter referred to as an emitter carrier) made of arsenic (hereinafter referred to as InGaAs). 208) (referred to as a top layer).

  Hereinafter, the production method will be specifically described. Each layer on the semiconductor substrate 201 is formed by metal organic chemical vapor deposition (MOCVD). One feature of this manufacturing method is that when the second layer (the low-concentration emitter layer 206 and the high-concentration emitter layer 207) is formed, a phosphorus material that generates hydrogen radicals is used as the phosphorus material, and the third layer is formed. When the high-concentration emitter layer 207 is formed, an arsenic material that generates hydrogen radicals is used as the arsenic material.

First, the substrate temperature of the semiconductor substrate 201 made of indium / phosphorus (InP) is set to 600 ° C., and phosphine (PH ₃ ) and trimethylindium (TMI) are used as source gases to form indium / phosphorus ( The buffer layer 202 is formed by growing InP) to a thickness of 400 nm, for example.

Next, while maintaining the substrate temperature of the semiconductor substrate 201 at 600 ° C., tertiary butylarsine (TBA), trimethylgallium (TMG), trimethylindium (TMI), and disilane (Si ₂ H ₆ ) are used as source gases. On the buffer layer 202, indium gallium or arsenic (InGaAs: Si) doped with silicon (Si) at, for example, 1 × 10 ¹⁹ / cm ³ is grown to a thickness of, for example, 300 nm, and the subcollector layer 203 is formed. grow up.

Next, while maintaining the substrate temperature at 600 ° C., phosphine (PH ₃ ), trimethylindium (TMI), and disilane (Si ₂ H ₆ ) are used as source gases to form silicon (Si) on the subcollector layer 203. The collector layer 204 is grown by growing indium phosphorus (InP: Si) doped with, for example, 2 × 10 ¹⁶ / cm ³ to a thickness of 450 nm, for example.

Next, the substrate temperature is lowered to, for example, 480 ° C. (first temperature), and tertiary butylarsine (TBA), triethylgallium (TEG), trimethylindium (TMI), and carbon bromide (CBr ₄ ) are used as source gases. On the collector layer 204, indium gallium or arsenic (InGaAs: C) doped with carbon (C) to 2 × 10 ¹⁹ / cm ³ , for example, is grown to a thickness of 75 nm, for example, and the base layer ( First layer) 205 is formed.

Next, the substrate temperature is raised to 550 ° C. (second temperature), and tertiary butylphosphine (TBP) is used as a phosphorus raw material for generating hydrogen radicals, and trimethylindium (TMI) and disilane (Si ₂ H ₆ ) are used. As a source gas, indium phosphorus (InP: Si) doped with silicon (Si) at a low concentration, for example, 5 × 10 ¹⁷ / cm ³ is grown on the base layer 205 to a thickness of 50 nm, for example. A layer (hereinafter referred to as a low-concentration emitter layer) 206 is formed.

Next, while maintaining the substrate temperature at 550 ° C., tertiary butylphosphine (TBP) is used as a phosphorus raw material from which hydrogen radicals are generated, and trimethylindium (TMI) and disilane (Si ₂ H ₆ ) are used as a raw material gas. On the low-concentration emitter layer 206, indium phosphorus (InP: Si) doped with silicon (Si) at a high concentration, for example, 1 × 10 ¹⁹ / cm ³ , is grown to a thickness of, for example, 10 nm. 207 is formed.

Next, while maintaining the substrate temperature at 550 ° C., trimethylarsine (TMAs) is used as an arsenic raw material that generates hydrogen radicals, and trimethylgallium (TMG), trimethylindium (TMI), and disilane (Si ₂ H ₆ ) are used as raw materials. As a gas, indium gallium or arsenic (InGaAs: Si) doped with silicon (Si) at, for example, 1 × 10 ¹⁹ / cm ³ is grown on the high-concentration emitter layer 207 to, for example, 75 nm to form an emitter cap layer. 208 is formed.

In the heterojunction bipolar transistor 2 manufactured by the manufacturing method described above, the carrier concentration of the base layer 205 is 1.7 × 10 ¹⁹ / cm ³ . That is, the activation rate of carbon (C) in the base layer 205 was 85%. This is because the base layer 205 is effectively activated by growing the emitter cap layer 208 while flowing triethylarsine in which hydrogen radicals are not generated.

  According to the method for manufacturing the heterojunction bipolar transistor 2 described above, the base layer 205 can be activated during the growth of the emitter cap layer 208, so that the manufacturing process can be simplified and the manufacturing cost can be reduced. .

  Further, according to the method of manufacturing the heterojunction bipolar transistor 2, even if the thicknesses of the low-concentration emitter layer (second layer) 206 and the high-concentration emitter layer (second layer) 207 on the base layer 205 are matched. Since it is as thin as 80 nm, the base layer 205 can be activated despite the activation of the base layer 205 after the growth of the low-concentration emitter layer 206 and the high-concentration emitter layer 207.

  In addition, according to the method for manufacturing the heterojunction bipolar transistor 2, tertiary butylphosphine (TBP) having a high purity is used as a raw material for growing the low-concentration emitter layer 206 and the high-concentration emitter layer 207. The impurity concentration of the emitter layer can be reduced and the crystallinity of the emitter layer can be improved.

  In addition, according to the method of manufacturing the heterojunction bipolar transistor 2, the device characteristics hardly deteriorate even though trimethylarsine is used as the source gas. By the way, in the conventional technical common sense, trimethylarsine was considered to be difficult to use for crystal growth because the purity of the raw material was poor. However, when the low-concentration emitter layer 206 and the high-concentration emitter layer 207 are grown on the base layer 205 and the emitter cap layer 208 made of InGaAs: Si is grown thereon, the crystal quality of the emitter cap layer 208 deteriorates. However, the present inventors have found that the influence on the device characteristics is small, and confirmed that the present invention is effective.

  In the method for manufacturing the heterojunction bipolar transistor 2 described above, triethylarsine, trinormalpropylarsine, and trisdimethylaminoarsine can be used in addition to trimethylarsine as an arsenic material from which hydrogen radicals are not generated.

  In the method of manufacturing the heterojunction bipolar transistor 2, the total thickness of the low-concentration emitter layer 206 and the high-concentration emitter layer 207 is 80 nm and the growth temperature of the emitter cap layer 208 is 550 ° C. The total thickness of the emitter layer 206 and the high-concentration emitter layer 207 can be set to 20 nm to 200 nm, and the growth temperature of the emitter cap layer 208 can be set to 550 ° C. or higher and 650 ° C. or lower. In order to effectively perform the activation annealing of the base layer 205, the growth temperature is preferably set to 550 ° C. or higher. However, when this temperature is higher than 650 ° C., the crystallinity of the base layer 205 and the low-concentration emitter layer 206 is deteriorated. In order to perform annealing effectively, the total film thickness of the low-concentration emitter layer 206 and the high-concentration emitter layer 207 is preferably 200 nm or less, but if the film thickness is less than 20 nm, the high concentration When the emitter layer 207 is grown, the base layer 205 is easily deactivated again. On the contrary, if the total thickness of the low-concentration emitter layer 206 and the high-concentration emitter layer 207 is greater than 200 nm, hydrogen radicals in the base layer 205 are difficult to desorb.

1 is a schematic cross-sectional view showing an example (first example) of an embodiment according to a method for manufacturing a semiconductor device (first manufacturing method) of the present invention. It is schematic structure sectional drawing which showed the Example (2nd Example) of one Embodiment which concerns on the manufacturing method (2nd manufacturing method) of the semiconductor device of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 101 ... Semiconductor substrate, 105 ... 1st layer (base layer), 106 ... 2nd layer (low concentration emitter layer)

Claims (4)

Forming a first layer containing indium, gallium, and arsenic as a main component and carbon as a dopant on a semiconductor substrate;
Flowing a raw material containing a phosphorus raw material for generating hydrogen radicals directly on the first layer to form a second layer mainly composed of indium and phosphorus on the first layer;
After the step of forming the second layer, a step of performing a heat treatment by flowing a phosphorus raw material that does not generate hydrogen radicals is provided. The method of manufacturing a semiconductor device according to claim 1, wherein the heat treatment is performed at a temperature higher than a temperature at which the second layer is formed. 2. The method according to claim 1, further comprising a step of forming a third layer at a temperature lower than a temperature of the heat treatment by flowing a raw material containing a phosphorus raw material that generates hydrogen radicals after the heat treatment. Semiconductor device manufacturing method. Forming a first layer containing indium, gallium, and arsenic as a main component and carbon as a dopant on a semiconductor substrate;
Flowing a raw material containing a phosphorus raw material for generating hydrogen radicals directly on the first layer to form a second layer mainly composed of indium and phosphorus on the first layer;
After the step of forming the second layer, a step of forming a third layer mainly composed of indium, gallium, and arsenic by flowing a raw material containing an arsenic raw material that does not generate hydrogen radicals is provided. A method of manufacturing a semiconductor device.

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