JP2007158081A - Mounting substrate and semiconductor device - Google Patents

Abstract

A mounting substrate having good mounting reliability when flip-chip mounting a semiconductor chip and a semiconductor device in which the semiconductor chip is mounted on the mounting substrate are provided.
A mounting substrate 100 in which a semiconductor chip is mounted on a lip chip and underfill penetrates under the semiconductor chip, and is formed on a first insulating layer 101 and connected to the semiconductor chip. A pad 103 and a second insulating layer 102 formed on the first insulating layer and having an opening 104 through which the connection pad is exposed; and the connection pad is a peripheral edge of the semiconductor chip. A first connection pad 103A arranged in a substantially square shape corresponding to a portion, and a second connection pad 103B installed so as to be surrounded by the first connection pad, wherein the second connection pad is The exposed opening 104B has an underfill introduction part 104C for introducing the underfill.
[Selection] Figure 4

Description

  The present invention relates to a mounting substrate on which a semiconductor chip is flip-chip mounted, and a semiconductor device in which the semiconductor chip is flip-chip mounted on the mounting substrate.

  Various types of methods for mounting a semiconductor chip have been proposed. For example, a method for flip-chip mounting a semiconductor chip has a feature that it is easy to reduce the size and thickness of a package. .

  FIG. 1 is a plan view showing an example of a configuration of a mounting substrate for flip-chip mounting a semiconductor chip.

  Referring to FIG. 1, a mounting substrate 10 shown in this drawing has a structure in which connection pads 13 for connection to a semiconductor chip are formed on an insulating layer 11. A solder resist layer 12 having an opening 14 exposing the connection pad 13 is formed on the insulating layer 11. The solder resist layer 12 is composed of solder resist layers 12A and 12B formed with the opening 14 interposed therebetween. In this case, both ends of the connection pad 13 are covered with solder resist layers 12A and 12B, respectively.

  The semiconductor chip 15 mounted on the mounting substrate 10 (for the sake of illustration, only an outline is indicated by a dotted line for easy viewing) has a connection portion (not shown) such as a solder bump formed on an electrode of the semiconductor chip 15. And is mounted so as to be electrically connected to the connection pad 13.

Further, a resin called underfill is infiltrated between the semiconductor chip 15 and the mounting substrate 10 to insulate adjacent connection portions (connection pads).
JP-A-11-186322 JP 2000-77471 A JP 2002-329744 A

  However, in some recent semiconductor chips, the connection portion is formed not only at the peripheral portion corresponding to the four sides of the semiconductor chip but also at the center portion of the semiconductor chip. FIG. 2 is a diagram showing an example of a mounting substrate corresponding to a semiconductor chip of a type in which a connection portion with the mounting substrate is formed not only at the peripheral portion but also at the central portion.

  Referring to FIG. 2, the mounting substrate 20 shown in the figure has a structure in which a connection pad 23 for connection to a semiconductor chip is formed on an insulating layer 21, and the connection pad 23 is a connection pad 23A. , 23B. The connection pads 23A are arranged in a substantially square shape corresponding to the peripheral edge of the semiconductor chip 25 to be mounted. On the other hand, the connection pad 23B is installed corresponding to the vicinity of the center of the semiconductor chip so as to be surrounded by the arranged connection pads 23A.

  A solder resist layer 22 having an opening 24 for exposing the connection pad 23 is formed on the insulating layer 21. In order to expose the connection pad 23A, the opening 24 is formed to expose the connection pad 23B and the opening 24A formed in a substantially square shape corresponding to the connection pad 23A. The opening 24B is included. The solder resist layer 22 is divided into two solder resist layers 22A and 22B across the opening 24A. In this case, both ends of the connection pad 23A are covered with solder resist layers 22A and 22B, respectively, and both ends of the connection pad 23B are covered with a solder resist layer 22B.

  A semiconductor chip 25 mounted on the mounting substrate 20 (for the sake of illustration, only an outline is indicated by a dotted line for easy viewing) has a connection portion (not shown) such as a solder bump formed on an electrode of the semiconductor chip 25. These are mounted so as to be electrically connected to the connection pads 23A and 23B, respectively.

  Further, a resin called underfill is infiltrated between the semiconductor chip 25 and the mounting substrate 20 to insulate adjacent connection portions (connection pads).

  However, in the mounting substrate 20 described above, there may be a problem with the penetration of the underfill between the semiconductor chip 25. For example, in the opening 24B, it is difficult to penetrate the underfill, and there may be a problem that a space called a void is generated. For this reason, the reliability of the insulation of a connection part fell, and the problem that the reliability of mounting of a semiconductor chip fell has arisen.

  FIG. 3A is a partially enlarged view of the mounting substrate 20 in the vicinity of the opening 24B, and schematically shows a state in which the underfill 30 penetrates between the semiconductor chip 25 and the mounting substrate 20. It is. However, in the figure, the same reference numerals are given to the parts described above, and the description will be omitted.

  Referring to FIG. 3A, in the case shown in the figure, the underfill penetrates through a narrow gap between the semiconductor chip 25 and the mounting substrate 20, but it is difficult to penetrate into the opening 24B. There is a case where 24B is not sufficiently filled with underfill (a void is generated). The reason will be described with reference to FIG. 3B which is a cross-sectional view of FIG. 3A. However, in the figure, the same reference numerals are given to the parts described above, and the description will be omitted.

  Referring to FIG. 3B, in order for the underfill 30 to flow down the step of the opening 24B, it is necessary to rapidly increase its surface area within a short time. Normally, the underfill has a force (surface tension) that suppresses the increase of the surface area, and thus it has been difficult to fill the opening with the underfill by flowing down such a steep step.

  In view of this, the present invention has a general object to provide a new and useful mounting substrate that solves the above-described problems and a semiconductor device in which a semiconductor chip is mounted on the mounting substrate.

  A specific problem of the present invention is to provide a mounting substrate with good mounting reliability when flip-chip mounting a semiconductor chip, and a semiconductor device in which the semiconductor chip is mounted on the mounting substrate.

  In a first aspect of the present invention, the above-described problem is solved by forming a semiconductor chip on a first insulating layer, wherein the semiconductor chip is mounted on a lip chip and underfill is infiltrated between the semiconductor chip and the semiconductor chip. A connection pad connected to the semiconductor chip, and a second insulating layer formed on the first insulating layer and having an opening through which the connection pad is exposed. The first connection pads arranged in a substantially square shape corresponding to the peripheral edge of the semiconductor chip, and the second connection pads installed so as to be surrounded by the first connection pads, The opening in which the connection pad is exposed has an underfill introducing portion for introducing the underfill, which is solved by the mounting substrate.

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to provide the mounting board | substrate with favorable mounting reliability in the case of flip-chip mounting a semiconductor chip.

  Further, when the second insulating layer is made of a solder resist layer, the reliability of mounting the semiconductor chip is improved.

  In addition, the underfill introduction portion has a structure for controlling an increase in the surface area of the underfill when the underfill is introduced into the opening, thereby suppressing an increase in the surface tension of the underfill. It is possible to suppress the generation of voids.

  Further, when the underfill introduction portion has a portion that is substantially acute when viewed in plan, it becomes possible to suppress the rate of increase in surface area when the underfill is introduced into the opening, Generation of underfill voids can be suppressed.

  In addition, the underfill introduction portion has the second insulating layer opened obliquely from the surface side of the second insulating layer to the side of the second insulating layer facing the first insulating layer. If the structure is included, it is possible to suppress the increase in the surface area when the underfill is introduced into the opening, and it is possible to suppress the generation of voids in the underfill.

  Further, when the second connection pad is connected to a power supply line or a ground line of the semiconductor chip, it is possible to mount a low-voltage compatible semiconductor chip.

  According to a second aspect of the present invention, there is provided a semiconductor device in which a semiconductor chip is flip-chip mounted on a mounting substrate, and an underfill is infiltrated between the semiconductor chip and the mounting substrate. The mounting substrate has a connection pad connected to the semiconductor chip formed in a first insulating layer, and an opening formed on the first insulating layer and exposing the connection pad. A second insulating layer, and the connection pad is surrounded by a first connection pad arranged in a substantially square shape corresponding to a peripheral edge of the semiconductor chip, and the first connection pad. A second connection pad to be installed, wherein the opening from which the second connection pad is exposed has an underfill introduction portion for introducing the underfill, It is decided.

  According to the present invention, it is possible to provide a semiconductor device in which the semiconductor chip is flip-chip mounted on the mounting substrate and the mounting reliability is good.

  In addition, the underfill introduction portion has a structure for controlling an increase in the surface area of the underfill when the underfill is introduced into the opening, thereby suppressing an increase in the surface tension of the underfill. It is possible to suppress the generation of voids.

  Further, when the underfill introduction portion has a portion that is substantially acute when viewed in plan, it becomes possible to suppress the rate of increase in surface area when the underfill is introduced into the opening, Generation of underfill voids can be suppressed.

  In addition, the underfill introduction portion has the second insulating layer opened obliquely from the surface side of the second insulating layer to the side of the second insulating layer facing the first insulating layer. If the structure is included, it is possible to suppress the increase in the surface area when the underfill is introduced into the opening, and it is possible to suppress the generation of voids in the underfill.

  According to the present invention, it is possible to provide a mounting substrate having good mounting reliability when flip-chip mounting a semiconductor chip, and a semiconductor device in which the semiconductor chip is mounted on the mounting substrate.

  Next, embodiments of the present invention will be described below with reference to the drawings.

  FIG. 4 is a plan view schematically showing the mounting substrate 100 according to the first embodiment of the present invention. Referring to FIG. 4, a mounting substrate 100 shown in this drawing has a structure in which a connection pad 103 for connection to a semiconductor chip is formed on an insulating layer 101. The connection pad 103 is connected to a connection pad 103A. , 103B. The connection pads 103A are arranged in a substantially square shape or a substantially frame shape corresponding to the peripheral edge of the semiconductor chip 200 to be mounted. On the other hand, the connection pads 103B are installed in the vicinity of the center of the semiconductor chip 200 so as to be surrounded by the arranged connection pads 103A.

  A solder resist layer (insulating layer) 102 having an opening 104 for exposing the connection pad 103 is formed on the insulating layer 101. In order to expose the connection pad 103A, the opening 104 is formed so as to individually expose the opening 104A formed in a substantially square shape corresponding to the connection pad 103A and the connection pad 103B. The opening 104B is included.

  The solder resist layer 102 is divided into two solder resist layers (insulating layers) 102A and 102B across the opening 104A. In this case, both ends of the connection pad 103A are covered with solder resist layers 102A and 102B, respectively, and both ends of the connection pad 103B are covered with a solder resist layer 102B.

  In this case, for example, the connection pad 103B is connected to a power supply line or a ground line of a semiconductor chip to be mounted. In recent semiconductor chips, there is a demand for power saving (low voltage support) in particular. For low voltage support, the power supply line (power supply line or ground line) is the center where the semiconductor chip device is formed. It is preferably formed in the vicinity of the part. For this reason, a recent low-voltage compatible semiconductor chip may be configured to add a power supply line near the center of the semiconductor chip in order to strengthen the power supply line.

  The semiconductor chip 200 mounted on the mounting substrate 100 (for the sake of illustration, only an outline is indicated by a dotted line for easy viewing) has a connection portion (not shown) such as a solder bump formed on an electrode of the semiconductor chip 200. These are mounted so as to be electrically connected to the connection pads 103A and 103B. Further, a resin called underfill is infiltrated between the semiconductor chip 200 and the mounting substrate 100 to insulate adjacent connection portions (connection pads).

  In the above structure, in the conventional semiconductor device, it may be difficult to permeate the underfill into the opening 104 </ b> B formed isolated in the center. Therefore, the mounting substrate 100 according to the present embodiment is characterized in that the opening 104B has an underfill introduction portion 104C for introducing underfill. For this reason, it becomes easy for an underfill to flow into the opening 104B, and an effect of suppressing the occurrence of an underfill void in the opening 104B is achieved.

  For example, the opening 104B is configured to have an underfill introduction portion 104C including a portion having an acute angle when viewed in plan, in addition to the substantially rectangular opening main body 104D when viewed in plan. .

  FIG. 5 is an enlarged perspective view of the periphery of the opening 104B. However, in the figure, the same reference numerals are given to the parts described above, and the description will be omitted. Referring to FIG. 5, the underfill introducing portion 104C is formed so that the solder resist layer 102B opens obliquely from the surface side of the solder resist layer 102B to the side of the first solder resist layer 102B facing the insulating layer 101. Has a structured.

  In other words, the underfill introducing portion 104C is formed so that the opening of the solder resist layer 102B is widened from one end (front end of the opening) to the insulating layer 101 side (opening according to the opening direction). It has a structure opened obliquely (so that the surface area increases). In this case, it is preferable that the opening from the one end is formed to have a substantially acute angle when viewed in plan. However, since there is actually a problem of processing conditions (problem of exposure / development accuracy), it is not an acute angle in the strict sense, and the above “acute angle” strictly includes the roundness of the tip. Means an acute angle in a substantial sense.

  For example, the shape of the opening 104C can be formed by exposing and developing the photosensitive solder resist layer 102B using a mask having an acute angle portion when viewed in plan. In this case, since the tip of the opening of the solder resist layer 102B (the portion corresponding to the acute angle tip of the mask) is difficult to precisely expose and develop, the developed resin remains on the bottom of the opening. Therefore, the opening 104C is formed obliquely so that the opening expands in a fan shape from the tip of the opening toward the insulating layer 101 (so that the area of the opening increases in accordance with the direction of the opening). can do.

  When a semiconductor chip is mounted on the mounting substrate 100, the underfill is introduced by introducing the underfill in a direction from the underfill introduction portion 104C toward the opening body 104D. The portion 104C is introduced (inflowed) into the opening main body 104D.

  Here, the speed of increase of the surface area of the underfill when the underfill is introduced (inflow) into the opening 104B is suppressed, and the generation of voids when the underfill is filled in the opening 104B is suppressed. The That is, the underfill introduction portion 104C has a structure that controls a rapid increase in the surface area of the underfill when introducing the underfill into the opening portion 104B. A sudden increase in surface tension is suppressed.

  Since the mounting substrate 100 according to the present embodiment has the above structure, generation of underfill voids when a semiconductor chip is mounted is suppressed, and mounting reliability when the semiconductor chip is flip-chip mounted is reduced. It has the characteristics of being good.

  Further, the opening 104B (the underfill introducing portion 104C) is not limited to the shape described above, and can be variously modified and changed.

  For example, FIG. 6A is a modification of the opening 104B. However, in the figure, the same reference numerals are given to the parts described above, and the description will be omitted.

  Referring to FIG. 6A, in the case shown in FIG. 6A, the opening portion 204B from which the connection pad 103B is exposed has an underfill introduction portion 204C and an opening portion main body 204D (the underfill introduction portion 104C and the opening portion main body 104D, respectively). Equivalent). In this case, the opening 204B is larger than the opening 104B, and the underfill introducing portion 204C and the opening main body 204D are formed correspondingly.

  For this reason, there are two connecting portions 103B exposed from the opening 204B (one in the case of the opening 104B). Even in this case, the underfill introduction section 204C has the same effect as the above-described underfill introduction section 104C, and has the effect of suppressing the occurrence of underfill voids.

  FIG. 6B shows another modification of the opening 104B. However, in the figure, the same reference numerals are given to the parts described above, and the description will be omitted.

  Referring to FIG. 6B, in the case shown in FIG. 6B, the opening portion 304B from which the connection pad 103B is exposed has an underfill introduction portion 304C and an opening portion main body 304D (the underfill introduction portion 104C and the opening portion main body 104D, respectively). Equivalent). In the case shown in the figure, the underfill introducing portion 304C is formed on the longitudinal side of the opening main body 304D that is substantially rectangular when viewed from above. As described above, the underfill introduction portion can be formed at various positions with respect to the opening portion main body. In this case, the underfill is preferably introduced from the underfill introduction portion 304C side as in the case described above.

  FIG. 7 is a plan view schematically showing a semiconductor device 300 according to the second embodiment of the present invention. However, in the figure, the same reference numerals are given to the parts described above, and the description will be omitted.

  Referring to FIG. 7, the semiconductor device 300 according to the present embodiment has a structure in which the semiconductor chip 200 is mounted on the mounting substrate 100 described in the first embodiment. An underfill UF is permeated between the semiconductor chip 200 and the mounting substrate 100. The semiconductor device 300 according to the present embodiment has the same effects as those described in the first embodiment. For example, the generation of voids in the underfill UF is suppressed, and the reliability of mounting a semiconductor chip is improved. It is good.

  Further, FIG. 8 is illustrated in the semiconductor device 300 of FIG. 7 in a form in which the mounting substrate is seen through the semiconductor chip 200 for the sake of convenience so that the positional relationship between the semiconductor chip 200 and the mounting substrate 100 can be easily understood. Is. However, in the figure, the same reference numerals are given to the parts described above, and the description will be omitted.

  Referring to FIG. 8, the semiconductor chip 200 includes a chip body 201 and a plurality of connection portions 202 formed on the chip body 201 and connected to the connection pads 104. The connecting portion 202 has a structure in which, for example, solder bumps (both not shown) are formed on electrode pads. The connection part 202 includes a connection part 202A arranged in a substantially square shape corresponding to the peripheral part of the chip body 201 and a connection part 202B installed so as to be surrounded by the arranged connection parts 202A. It is configured as follows.

  In this case, for example, the connecting portion 202B corresponds to a power supply line or a ground line of the semiconductor chip. As described above, in recent semiconductor chips, there is a demand for power saving (low voltage support) in particular, and power supply lines are added near the center of the semiconductor chip for low voltage support. There is a case. In the above structure, the connection portion 202A and the connection pad 103A are connected, and the connection portion 202B and the connection pad 103B are connected. That is, the semiconductor device 300 according to the present embodiment has characteristics that it can cope with a low voltage and has good mounting reliability.

  In recent years, there is a demand for thinning semiconductor devices, and it is difficult to penetrate the underfill by reducing the distance between the semiconductor chip and the mounting substrate. It is an effective technology to do.

  In addition, the structures shown in the above-described Examples 1 and 2 are examples of the embodiment of the present invention, and the present invention is not limited to the specific examples described above, and is described in the claims. Various modifications and changes can be made within the gist.

  According to the present invention, it is possible to provide a mounting substrate having good mounting reliability when flip-chip mounting a semiconductor chip, and a semiconductor device in which the semiconductor chip is mounted on the mounting substrate.

It is FIG. (1) which shows the structural example of a mounting board | substrate. It is FIG. (2) which shows the structural example of a mounting board | substrate. FIG. 3 is a diagram (part 1) illustrating a state in which an underfill penetrates into the mounting substrate of FIG. 2; FIG. 3 is a diagram (part 2) illustrating a state in which an underfill penetrates into the mounting substrate of FIG. 2. FIG. 3 is a diagram illustrating a configuration example of a mounting board according to the first embodiment. FIG. 5 is an enlarged perspective view of a part of the mounting substrate of FIG. 4. FIG. 6 is a diagram (part 1) illustrating a modification of the mounting substrate of FIG. 4; FIG. 10 is a second diagram illustrating a modification of the mounting substrate in FIG. 4. FIG. 6 is a first diagram illustrating a semiconductor device according to a second embodiment; FIG. 6 is a second diagram illustrating the semiconductor device according to the second embodiment.

Explanation of symbols

100 mounting substrate 101 insulating layer 102, 102A, 102B insulating layer (solder resist layer)
103, 103A, 103B Connection pad 104, 104A, 104B, 204, 204A, 204B, 304, 304A, 304B Opening 104C, 204C, 304C Solder resist introduction part 104D, 204D, 304D Opening body 200 Semiconductor chip 201 Chip body 202 , 202A, 202B Connection unit 300 Semiconductor device

Claims (10)

A mounting chip in which a semiconductor chip is mounted on a lip chip and an underfill penetrates between the semiconductor chip,
A connection pad formed on the first insulating layer and connected to the semiconductor chip;
A second insulating layer formed on the first insulating layer and having an opening through which the connection pad is exposed;
The connection pad includes a first connection pad arranged in a substantially square shape corresponding to a peripheral edge of the semiconductor chip, and a second connection pad installed so as to be surrounded by the first connection pad. ,
The mounting substrate, wherein the opening from which the second connection pad is exposed has an underfill introduction portion for introducing the underfill.   The mounting substrate according to claim 1, wherein the second insulating layer is made of a solder resist layer.   The mounting substrate according to claim 1, wherein the underfill introduction portion has a structure that controls an increase in a surface area of the underfill when the underfill is introduced into the opening.   4. The mounting substrate according to claim 1, wherein the underfill introduction portion has a portion that is substantially acute when viewed in plan. 5.   The underfill introduction portion has a structure in which the second insulating layer is opened obliquely from the surface side of the second insulating layer to the side of the second insulating layer facing the first insulating layer. The mounting board according to claim 1, wherein the mounting board is included.   6. The mounting board according to claim 1, wherein the second connection pad is connected to a power supply line or a ground line of the semiconductor chip. A semiconductor device in which a semiconductor chip is flip-chip mounted on a mounting substrate, and an underfill is infiltrated between the semiconductor chip and the mounting substrate,
The mounting substrate is
A connection pad formed on the first insulating layer and connected to the semiconductor chip;
A second insulating layer formed on the first insulating layer and having an opening through which the connection pad is exposed;
The connection pad includes a first connection pad arranged in a substantially square shape corresponding to a peripheral edge of the semiconductor chip, and a second connection pad installed so as to be surrounded by the first connection pad. ,
The semiconductor device according to claim 1, wherein the opening from which the second connection pad is exposed has an underfill introducing portion for introducing the underfill.   The semiconductor device according to claim 7, wherein the underfill introduction portion has a structure for controlling an increase in a surface area of the underfill when the underfill is introduced into the opening.   9. The semiconductor device according to claim 7, wherein the underfill introduction portion has a portion that is substantially acute when viewed in plan.   The underfill introduction portion has a structure in which the second insulating layer is opened obliquely from the surface side of the second insulating layer to the side of the second insulating layer facing the first insulating layer. The semiconductor device according to claim 7, wherein the semiconductor device is included.

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