JP2007035969A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent deterioration of oxygen barrier properties of an oxygen barrier film even when heat treatment is performed in a high-temperature oxygen atmosphere for crystallizing a dielectric thin film that becomes a capacitive insulating film of a semiconductor device.
A contact plug is formed in a first interlayer insulating film on a semiconductor substrate. Over the first interlayer insulating film 107, an oxygen barrier film 109 made of a conductive oxide and electrically connected to the contact plug 106 is formed. A capacitive element including a lower electrode 111, a ferroelectric film 112 formed on the lower electrode 111, and an upper electrode 113 formed on the ferroelectric film 112 is formed on the oxygen barrier film 109. The ferroelectric film 112 is formed so as to partially contact the oxygen barrier film 109.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor device having a capacitive element using a ferroelectric or high dielectric as a capacitive insulating film, and a method for manufacturing the same.

  In recent years, with the advancement of digital technology, high-speed processing and storage of large-capacity data has become an indispensable condition for semiconductor integrated circuit devices. In particular, for semiconductor devices used for data input / output and storage, high integration and high speed by miniaturization are rapidly required. In order to realize further miniaturization and higher speed of a semiconductor device, a technique using a high dielectric as a capacitive insulating film instead of the conventional silicon oxide and silicon nitride has been widely researched and developed. In order to realize a nonvolatile RAM (Random Access Memory) that operates at a higher speed and at a lower voltage than in the past, research and development of a technique using a ferroelectric as a capacitive insulating film has been actively conducted. In this nonvolatile RAM, stack type memory cells are becoming mainstream because the stack type is used instead of the planar type to increase the degree of integration and increase the capacity.

  A conventional semiconductor device will be described below with reference to FIG. FIG. 9 is a cross-sectional view of a main part of a conventional semiconductor device.

  As shown in FIG. 9, a dielectric thin film element (capacitance element) 3 is formed on the insulating film 1 in which the plug 2 is embedded so as to be connected to the plug 2 and covers the entire dielectric thin film element 3. An insulating film 8 is formed on the substrate. The dielectric thin film element 3 includes a lower electrode 4 made of a conductive perovskite oxide, a dielectric thin film 5 formed on the lower electrode 4 and made of a perovskite oxide, and an upper portion formed on the dielectric thin film 5. It has an electrode 6 and a base layer 7 for the lower electrode 4. The underlayer 7 is made of at least one material selected from a metal whose conductivity is conductive, a conductive metal nitride, a conductive metal silicide, and a conductive metal oxide.

In such a dielectric thin film element 3, since it is necessary to form the lower electrode 4 in an oxygen-containing atmosphere, the underlayer 7 made of a complex oxide or the like (for example, iridium oxide) of the constituent elements of the lower electrode 4 is required. Is provided under the lower electrode 4 as an antioxidant / diffusion barrier layer, thereby preventing oxidation of the plug 2 (see, for example, Patent Document 1).
JP-A-10-93036 (page 10, FIG. 1)

  However, in the above conventional semiconductor device, the upper electrode, the dielectric film, the lower electrode, and the underlayer are patterned, and the entire capacitive element is covered with an insulating film. The iridium oxide film (underlying layer) is reduced at a high temperature of 650 ° C. to 800 ° C. used for the crystallization heat treatment or damage recovery heat treatment (recovery annealing). As a result, the oxygen barrier property of the iridium oxide film is impaired, so that oxygen contained in the dielectric film passes through the underlayer and oxidizes the plug, thereby increasing the contact resistance.

  In view of the above-described conventional problems, the present invention provides a semiconductor device capable of preventing deterioration of oxygen barrier properties of an oxygen barrier film even when heat treatment in a high-temperature oxygen atmosphere for crystallizing a dielectric thin film is performed, and a method for manufacturing the same The purpose is to provide.

  In order to achieve the above object, the present invention includes an oxygen barrier film made of, for example, a conductive oxide under a capacitor (capacitance element) made up of a lower electrode, a capacitor insulating film, and an upper electrode, and a side of the oxygen barrier film. In a semiconductor device including an insulating film covering the periphery, a part of the oxygen barrier film is exposed from the insulating film, and the oxygen barrier film and the capacitor insulating film are in contact with each other at the exposed part. According to the present invention, it is possible to prevent a situation in which an oxygen barrier film made of a conductive oxide or the like is reduced due to the crystallization temperature of a dielectric film serving as a capacitive insulating film, thereby deteriorating oxygen barrier properties.

  Specifically, a semiconductor device according to the present invention includes a first insulating film formed on a semiconductor substrate, a contact plug formed in the first insulating film, and a contact plug on the first insulating film. And an oxygen barrier film made of a conductive oxide and a capacitor formed on the oxygen barrier film. The capacitor is formed on the lower electrode and the lower electrode. The capacitor insulating film is formed of a dielectric film and has an upper electrode formed on the capacitor insulating film, and the capacitor insulating film is formed to be in partial contact with the oxygen barrier film.

  According to the semiconductor device of the present invention, for example, by exposing a part of the oxygen barrier film from the lower electrode and the surrounding insulating film, a structure in which the capacitor insulating film formed on the lower electrode is in contact with the oxygen barrier film can be obtained. In addition, since oxygen can freely pass through the structure, the capacitor insulating film, and oxygen is contained in the capacitor insulating film, the oxygen barrier film in contact with the capacitor insulating film can sufficiently receive oxygen. That is, since the oxygen barrier film can be prevented from being reduced by supplying oxygen from the capacitor insulating film, the oxygen barrier property of the oxygen barrier film with respect to the lower plug can be effectively maintained.

  The semiconductor device according to the present invention further includes a second insulating film formed on the first insulating film so as to cover a side surface of the oxygen barrier film, and the capacitive insulating film is formed on the lower electrode and the second insulating film. It may be formed on the film. In this case, the upper surface of the second insulating film may exist above the bottom surface of the oxygen barrier film and at the same level as or below the top surface of the oxygen barrier film.

  In the semiconductor device of the present invention, the capacitor insulating film may be in contact with the oxygen barrier film on the side surface or the upper surface of the oxygen barrier film.

  The semiconductor device according to the present invention further includes a second insulating film formed on the first insulating film so as to cover the side surface of the oxygen barrier film, and the capacitive insulating film is formed on the oxygen barrier film and on the lower electrode. And on the second insulating film.

  In the semiconductor device of the present invention, the planar shape of the oxygen barrier film is preferably larger than the planar shape of the capacitor lower electrode. As a result, the area of the capacitive insulating film in contact with the oxygen barrier film is increased, oxygen can freely pass through the capacitive insulating film, and oxygen is contained in the capacitive insulating film. Sufficient oxygen can be received from the membrane. Therefore, since the oxygen barrier film can be prevented from being reduced by the supply of oxygen from the capacitor insulating film, the oxygen barrier property of the oxygen barrier film with respect to the lower plug can be maintained.

  In the above-described semiconductor device of the present invention, the oxygen barrier film is a single electrode made of any one of a conductive oxide film group consisting of an iridium oxide film, a ruthenium oxide film, a rhenium oxide film, an osmium oxide film, and a rhodium oxide film. A layer film or a laminated film composed of two or more members of the conductive oxide film group is preferable.

  The first method for manufacturing a semiconductor device according to the present invention includes a step of forming a first insulating film on a semiconductor substrate, a step of forming a contact plug in the first insulating film, and a step on the first insulating film. In addition, a step of forming an oxygen barrier film electrically connected to the contact plug, a step of forming a lower electrode on the oxygen barrier film, and a capacitive insulating film made of a dielectric film are formed on the lower electrode. And a step of forming an upper electrode on the capacitor insulating film, and the second electrode is formed so as to cover the lower electrode and the oxygen barrier film between the step of forming the lower electrode and the step of forming the capacitor insulating film. Forming the capacitive insulating film, and further comprising the step of planarizing the upper surface of the second insulating film so that the upper surface and side surfaces of the lower electrode and the upper side surface of the oxygen barrier film are exposed. , On the lower electrode, on the second insulating film and Comprising the step of forming a capacitor insulating film on the exposed upper side surface of the unit barrier film.

  The second method for manufacturing a semiconductor device according to the present invention includes a step of forming a first insulating film on a semiconductor substrate, a step of forming a contact plug in the first insulating film, and a step on the first insulating film. In addition, a step of forming an oxygen barrier film electrically connected to the contact plug, a step of forming a lower electrode on the oxygen barrier film, and a capacitive insulating film made of a dielectric film are formed on the lower electrode. And a step of forming an upper electrode on the capacitor insulating film, and the step of forming the lower electrode includes a step of forming a lower electrode having a planar shape smaller than the planar shape of the oxygen barrier film. After forming the second insulating film so as to cover the lower electrode and the oxygen barrier film between the step of forming the electrode and the step of forming the capacitive insulating film, the upper surface and side surfaces of the lower electrode and the upper surface of the oxygen barrier film 2nd insulation so that is exposed Top further comprising a step of flattening the, the step of forming the capacitor insulating film, over the lower electrode includes forming a capacitor insulating film on the upper and oxygen barrier film of the second insulating film.

  According to the first and second semiconductor device manufacturing methods of the present invention, a portion of the oxygen barrier film is exposed without being covered by the second insulating film and the lower electrode during the heat treatment for forming the capacitive insulating film. Therefore, oxygen in the oxygen atmosphere can be sufficiently taken in from the exposed portion. Further, after the capacitor insulating film is formed, the exposed portion and the capacitor insulating film are in contact with each other, oxygen can freely pass through the capacitor insulating film, and oxygen is contained in the capacitor insulating film. The oxygen barrier film in contact with the capacitor insulating film can sufficiently receive oxygen even during heat treatment in a high-temperature oxygen atmosphere for crystallizing the capacitor insulating film. Therefore, reduction of the oxygen barrier film can be prevented, and the oxygen barrier property of the oxygen barrier film with respect to the lower plug can be maintained.

  In the first or second method for fabricating a semiconductor device of the present invention, the step of planarizing the upper surface of the second insulating film is performed by the upper surface of the second insulating film being above the bottom surface of the oxygen barrier film and the oxygen barrier. It is preferable to include a step of planarizing the upper surface of the second insulating film so as to exist at a position equivalent to or lower than the upper surface of the film. In this way, oxygen can be more effectively taken into the oxygen barrier film during the heat treatment for forming the capacitive insulating film.

  According to the present invention, even when high-temperature heat treatment is performed in an oxygen atmosphere, it is possible to suppress deterioration in characteristics of the oxygen barrier film, thereby providing a high-performance semiconductor device with stable contact resistance and a method for manufacturing the same. be able to.

(First embodiment)
The semiconductor device according to the first embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view of a main part of the semiconductor device according to the first embodiment.

  As shown in FIG. 1, a gate electrode 104 is formed on an element region (selection transistor formation region) surrounded by the element isolation 101 in the semiconductor substrate 100 via a gate insulating film 103. An insulating sidewall 105 is formed on the side surface of the gate electrode 104. Impurity diffusion layers 102A and 102B, which are the source and drain of the selection transistor, are formed on both sides of the gate electrode 104 in the semiconductor substrate 100, respectively. A first interlayer insulating film 107 made of, for example, silicon oxide is formed on the semiconductor substrate 100 so as to cover the selection transistor. In the first interlayer insulating film 107, a contact plug 106 made of, for example, tungsten and electrically connected to the impurity diffusion layer 102B is formed. On the first interlayer insulating film 107, an oxygen barrier film 109 made of, for example, iridium oxide and a second interlayer insulating film 114 covering the side surfaces of the oxygen barrier film 109 are formed, which are connected to the contact plug 106. . Note that the upper portion of the side surface of the oxygen barrier film 109 is exposed from the second interlayer insulating film 114.

  On the oxygen barrier film 109, a lower electrode 111 made of, for example, platinum, a ferroelectric film 112, and an upper electrode 113 made of, for example, platinum are sequentially stacked. That is, the impurity diffusion layer 102 </ b> B and the lower electrode 111 are electrically connected through the oxygen barrier film 109 and the contact plug 106.

  A third interlayer insulating film 115 is formed so as to cover the capacitive element composed of the lower electrode 111, the ferroelectric film 112 and the upper electrode 113. In the first interlayer insulating film 107, the second interlayer insulating film 114, and the third interlayer insulating film 115, a plug 117 connected to the impurity diffusion layer 102B is formed, and the third interlayer insulating film 115 A wiring 116 connected to the plug 117 is formed on the top.

  The feature of this embodiment is that the upper surface height of the second interlayer insulating film 114 is set to be lower than the upper surface height of the oxygen barrier film 109, whereby the ferroelectric film 112, the oxygen barrier film 109, Is in partial contact. In other words, the ferroelectric film 112 covers the upper surface and side surfaces of the lower electrode 111, the upper side surfaces of the oxygen barrier film 109, and the upper surface of the second interlayer insulating film 114 (regions near the oxygen barrier film 109). That is, at the time of forming the ferroelectric film 112, the upper portion of the side surface of the oxygen barrier film 109 is exposed without being covered by the second interlayer insulating film 114. Further, after the formation of the ferroelectric film 112, the exposed portion and the ferroelectric film 112 are in contact with each other. Therefore, oxygen in the oxygen atmosphere can be effectively taken in from the exposed portion of the oxygen barrier film 109 during the ferroelectric sintering. Further, since oxygen can freely pass through the ferroelectric film 112 and oxygen is contained in the ferroelectric film 112, the oxygen barrier film 109 in contact with the ferroelectric film 112 is a ferroelectric film. Even during heat treatment in a high-temperature oxygen atmosphere for crystallizing 112, oxygen can be more sufficiently received from the ferroelectric film 112. Therefore, reduction of the oxygen barrier film 109 can be prevented, and the oxygen barrier property of the oxygen barrier film 109 with respect to the lower contact plug 106 can be maintained.

  In the present embodiment, the film thickness of the oxygen barrier film 109 is preferably in the range of 5 to 200 nm in order to stably obtain the oxygen barrier property.

  Hereinafter, a case where platinum is used as the lower electrode 111 and an iridium oxide film is used as the oxygen barrier film 109 will be described in detail.

  In the case of a stacked memory cell, since the planarization process can be performed relatively easily, the lower electrode of the capacitive element is embedded in the insulating film with only the upper surface thereof exposed, and then the capacitive insulating film is formed on the lower electrode. In many cases, an upper electrode is formed. Generally, when an iridium oxide film is exposed to a high temperature in a state where sufficient oxygen is not applied, reduction starts to occur at a temperature of about 350 ° C. to 400 ° C. In the conventional memory cell structure, since the iridium oxide film serving as the oxygen barrier film is completely embedded in the insulating film, in other words, the iridium oxide film is completely surrounded by the insulating film and the lower electrode. The oxygen supplied to the iridium oxide film is only oxygen that passes through the platinum lower electrode directly above. Therefore, since the oxygen supply state is insufficient in the iridium oxide film, the iridium oxide film is reduced at a high temperature of 650 ° C. to 800 ° C. used for crystallization of the ferroelectric material serving as the capacitive insulating film. As a result, since the oxygen barrier property of the iridium oxide film is impaired, there is a problem in that the diffusion barrier film and the plug below the iridium oxide film are oxidized by oxygen slightly passing through the iridium oxide film, resulting in high resistance. It was.

  On the other hand, according to the first embodiment of the present invention described above, a part of the oxygen barrier film 109 is exposed from the lower electrode 111 and the surrounding insulating film (second interlayer insulating film 114). The capacitor insulating film (ferroelectric film 112) formed on the lower electrode 111 and the oxygen barrier film 109 inevitably come into contact with each other. Here, since oxygen can freely pass through the capacitor insulating film and oxygen is contained in the capacitor insulating film, the oxygen barrier film 109 can sufficiently receive oxygen from the capacitor insulating film. In this manner, the oxygen barrier film 109 is prevented from being reduced by supplying oxygen from the capacitor insulating film, whereby the oxygen barrier property of the oxygen barrier film 109 with respect to the lower plug (contact plug 106) and the like can be maintained. .

  Hereinafter, a semiconductor device manufacturing method according to a first embodiment of the present invention will be described with reference to the drawings. 2A to 2C are cross-sectional views illustrating respective steps of the semiconductor device manufacturing method according to the first embodiment. 2A to 2C, the same components as those in FIG. 1 are denoted by the same reference numerals and description thereof is omitted.

  First, as shown in FIG. 2A, an element isolation region 101 is formed on a semiconductor substrate 100 by using, for example, a silicon trench technique. Thereby, an element region (selection transistor formation region) is defined. Next, the gate electrode 104 of the selection transistor is formed on the element region through the gate insulating film 103, and the insulating sidewall 105 is formed on the side surface of the gate electrode 104. Subsequently, impurity diffusion layers 102 </ b> A and 102 </ b> B to be the source and drain of the selection transistor are formed by ion implantation on both sides of the gate electrode 104 in the semiconductor substrate 100.

  Next, for example, a silicon oxide film is formed on the semiconductor substrate 100 as the first interlayer insulating film 107 in order to insulate the above-described transistor from a capacitor element described later. Further, after forming a contact hole in the interlayer insulating film 107 located in the connection region between the capacitor element and the impurity diffusion layer 102B, the contact plug 106 connected to the impurity diffusion layer 102B is buried by filling the contact hole with tungsten, for example. Form. Next, an iridium oxide film having a thickness of, for example, 100 nm and a platinum film having a thickness of, for example, 50 nm are sequentially formed on the first interlayer insulating film 107 including the contact plug 106, and then the iridium oxide film and the platinum film are formed. Then, an oxygen barrier film 109 and a lower electrode 111 (lower electrode group) connected to the contact plug 106 are formed. Next, after forming a second interlayer insulating film 114 made of, for example, a silicon oxide film so as to cover the lower electrode group, the upper surface and the lower portion of the second interlayer insulating film 114 are formed by, for example, CMP (chemical mechanical polishing). The second interlayer insulating film 114 is planarized so that the upper surface of the electrode 111 is flush with the upper surface. Thereafter, for example, dry etching is performed on the second interlayer insulating film 114 to lower the upper surface of the second interlayer insulating film 114 by about 20 nm from the upper surface of the oxygen barrier film 109. Thereby, the upper part of the side surface of the oxygen barrier film 109 is exposed.

  Next, after forming a ferroelectric thin film on the second interlayer insulating film 114 including the lower electrode 111 by, for example, spin coating, the ferroelectric thin film is calcined in an oxygen atmosphere of, for example, about 650 ° C. Do the tie. Next, after a platinum film having a film thickness of, for example, 50 nm is formed on the ferroelectric thin film, the platinum film and the ferroelectric thin film are patterned at once. As a result, as shown in FIG. 2B, a capacitive insulating film (ferroelectric film) 112 and an upper electrode 113 are formed on the lower electrode 111. That is, a capacitor element including the lower electrode 111, the capacitor insulating film 112, and the upper electrode 113 is formed. At this time, the capacitor insulating film 112 is also formed on the second interlayer insulating film 114 so as to be in contact with the upper side surface of the oxygen barrier film 109.

  Next, as shown in FIG. 2C, after covering the entire surface of the semiconductor substrate 100 including the above capacitor element with a third interlayer insulating film 115, the capacitor insulating film is formed in an oxygen atmosphere at 800 ° C., for example. The main body 112 is subjected to main sintering. Subsequently, a contact hole reaching the impurity diffusion layer 102A is formed in the first interlayer insulating film 107, the second interlayer insulating film 114, and the third interlayer insulating film 115. Next, for example, tungsten is buried in the contact hole to form a plug (bit line contact) 117, and then a wiring (bit line) 116 connected to the plug 117 is formed on the third interlayer insulating film 115.

  According to the manufacturing method of the semiconductor device according to the first embodiment described above, a part (upper side surface) of the oxygen barrier film 109 is formed by the second interlayer insulating film 114 and the heat treatment for forming the capacitive insulating film. Since it is exposed without being covered by the lower electrode 111, oxygen in the oxygen atmosphere can be sufficiently taken in from the exposed portion. Further, after the capacitor insulating film is formed, the exposed portion and the capacitor insulating film 112 are in contact with each other, oxygen can freely pass through the capacitor insulating film 112, and oxygen is contained in the capacitor insulating film 112. As a result, the oxygen barrier film 109 in contact with the capacitor insulating film 112 can sufficiently receive oxygen even during heat treatment in a high-temperature oxygen atmosphere for crystallizing the ferroelectric forming the capacitor insulating film 112. Therefore, reduction of the oxygen barrier film 109 can be prevented, and the oxygen barrier property of the oxygen barrier film 109 with respect to the lower contact plug 106 can be maintained.

(Modification of the first embodiment)
Hereinafter, a semiconductor device according to a modification of the first embodiment of the present invention will be described with reference to the drawings. FIG. 3 is a cross-sectional view of main parts of a semiconductor device according to a modification of the first embodiment. In FIG. 3, the same components as those in the first embodiment shown in FIG.

  As shown in FIG. 3, this modification differs from the first embodiment between the contact plug 106 and the oxygen barrier film 109 (hereinafter referred to as the upper oxygen barrier film 109 in this modification). In order from the bottom, a diffusion barrier film 108 made of, for example, a nitride of titanium and aluminum (titanium aluminum nitride) and a lower oxygen barrier film 110 made of, for example, iridium are interposed. That is, in this modification, the impurity diffusion layer 102B and the lower electrode 111 are electrically connected via the upper oxygen barrier film 109, the lower oxygen barrier film 110, the diffusion barrier film 108, and the contact plug 106. In the present modification, the second interlayer insulating film 114 is formed so as to cover the side surfaces of the upper oxygen barrier film 109, the lower oxygen barrier film 110, and the diffusion barrier film 108. However, the upper part of the side surface of the upper oxygen barrier film 109 is exposed from the second interlayer insulating film 114.

  Specifically, as in the first embodiment, the upper surface height of the second interlayer insulating film 114 is set to be lower than the upper surface height of the upper oxygen barrier film 109, whereby the ferroelectric material The film 112 and the upper oxygen barrier film 109 are in partial contact. In other words, the ferroelectric film 112 covers the upper surface and side surfaces of the lower electrode 111, the upper side surfaces of the upper oxygen barrier film 109, and the upper surface of the second interlayer insulating film 114 (a region near the upper oxygen barrier film 109). Yes. In other words, when the ferroelectric film 112 is formed, the upper part of the side surface of the upper oxygen barrier film 109 is exposed without being covered by the second interlayer insulating film 114. Therefore, oxygen in the oxygen atmosphere can be sufficiently taken in from the exposed portion of the oxygen barrier film 109 during the ferroelectric sintering. Further, after the formation of the ferroelectric film 112, the exposed portion and the ferroelectric film 112 are in contact with each other, oxygen can freely pass through the ferroelectric film 112, and By containing oxygen, the upper oxygen barrier film 109 in contact with the ferroelectric film 112 is sufficiently separated from the ferroelectric film 112 even during heat treatment in a high-temperature oxygen atmosphere for crystallizing the ferroelectric film 112. Can receive oxygen. Therefore, the upper oxygen barrier film 109 can be prevented from being reduced and deteriorated, so that the oxygen barrier property of the upper oxygen barrier film 109 with respect to the lower diffusion barrier film 108 and the contact plug 106 can be maintained.

  In the present modification, the film thickness of the upper oxygen barrier film 109 is preferably in the range of 5 to 200 nm in order to stably obtain the oxygen barrier property.

  Further, in this modification, the upper surface of the second interlayer insulating film 114 is desirably positioned about 5 nm or more above the lower surface of the upper oxygen barrier film 109 in order to prevent oxidation of the diffusion barrier film 108.

  In this modification, since the diffusion barrier film 108 is provided between the contact plug 106 and the upper oxygen barrier film 109, each of the heat treatments after the formation of the contact plug 106 such as sintering of the ferroelectric film 112 is performed. It is possible to prevent the constituent elements of the film from interdiffusing into the lower transistor region and the upper capacitive element region.

  Further, in this modification, since the lower oxygen barrier film 110 is provided between the contact plug 106 and the upper oxygen barrier film 109, a synergistic effect is produced by the combination, such as sintering of the ferroelectric film 112, etc. It is possible to prevent the contact plug 106 from being oxidized and increased in resistance by heat treatment after the plug 106 is formed.

  Here, the result of evaluation of the semiconductor device according to the modification of the first embodiment of the present invention by the inventor will be described. FIG. 4 shows the result of evaluating the yield of contact plugs using an evaluation module configured to simulate the main part of the semiconductor device according to the modification of the first embodiment of the present invention. ing. In FIG. 4, the horizontal axis of the graph represents the upper surface position of the second interlayer insulating film 114 with respect to the upper surface position of the upper oxygen barrier film 109 (the upper surface position of the second interlayer insulating film 114 is the upper oxygen barrier film 109. It is a state lower than the upper surface position, that is, a state in which the upper oxygen barrier film 109 is exposed, is represented by a positive value. It is expressed by a defect occurrence rate in which a case having a resistance value equal to or greater than the value is defined as a defect).

  As shown in FIG. 4, when the upper oxygen barrier film 109 is embedded in the insulating film (second interlayer insulating film 114), the contact plug defect rate rapidly increases. Note that the actually used evaluation module is a contact chain type. As a result of physical analysis of the abnormal part, unlike the present modification, when the upper oxygen barrier film 109 is embedded in an insulating film, a diffusion barrier is used. Interfacial delamination (delamination of the interface between the diffusion barrier film 108 and the lower oxygen barrier film 110) due to oxidation of the upper surface and side surfaces of the film 108, or oxidation of the contact plug 106 was confirmed.

(Second Embodiment)
A semiconductor device according to the second embodiment of the present invention will be described below with reference to the drawings. FIG. 5 is a fragmentary cross-sectional view of the semiconductor device according to the second embodiment. In FIG. 5, the same components as those in the first embodiment shown in FIG.

  As shown in FIG. 5, the first point that this embodiment is different from the first embodiment is that the planar shape of the oxygen barrier film 109 is larger than the planar shape of the lower electrode 111. In addition, the second point that this embodiment is different from the first embodiment is that the upper surface height of the second interlayer insulating film 114 is set substantially equal to the upper surface height of the oxygen barrier film 109. As a result, the bottom surface of the ferroelectric film 112 and the top surface of the oxygen barrier film 109 are in partial contact. In other words, the ferroelectric film 112 covers the upper surface and side surfaces of the lower electrode 111, the upper end portion of the oxygen barrier film 109, and the upper surface of the second interlayer insulating film 114 (a region near the oxygen barrier film 109). That is, at the time of forming the ferroelectric film 112, the upper end portion of the oxygen barrier film 109 is exposed without being covered by the second interlayer insulating film 114. Therefore, oxygen in the oxygen atmosphere can be sufficiently taken in from the exposed portion of the oxygen barrier film 109 during the ferroelectric sintering. Further, after the formation of the ferroelectric film 112, the exposed portion and the ferroelectric film 112 are in contact with each other, oxygen can freely pass through the ferroelectric film 112, and Since oxygen is contained, the oxygen barrier film 109 in contact with the ferroelectric film 112 is sufficiently oxygenated from the ferroelectric film 112 even during heat treatment in a high-temperature oxygen atmosphere for crystallizing the ferroelectric film 112. Can receive. Therefore, reduction of the oxygen barrier film 109 can be prevented, and the oxygen barrier property of the oxygen barrier film 109 with respect to the lower contact plug 106 can be maintained.

  In the present embodiment, the oxygen barrier film 109 has a film thickness in the range of 5 to 200 nm and an exposed dimension from the outer peripheral portion of the lower electrode 111 (exposed upper surface) in order to stably obtain oxygen barrier properties. It is desirable that the end dimension is 50 nm or more.

  In the present embodiment, the upper surface height of the second interlayer insulating film 114 and the upper surface height of the oxygen barrier film 109 are set to be substantially equal. However, instead of this, the upper surface height of the second interlayer insulating film 114 may be set lower than the upper surface height of the oxygen barrier film 109 as in the first embodiment. In this case, oxygen is supplied not only from the upper end portion of the oxygen barrier film 109 but also from the upper part of the side surface at the time of ferroelectric sintering or ferroelectric crystallization. Can be held even more reliably.

  A semiconductor device manufacturing method according to the second embodiment of the present invention will be described below with reference to the drawings. 6A to 6C are cross-sectional views illustrating respective steps of the method for manufacturing the semiconductor device according to the second embodiment. 6A to 6C, the same components as those in the first embodiment shown in FIGS. 2A to 2C are denoted by the same reference numerals, and the description thereof is omitted.

  First, similarly to the process shown in FIG. 2A of the first embodiment, as shown in FIG. 6A, an element region (selection transistor formation region) surrounded by the element isolation 101 in the semiconductor substrate 100 is shown. A selection transistor including the gate insulating film 103, the gate electrode 104, the insulating sidewall 105, and the impurity diffusion layers 102A and 102B is formed thereon. Thereafter, a first interlayer insulating film 107 having a contact plug 106 electrically connected to the impurity diffusion layer 102B is formed on the semiconductor substrate 100. Next, an iridium oxide film having a thickness of, for example, 100 nm and a platinum film having a thickness of, for example, 50 nm are sequentially formed on the first interlayer insulating film 107 including the contact plug 106, and then the platinum film is patterned. Thus, the lower electrode 111 is formed. Subsequently, the iridium oxide film is patterned so as to have a planar shape larger than the planar shape of the lower electrode 111 (specifically, a shape larger by about 200 nm around the lower electrode 111), and the contact plug 106 is patterned. An oxygen barrier film 109 to be connected to is formed. Next, after forming a second interlayer insulating film 114 made of, for example, a silicon oxide film so as to cover the oxygen barrier film 109 and the lower electrode 111 (lower electrode group), the second interlayer insulating film 114 is formed by CMP, for example. The second interlayer insulating film 114 is planarized so that the upper surface of the first electrode and the upper surface of the lower electrode 111 are flush with each other. Thereafter, for example, dry etching is performed on the second interlayer insulating film 114 so that the upper surface of the second interlayer insulating film 114 is substantially flush with the upper surface of the oxygen barrier film 109. As a result, the upper end portion of the oxygen barrier film 109 is exposed. Here, as in the first embodiment, the upper surface of the second interlayer insulating film 114 may be lower than the upper surface of the oxygen barrier film 109 by about 20 nm. In this case, the upper portion of the side surface is exposed in addition to the upper end portion of the oxygen barrier film 109.

  Subsequently, similarly to the step shown in FIG. 2B of the first embodiment, as shown in FIG. 6B, a capacitive insulating film (ferroelectric film) 112 and an upper electrode are formed on the lower electrode 111. 113 is formed to complete the capacitive element. At this time, the capacitor insulating film 112 is also formed on the second interlayer insulating film 114 so as to be in contact with the upper end portion of the oxygen barrier film 109.

  Next, similarly to the step shown in FIG. 2C of the first embodiment, as shown in FIG. 6C, the entire surface of the semiconductor substrate 100 including the capacitor element is covered with a third interlayer insulation. After being covered with the film 115, main sintering of the ferroelectric constituting the capacitive insulating film 112 is performed in an oxygen atmosphere at 800 ° C., for example. Subsequently, a contact hole reaching the impurity diffusion layer 102A is formed in the first interlayer insulating film 107, the second interlayer insulating film 114, and the third interlayer insulating film 115. Next, for example, tungsten is buried in the contact hole to form a plug (bit line contact) 117, and then a wiring (bit line) 116 connected to the plug 117 is formed on the third interlayer insulating film 115.

  According to the manufacturing method of the semiconductor device according to the second embodiment described above, a part (upper end portion) of the oxygen barrier film 109 is formed on the second interlayer insulating film 114 during the heat treatment for forming the capacitive insulating film. And since it is exposed without being covered by the lower electrode 111, oxygen in the oxygen atmosphere can be sufficiently taken in from the exposed portion. Further, after the capacitor insulating film is formed, the exposed portion and the capacitor insulating film 112 are in contact with each other, oxygen can freely pass through the capacitor insulating film 112, and oxygen is contained in the capacitor insulating film 112. As a result, the oxygen barrier film 109 in contact with the capacitor insulating film 112 can sufficiently receive oxygen even during heat treatment in a high-temperature oxygen atmosphere for crystallizing the ferroelectric forming the capacitor insulating film 112. Therefore, reduction of the oxygen barrier film 109 can be prevented, and the oxygen barrier property of the oxygen barrier film 109 with respect to the lower contact plug 106 can be maintained.

(Modification of the second embodiment)
A semiconductor device according to a modification of the second embodiment of the present invention will be described below with reference to the drawings. FIG. 7 is a fragmentary cross-sectional view of a semiconductor device according to a modification of the second embodiment. In FIG. 7, the same components as those of the second embodiment shown in FIG.

  As shown in FIG. 7, this modification differs from the second embodiment between the contact plug 106 and the oxygen barrier film 109 (hereinafter referred to as the upper oxygen barrier film 109 in this modification). In order from the bottom, a diffusion barrier film 108 made of, for example, a nitride of titanium and aluminum (titanium aluminum nitride) and a lower oxygen barrier film 110 made of, for example, iridium are interposed. That is, in this modification, the impurity diffusion layer 102B and the lower electrode 111 are electrically connected via the upper oxygen barrier film 109, the lower oxygen barrier film 110, the diffusion barrier film 108, and the contact plug 106. In the present modification, the second interlayer insulating film 114 is formed so as to cover the side surfaces of the upper oxygen barrier film 109, the lower oxygen barrier film 110, and the diffusion barrier film 108.

  Also in this modification, as in the second embodiment, the planar shape of the upper oxygen barrier film 109 is set to be larger than the planar shape of the lower electrode 111 and the height of the upper surface of the second interlayer insulating film 114 is increased. Is set to be substantially equal to the height of the upper surface of the upper oxygen barrier film 109, whereby the ferroelectric film 112 and the upper oxygen barrier film 109 are in partial contact. In other words, the ferroelectric film 112 covers the upper surface and side surfaces of the lower electrode 111, the upper surface end of the upper oxygen barrier film 109, and the upper surface of the second interlayer insulating film 114 (a region near the upper oxygen barrier film 109). Yes. That is, when the ferroelectric film 112 is formed, the upper surface end portion of the upper oxygen barrier film 109 is exposed without being covered by the second interlayer insulating film 114. Therefore, oxygen in the oxygen atmosphere can be sufficiently taken in from the exposed portion of the upper oxygen barrier film 109 during ferroelectric sintering. Further, after the formation of the ferroelectric film 112, the exposed portion and the ferroelectric film 112 are in contact with each other, oxygen can freely pass through the ferroelectric film 112, and By containing oxygen, the upper oxygen barrier film 109 in contact with the ferroelectric film 112 is sufficiently separated from the ferroelectric film 112 even during heat treatment in a high-temperature oxygen atmosphere for crystallizing the ferroelectric film 112. Can receive oxygen. Therefore, the upper oxygen barrier film 109 can be prevented from being reduced and deteriorated, so that the oxygen barrier property of the upper oxygen barrier film 109 with respect to the lower diffusion barrier film 108 and the contact plug 106 can be maintained.

  In this modification, the oxygen barrier film 109 has a thickness in the range of 5 to 200 nm and an exposed dimension from the outer peripheral portion of the lower electrode 111 (exposed upper surface) in order to stably obtain oxygen barrier properties. It is desirable that the end dimension is 50 nm or more.

  In the present modification, the upper surface height of the second interlayer insulating film 114 and the upper surface height of the oxygen barrier film 109 are set to be substantially equal. However, instead of this, the upper surface height of the second interlayer insulating film 114 may be set lower than the upper surface height of the oxygen barrier film 109 as in the first embodiment. In this case, oxygen is supplied not only from the upper end portion of the oxygen barrier film 109 but also from the upper part of the side surface at the time of ferroelectric sintering or ferroelectric crystallization. Can be held even more reliably. However, it is desirable that the upper surface of the second interlayer insulating film 114 be positioned about 5 nm or more above the lower surface of the upper oxygen barrier film 109 in order to prevent oxidation of the diffusion barrier film 108.

  In this modification, since the diffusion barrier film 108 is provided between the contact plug 106 and the upper oxygen barrier film 109, each of the heat treatments after the formation of the contact plug 106 such as sintering of the ferroelectric film 112 is performed. It is possible to prevent the constituent elements of the film from interdiffusing into the lower transistor region and the upper capacitive element region.

  Further, in this modification, since the lower oxygen barrier film 110 is provided between the contact plug 106 and the upper oxygen barrier film 109, a synergistic effect is produced by the combination, such as sintering of the ferroelectric film 112, etc. It is possible to prevent the contact plug 106 from being oxidized and increased in resistance by heat treatment after the plug 106 is formed.

(Third embodiment)
A semiconductor device according to the third embodiment of the present invention will be described below with reference to the drawings. FIG. 8 is a cross-sectional view of a main part of the semiconductor device according to the third embodiment.

  As shown in FIG. 8, a gate electrode 104 is formed on an element region (selection transistor formation region) surrounded by the element isolation 101 in the semiconductor substrate 100 via a gate insulating film 103. An insulating sidewall 105 is formed on the side surface of the gate electrode 104. Impurity diffusion layers 102A and 102B, which are the source and drain of the selection transistor, are formed on both sides of the gate electrode 104 in the semiconductor substrate 100, respectively. A first interlayer insulating film 107 made of, for example, silicon oxide is formed on the semiconductor substrate 100 so as to cover the selection transistor made of the gate electrode 104 and the like. In the first interlayer insulating film 107, a contact plug 106 made of, for example, tungsten and electrically connected to the impurity diffusion layer 102B is formed. A diffusion barrier film 108 is provided on the contact plug 106. On the first interlayer insulating film 107, a second interlayer insulating film 114 having a recess to be a capacitor element formation region is formed. The recess reaches the diffusion barrier film 108, and a lower oxygen barrier film 110 made of, for example, iridium, an upper oxygen barrier film 109 made of, for example, iridium oxide, and a lower electrode 111, made of, for example, platinum are sequentially formed in the recess. ing. That is, the impurity diffusion layer 102B and the lower electrode 111 are electrically connected via the upper oxygen barrier film 109, the lower oxygen barrier film 110, the diffusion barrier film 108, and the contact plug 106. Here, the lower oxygen barrier film 110, the upper oxygen barrier film 109, and the lower electrode 111 are formed so that a recess is formed on the lower electrode 111, and each of the lower oxygen barrier film 110, the upper oxygen barrier film 109, and the lower electrode 111 is formed. The side surface is formed so as to be flush with the upper surface of the second interlayer insulating film 114. On each of the upper surface and side surface of the lower electrode 111, the side surface of the upper oxygen barrier film 109, the side surface of the lower oxygen barrier film 110, and the upper surface of the second interlayer insulating film 114 (a region near the upper oxygen barrier film 109). A dielectric film 112 and an upper electrode 113 made of, for example, platinum are formed.

  A third interlayer insulating film 115 is formed so as to cover the capacitive element composed of the lower electrode 111, the ferroelectric film 112 and the upper electrode 113. In the first interlayer insulating film 107, the second interlayer insulating film 114, and the third interlayer insulating film 115, a plug 117 connected to the impurity diffusion layer 102B is formed, and the third interlayer insulating film 115 A wiring 116 connected to the plug 117 is formed on the top.

  The feature of the present embodiment is that the side surface (processed cross section) of the upper oxygen barrier film 109 is set to be flush with the upper surface of the second interlayer insulating film 114, thereby the ferroelectric film 112 and the upper oxygen barrier film 109. That is, the barrier film 109 is in partial contact. That is, when the ferroelectric film 112 is formed, the side surfaces of the upper oxygen barrier film 109 are exposed without being covered by the second interlayer insulating film 114. Therefore, oxygen in the oxygen atmosphere can be sufficiently taken in from the exposed portion of the upper oxygen barrier film 109 during ferroelectric sintering. Further, after the formation of the ferroelectric film 112, the exposed portion and the ferroelectric film 112 are in contact with each other, oxygen can freely pass through the ferroelectric film 112, and By containing oxygen, the upper oxygen barrier film 109 in contact with the ferroelectric film 112 is sufficiently separated from the ferroelectric film 112 even during heat treatment in a high-temperature oxygen atmosphere for crystallizing the ferroelectric film 112. Can receive oxygen. Therefore, reduction of the upper oxygen barrier film 109 can be prevented, and the oxygen barrier property of the upper oxygen barrier film 109 with respect to the lower contact plug 106 can be maintained.

  In the present embodiment, the film thickness of the oxygen barrier film 109 is desirably in the range of 5 to 100 nm in order to stably obtain the oxygen barrier property.

  In the present embodiment, in order to avoid processing damage to the ferroelectric film 112 and the upper electrode 113, each of the ferroelectric film 112 and the upper electrode 113 is placed on the second interlayer insulating film 114. It is preferable to extend about 50-500 nm from the upper edge part of the recessed part used as a formation area.

  Further, in this embodiment, since the diffusion barrier film 108 is provided between the contact plug 106 and the upper oxygen barrier film 109, each heat treatment after the formation of the contact plug 106 such as sintering of the ferroelectric film 112 is performed. It is possible to prevent the constituent elements of the film from interdiffusing into the lower transistor region and the upper capacitive element region.

  In the present embodiment, since the lower oxygen barrier film 110 is provided between the contact plug 106 and the upper oxygen barrier film 109, a synergistic effect is produced by the combination, and the contact of the ferroelectric film 112, such as sintering, etc. It is possible to prevent the contact plug 106 from being oxidized and increased in resistance by heat treatment after the plug 106 is formed.

  A method for manufacturing a semiconductor device according to the third embodiment of the present invention will be described below with reference to the drawings.

  First, similarly to the process shown in FIG. 2A of the first embodiment, the gate insulating film 103 and the gate are formed on the element region (selection transistor formation region) surrounded by the element isolation 101 in the semiconductor substrate 100. A selection transistor including the electrode 104, the insulating sidewall 105, and the impurity diffusion layers 102A and 102B is formed. Thereafter, after forming a first interlayer insulating film 107 on the semiconductor substrate 100, a contact hole reaching the impurity diffusion layer 102B is formed in the first interlayer insulating film 107, and then, for example, tungsten is embedded in the contact hole. Then, the contact plug 106 is formed. Subsequently, the upper portion of the contact plug 106 is removed by etching, and the upper surface of the etched contact plug 106 is made lower by about 50 nm than the upper surface of the first interlayer insulating film 107. Next, after a titanium aluminum nitride film having a thickness of, for example, about 70 nm is formed on the first interlayer insulating film 107 including the contact plug 106, the titanium aluminum nitride film is formed on the contact plug 106. Other parts other than the existing part are removed by CMP, for example. As a result, a diffusion barrier film 108 is formed above the contact plug 106 in the contact hole.

  Next, after forming a second interlayer insulating film 114 made of, for example, a silicon oxide film having a thickness of about 450 nm on the first interlayer insulating film 107, the second interlayer insulating film 114 and the diffusion barrier film 108 are formed. A concave portion that reaches the capacitor element formation region is formed. Next, on each of the second interlayer insulating film 114 and the inner wall of the recess formed in the second interlayer insulating film 114, for example, an iridium film having a thickness of about 50 nm, for example, an iridium oxide film having a thickness of about 50 nm, and For example, a platinum film having a thickness of about 50 nm is sequentially formed. Next, the iridium film, iridium oxide film, and platinum film (unnecessary portions of each film) outside the recess (capacitor element formation region) are removed by dry etching. Subsequently, after the recesses on the remaining platinum film are filled with a silicon oxide film having a thickness of, for example, about 450 nm, CMP is performed so that the side surface of each film is flush with the upper surface of the second interlayer insulating film 114. As a result, a lower electrode 111 made of a platinum film, an upper oxygen barrier film 109 made of an iridium oxide film, and a lower oxygen barrier film 110 made of an iridium film (a lower electrode group together) are formed.

  Next, after removing the silicon oxide film in the recess on the lower electrode 111 by, for example, dry etching, a ferroelectric thin film is formed on the entire surface of the semiconductor substrate 100 by, for example, MOCVD (metal organic chemical vapor deposition). After that, the ferroelectric thin film is temporarily sintered in an oxygen atmosphere at 650 ° C., for example. Subsequently, after a platinum film having a film thickness of, for example, about 50 nm is formed on the ferroelectric thin film, the platinum film and the ferroelectric thin film are patterned in a lump so that the upper electrode 113 and the capacitive insulation are formed. A film (ferroelectric film) 112 is formed to complete the capacitive element. The upper electrode 113 and the capacitor insulating film 112 are the upper surface and side surface of the lower electrode 111, the side surface of the upper oxygen barrier film 109, the side surface of the lower oxygen barrier film 110, and the upper surface of the second interlayer insulating film 114 (upper oxygen barrier film). 109 in the vicinity region).

  Next, similarly to the step shown in FIG. 2C of the first embodiment, the entire surface of the semiconductor substrate 100 including the above-described capacitive element is covered with a third interlayer insulating film 115, and then, for example, 800 ° C. In this oxygen atmosphere, the ferroelectric constituting the capacitive insulating film 112 is sintered. Subsequently, a contact hole reaching the impurity diffusion layer 102A is formed in the first interlayer insulating film 107, the second interlayer insulating film 114, and the third interlayer insulating film 115. Next, for example, tungsten is buried in the contact hole to form a plug (bit line contact) 117, and then a wiring (bit line) 116 connected to the plug 117 is formed on the third interlayer insulating film 115.

  According to the semiconductor device manufacturing method according to the third embodiment described above, a part of the upper oxygen barrier film 109 (side surface which is a processed surface) is formed in the second interlayer during the heat treatment for forming the capacitive insulating film. Since the insulating film 114 and the lower electrode 111 are exposed without being covered, oxygen in the oxygen atmosphere can be sufficiently taken in from the exposed portion. Further, after the capacitor insulating film is formed, the exposed portion and the capacitor insulating film 112 are in contact with each other, oxygen can freely pass through the capacitor insulating film 112, and oxygen is contained in the capacitor insulating film 112. As a result, the upper oxygen barrier film 109 in contact with the capacitor insulating film 112 can sufficiently receive oxygen even during heat treatment in a high-temperature oxygen atmosphere for crystallizing the ferroelectric forming the capacitor insulating film 112. Therefore, reduction of the upper oxygen barrier film 109 can be prevented, and the oxygen barrier property of the upper oxygen barrier film 109 with respect to the lower diffusion barrier film 108 and the contact plug 106 can be maintained.

  In the first to third embodiments (including modifications), an iridium oxide film is used as the oxygen barrier film (or upper oxygen barrier film) 109. However, the present invention is not limited to this, and a single-layer film made of any one of a conductive oxide film group consisting of an iridium oxide film, a ruthenium oxide film, a rhenium oxide film, an osmium oxide film, and a rhodium oxide film, or the conductive film The same effect can be obtained by using a laminated film composed of two or more of the oxide film groups.

  INDUSTRIAL APPLICABILITY The present invention is useful for preventing deterioration of oxygen barrier properties due to heat treatment in a high-temperature oxygen atmosphere in a semiconductor device having a capacitive element using a ferroelectric or high dielectric as a capacitive insulating film.

FIG. 1 is a cross-sectional view of main parts of a semiconductor device according to the first embodiment of the present invention. 2A to 2C are cross-sectional views showing respective steps of the method for manufacturing the semiconductor device according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view of main parts of a semiconductor device according to a modification of the first embodiment of the present invention. FIG. 4 is a diagram showing a yield improvement effect of contact plugs by the semiconductor device according to the modification of the first embodiment of the present invention. FIG. 5 is a fragmentary cross-sectional view of a semiconductor device according to the second embodiment of the present invention. 6A to 6C are cross-sectional views showing respective steps of a method for manufacturing a semiconductor device according to the second embodiment of the present invention. FIG. 7 is a fragmentary cross-sectional view of a semiconductor device according to a modification of the second embodiment of the present invention. FIG. 8 is a fragmentary cross-sectional view of a semiconductor device according to the third embodiment of the present invention. FIG. 9 is a cross-sectional view of a main part of a conventional semiconductor device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Semiconductor substrate 101 Element isolation region 102A, 102B Impurity diffusion layer 103 Gate insulating film 104 Gate electrode 105 Insulating sidewall 106 Contact plug 107 First interlayer insulating film 108 Diffusion barrier film 109 Oxygen barrier film (upper oxygen barrier film)
110 Lower oxygen barrier film 111 Lower electrode 112 Ferroelectric film (capacitive insulating film)
113 Upper electrode 114 Second interlayer insulating film 115 Third interlayer insulating film 116 Bit line (wiring)
117 Plug (bit line contact)

Claims (11)

A first insulating film formed on the semiconductor substrate;
A contact plug formed in the first insulating film;
An oxygen barrier film formed on the first insulating film so as to be electrically connected to the contact plug and made of a conductive oxide;
A capacitive element formed on the oxygen barrier film,
The capacitive element has a lower electrode, a capacitive insulating film formed on the lower electrode and made of a dielectric film, and an upper electrode formed on the capacitive insulating film,
The semiconductor device, wherein the capacitive insulating film is formed so as to be in partial contact with the oxygen barrier film. The semiconductor device according to claim 1,
A second insulating film formed on the first insulating film so as to cover a side surface of the oxygen barrier film;
2. The semiconductor device according to claim 1, wherein the capacitor insulating film is formed on the lower electrode and on the second insulating film. The semiconductor device according to claim 2,
The upper surface of the second insulating film is above the bottom surface of the oxygen barrier film, and is present at a position equal to or below the upper surface of the oxygen barrier film. The semiconductor device according to any one of claims 1 to 3,
The capacitance insulating film is in contact with the oxygen barrier film on a side surface or an upper surface of the oxygen barrier film. The semiconductor device according to claim 1,
A second insulating film formed on the first insulating film so as to cover a side surface of the oxygen barrier film;
The semiconductor device according to claim 1, wherein the capacitive insulating film is formed on the oxygen barrier film, on the lower electrode, and on the second insulating film. The semiconductor device according to claim 1,
The semiconductor device according to claim 1, wherein a planar shape of the oxygen barrier film is larger than a planar shape of the capacitor lower electrode. The semiconductor device according to any one of claims 1 to 6,
The oxygen barrier film may be a single-layer film made of any one oxide film selected from the group consisting of an iridium oxide film, a ruthenium oxide film, a rhenium oxide film, an osmium oxide film, and a rhodium oxide film, or the conductive film. A semiconductor device comprising a laminated film composed of two or more oxide films in a group of conductive oxide films. Forming a first insulating film on the semiconductor substrate;
Forming a contact plug in the first insulating film;
Forming an oxygen barrier film electrically connected to the contact plug on the first insulating film;
Forming a lower electrode on the oxygen barrier film;
Forming a capacitive insulating film made of a dielectric film on the lower electrode;
Forming an upper electrode on the capacitive insulating film,
After forming a second insulating film so as to cover the lower electrode and the oxygen barrier film between the step of forming the lower electrode and the step of forming the capacitive insulating film, the upper surface and side surfaces of the lower electrode And further comprising the step of planarizing the upper surface of the second insulating film so that the upper side surface of the oxygen barrier film is exposed,
The step of forming the capacitive insulating film includes the step of forming the capacitive insulating film on the lower electrode, on the second insulating film, and on the exposed upper side surface of the oxygen barrier film. A method for manufacturing a semiconductor device. Forming a first insulating film on the semiconductor substrate;
Forming a contact plug in the first insulating film;
Forming an oxygen barrier film electrically connected to the contact plug on the first insulating film;
Forming a lower electrode on the oxygen barrier film;
Forming a capacitive insulating film made of a dielectric film on the lower electrode;
Forming an upper electrode on the capacitive insulating film,
The step of forming the lower electrode includes the step of forming the lower electrode having a planar shape smaller than the planar shape of the oxygen barrier film,
After forming a second insulating film so as to cover the lower electrode and the oxygen barrier film between the step of forming the lower electrode and the step of forming the capacitive insulating film, the upper surface and side surfaces of the lower electrode And further comprising the step of planarizing the upper surface of the second insulating film such that the upper surface of the oxygen barrier film is exposed,
The step of forming the capacitive insulating film includes the step of forming the capacitive insulating film on the lower electrode, on the second insulating film, and on the oxygen barrier film. Production method. In the manufacturing method of the semiconductor device according to claim 8 or 9,
The step of planarizing the upper surface of the second insulating film includes the step of the upper surface of the second insulating film being above the bottom surface of the oxygen barrier film and equal to or below the upper surface of the oxygen barrier film. And a step of planarizing the upper surface of the second insulating film so as to exist at the position of the semiconductor device. In the manufacturing method of the semiconductor device according to claim 8 or 9,
The oxygen barrier film may be a single-layer film made of any one oxide film selected from the group consisting of an iridium oxide film, a ruthenium oxide film, a rhenium oxide film, an osmium oxide film, and a rhodium oxide film, or the conductive film. A method for manufacturing a semiconductor device, comprising a laminated film comprising two or more oxide films in a group of conductive oxide films.

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