JP2007019307A - Method for forming position accuracy verification mark on semiconductor wafer and method for forming alignment mark - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of forming a mark for verifying positioning accuracy. <P>SOLUTION: On a first mask 10, a main pattern 11 corresponding to a circuit 31 and a sub-pattern 12 formed of a plurality of auxiliary patterns 13 continuously arranged and having sizes to receive influences of aberration the same as that of the main pattern 11 at the time of exposure are formed. The arrangement pitch of the auxiliary patterns 13 is larger than the size thereof, and is smaller than the pitch of the main pattern 11. On a second mask, a main pattern corresponding to a circuit and a sub-pattern receiving the influence of the aberration the same as that of the main pattern at the time of exposure are formed. The circuit 31 conforming to the main pattern 11 and the mark 32 continued conforming to the auxiliary patterns 13 are formed by photo-etching using the first mask 10. The circuit conforming to the main pattern and the mark conforming to the sub-pattern are formed by the photo-etching using the second mask via a light shielding film layer 4. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a technique related to exposure in a photolithography (photoetching) process when manufacturing a semiconductor device using a wafer as a base material, and in particular, a position for verifying the positional accuracy of circuit portions formed in different layers. The present invention relates to an accuracy verification mark forming method and an alignment mark forming method for aligning (positioning) a photomask with respect to a wafer.

  In general, a semiconductor device is composed of a plurality of layers, and circuit portions are formed in predetermined layers among them. In the production, a plurality of layers are sequentially laminated on a wafer as a base material, and a circuit portion is provided for each predetermined layer by appropriately performing photo-etching with a photomask at each stage of the lamination. Many are formed. The wafer on which the circuit portion is formed is cut into individual semiconductor devices along the scribe line.

  Here, it is important to grasp whether or not the semiconductor device is manufactured as designed. Therefore, usually, the positional accuracy (overlay accuracy) between circuit portions formed in different layers is verified before the wafer is cut. In the verification, in the wafer, in the unnecessary area that is finally cut and discarded, that is, in the area outside the area that becomes the semiconductor device (circuit area forming area), through photo-etching with a photomask in each layer, respectively. Simultaneously with the formation of the circuit portion in the circuit portion formation region, a mark as a dummy pattern is formed. Then, the positional accuracy of the circuit units is verified from the amount of deviation by measuring the amount of deviation of the marks in each layer.

  The basic principle of such a method for verifying the positional accuracy between circuit units will be described with reference to FIG. 6A and 6B are diagrams for explaining the basic principle of a method for verifying the positional accuracy between circuit parts, in which FIG. 6A is a plan view of a wafer on which the circuit part is formed, and FIG. 6B is a sectional view taken along the line DD in FIG. (C) is a figure which shows a detection signal when a mark is measured according to the DD cross section of (a).

  As shown in FIGS. 6A and 6B, on the wafer 1 (actually, on an oxide film layer or a nitride film layer not shown), the circuit portion formation region 1a has two L-shaped sides. A line-shaped first circuit portion 31 is formed, and in the unnecessary region 1b, a line-shaped first circuit portion along two sides of a square including two sides parallel to the two sides constituting the first circuit portion 31 is formed. 1 mark 32 is formed. The first circuit portion 31 and the first mark 32 are simultaneously formed through photolithography using a first photomask.

  Further, a second circuit portion 41 having a line shape parallel to one side of the first circuit portion 31 is formed above the first circuit portion 31 with the interlayer film layer 2 interposed therebetween. Above the mark 32, a second mark is formed in a line shape along four sides of a square including one side parallel to the second circuit portion 41, and is smaller than the entire shape (square) of the first mark 32. 42 is formed. The second circuit portion 41 and the second mark 42 are simultaneously formed through photolithography using a second photomask.

  However, here, the positional relationship between the pattern for forming the first circuit portion 31 and the pattern for forming the first mark 32 in the first photomask, and the second in the second photomask. The positional relationship between the pattern for forming the circuit portion 41 and the pattern for forming the second mark 42 is set so as to coincide with each other by design. In addition, 1c shown with the dashed-two dotted line in FIG. 6 is a scribe line.

The first mark 32 and the second mark 42 of the wafer 1 are irradiated with measurement light from above, and the reflected light is detected by a measuring machine. As shown in FIG. 6 (c), the detected light / dark signals of the light include points P ₃₂ and P ₃₂ where the first mark 32 exists and points P ₄₂ and P ₄₂ where the second mark 42 exists. And it will fade out rapidly. Then, the position of the first mark 32 points exists P _32, P ₃₂ between the center point PC ₃₂ of the position of the second P ₄₂ point mark 42 is present, P ₄₂ between the center point PC ₄₂ of Ask.

When the positions of the center point PC ₃₂ and the center point PC ₄₂ coincide with each other, the shift amount between the first mark 32 and the second mark 42 becomes “0”, and conversely, the center point PC ₃₂ and the center point PC If there is a difference in the position of the PC ₄₂ , the difference is the amount of deviation between the first mark 32 and the second mark 42. On the other hand, since the first mark 32 is formed at the same time as the first circuit portion 31 and the second mark 42 is formed at the same time as the second circuit portion 41, the first mark 32 and the second mark 42 are formed. Is equivalent to a deviation amount between the first circuit unit 31 and the second circuit unit 41 as it is. Therefore, it is possible to verify the positional accuracy, which is the shift amount between the first circuit unit 31 and the second circuit unit 41, from the measured shift amount between the first mark 32 and the second mark 42. That is, here, the first mark 32 and the second mark 42 are used as the position accuracy verification marks.

  In addition, when performing photo-etching in the process of manufacturing a semiconductor device, it is important to align the photomask at a regular position with respect to the wafer each time. Therefore, usually, the position of the mark formed simultaneously with the formation of the circuit portion is measured through the previous photoetching, and the photomask used for the next photoetching is aligned on the wafer based on the position.

For example, referring to FIG. 6 above, after the photo-etching with the first photomask and when the photo-etching with the second photomask is performed from now on, verification of the positional accuracy between the circuit parts described above is performed. Similarly to the above, the first mark 32 of the wafer 1 is irradiated with measurement light from above, and the reflected light is detected by a measuring machine. As shown in FIG. 6C, the detected light / dark signal of light suddenly becomes dark at points P ₃₂ and P ₃₂ where the first mark 32 exists. Then, a position of the first mark 32 points exists P _32, P ₃₂ between the center point PC ₃₂ of, with its center point PC ₃₂ as a reference, that the second photomask alignment to the normal position Can do. That is, here, the first mark 32 is used as an alignment mark.

  By the way, light used for exposure in photolithography is irradiated onto a photomask through an optical system such as a lens and guided to a wafer. For this reason, during exposure, the following situations occur due to the influence of aberration, particularly coma. This will be described with reference to FIG. 7A and 7B are diagrams for explaining the influence of coma aberration, in which FIG. 7A is a cross-sectional view of a photomask, and FIG. 7B is a diagram showing the light intensity of exposure light guided to the wafer through the photomask of FIG. (C) is sectional drawing of the wafer by exposure through the photomask of (a).

  Here, for convenience of explanation, the first photomask is considered as a photomask. As shown in FIG. 7A, the first photomask 10 includes a transparent substrate 10a such as a glass plate and a light shielding film 10b laminated on the lower surface thereof. A first main pattern 11 corresponding to the first circuit portion and a first sub pattern 12 corresponding to the first mark are both formed in the light shielding film 10b so as to penetrate through the light shielding film 10b. Yes. The first main pattern 11 is, for example, a hole-shaped extraction pattern (hole diameter 0.4 μm), and the first sub-pattern 12 is much larger than the size of the first main pattern 11, for example, a hole shape This is a punching pattern (hole diameter: 3.0 μm).

When such first photomask 10 is irradiated with exposure light from above, the light passes through the first main pattern 11 and the first subpattern 12, and the resist film 3 on the wafer 1 is exposed. (See FIG. 7C). At this time, as shown in FIG. 7 (b), for the light intensity of the on the resist film 3, if there is no coma aberration, the light intensity of the light passing through the first main pattern 11, shown by the solid line S ₁₁ look like in the light intensity of the light transmitted through the first sub-pattern 12 is as shown by a solid line S _12.

However, actually, due to the influence of coma aberration, the light intensity of the light that has passed through the first main pattern 11 swells in one direction (rightward in FIG. 7B) and shifts as shown by the dotted line T ₁₁ . light intensity of the light transmitted through the first sub-pattern 12 is shifted as also shown by the dotted line T ₁₂ bulging in one direction. Here shift amount L _T12 shift amount L _T11 and dotted T ₁₂ dotted line T ₁₁ in the opening area of the pattern in the first light shielding film 10b of the photomask 10, i.e. a first main pattern 11 first sub Since it depends on the size of the opening area of the pattern 12, it varies depending on the size. That is, the shift amount L _T12 of the dotted line T ₁₂ in the light that has passed through the first sub pattern 12 is the dotted line T in the light that has passed through the first main pattern 11 that is much smaller in size than the first sub pattern 12. _{It is} much larger than the deviation amount L _{T11 of 11} .

As a result, as shown in FIG. 7C, the resist film 3 is to be formed with a pattern having a dimension L _S11 by exposure through the first main pattern 11, and a dimension larger by the deviation L _T11. Hall-like open pattern 71 L ₁₁ is formed by exposure through a first sub-pattern 12, when it should pattern dimension L _S12 is formed, the deviation amount L min larger dimension L ₁₂ holes like the _T12 A punching pattern 72 is formed. Therefore, when the blank pattern 71 is formed as the first circuit portion and the blank pattern 72 is formed as the first mark, the positional relationship between the first circuit portion and the first mark is different from the shift amount _LT11. Due to the difference from the amount L _T12 , the design value is deviated.

  Such a situation associated with coma aberration occurs not only at the time of photolithography using the first photomask 10 but also at the time of photolithography using any photomask including the second photomask.

  Then, even if the first mark whose positional relationship is shifted with respect to the first circuit unit and the second mark whose positional relationship is shifted with respect to the second circuit unit are measured as the position accuracy verification marks, The measurement result cannot be said to reflect the positional accuracy of the first circuit unit and the second circuit unit as it is, and there is anxiety in the verification of the positional accuracy. Even if the first mark whose positional relationship is shifted with respect to the first circuit unit is measured as an alignment mark, the measurement result reflects the design positional relationship with the first circuit unit. However, it remains uneasy to use the second photomask as a reference for alignment.

  In particular, in recent years, as the size of the wafer has been increased, the elements (circuit units) constituting the semiconductor device have been miniaturized, and the problems associated with the above-described coma aberration during exposure have become more apparent. Yes.

  Therefore, a technique for solving such a problem is strongly desired. For example, Patent Document 1 discloses a conventional solving technique. This method will be described with reference to FIG. FIGS. 8A and 8B are diagrams for explaining a conventional solution to the influence of coma aberration. FIG. 8A is a cross-sectional view of a photomask, and FIG. 8B is an exposure guided to a wafer through the photomask of FIG. The figure which shows the light intensity of light, (c) is sectional drawing of the wafer by exposure through the photomask of (a).

  Here, as in FIG. 7, the first photomask is considered as the photomask for convenience of explanation. In addition, the description which overlaps with the description in above-mentioned FIG. 7 is abbreviate | omitted suitably.

  As shown in FIG. 8A, the light shielding film 10b in the first photomask 10 has, for example, a hole-shaped extraction pattern (having a hole diameter of 0. 0 mm) as the first main pattern 11 corresponding to the first circuit portion. 4 μm) is formed in the opening. In addition, as the first sub-pattern 12 corresponding to the first mark, for example, a hole-shaped extraction pattern (hole diameter 0.4 μm) having the same size as the first main pattern 11 is formed as an opening. Specifically, the size of the first sub-pattern 12 is allowed to be 1/2 to 2 times the size of the first main pattern 11, and the first main pattern 11 receives during exposure by photolithography. It is affected by the same coma aberration as the coma.

When the first photomask 10 is irradiated with exposure light from above, the light on the resist film 3 that has passed through the first subpattern 12 is irradiated as shown in FIG. 8B. strength, if there is no coma aberration, becomes the light intensity of the light transmitted through the first main pattern 11 as shown in (a solid line S ₁₁ reference) and the solid line S ₁₂ comparable. However, actually, due to the influence of coma aberration, the light intensity of the light that has passed through the first main pattern 11 (see the dotted line T ₁₁ ) swells in one direction and shifts as indicated by the dotted line T ₁₂ . That is, the deviation amount L _T12 shift amount L _T11 and dotted T ₁₂ dotted line T ₁₁ here, it becomes comparable.

As a result, as shown in FIG. 8C, the resist film 3 is exposed to the first sub-pattern 12 and has the same dimension as the pattern of the dimension L _{S11 obtained} by the exposure through the first main pattern 11. Where the pattern L _S12 is to be formed, the shift amount L _{T12 is} about the same as the extracted pattern 71 of the dimension L _{11 that} is larger by the shift amount L _T11 due to exposure through the first main pattern 11 due to the influence of coma aberration. As a result, a hole-shaped punching pattern 72 having a dimension L _{12 that} is larger is formed. Therefore, when the blank pattern 71 is formed as the first circuit portion and the blank pattern 72 is formed as the first mark, the positional relationship between the first circuit portion and the first mark is different from the shift amount _LT11. Since the quantity L _T12 is approximately the same, it relatively matches the design value.

  Such a method is applied not only at the time of photoetching by the first photomask 10 but also at the time of photoetching by any photomask including the second photomask.

Then, since the positional relationship between the first circuit portion and the first mark and the positional relationship between the second circuit portion and the second mark are relatively coincident with the design values, these first marks The measurement result obtained by measuring the second mark as the position accuracy verification mark directly reflects the position accuracy between the first circuit portion and the second circuit portion, and the position accuracy can be verified with high accuracy. . The measurement result obtained by measuring the first mark as an alignment mark reflects the design positional relationship with the first circuit unit, and is used as a reference for high-precision alignment of the second photomask. Can do.
JP-A-9-74063

  However, the conventional solution to the influence of the above-mentioned coma aberration actually causes problems in the following cases.

  The situation will be described with reference to FIG. 9 and FIG. FIG. 9 is a diagram for explaining a problem caused by a conventional solution to the influence of coma aberration, where (a) is a plan view of the first photomask, and (b) is a first view of (a). The top view of the wafer after photo-etching with a photomask, (c) is EE sectional drawing of (b). FIG. 10 is a continuation of FIG. 9 for explaining the problem caused by the conventional solution to the influence of coma aberration, where (a) is a plan view of the second photomask, and (b) is (a). FIG. 9C is a plan view of the wafer after photoetching using the second photomask, FIG. 10C is a sectional view taken along line FF in FIG. 5B, and FIG. It is a figure which shows a signal.

  As shown in FIG. 9A, the first photomask 10 includes a first circuit portion 31 (FIG. 9) in a region corresponding to the circuit portion forming region 1a (see FIG. 9B) of the wafer 1. The first main pattern 11 corresponding to (b) and (c) is formed with an opening. Here, the first main pattern 11 is, for example, a hole-shaped extraction pattern (hole diameter: 0.2 μm), and is formed in a large number with a minimum pitch of 1 μm in the X direction and a minimum pitch of 0.34 μm in the Y direction.

  On the other hand, the first sub-pattern 12 corresponding to the first mark 32 (see FIGS. 9B and 9C) is opened in the area corresponding to the unnecessary region 1b (see FIG. 9B) of the wafer 1. Is formed. The first sub-pattern 12 here is, for example, a hole-shaped punching pattern (hole diameter 0.2 μm) that is approximately the same as the size of the first main pattern 11, and extends along the four sides of a square parallel to the XY direction. Many are arranged side by side. The size of each first sub-pattern 12 is allowed to be 1/2 to 2 times the size of the first main pattern 11, and is affected by the coma aberration that the first main pattern 11 receives during exposure by photolithography. Is affected by the same coma aberration.

  When such first photomask 10 is aligned on wafer 1 and exposure light is irradiated from above, the light passes through each first main pattern 11 and each first subpattern 12. Then, it is guided to a resist film (not shown) (having a thickness of about 0.8 μm) on the interlayer film layer 2 laminated on the wafer 1. By this exposure, as shown in FIG. 9B, a transfer pattern 51 according to each first main pattern 11 is formed on the resist film, and a transfer pattern 52 according to each first sub pattern 12 is formed. Are formed respectively. Here, the transfer pattern 51 according to each first main pattern 11 and the transfer pattern 52 according to each first sub pattern 12 are formed in accordance with the same effects of coma aberration received during exposure. Therefore, the shift amounts due to coma aberration are almost the same, and the positional relationship with each other relatively matches the design value.

  Subsequently, dry etching is performed using the exposed resist film as a mask, and thereby, a hole-like extraction pattern 71 corresponding to the transfer pattern 51 according to each first main pattern 11 is formed on the underlying interlayer film layer 2. (A hole diameter of 0.8 μm) is formed, and a hole-shaped extraction pattern 72 (a hole diameter of 0.8 μm) corresponding to the transfer pattern 52 according to each first sub-pattern 12 is formed.

  Next, a metal film such as W (tungsten) is deposited on the extraction pattern 71 according to each first main pattern 11 and the extraction pattern 72 according to each first sub-pattern 12 (thickness of about 0.3 μm). Then, the metal film is polished using CMP (chemical mechanical polishing) or the like. Thereby, the metal film remains only in the extraction pattern 71 according to each first main pattern 11 and the extraction pattern 72 according to each first sub-pattern 12, as shown in FIG. Each includes a first circuit portion 31 and a first mark 32.

  Thereafter, a metal wiring film 4 made of Al—Cu or the like is laminated on the entire upper surface of the wafer 1 (thickness: about 0.3 μm).

  Subsequently, as shown in FIG. 10A, the second photomask 20 has a second circuit portion 41 (on the region corresponding to the circuit portion formation region 1a of the wafer 1 (see FIG. 10B)). A second main pattern 21 corresponding to FIG. 10B and FIG. The second main pattern 21 here is, for example, a line-shaped remaining pattern (width 0.2 μm) along the Y direction, and has the same pitch as the first main pattern 11 in the first photomask 10 described above. Many are formed.

  On the other hand, the second subpattern 22 corresponding to the second mark 42 (see FIGS. 10B and 10C) remains in the region corresponding to the unnecessary area 1b (see FIG. 10B) of the wafer 1. Is formed. Here, the second sub-pattern 22 is, for example, a line-shaped remaining pattern (width 0.2 μm) that is approximately the same as the size of the second main pattern 21, and the first sub-pattern 22 in the first photomask 10 described above. Are formed along the four sides of a square parallel to the XY direction, which is smaller than the entire shape (square) of the sub pattern 12. The size of each second sub-pattern 22 is allowed to be 1/2 to 2 times the size of the second main pattern 21, and the influence of coma aberration that the second main pattern 21 receives during exposure by photolithography. Is affected by the same coma aberration.

  The positional relationship between the second main pattern 21 for forming the second circuit portion 41 and the second sub pattern 22 for forming the second mark 42 in the second photomask 20 is as follows. In the first photomask 10, the positional relationship between the first main pattern 11 for forming the first circuit portion 31 and the first subpattern 12 for forming the first mark 32, and the design , Are set to match each other.

  When such second photomask 20 is aligned on wafer 1 and exposure light is irradiated from above, the light is blocked by each second main pattern 21 and each second subpattern 22. Then, it passes through the other region and is guided to a resist film (not shown) laminated on the metal wiring film 4 of the wafer 1. By this exposure, as shown in FIG. 10B, a linear transfer pattern 61 according to each second main pattern 21 is left and formed on the resist film, and according to each second subpattern 22. A line-shaped transfer pattern 62 is left and formed. Here, the transfer pattern 61 according to each second main pattern 21 and the transfer pattern 62 according to each second sub pattern 22 have coma aberration received during exposure, as in the case of the blank pattern. Since the influences are formed according to the same ones, the shift amounts due to the coma aberration are almost equal to each other, and the mutual positional relationship relatively matches the design value.

  Subsequently, the resist film is dry-etched, and the remaining transfer pattern 61 according to each second main pattern 21 and the transfer pattern 62 according to each second sub-pattern 22 remain. As shown in FIG. 10C, the second circuit portions 41 and the second marks 42 are formed.

Then, the first mark 32 and the second mark 42 of the wafer 1 are irradiated with measurement light from above, and the reflected light is detected by a measuring machine. Light and dark signal of the detected light, as shown in FIG. 10 (d), but large peak is the point P _42, rapidly at P ₄₂ darker second mark 42 is present appears, first mark 32 In P _32, P ₃₂ that is present, almost the peak does not appear. This is because the first mark 32 is fine and the layer of the metal wiring film 4 laminated thereon is almost flat.

  Therefore, each of the first mark 32 and the second mark 42 is used so that the position accuracy of the first circuit unit 31 and the second circuit unit 41 can be verified with high accuracy, that is, as a position accuracy verification mark. Although it is formed so as to function sufficiently, a situation in which the position of the first mark 32 cannot be measured (detected) particularly occurs during the verification. As a result, it becomes difficult to verify the positional accuracy of the first circuit unit 31 and the second circuit unit 41 itself.

  The first mark 32 is temporarily formed so as to be used as a reference for high-precision alignment of the second photomask 20, that is, to function sufficiently as an alignment mark. A situation occurs in which the position of the mark 32 cannot be measured (detected). In particular, since the light used for the measurement at the time of alignment is low energy light that does not cause the resist film to be exposed carelessly, it is more difficult to measure (detect) the position of the first mark 32. As a result, it is difficult to use the second photomask 20 for alignment.

  Therefore, the present invention has been made in view of the above-described problems, and provides a method for forming a position accuracy verification mark capable of reliably verifying the position accuracy of circuit portions formed in different layers with high accuracy. Is the purpose. It is another object of the present invention to provide a method for forming an alignment mark that can accurately and accurately align a photomask with respect to a wafer.

  In order to achieve the above object, a method for forming a position accuracy verification mark according to the present invention includes a first layer in which a number of first circuit portions are formed through photolithography using a first photomask, a light shielding film layer, In each semiconductor wafer in which a plurality of second circuit parts are formed in sequence through photolithography using a second photomask, each first circuit part formed in the first layer And a method of forming a position accuracy verification mark for verifying the position accuracy of each of the second circuit portions formed in the second layer, and is characterized by the following points. The first photomask has a first main pattern corresponding to each first circuit portion and the same aberration effect as the aberration that each first main pattern receives during exposure by photolithography. A first sub-pattern composed of a plurality of auxiliary patterns arranged at least in the width direction, each having a size to be received, and an auxiliary pattern having an arrangement pitch of each auxiliary pattern in the arrangement direction. It is larger than the pattern size and smaller than the arrangement pitch of the first main patterns in the arrangement direction. The second photomask has a second main pattern corresponding to each second circuit portion and the same aberration effect as the aberration that each second main pattern receives during exposure by photolithography. And a second sub-pattern having a size to be received. Then, the first circuit portion according to the first main pattern is formed on the first layer through photolithography using the first photomask, and the first position accuracy according to the first sub pattern is formed. A step of forming a verification mark, a step of sequentially forming a light shielding film layer and a second layer on the first layer on which the first circuit portion and the first position accuracy verification mark are formed, A second circuit portion according to the second main pattern is formed on the second layer formed on the film layer through photolithography using a second photomask, and the second subpattern is followed. Forming a second position accuracy verification mark.

  In this way, the first mark is formed in a size in which auxiliary patterns adjacent to each other are connected due to the influence of coma aberration at the time of exposure, and the center is recessed, and the light shielding film laminated thereon The layer will also be recessed. The second mark is formed on the light shielding film layer. If it does so, both the 1st mark and the 2nd mark can be detected by irradiation of light, and both positions can be measured reliably.

  In addition, since the first circuit portion and the first mark are formed according to the same influences of aberrations upon exposure, the shift amounts due to the aberrations are approximately the same, and the mutual positions The relationship is relatively consistent with the design value. In addition, since both the second circuit portion and the second mark are formed according to the same influence of the aberration received during the exposure, the shift amounts due to the aberration are approximately the same, and the positional relationship with each other. Is relatively consistent with the design value. Therefore, the position accuracy of the first circuit portion and the second circuit portion can be verified with high accuracy from the measurement results of the first mark and the second mark.

  According to another aspect of the present invention, there is provided a method for forming an alignment mark according to the present invention, comprising: a first layer on which a plurality of first circuit portions are formed through photolithography using a first photomask; a light shielding film layer; Alignment of the second photomask with respect to the second layer in a semiconductor wafer in which a plurality of second layers in which a plurality of second circuit portions are formed through photolithography using the second photomask is sequentially performed A method for forming an alignment mark for achieving the above-described features is as follows. The first photomask has a first main pattern corresponding to each first circuit portion and the same aberration effect as the aberration that each first main pattern receives during exposure by photolithography. A first sub-pattern composed of a plurality of auxiliary patterns arranged at least in the width direction, each having a size to be received, and an auxiliary pattern having an arrangement pitch of each auxiliary pattern in the arrangement direction. It is larger than the pattern size and smaller than the arrangement pitch of the first main patterns in the arrangement direction. Then, a first circuit portion according to the first main pattern is formed on the first layer through photolithography using a first photomask, and an alignment mark according to the first sub pattern is formed. And a step of sequentially forming a light shielding film layer and a second layer on the first layer on which the first circuit portion and the alignment mark are formed.

  In this way, the first mark is formed in a size in which auxiliary patterns adjacent to each other are connected due to the influence of coma aberration at the time of exposure, and the center is recessed, and the light shielding film laminated thereon The layer will also be recessed. If it does so, a 1st mark can be detected by irradiation of light, and both positions can be measured reliably.

  In addition, since the first circuit portion and the first mark are formed according to the same influences of aberrations upon exposure, the shift amounts due to the aberrations are approximately the same, and the mutual positions The relationship is relatively consistent with the design value. Therefore, the alignment of the second photomask can be performed with high accuracy from the measurement result of the first mark.

  According to the method for forming a position accuracy verification mark of the present invention, it is possible to form a position accuracy verification mark capable of reliably verifying the position accuracy of circuit portions formed in different layers with high accuracy. Further, according to the method for forming an alignment mark of the present invention, it is possible to form an alignment mark that can reliably and accurately align the photomask with respect to the wafer.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. First, a method for forming a position accuracy verification mark and an alignment mark according to the first embodiment of the present invention will be described. 1A and 1B are diagrams for explaining a method for forming a position accuracy verification mark and an alignment mark according to the first embodiment. FIG. 1A is a plan view of a first photomask, and FIG. The top view of the wafer after photo-etching by the 1st photomask of this, (c) is AA sectional drawing of (b). FIG. 2 is a view subsequent to FIG. 1 for explaining the method of forming the position accuracy verification mark and the alignment mark according to the first embodiment, wherein (a) is a plan view of the second photomask, and (b). (A) is a plan view of a wafer after photo-etching using a second photomask, (c) is a cross-sectional view along BB in (b), and (d) is a mark measured according to the BB cross-section in (b) It is a figure which shows a detection signal when it does. 3A and 3B are diagrams for explaining the principle of the elimination method of the present invention with respect to the influence of coma aberration, wherein FIG. 3A is a sectional view of a first photomask, and FIG. 3B is a first view of FIG. The figure which shows the light intensity of the exposure light guide | induced to the wafer through the photomask, (c) is sectional drawing of the wafer by the exposure through the 1st photomask of (a). In addition, 1c shown with the dashed-two dotted line in FIG.1 and FIG.2 is a scribe line.

  As shown in FIG. 1A, the first photomask 10 includes a first circuit portion 31 (FIG. 1) in a region corresponding to the circuit portion formation region 1a (see FIG. 1B) of the wafer 1. The first main pattern 11 corresponding to (b) and (c) is formed with an opening. Here, the first main pattern 11 is a hole-shaped extraction pattern (hole diameter: 0.2 μm), and is formed in large numbers with a minimum pitch of 1 μm in the X direction and a minimum pitch of 0.34 μm in the Y direction.

  On the other hand, the first subpattern 12 corresponding to the first mark 32 (see FIGS. 1B and 1C) is opened in the area corresponding to the unnecessary region 1b (see FIG. 1B) of the wafer 1. Is formed. Here, the first sub-pattern 12 is composed of a group in which a plurality of auxiliary patterns 13 are grouped. Each auxiliary pattern 13 is a hole-shaped punching pattern (hole diameter 0.2 μm) that is the same size as the first main pattern 11, and the group is formed along the four sides of a square parallel to the XY direction. Has been. Further, in one group, the auxiliary patterns 13 are arranged continuously with a pitch of 0.25 μm in the X direction and a pitch of 0.25 μm in the Y direction.

  Here, in particular, the size of each auxiliary pattern 13 is allowed to be 1/2 to 2 times the size of the first main pattern 11, and the coma aberration received by the first main pattern 11 during exposure by photolithography. It is affected by the same coma aberration. The arrangement pitch of the auxiliary patterns 13 in one group is larger than the size of each auxiliary pattern 13 in the arrangement direction and smaller than the arrangement pitch of the first main patterns 11 in the arrangement direction. Permissible.

  When such a first photomask 10 is aligned on the wafer 1 and exposure light is irradiated from above, the light constitutes each first main pattern 11 and each first subpattern 12. It passes through the group of auxiliary patterns 13 and is guided to a resist film (not shown) (thickness of about 0.8 μm) on the interlayer film layer 2 stacked on the wafer 1.

  Here, a KrF excimer laser (wavelength 248 nm) is used as the exposure light, and a lens with NA of 0.64 and σ of 0.6 is applied as the optical system. Further, as the first first photomask 10, a halftone mask having a transmittance of 6% is applied. The same applies to a second photomask 20 described later and its exposure conditions.

  By this exposure, as shown in FIG. 1B, a transfer pattern 51 according to each first main pattern 11 is formed on the resist film. On the other hand, according to the group of auxiliary patterns 13 constituting each first sub-pattern 12, a rectangular transfer pattern 52 is formed in which the group is connected in a lump. This will be described with reference to FIG.

As shown in FIGS. 3A and 3B, the light intensity on the resist film 3 of the light that has passed through the group of auxiliary patterns 13 passes through the first main pattern 11 unless there is coma aberration. As shown by the solid line S ₁₃ of the same level as the light intensity of the light (see the solid line S ₁₁ ). However, in practice, due to the influence of the coma aberration, respectively, shifted as shown by the dotted line T ₁₃ bulging in one direction to the same extent as the light intensity (see dotted line T ₁₁₎ of the light passing through the first main pattern 11. That is, the deviation amount L _T13 shift amount L _T11 and dotted T ₁₃ dotted line T ₁₁ here, it becomes comparable.

As a result, as shown in FIG. 3C, the resist film 3 is exposed to the pattern of the auxiliary pattern 13 by the exposure through the group of the auxiliary patterns 13 and has the same size as the pattern of the dimension L _S11 by the exposure through the first main pattern 11. Where the patterns are to be formed according to the auxiliary patterns 13, adjacent patterns are connected by the shift amount _{LT 13} due to the influence of coma aberration, and the same shift amount _{LT 11} due to exposure through the first main pattern 11. the extent of the punching pattern 72 min larger dimension L ₁₂ of shift amounts L _T13 (transfer pattern 52) is to be formed. Thus, than removed pattern 71 (transfer pattern 51) of the first main pattern 11 dimensions L ₁₁ formed by exposure through a much larger rectangular opening pattern 72 (transfer pattern 52) is formed.

The transfer pattern 51 according to each first main pattern 11 and the transfer pattern 52 according to the group of auxiliary patterns 13 constituting each first sub-pattern 12 are affected by coma aberration received during exposure. Are formed according to the same one, the shift amounts L _T11 and L _T13 due to coma aberration are substantially the same, and the positional relationship with each other relatively matches the design value.

  Subsequently, returning to FIG. 1B, dry etching is performed using the exposed resist film as a mask, whereby the transfer pattern 51 according to each first main pattern 11 is formed on the underlying interlayer film layer 2. A hole-shaped punch pattern 71 (hole diameter 0.8 μm) is formed, and a rectangular punch pattern 72 (width 6 μm) according to the transfer pattern 52 according to each first sub-pattern 12 (group of auxiliary patterns 13) is formed. Degree) is formed.

  Next, a metal film such as W (tungsten) is deposited on the extraction pattern 71 according to each first main pattern 11 and the extraction pattern 72 according to each first sub-pattern 12 (thickness of about 0.3 μm). Then, the metal film is polished using CMP (chemical mechanical polishing) or the like. As a result, the metal film remains only in the extraction pattern 71 according to each first main pattern 11 and the rectangular extraction pattern 72 according to each first sub-pattern 12, as shown in FIG. As described above, each of the first circuit portions 31 and the first marks 32 are formed. However, since each of the first marks 32 is large in a rectangular shape, the central portion is scraped off by the above-described polishing and is in a recessed state.

  Thereafter, a metal wiring film 4 made of Al—Cu or the like is laminated on the entire upper surface of the wafer 1 (thickness: about 0.3 μm). Here, the metal wiring film 4 is laminated on each first mark 32 along the recessed surface.

  Subsequently, as shown in FIG. 2A, the second photomask 20 has a second circuit portion 41 (on the region corresponding to the circuit portion formation region 1a (see FIG. 2B) of the wafer 1. A second main pattern 21 corresponding to FIG. 2B and FIG. Here, the second main pattern 21 is a line-like remaining pattern (width 0.2 μm) along the Y direction, and is many at the same pitch as the first main pattern 11 in the first photomask 10 described above. Is formed.

  On the other hand, the second subpattern 22 corresponding to the second mark 42 (see FIGS. 2B and 2C) remains in the area corresponding to the unnecessary region 1b (see FIG. 2B) of the wafer 1. Is formed. Here, the second sub-pattern 22 is a line-shaped remaining pattern (width 0.2 μm) that is approximately the size of the second main pattern 21, and the first sub-pattern 22 in the first photomask 10 described above. It is formed along the four sides of a square parallel to the XY direction, which is smaller than the entire shape (square) of the sub-pattern 12. The size of each second sub-pattern 22 is allowed to be 1/2 to 2 times the size of the second main pattern 21, and the influence of coma aberration that the second main pattern 21 receives during exposure by photolithography. Is affected by the same coma aberration.

  The positional relationship between the second main pattern 21 for forming the second circuit portion 41 and the second sub pattern 22 for forming the second mark 42 in the second photomask 20 is as follows. In the first photomask 10, the positional relationship between the first main pattern 11 for forming the first circuit portion 31 and the first subpattern 12 for forming the first mark 32, and the design , Are set to match each other.

  When such second photomask 20 is aligned on wafer 1 and exposure light is irradiated from above, the light is blocked by each second main pattern 21 and each second subpattern 22. Then, it passes through the other region and is guided to a resist film (not shown) laminated on the metal wiring film 4 of the wafer 1. As a result of this exposure, as shown in FIG. 2B, a line-shaped transfer pattern 61 according to each second main pattern 21 is left and formed on the resist film, and according to each second subpattern 22. A line-shaped transfer pattern 62 is left and formed. Here, the transfer pattern 61 according to each second main pattern 21 and the transfer pattern 62 according to each second sub pattern 22 have coma aberration received during exposure, as in the case of the blank pattern. Since the influences are formed according to the same ones, the shift amounts due to the coma aberration are almost equal to each other, and the mutual positional relationship relatively matches the design value.

  Subsequently, the resist film is dry-etched, and the remaining transfer pattern 61 according to each second main pattern 21 and the transfer pattern 62 according to each second sub-pattern 22 remain. As shown in FIG. 2C, the second circuit portions 41 and the second marks 42 are formed.

Then, the first mark 32 and the second mark 42 of the wafer 1 are irradiated with measurement light from above, and the reflected light is detected by a measuring machine. Light and dark signal of the detected light, as shown in FIG. 2 (d), of course, that a large peak appears as a point P _42, rapidly at P ₄₂ darker second mark 42 is present, the first a large peak appears as rapidly even P _32, P ₃₂ point mark 32 is present dark. This is because the metal wiring film 4 laminated on the first mark 32 is recessed along the recess of the first mark 32, and light is diffusely reflected here.

  Accordingly, each of the first mark 32 and the second mark 42 is used so that the positional accuracy of the first circuit unit 31 and the second circuit unit 41 can be verified with high accuracy, that is, as a positional accuracy verification mark. It is formed so as to function sufficiently, and its position can be measured (detected) sufficiently for the verification. Therefore, verification of the positional accuracy of the first circuit unit 31 and the second circuit unit 41 can be performed with high accuracy and reliability.

  Further, the first mark 32 is formed so as to be used as a reference for high-precision alignment of the second photomask 20, that is, sufficiently functioning as an alignment mark, and the position thereof is sufficiently set. Can be measured (detected). Therefore, the alignment of the second photomask 20 with respect to the wafer 1 can be performed with high accuracy and reliability. Of course, there is no problem even if the light used for the measurement in alignment is low energy light.

  Next, a second embodiment of the present invention will be described with reference to FIG. 4A and 4B are views for explaining a method for forming a position accuracy verification mark and an alignment mark according to the second embodiment, wherein FIG. 4A is a plan view of the first photomask, and FIG. The top view of the wafer after photo-etching by the 1st photomask of this, (c) is AA sectional drawing of (b). In addition, in the figure, the same code | symbol is attached | subjected to the part which performs the same function with the same name as FIGS. 1-3, and the overlapping description is abbreviate | omitted. The same applies to a third embodiment to be described later.

  The feature of the second embodiment is that the first sub-pattern 12 formed on the first photomask 10 in the first embodiment is modified. That is, in this embodiment, as shown in FIG. 4A, the auxiliary patterns 13 constituting each first sub pattern 12 are arranged in a zigzag manner in the width direction in a group. The arrangement pitch is the same as in the first embodiment.

  Even in this case, as in the first embodiment, as shown in FIGS. 4B and 4C, the exposure is performed according to the group of auxiliary patterns 13 constituting each first sub-pattern 12 by exposure. A rectangular transfer pattern 52 in which a group is connected in a lump is formed. Therefore, the same effect as the first embodiment can be obtained.

  Next, a third embodiment of the present invention will be described with reference to FIG. 5A and 5B are diagrams for explaining a method for forming a position accuracy verification mark and an alignment mark according to the third embodiment, wherein FIG. 5A is a plan view of the first photomask, and FIG. The top view of the wafer after photo-etching by the 1st photomask of this, (c) is AA sectional drawing of (b).

  A feature of the third embodiment is that the first main pattern 11 and the first sub pattern 12 formed on the first photomask 10 in the first embodiment are modified. That is, in the present embodiment, as shown in FIG. 5A, the first main pattern 11 is a line-shaped blank pattern (width 0.2 μm), and is formed in large numbers with a minimum pitch of 1 μm in the X direction. .

  Further, the auxiliary pattern 13 constituting each first sub-pattern 12 is a line-shaped punching pattern (width 0.2 μm) which is approximately the same as the size of the first main pattern 11, and the group thereof is in the XY direction. Are formed along the four sides of a square parallel to each other. Further, in one group, the auxiliary patterns 13 are arranged in a row at a pitch of 0.25 μm. Particularly, the arrangement pitch of the auxiliary patterns 13 in one group is larger than the size (width) of each auxiliary pattern 13 in the arrangement direction, and the arrangement pitch of the first main patterns 11 in the arrangement direction. Is allowed in a smaller range.

  Even in this case, as in the first embodiment, as shown in FIGS. 5B and 5C, the transfer patterns 51 according to the first main patterns 11 are formed by exposure, respectively, According to the group of auxiliary patterns 13 constituting each of the first sub-patterns 12, rectangular transfer patterns 52 are formed in which the group is connected in a lump. Therefore, the same effect as the first embodiment can be obtained.

  In addition, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the spirit of the present invention. For example, a phase shift mask, an attenuated phase shift mask, or the like may be applied as the first photomask 10 and the first photomask 20.

  In addition, the shape, size, arrangement pitch, and the like of the first main pattern 11 formed on the first photomask 10 and the auxiliary pattern 13 constituting the first subpattern 12 are appropriately determined in accordance with the design specifications of the semiconductor device. It can be changed. Similarly, the shape, size, arrangement pitch, and the like of the second main pattern 21 and the second subpattern 22 formed on the second photomask 20 can be appropriately changed in accordance with the design specifications of the semiconductor device. . Further, the second main pattern 21 and the second sub pattern 22 formed on the second photomask 20 may be blank patterns.

  Further, the exposure light may be in another wavelength range such as an ArF excimer laser, and the lens as an optical system is not limited.

  The present invention is useful for a photolithography process in manufacturing a semiconductor device using a wafer as a base material.

It is a figure explaining the formation method of the mark for position accuracy verification which is 1st Embodiment of this invention, and the mark for alignment. It is a figure following FIG. 1 explaining the formation method of the position accuracy verification mark and the alignment mark according to the first embodiment. It is a figure explaining the principle of the cancellation method of this invention with respect to the influence of a coma aberration. It is a figure explaining the formation method of the mark for position accuracy verification which is 2nd Embodiment of this invention, and the mark for alignment. It is a figure explaining the formation method of the position accuracy verification mark which is 3rd Embodiment of this invention, and the mark for alignment. It is a figure explaining the basic principle of the positional accuracy verification method of circuit parts, and the alignment method of a photomask. It is a figure explaining the influence of a coma aberration. It is a figure explaining the conventional elimination method with respect to the influence of a coma aberration. It is a figure explaining the problem which arises by the conventional solution method with respect to the influence of a coma aberration. It is a figure following FIG. 9 explaining the problem which arises by the conventional solution method with respect to the influence of a coma aberration.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Wafer 2 Interlayer film layer 3 Resist film 4 Metal wiring film 10 1st photomask 11 1st main pattern 12 1st subpattern 13 Auxiliary pattern 20 2nd photomask 21 2nd main pattern 22 2nd Sub-pattern 31 First circuit portion 32 First mark 41 Second circuit portion 42 Second mark 51 Transfer pattern 52 Transfer pattern 61 Transfer pattern 62 Transfer pattern 71 Removal pattern 72 Removal pattern

Claims (8)

A first layer in which a large number of first circuit portions are formed through photolithography using a first photomask, a light-shielding film layer, and a plurality of second circuit portions are formed through photolithography using a second photomask. Each of the first circuit units formed in the first layer and the second circuit units formed in the second layer are arranged in order. A method for forming a position accuracy verification mark for verifying the position accuracy of
For the first photomask,
A first main pattern corresponding to each first circuit portion;
A first pattern comprising a plurality of auxiliary patterns arranged at least in the width direction, each having a size that is affected by the same aberration as that of each first main pattern during exposure by photolithography. 1 sub-pattern is formed,
The arrangement pitch of the auxiliary pattern is larger than the size of each auxiliary pattern in the arrangement direction and smaller than the arrangement pitch of the first main pattern in the arrangement direction,
For the second photomask,
A second main pattern corresponding to each second circuit portion;
A second subpattern having a size that is affected by the same aberration as that of each of the second main patterns during exposure by photolithography is formed,
A first circuit portion according to the first main pattern is formed on the first layer through photolithography using a first photomask, and the first position accuracy is verified according to the first sub pattern. Forming a mark;
Forming a light shielding film layer and a second layer in order on the first layer on which the first circuit portion and the first position accuracy verification mark are formed;
A second circuit portion according to the second main pattern is formed on the second layer formed on the light-shielding film layer through photolithography using a second photomask, and the second subpattern is formed on the second subpattern. Forming a second position accuracy verification mark according to the method, and a method for forming the position accuracy verification mark. The size of each auxiliary pattern constituting the first sub-pattern formed on the first photomask is 1/2 to 2 times the size of the first main pattern formed on the first photomask;
The size of the second sub pattern formed on the second photomask is 1/2 to 2 times the size of the second main pattern formed on the second photomask. 2. A method for forming a position accuracy verification mark according to 1. The first circuit portion formed in the first layer is formed in a hole-shaped punch pattern,
3. The position accuracy according to claim 1, wherein each of the auxiliary patterns constituting the first main pattern and the first sub-pattern formed on the first photomask is a hole-shaped blank pattern. A method for forming a verification mark. The first circuit portion formed in the first layer is formed in a line-shaped punch pattern,
The position accuracy according to claim 1 or 2, wherein each auxiliary pattern constituting the first main pattern and the first sub pattern formed on the first photomask is a line-shaped blank pattern. A method for forming a verification mark. A first layer in which a large number of first circuit portions are formed through photolithography using a first photomask, a light-shielding film layer, and a plurality of second circuit portions are formed through photolithography using a second photomask. A method of forming an alignment mark for aligning the second photomask with respect to the second layer in a semiconductor wafer in which the second layer is sequentially stacked,
For the first photomask,
A first main pattern corresponding to each first circuit portion;
A first pattern comprising a plurality of auxiliary patterns arranged at least in the width direction, each having a size that is affected by the same aberration as that of each first main pattern during exposure by photolithography. 1 sub-pattern is formed,
The arrangement pitch of the auxiliary pattern is larger than the size of each auxiliary pattern in the arrangement direction and smaller than the arrangement pitch of the first main pattern in the arrangement direction,
Forming a first circuit portion in accordance with the first main pattern and forming an alignment mark in accordance with the first sub-pattern on the first layer through photolithography using a first photomask; When,
Forming a light shielding film layer and a second layer on the first layer on which the first circuit portion and the alignment mark are formed, in order.   The size of each auxiliary pattern constituting the first sub-pattern formed on the first photomask is 1/2 to 2 times the size of the first main pattern formed on the first photomask. The method for forming an alignment mark according to claim 5. The first circuit portion formed in the first layer is formed in a hole-shaped punch pattern,
The alignment pattern according to claim 5 or 6, wherein each of the auxiliary patterns constituting the first main pattern and the first sub pattern formed on the first photomask is a hole-shaped extraction pattern. Mark formation method. The first circuit portion formed in the first layer is formed in a line-shaped punch pattern,
The alignment pattern according to claim 5 or 6, wherein each auxiliary pattern constituting the first main pattern and the first sub-pattern formed on the first photomask is a line-shaped blank pattern. Mark formation method.

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