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JP2007019271A - Wiring board and manufacturing method thereof - Google Patents

Wiring board and manufacturing method thereof Download PDF

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Publication number
JP2007019271A
JP2007019271A JP2005199175A JP2005199175A JP2007019271A JP 2007019271 A JP2007019271 A JP 2007019271A JP 2005199175 A JP2005199175 A JP 2005199175A JP 2005199175 A JP2005199175 A JP 2005199175A JP 2007019271 A JP2007019271 A JP 2007019271A
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wiring
conductor
protruding electrode
group
interval
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Japanese (ja)
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Sukenori Makari
祐紀 真狩
Nozomi Shimoishizaka
望 下石坂
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Abstract

【課題】複数の導体配線の配線間隔が互いに異なる複数の配線群を形成している状態において、導体配線上に形成された突起電極の高さの不揃いが軽減された配線基板を提供する。
【解決手段】絶縁性基材1と、絶縁性基材上に整列して設けられた複数本の導体配線2a、2bと、各導体配線にめっきにより形成された突起電極3a、3cを備え、突起電極は、導体配線の長手方向を横切って導体配線の両側の絶縁基材上の領域に亘り形成され、突起電極の導体配線の幅方向の断面形状は、中央部が両側よりも高い。複数の導体配線は、突起電極が形成された先端部を含む領域における導体配線の配線間隔が互いに異なる複数の配線群A、Bを形成し、突起電極が形成された先端部における導体配線の配線幅は、配線間隔の広狭に対応して設定され、配線間隔の広い方の配線群Aにおける配線幅Waは、配線間隔の狭い方の配線群Bにおける配線幅Wbよりも細い。
【選択図】図1
Provided is a wiring board in which unevenness in height of protruding electrodes formed on a conductor wiring is reduced in a state where a plurality of wiring groups in which the wiring intervals of the plurality of conductor wirings are different from each other are formed.
An insulating base material, a plurality of conductor wirings 2a and 2b provided in alignment on the insulating base material, and protruding electrodes 3a and 3c formed by plating on the respective conductor wirings are provided. The protruding electrode is formed across a region on the insulating base on both sides of the conductor wiring across the longitudinal direction of the conductor wiring, and the cross-sectional shape in the width direction of the conductor wiring of the protruding electrode is higher in the center than on both sides. The plurality of conductor wirings form a plurality of wiring groups A and B in which the wiring intervals of the conductor wiring are different from each other in the region including the tip portion where the protruding electrode is formed, and the wiring of the conductor wiring at the tip portion where the protruding electrode is formed The width is set corresponding to the width of the wiring interval, and the wiring width Wa in the wiring group A having the larger wiring interval is narrower than the wiring width Wb in the wiring group B having the smaller wiring interval.
[Selection] Figure 1

Description

本発明は、例えばテープキャリア基板のような、柔軟な絶縁性の基材上に導体配線を設け、その導体配線上に接続用の突起電極を形成した構成を有する配線基板、およびその製造方法に関する。   The present invention relates to a wiring board having a configuration in which a conductor wiring is provided on a flexible insulating base material, such as a tape carrier board, and a protruding electrode for connection is formed on the conductor wiring, and a manufacturing method thereof. .

テープキャリア基板を使用したパッケージモジュールの一種として、COF(Chip On Film)が知られている。COFは、テープキャリア基板上に半導体素子を搭載し、樹脂で封止することにより搭載部を保護した構造を有する。COFに用いられるテープキャリア基板は、絶縁性のフィルム基材と、その面上に形成された多数本の導体配線から構成される。フィルム基材としては一般的にポリイミドが、導体配線としては銅が使用される。必要に応じて導体配線上には、金属めっき被膜および絶縁樹脂であるソルダーレジストの層が形成される。テープキャリア基板上の導体配線と半導体素子の電極パッドは、突起電極を介して接続される。特許文献1には、この突起電極をあらかじめ導体配線上に形成したテープキャリア基板が開示されている。   COF (Chip On Film) is known as a type of package module using a tape carrier substrate. The COF has a structure in which a semiconductor element is mounted on a tape carrier substrate and the mounting portion is protected by sealing with a resin. A tape carrier substrate used for COF is composed of an insulating film base material and a large number of conductor wirings formed on the surface thereof. Generally, polyimide is used as the film substrate, and copper is used as the conductor wiring. If necessary, a metal plating film and a solder resist layer which is an insulating resin are formed on the conductor wiring. The conductor wiring on the tape carrier substrate and the electrode pad of the semiconductor element are connected via the protruding electrode. Patent Document 1 discloses a tape carrier substrate in which this protruding electrode is previously formed on a conductor wiring.

特許文献1に記載されたテープキャリア基板の構造について、図5を参照して説明する。図5(a)は、テープキャリア基板の一部を示す斜視図である。フィルム基材1の上に、複数本の導体配線2が整列して設けられ、各導体配線2上に突起電極3a、3bが形成されている。突起電極3a、3bの平面形状は、導体配線2を横切って導体配線2の両側の領域に亘っている。図5(b)は、図5(a)における突起電極3a、3bの位置において、導体配線2を横切る方向における断面図である。導体配線2の幅方向における突起電極3a、3bの断面形状は、導体配線2の上面および両側面に接合され、中央部が両側よりも高くなった中高形状である。また突起電極3a、3bは、導体配線2の両側部でフィルム基材1の面に接するように形成されている。   The structure of the tape carrier substrate described in Patent Document 1 will be described with reference to FIG. FIG. 5A is a perspective view showing a part of the tape carrier substrate. A plurality of conductor wirings 2 are arranged on the film substrate 1, and protruding electrodes 3 a and 3 b are formed on each conductor wiring 2. The planar shape of the protruding electrodes 3 a and 3 b extends across the conductor wiring 2 and the regions on both sides of the conductor wiring 2. FIG. 5B is a cross-sectional view in the direction crossing the conductor wiring 2 at the positions of the protruding electrodes 3a and 3b in FIG. The cross-sectional shape of the protruding electrodes 3a and 3b in the width direction of the conductor wiring 2 is a medium-high shape that is joined to the upper surface and both side surfaces of the conductor wiring 2 and whose central portion is higher than both sides. Further, the protruding electrodes 3 a and 3 b are formed so as to be in contact with the surface of the film base 1 at both sides of the conductor wiring 2.

突起電極3a、3bを上述のような形状とすることにより、突起電極3a、3bは、実用的に十分な強さで導体配線2上に保持される。すなわち、突起電極3a、3bは、導体配線2の上面だけではなく両側面にも接合されているので、横方向に加わる力に対して十分な安定性が得られる。   By forming the protruding electrodes 3a and 3b as described above, the protruding electrodes 3a and 3b are held on the conductor wiring 2 with a practically sufficient strength. That is, since the protruding electrodes 3a and 3b are bonded not only to the upper surface of the conductor wiring 2, but also to both side surfaces, sufficient stability can be obtained against the force applied in the lateral direction.

また、突起電極3a、3bの上面が平坦ではなく中高であることにより、半導体素子の電極パッドとの接続に好適である。すなわち、突起電極3a、3bと電極パッドとの位置合わせにずれがあっても、上面が平坦である場合と比べて、突起電極3a、3bは隣接する不適当な電極パッドと接続され難い。また、電極パッドとの接続に際して、電極パッドの表面に形成された酸化膜を、突起電極3a、3bの凸状の上面により容易に破砕することができ、酸化されていない内部と良好な電気的接続が得られる。   Further, since the upper surfaces of the protruding electrodes 3a and 3b are not flat but medium and high, it is suitable for connection to the electrode pad of the semiconductor element. That is, even if there is a misalignment between the protruding electrodes 3a and 3b and the electrode pads, the protruding electrodes 3a and 3b are less likely to be connected to the adjacent inappropriate electrode pads as compared with the case where the upper surface is flat. Further, when connecting to the electrode pad, the oxide film formed on the surface of the electrode pad can be easily crushed by the convex upper surfaces of the protruding electrodes 3a and 3b, and the interior not oxidized and good electrical property can be obtained. A connection is obtained.

次に、図6を参照して、特許文献1に記載された、上記構成のテープキャリア基板の製造方法について説明する。図6(a1)〜(f1)は、テープキャリア基板における突起電極を形成する製造工程を示し、半導体素子搭載部の平面図である。図6(a2)〜(f2)は各々、図6(a1)〜(f1)の拡大断面図である。各断面図は、図6(a1)におけるX−Xに相当する位置での断面を示す。   Next, with reference to FIG. 6, the manufacturing method of the tape carrier board of the said structure described in patent document 1 is demonstrated. 6 (a1) to 6 (f1) show manufacturing steps for forming protruding electrodes on the tape carrier substrate, and are plan views of the semiconductor element mounting portion. 6 (a2) to (f2) are enlarged sectional views of FIGS. 6 (a1) to (f1), respectively. Each cross-sectional view shows a cross section at a position corresponding to XX in FIG.

まず、図6(a1)に示すように、複数の導体配線2が表面に整列して形成されたフィルム基材1を用意する。このフィルム基材1の全面に、図6(b1)に示すように、フォトレジスト4を形成する。次に図3(c1)に示すように、フィルム基材1に形成されたフォトレジスト4の上部に、突起電極形成用の露光マスク5を対向させる。露光マスク5の光透過領域5aは、複数の導体配線2の整列方向に、複数の導体配線2を横切るように連続した長孔形状を有する。   First, as shown in FIG. 6 (a1), a film substrate 1 on which a plurality of conductor wirings 2 are formed on the surface is prepared. A photoresist 4 is formed on the entire surface of the film substrate 1 as shown in FIG. Next, as shown in FIG. 3 (c1), an exposure mask 5 for forming protruding electrodes is opposed to the upper portion of the photoresist 4 formed on the film substrate 1. The light transmission region 5 a of the exposure mask 5 has a long hole shape that is continuous across the plurality of conductor wirings 2 in the alignment direction of the plurality of conductor wirings 2.

露光マスク5の光透過領域5aを通して露光し、現像することにより、図6(d1)に示すように、フォトレジスト4に、導体配線2を横切る長孔状パターン4aが開口される。それにより長孔状パターン4a中に、導体配線2の一部が露出する。次に、フォトレジスト4の長孔状パターン4aを通して、導体配線2の露出した部分に金属めっきを施して、図6(e1)に示すように突起電極3を形成する。次に、フォトレジスト4を除去すれば、図6(f1)に示すように、導体配線2に突起電極3が形成されたテープキャリア基板6が得られる。   By exposing and developing through the light transmission region 5a of the exposure mask 5, a long hole pattern 4a across the conductor wiring 2 is opened in the photoresist 4 as shown in FIG. 6 (d1). Thereby, a part of the conductor wiring 2 is exposed in the long hole pattern 4a. Next, the exposed portion of the conductor wiring 2 is subjected to metal plating through the long hole pattern 4a of the photoresist 4 to form the protruding electrode 3 as shown in FIG. 6 (e1). Next, if the photoresist 4 is removed, as shown in FIG. 6 (f1), the tape carrier substrate 6 in which the protruding electrodes 3 are formed on the conductor wiring 2 is obtained.

このように、フォトレジスト4に形成された長孔状パターン4aを通して導体配線2の露出した部分に金属めっきを施すことにより、図5(a)に示したような形状の突起電極3を、容易に形成することができる。これは、図6(e1)の工程で、導体配線2の上面のみでなく側面も露出しており、導体配線2の露出面全体に亘ってめっきが形成されるからである。   In this manner, by exposing the exposed portion of the conductor wiring 2 through the long hole pattern 4a formed in the photoresist 4, the protruding electrode 3 having the shape as shown in FIG. Can be formed. This is because not only the upper surface of the conductor wiring 2 but also the side surfaces are exposed in the step of FIG. 6E1, and plating is formed over the entire exposed surface of the conductor wiring 2.

ところで、テープキャリア基板は、例えば、液晶パネル等の表示パネル駆動用半導体素子の実装に用いられる。半導体素子上の電極パッドは、突起電極を介してテープキャリア基板上の各導体配線と接続される。半導体素子内での配線密度は、入力側と出力側で大きく相違すること等に起因して、半導体素子上の電極パッドの間隔は必ずしも一様ではない。従って、テープキャリア基板上の各導体配線の間隔も、広狭を有する配置にせざるを得ない。また、各導体配線の半導体素子が実装される側の反対側端部においても、接続先の状況に応じて導体配線の間隔に広狭を持たせる必要がある場合がある。   Incidentally, the tape carrier substrate is used for mounting a display panel driving semiconductor element such as a liquid crystal panel, for example. The electrode pad on the semiconductor element is connected to each conductor wiring on the tape carrier substrate through the protruding electrode. The wiring density in the semiconductor element is largely different between the input side and the output side, and therefore the interval between the electrode pads on the semiconductor element is not necessarily uniform. Accordingly, the intervals between the conductor wirings on the tape carrier substrate must be arranged in a wide range. In addition, there may be a case where the distance between the conductor wirings needs to be wide depending on the situation of the connection destination even at the opposite end of each conductor wiring on the side where the semiconductor element is mounted.

このように、テープキャリア基板上の導体配線を、少なくとも突起電極が形成された先端部を含む領域における配線間隔が互いに異なる複数の配線群を形成する場合、図5(a)、(b)に示すような問題を生じることが判った。図5(a)、(b)に示す配線群Bは、配線群Aよりも配線間隔が広く配置されている。この場合、図5(b)に示すように、配線群Bの導体配線2上の突起電極3bは、配線群Aの導体配線2の突起電極3aよりも高く形成される。このように突起電極3a、3bの高さに不揃いがあると、半導体素子の実装に際して、電極パッドと突起電極間の接続に不良が発生するおそれがある。   In this way, when forming a plurality of wiring groups having different wiring intervals in the region including at least the tip portion where the protruding electrode is formed, the conductor wiring on the tape carrier substrate is shown in FIGS. 5 (a) and 5 (b). It turns out that the problem shown is caused. In the wiring group B shown in FIGS. 5A and 5B, the wiring interval is wider than that of the wiring group A. In this case, as shown in FIG. 5B, the protruding electrode 3 b on the conductor wiring 2 of the wiring group B is formed higher than the protruding electrode 3 a of the conductor wiring 2 of the wiring group A. Thus, if the heights of the protruding electrodes 3a and 3b are not uniform, there is a possibility that a defect occurs in the connection between the electrode pad and the protruding electrode when the semiconductor element is mounted.

これに対して特許文献2には、多層配線基板の各層を接続するための、絶縁基板に設けた多数のブラインドビア中に形成されるめっきバンプの高さの不揃いを解消する方法が記載されている。めっきバンプは、絶縁基板の一方の面に形成された導電薄膜上にブラインドビアを通して形成されるが、多数のブラインドビアの配置に粗密がある場合に、めっきバンプの高さの不揃いが発生する。そのため、ブラインドビアの配置場所によってビア径を異ならせることにより、めっきバンプの高さの不揃いを軽減する。
特開2004−327936号公報 特開2001−237511号公報
On the other hand, Patent Document 2 describes a method for eliminating unevenness of the heights of plating bumps formed in a large number of blind vias provided on an insulating substrate for connecting each layer of a multilayer wiring board. Yes. Plating bumps are formed through blind vias on a conductive thin film formed on one surface of an insulating substrate. However, when the arrangement of a large number of blind vias is dense, uneven plating bumps occur. Therefore, the unevenness of the height of the plating bump is reduced by making the via diameter different depending on the arrangement position of the blind via.
JP 2004-327936 A JP 2001-237511 A

しかしながら、従来、導体配線上に突起電極を形成したタイプの配線基板の構造については、先行例が少なく、複数の導体配線上に設ける突起電極について、上述のような高さのばらつきを解消することについては、配慮されていなかった。特許文献2に記載の方法は、突起電極を形成する対象の構造が全く相違するため、上述のような配線基板に適用できる技術とは言えなかった。   However, conventionally, there are few prior examples of the structure of a wiring board of a type in which protruding electrodes are formed on conductor wiring, and the above-described variation in height is eliminated for protruding electrodes provided on a plurality of conductor wirings. Was not considered. The method described in Patent Document 2 cannot be said to be a technique that can be applied to the wiring board as described above because the structure of the object on which the protruding electrode is formed is completely different.

本発明は、複数の導体配線の配線間隔が互いに異なる複数の配線群を形成している状態において、導体配線上に形成された突起電極の高さの不揃いが軽減された配線基板を提供することを目的とする。   The present invention provides a wiring board in which unevenness of heights of protruding electrodes formed on a conductor wiring is reduced in a state where a plurality of wiring groups in which wiring intervals of the plurality of conductor wirings are different from each other are formed. With the goal.

本発明の配線基板に共通する基本構成は、絶縁性基材と、前記絶縁性基材上に整列して設けられた複数本の導体配線と、前記各導体配線にめっきにより形成された突起電極を備え、前記突起電極は、前記導体配線の長手方向を横切って前記導体配線の両側の前記絶縁基材上の領域に亘り形成され、前記突起電極の前記導体配線の幅方向の断面形状は、中央部が両側よりも高くなっている。   The basic configuration common to the wiring board of the present invention is an insulating base material, a plurality of conductor wirings arranged in alignment on the insulating base material, and protruding electrodes formed by plating on the respective conductor wirings The protruding electrode is formed across a region on the insulating substrate on both sides of the conductor wiring across the longitudinal direction of the conductor wiring, and the sectional shape of the protruding electrode in the width direction of the conductor wiring is The center is higher than both sides.

本発明の第1の構成の配線基板は、前記複数の導体配線は、前記突起電極が形成された先端部を含む領域における前記導体配線の配線間隔が互いに異なる複数の配線群を形成し、前記突起電極が形成された先端部における前記導体配線の配線幅は、前記配線間隔の広狭に対応して設定され、前記配線間隔の広い方の配線群における前記配線幅は、前記配線間隔の狭い方の配線群における前記配線幅よりも細いことを特徴とする。   In the wiring board of the first configuration of the present invention, the plurality of conductor wirings form a plurality of wiring groups in which wiring intervals of the conductor wirings are different from each other in a region including a tip portion where the protruding electrodes are formed, The wiring width of the conductor wiring at the tip portion where the protruding electrode is formed is set corresponding to the width of the wiring interval, and the wiring width in the wiring group with the wider wiring interval is the one with the narrower wiring interval. The wiring group is narrower than the wiring width.

本発明の第2の構成の配線基板は、前記複数の導体配線は、前記突起電極が形成された先端部を含む領域における前記導体配線の配線間隔が互いに異なる複数の配線群を形成し、前記突起電極が前記導体配線の上面に接する面積が、前記配線間隔の広い方の配線群では前記配線間隔の狭い方の配線群と比べて大きいことを特徴とする。   In the wiring board of the second configuration of the present invention, the plurality of conductor wirings form a plurality of wiring groups in which wiring intervals of the conductor wirings are different from each other in a region including a tip portion where the protruding electrodes are formed, The area where the protruding electrode is in contact with the upper surface of the conductor wiring is characterized in that the wiring group with the larger wiring interval is larger than the wiring group with the smaller wiring interval.

本発明の第3の構成の配線基板は、前記複数の導体配線は、前記突起電極が形成された先端部を含む領域における前記導体配線の配線間隔が互いに異なる複数の配線群を形成し、前記配線間隔の広い方の配線群を、各々複数本の前記導体配線を含む複数の副配線群により形成し、同一の前記副配線群に属する各導体配線の相互間の間隔は、隣接する他の前記副配線群との間に設けられた間隔よりも狭いことを特徴とする。   In the wiring board of the third configuration of the present invention, the plurality of conductor wirings form a plurality of wiring groups in which wiring intervals of the conductor wirings are different from each other in a region including a tip portion where the protruding electrodes are formed, A wiring group with a wider wiring interval is formed by a plurality of sub-wiring groups each including a plurality of the conductor wirings, and the intervals between the conductor wirings belonging to the same sub-wiring group are different from each other. It is characterized by being narrower than the interval provided between the sub-wiring groups.

本発明の配線基板の製造方法に共通する基本構成は、複数本の導体配線を絶縁性基材上に整列して設ける工程と、前記絶縁性基材の前記導体配線が設けられた面にフォトレジストを形成する工程と、前記フォトレジストに、前記導体配線を横切って前記導体配線の両側の領域に広がる開口部を形成して、前記開口部中に前記導体配線の一部を露出させる工程と、前記露出した前記導体配線の一部に電解めっきにより金属めっきを施して突起電極を形成する工程とを備える。   The basic configuration common to the method for manufacturing a wiring board of the present invention includes a step of arranging a plurality of conductor wirings on an insulating base material, and a photo on the surface of the insulating base material on which the conductor wiring is provided. Forming a resist; forming an opening in the photoresist that extends across the conductor wiring to a region on both sides of the conductor wiring; and exposing a part of the conductor wiring in the opening; And a step of performing metal plating on the exposed part of the conductor wiring by electrolytic plating to form a protruding electrode.

本発明の第1の構成の配線基板の製造方法は、前記導体配線を、前記突起電極を形成すべき先端部を含む領域における配線間隔が互いに異なる複数の配線群に分けた配置により形成し、前記突起電極を形成すべき領域の前記導体配線の配線幅を、前記配線間隔の広狭に対応させて、前記配線間隔の広い方の配線群における前記配線幅を、前記配線間隔の狭い方の配線群における前記配線幅よりも細くすることを特徴とする。   The wiring board manufacturing method of the first configuration of the present invention is formed by arranging the conductor wiring divided into a plurality of wiring groups having different wiring intervals in a region including a tip portion where the protruding electrode is to be formed, The wiring width of the conductor wiring in the region where the protruding electrode is to be formed corresponds to the width of the wiring space, and the wiring width in the wiring group with the larger wiring space is set to the wiring with the narrower wiring space. It is characterized by being narrower than the wiring width in the group.

本発明の第2の構成の配線基板の製造方法は、前記導体配線を、前記突起電極を形成すべき先端部を含む領域における配線間隔が互いに異なる複数の配線群に分けた配置により形成し、前記フォトレジストに前記開口部を形成して前記導体配線の一部を露出させる工程において、前記開口部中に露出する各前記導体配線の上面面積を、前記配線間隔の広い方の配線群では前記配線間隔の狭い方の配線群と比べて大きくすることを特徴とする。   In the method for manufacturing a wiring board according to the second configuration of the present invention, the conductor wiring is formed in an arrangement divided into a plurality of wiring groups having different wiring intervals in a region including a tip portion where the protruding electrode is to be formed, In the step of forming the opening in the photoresist and exposing a part of the conductor wiring, the upper surface area of each conductor wiring exposed in the opening is set as the wiring group with a larger wiring interval. It is characterized in that it is larger than the wiring group with a narrower wiring interval.

本発明の第3の構成の配線基板の製造方法は、前記導体配線を、前記突起電極を形成すべき先端部を含む領域における配線間隔が互いに異なる複数の配線群に分けた配置により形成し、前記配線間隔の広い方の配線群を、各々複数本の前記導体配線を含む複数の副配線群により形成し、同一の前記副配線群に属する各導体配線の相互間の間隔を、隣接する他の前記副配線群との間に設けられた間隔よりも狭くすることを特徴とする。   In the wiring board manufacturing method of the third configuration of the present invention, the conductor wiring is formed by an arrangement in which wiring intervals in a region including a tip portion where the protruding electrode is to be formed are divided into a plurality of wiring groups different from each other. The wiring group having the wider wiring interval is formed by a plurality of sub wiring groups each including a plurality of the conductor wirings, and the interval between the conductor wirings belonging to the same sub wiring group is set to be adjacent to each other. It is characterized in that it is narrower than the distance provided between the sub-wiring group.

上記構成によれば、突起電極を形成する電解めっきを施すために導体配線に流す電流について、配線間隔の広狭に起因する電流密度の差異が相殺される。その結果、形成された突起電極の高さの不揃いが軽減される。   According to the said structure, the difference in the current density resulting from the width of wiring spacing is canceled out with respect to the current flowing through the conductor wiring in order to perform the electrolytic plating for forming the protruding electrode. As a result, unevenness in the height of the formed protruding electrodes is reduced.

本発明の第1の構成の配線基板において、前記配線間隔の広い方の配線群に属する前記導体配線は、前記突起電極が形成された先端部の配線幅が他の領域の配線幅より細い構成とすることができる。   In the wiring board according to the first configuration of the present invention, the conductor wiring belonging to the wiring group having the wider wiring interval is configured such that the wiring width at the tip portion where the protruding electrode is formed is narrower than the wiring width in other regions. It can be.

本発明の第2の構成の配線基板において、前記導体配線は、配線方向における前記突起電極の長さが、前記配線間隔の広い方の配線群では前記配線間隔の狭い方の配線群と比べて長く形成されている構成とすることができる。   In the wiring board of the second configuration of the present invention, the conductor wiring has a length of the protruding electrode in the wiring direction in which the wiring group with the larger wiring interval is compared with the wiring group with the smaller wiring interval. It can be set as the structure currently formed long.

本発明の第1の構成の配線基板の製造方法において、前記配線間隔の広い方の配線群における前記導体配線を、前記突起電極が形成された領域の配線幅が他の領域の配線幅より細くなるように形成することができる。   In the method for manufacturing a wiring board according to the first configuration of the present invention, the conductor wiring in the wiring group having the larger wiring interval is narrower than the wiring width in the other area. Can be formed.

本発明の第2の構成の配線基板の製造方法において、前記導体配線の配線方向における前記フォトレジストの開口部の長さを、前記配線間隔の広い方の配線群では前記配線間隔の狭い方の配線群と比べて長くすることができる。   In the method for manufacturing a wiring board according to the second configuration of the present invention, the length of the opening of the photoresist in the wiring direction of the conductor wiring is set to be smaller in the wiring group having the larger wiring interval. It can be made longer than the wiring group.

以下に、本発明の実施の形態における配線基板であるテープキャリア基板について、図面を参照して説明する。各実施の形態におけるテープキャリア基板の基本的な構造は、上述の従来例と同様であり、同様の要素については同一の参照符号を付して説明を簡略化する。   Hereinafter, a tape carrier substrate which is a wiring substrate in an embodiment of the present invention will be described with reference to the drawings. The basic structure of the tape carrier substrate in each embodiment is the same as that of the above-described conventional example, and the same elements are denoted by the same reference numerals to simplify the description.

(実施の形態1)
図1を参照して、実施の形態1におけるテープキャリア基板の構造について説明する。図1(a)は、テープキャリア基板の一部を示す斜視図、図1(b)は断面図である。
(Embodiment 1)
With reference to FIG. 1, the structure of the tape carrier substrate in the first exemplary embodiment will be described. FIG. 1A is a perspective view showing a part of a tape carrier substrate, and FIG. 1B is a cross-sectional view.

図1に示すように、絶縁性のフィルム基材1の上には、複数本の導体配線2a、2bが整列して設けられ、各導体配線2a、2bの先端部に各々、突起電極3a、3cが電解めっきにより形成されている。従来例と同様に、突起電極3a、3cは、導体配線2a、2bの長手方向を横切って導体配線2a、2bの両側のフィルム基材1上の領域に亘り形成されている。突起電極3a、3cの導体配線2a、2bの幅方向における断面形状は、中央部が両側よりも高くなっている。   As shown in FIG. 1, a plurality of conductor wirings 2a and 2b are arranged on the insulating film substrate 1, and the protruding electrodes 3a and 2b are respectively provided at the ends of the conductor wirings 2a and 2b. 3c is formed by electrolytic plating. Similar to the conventional example, the protruding electrodes 3a and 3c are formed across regions on the film substrate 1 on both sides of the conductor wirings 2a and 2b across the longitudinal direction of the conductor wirings 2a and 2b. The cross-sectional shape in the width direction of the conductor wirings 2a and 2b of the protruding electrodes 3a and 3c is higher in the center than on both sides.

導体配線2aは、配線間隔が狭い配線群Aを形成し、導体配線2bは、導体配線2aよりも配線間隔が広い配線群Bを形成している。配線間隔の広い方の配線群Bにおける導体配線2bの配線幅Wbは、配線間隔の狭い方の配線群Aにおける導体配線2aの配線幅Waよりも細い。すなわち、突起電極3a、3cが形成された先端部における導体配線2a、2bの各配線幅Wa、Wbは、上述のとおり配線間隔の広狭に対応して設定されている。配線幅Wa、Wbをこのように設定することにより、電解めっきにより形成された突起電極3a、3cの高さの差が小さくなる。その理由は、以下のとおりである。   The conductor wiring 2a forms a wiring group A having a narrow wiring interval, and the conductor wiring 2b forms a wiring group B having a wiring spacing wider than the conductor wiring 2a. The wiring width Wb of the conductor wiring 2b in the wiring group B with the larger wiring spacing is narrower than the wiring width Wa of the conductor wiring 2a in the wiring group A with the smaller wiring spacing. That is, the wiring widths Wa and Wb of the conductor wirings 2a and 2b at the tip portions where the protruding electrodes 3a and 3c are formed are set corresponding to the width of the wiring interval as described above. By setting the wiring widths Wa and Wb in this way, the difference in height between the protruding electrodes 3a and 3c formed by electrolytic plating is reduced. The reason is as follows.

突起電極3a、3cは、図6に示した従来例と同様の製造方法により形成される。その際、配線幅Waよりも配線幅Wbが細いことにより、電解めっきを施すために導体配線2a、2bを通して流れる電流値の差が小さくなる。すなわち、配線間隔の狭い方の配線群における導体配線2aと比べて、配線間隔の広い方の配線群における導体配線2bを流れる電流密度は大きくなるが、配線幅Wbが配線幅Waよりも細いことにより電流密度による差が相殺されて、導体配線2a、2bを通して流れる電流値は近接するからである。その結果、形成された突起電極3a、3cの高さの差が小さくなり、実装に際して突起電極3a、3cを介した接続状態の不良の発生を抑制することができる。   The protruding electrodes 3a and 3c are formed by the same manufacturing method as in the conventional example shown in FIG. At this time, since the wiring width Wb is narrower than the wiring width Wa, the difference between the current values flowing through the conductor wirings 2a and 2b for performing electroplating is reduced. That is, the current density flowing through the conductor wiring 2b in the wiring group with the larger wiring interval is larger than the conductor wiring 2a in the wiring group with the smaller wiring interval, but the wiring width Wb is narrower than the wiring width Wa. This cancels out the difference due to the current density, and the current values flowing through the conductor wirings 2a and 2b are close to each other. As a result, the difference in height between the formed protruding electrodes 3a and 3c is reduced, and it is possible to suppress the occurrence of a poor connection state via the protruding electrodes 3a and 3c during mounting.

フィルム基材1としては、一般的な材料であるポリイミドを用いることができる。他の条件に応じて、PET、PEI等の絶縁フィルム材料を用いても良い。導体配線2a、2bは、通常、厚みが3〜20μmの範囲で、銅を用いて形成する。必要に応じて、フィルム基材1と導体配線2a、2bの間に、エポキシ系の接着剤を介在させてもよい。   As the film substrate 1, polyimide which is a general material can be used. Depending on other conditions, an insulating film material such as PET or PEI may be used. The conductor wirings 2a and 2b are usually formed using copper in a thickness range of 3 to 20 μm. If necessary, an epoxy adhesive may be interposed between the film substrate 1 and the conductor wirings 2a and 2b.

突起電極3a、3cの厚みは通常、3〜20μmの範囲である。突起電極3a、3cの材料としては、例えば銅を用いることができる。銅を用いる場合、突起電極3a、3cと導体配線2a、2bに金属めっきを施すことが望ましい。   The thickness of the protruding electrodes 3a and 3c is usually in the range of 3 to 20 μm. As a material of the protruding electrodes 3a and 3c, for example, copper can be used. When copper is used, it is desirable to perform metal plating on the protruding electrodes 3a and 3c and the conductor wirings 2a and 2b.

(実施の形態2)
実施の形態2におけるテープキャリア基板の構造について、図2を参照して説明する。図2は、テープキャリア基板の一部を示す斜視図である。
(Embodiment 2)
The structure of the tape carrier substrate in the second embodiment will be described with reference to FIG. FIG. 2 is a perspective view showing a part of the tape carrier substrate.

本実施の形態においても、配線間隔が狭い配線群Aと、配線群Aよりも配線間隔が広い配線群Bが形成されている。配線間隔の広い方の配線群Bに属する導体配線2cは、突起電極3cが形成された先端部2cbと、本体部2caとを含む。先端部2cbの配線幅は、本体部2caの配線幅より細く形成されている。配線間隔が狭い方の配線群Aに属する導体配線2aの配線幅と、配線群Bに属する導体配線2cの本体部2caの配線幅は同等である。   Also in this embodiment, a wiring group A having a narrow wiring interval and a wiring group B having a wiring interval wider than the wiring group A are formed. The conductor wiring 2c belonging to the wiring group B with the larger wiring interval includes a tip end portion 2cb on which the protruding electrode 3c is formed and a main body portion 2ca. The wiring width of the distal end portion 2cb is narrower than the wiring width of the main body portion 2ca. The wiring width of the conductor wiring 2a belonging to the wiring group A with the smaller wiring interval is equal to the wiring width of the main body 2ca of the conductor wiring 2c belonging to the wiring group B.

従って、導体配線2aの突起電極3aが形成された先端部における配線幅に比べて、導体配線2cの突起電極3cが形成された先端部2cbの配線幅は細くなっている。導体配線2cの先端部2cbを細くすることにより、実施の形態1と同様、突起電極3a、3cを形成する電解めっきを施すための電流値の差が小さくなる。その結果、形成された突起電極3a、3cの高さの差が小さくなり、実装に際して突起電極3a、3cを介した接続状態の不良の発生を抑制することができる。   Accordingly, the wiring width of the tip portion 2cb where the protruding electrode 3c of the conductor wiring 2c is formed is narrower than the wiring width at the tip portion where the protruding electrode 3a of the conductor wiring 2a is formed. By narrowing the tip 2cb of the conductor wiring 2c, the difference in current value for performing electroplating for forming the protruding electrodes 3a and 3c is reduced as in the first embodiment. As a result, the difference in height between the formed protruding electrodes 3a and 3c is reduced, and it is possible to suppress the occurrence of a poor connection state via the protruding electrodes 3a and 3c during mounting.

また、導体配線2cの本体部2caは導体配線2aと同等の配線幅であるため、テープキャリア基板の折り曲げ強度を維持したまま、上述の効果が得られる。   Moreover, since the main-body part 2ca of the conductor wiring 2c has a wiring width equivalent to that of the conductor wiring 2a, the above-described effects can be obtained while maintaining the bending strength of the tape carrier substrate.

(実施の形態3)
実施の形態3におけるテープキャリア基板の構造について、図3を参照して説明する。図3(a)は、テープキャリア基板の一部を示す平面図、図3(b)は、図3(a)における突起電極部分の断面図である。
(Embodiment 3)
The structure of the tape carrier substrate in the third embodiment will be described with reference to FIG. FIG. 3A is a plan view showing a part of the tape carrier substrate, and FIG. 3B is a cross-sectional view of the protruding electrode portion in FIG.

本実施の形態においては、配線間隔が狭い配線群Aに属する導体配線2と、配線間隔が広い配線群Bに属する導体配線2とは、配線幅が同一である。一方、本実施の形態においては、配線群Aに属する導体配線2に形成された突起電極3aと、配線群Bに属する導体配線2に形成された突起電極3dとは、突起電極3a、3dが導体配線2の上面に接する面積が相違する。すなわち、突起電極3aが導体配線2の上面に接する面積に比べて、突起電極3dが導体配線2の上面に接する面積の方が大きくなるように設定される。   In the present embodiment, the conductor wiring 2 belonging to the wiring group A having a narrow wiring interval and the conductor wiring 2 belonging to the wiring group B having a wide wiring interval have the same wiring width. On the other hand, in the present embodiment, the protruding electrode 3a formed on the conductor wiring 2 belonging to the wiring group A and the protruding electrode 3d formed on the conductor wiring 2 belonging to the wiring group B include the protruding electrodes 3a and 3d. The areas in contact with the upper surface of the conductor wiring 2 are different. That is, the area where the protruding electrode 3 d is in contact with the upper surface of the conductor wiring 2 is set to be larger than the area where the protruding electrode 3 a is in contact with the upper surface of the conductor wiring 2.

具体的な構造としては、図3(a)に示すように、配線群Aにおける突起電極3aの配線方向における長さL1に比べて、配線群Bにおける突起電極3dの配線方向における長さL2の方が長くなるように設定される。   As a specific structure, as shown in FIG. 3A, the length L2 of the protruding electrode 3d in the wiring group B in the wiring direction is longer than the length L1 of the protruding electrode 3a in the wiring group A in the wiring direction. Is set to be longer.

突起電極3aが導体配線2の上面に接する面積に比べて、突起電極3dが導体配線2の上面に接する面積の方が大きくなるように設定することにより、以下に説明するとおり、突起電極3a、3dを形成する電解めっきを施すための、各々の電流値の差が小さくなる。   By setting so that the area where the protruding electrode 3d is in contact with the upper surface of the conductor wiring 2 is larger than the area where the protruding electrode 3a is in contact with the upper surface of the conductor wiring 2, the protruding electrode 3a, The difference between the current values for performing the electroplating for forming 3d is reduced.

すなわち、突起電極3a、3dを形成する際には、従来例の図6(d1)および図6(e1)に示したように、フォトレジストのパターンを通して、導体配線2の露出した部分に金属めっきを施す。本実施の形態によれば、電解めっき用のフォトレジストのパターンにおいて、突起電極3aを形成するための開口に比べて、突起電極3dを形成するための開口の配線方向における長さを長くすることになる。従って、電解めっきのための電流が流れる導体配線2の表面積が、突起電極3dが形成される導体配線2において、突起電極3aが形成される導体配線2よりも広くなる。   That is, when forming the protruding electrodes 3a and 3d, as shown in FIGS. 6D1 and 6E1 of the conventional example, the exposed portion of the conductor wiring 2 is subjected to metal plating through a photoresist pattern. Apply. According to the present embodiment, the length in the wiring direction of the opening for forming the protruding electrode 3d is made longer than the opening for forming the protruding electrode 3a in the photoresist pattern for electrolytic plating. become. Therefore, the surface area of the conductor wiring 2 through which the current for electrolytic plating flows is wider in the conductor wiring 2 where the protruding electrode 3d is formed than in the conductor wiring 2 where the protruding electrode 3a is formed.

それにより、配線間隔の広狭に起因する電流密度の差異が、電流が流れる導体配線2の表面積の差異により相殺され、突起電極3a、3dを形成する電解めっきを施すための、各々の電流値の差が小さくなる。その結果、図3(b)に示すように、形成された突起電極3a、3dの高さの不揃いが軽減され、実装に際して突起電極3a、3dを介した接続状態の不良の発生を抑制することができる。   Thereby, the difference in current density due to the width of the wiring interval is offset by the difference in surface area of the conductor wiring 2 through which the current flows, and each current value for applying the electroplating to form the protruding electrodes 3a and 3d. The difference becomes smaller. As a result, as shown in FIG. 3B, the unevenness of the height of the formed protruding electrodes 3a and 3d is reduced, and the occurrence of a defective connection state via the protruding electrodes 3a and 3d during mounting is suppressed. Can do.

(実施の形態4)
実施の形態4におけるテープキャリア基板の構造について、図4を参照して説明する。図4は、テープキャリア基板の一部を示す平面図である。
(Embodiment 4)
The structure of the tape carrier substrate in the fourth embodiment will be described with reference to FIG. FIG. 4 is a plan view showing a part of the tape carrier substrate.

本実施の形態においては、配線間隔が狭い配線群Aに属する導体配線2と、配線間隔が広い配線群Bに属する導体配線2とは、配線幅が同一である。一方、本実施の形態においては、配線間隔の広い方の配線群Bを、各々複数本の導体配線2を含む複数の副配線群B1、B2、B3により形成する。同一の各副配線群B1、B2、B3に属する各導体配線2の相互間の間隔D1は、隣接する他の副配線群との間に設けられた間隔D2よりも狭くなるように設定される。   In the present embodiment, the conductor wiring 2 belonging to the wiring group A having a narrow wiring interval and the conductor wiring 2 belonging to the wiring group B having a wide wiring interval have the same wiring width. On the other hand, in the present embodiment, the wiring group B with the wider wiring interval is formed by a plurality of sub wiring groups B1, B2, and B3 each including a plurality of conductor wirings 2. The distance D1 between the conductor wirings 2 belonging to the same sub wiring group B1, B2, B3 is set to be narrower than the distance D2 provided between the adjacent sub wiring groups. .

それにより、各副配線群B1、B2、B3内においては、導体配線2相互の間隔を、配線群Aに属する導体配線2相互の間隔と同等にすることができる。従って、突起電極3a、3fを形成する電解めっきを施すための、各々の電流値の差が小さくなる。その結果、形成された突起電極3a、3fの高さの不揃いが軽減される。   Thereby, in each sub wiring group B1, B2, B3, the space | interval of the conductor wiring 2 can be made equivalent to the space | interval of the conductor wiring 2 which belongs to the wiring group A. FIG. Accordingly, the difference between the current values for performing the electrolytic plating for forming the protruding electrodes 3a and 3f is reduced. As a result, uneven heights of the formed protruding electrodes 3a and 3f are reduced.

本発明の配線基板は、多数の導体配線に形成された突起電極の高さの不揃いが軽減され、COF等に用いるテープキャリア基板として有用である。   The wiring board of the present invention is useful as a tape carrier board used for COF and the like because unevenness in height of protruding electrodes formed on a large number of conductor wirings is reduced.

(a)は本発明の実施の形態1におけるテープキャリア基板を示す斜視図、(b)はその断面図(A) is a perspective view which shows the tape carrier substrate in Embodiment 1 of this invention, (b) is the sectional drawing. 本発明の実施の形態2におけるテープキャリア基板を示す斜視図The perspective view which shows the tape carrier board | substrate in Embodiment 2 of this invention. (a)は本発明の実施の形態3におけるテープキャリア基板を示す平面図、(b)はその断面図(A) is a top view which shows the tape carrier substrate in Embodiment 3 of this invention, (b) is the sectional drawing. 本発明の実施の形態4におけるテープキャリア基板を示す平面図The top view which shows the tape carrier substrate in Embodiment 4 of this invention (a)は従来例のテープキャリア基板を示す斜視図、(b)はその断面図(A) is a perspective view which shows the tape carrier board | substrate of a prior art example, (b) is the sectional drawing. 従来例のテープキャリア基板の製造方法の工程を示し、(a1)〜(f1)は、突起電極を形成する製造工程における、フィルム基材上の半導体素子搭載部の平面図、(a2)〜(f2)は各々、(a1)〜(f1)の拡大断面図The process of the manufacturing method of the tape carrier board | substrate of a prior art example is shown, (a1)-(f1) is a top view of the semiconductor element mounting part on a film base material in the manufacturing process which forms a protruding electrode, (a2)-( f2) are enlarged sectional views of (a1) to (f1), respectively.

符号の説明Explanation of symbols

1 フィルム基材
2、2a、2b 導体配線
3、3a、3b、3c、3d、3f 突起電極
4 フォトレジスト
4a 長孔状パターン
5 露光マスク
5a 光透過領域
6 テープキャリア基板
DESCRIPTION OF SYMBOLS 1 Film base material 2, 2a, 2b Conductor wiring 3, 3a, 3b, 3c, 3d, 3f Protrusion electrode 4 Photoresist 4a Elongate pattern 5 Exposure mask 5a Light transmission area 6 Tape carrier substrate

Claims (10)

絶縁性基材と、
前記絶縁性基材上に整列して設けられた複数本の導体配線と、
前記各導体配線にめっきにより形成された突起電極を備え、
前記突起電極は、前記導体配線の長手方向を横切って前記導体配線の両側の前記絶縁基材上の領域に亘り形成され、
前記突起電極の前記導体配線の幅方向の断面形状は、中央部が両側よりも高くなっている配線基板において、
前記複数の導体配線は、前記突起電極が形成された先端部を含む領域における前記導体配線の配線間隔が互いに異なる複数の配線群を形成し、
前記突起電極が形成された先端部における前記導体配線の配線幅は、前記配線間隔の広狭に対応して設定され、前記配線間隔の広い方の配線群における前記配線幅は、前記配線間隔の狭い方の配線群における前記配線幅よりも細いことを特徴とする配線基板。
An insulating substrate;
A plurality of conductor wirings arranged in alignment on the insulating substrate;
Provided with a protruding electrode formed by plating on each conductor wiring,
The protruding electrode is formed across the region on the insulating substrate on both sides of the conductor wiring across the longitudinal direction of the conductor wiring,
The cross-sectional shape in the width direction of the conductor wiring of the protruding electrode is a wiring board whose central portion is higher than both sides,
The plurality of conductor wirings form a plurality of wiring groups in which the wiring intervals of the conductor wirings are different from each other in a region including a tip portion where the protruding electrodes are formed,
The wiring width of the conductor wiring at the tip portion where the protruding electrode is formed is set corresponding to the width of the wiring interval, and the wiring width in the wiring group with the wider wiring interval is narrow in the wiring interval. A wiring board characterized by being narrower than the wiring width in the other wiring group.
前記配線間隔の広い方の配線群に属する前記導体配線は、前記突起電極が形成された先端部の配線幅が他の領域の配線幅より細い請求項1記載の配線基板。   The wiring board according to claim 1, wherein the conductor wiring belonging to the wiring group with the wider wiring interval has a wiring width at a tip portion where the protruding electrode is formed narrower than a wiring width in another region. 絶縁性基材と、
前記絶縁性基材上に整列して設けられた複数本の導体配線と、
前記各導体配線にめっきにより形成された突起電極を備え、
前記突起電極は、前記導体配線の長手方向を横切って前記導体配線の両側の前記絶縁基材上の領域に亘り形成され、
前記突起電極の前記導体配線の幅方向の断面形状は、中央部が両側よりも高くなっている配線基板において、
前記複数の導体配線は、前記突起電極が形成された先端部を含む領域における前記導体配線の配線間隔が互いに異なる複数の配線群を形成し、
前記突起電極が前記導体配線の上面に接する面積が、前記配線間隔の広い方の配線群では前記配線間隔の狭い方の配線群と比べて大きいことを特徴とする配線基板。
An insulating substrate;
A plurality of conductor wirings arranged in alignment on the insulating substrate;
Provided with a protruding electrode formed by plating on each conductor wiring,
The protruding electrode is formed across the region on the insulating substrate on both sides of the conductor wiring across the longitudinal direction of the conductor wiring,
The cross-sectional shape in the width direction of the conductor wiring of the protruding electrode is a wiring board whose central portion is higher than both sides,
The plurality of conductor wirings form a plurality of wiring groups in which the wiring intervals of the conductor wirings are different from each other in a region including a tip portion where the protruding electrodes are formed,
The wiring board characterized in that the area where the protruding electrode is in contact with the upper surface of the conductor wiring is larger in the wiring group with a larger wiring interval than in the wiring group with a smaller wiring interval.
前記導体配線は、配線方向における前記突起電極の長さが、前記配線間隔の広い方の配線群では前記配線間隔の狭い方の配線群と比べて長く形成されている請求項3記載の配線基板。   4. The wiring board according to claim 3, wherein the conductor wiring is formed such that the length of the protruding electrode in the wiring direction is longer in the wiring group having the larger wiring interval than in the wiring group having the smaller wiring interval. . 絶縁性基材と、
前記絶縁性基材上に整列して設けられた複数本の導体配線と、
前記各導体配線にめっきにより形成された突起電極を備え、
前記突起電極は、前記導体配線の長手方向を横切って前記導体配線の両側の前記絶縁基材上の領域に亘り形成され、
前記突起電極の前記導体配線の幅方向の断面形状は、中央部が両側よりも高くなっている配線基板において、
前記複数の導体配線は、前記突起電極が形成された先端部を含む領域における前記導体配線の配線間隔が互いに異なる複数の配線群を形成し、
前記配線間隔の広い方の配線群を、各々複数本の前記導体配線を含む複数の副配線群により形成し、同一の前記副配線群に属する各導体配線の相互間の間隔は、隣接する他の前記副配線群との間に設けられた間隔よりも狭いことを特徴とする配線基板。
An insulating substrate;
A plurality of conductor wirings arranged in alignment on the insulating substrate;
Provided with a protruding electrode formed by plating on each conductor wiring,
The protruding electrode is formed across the region on the insulating substrate on both sides of the conductor wiring across the longitudinal direction of the conductor wiring,
The cross-sectional shape in the width direction of the conductor wiring of the protruding electrode is a wiring board whose central portion is higher than both sides,
The plurality of conductor wirings form a plurality of wiring groups in which the wiring intervals of the conductor wirings are different from each other in a region including a tip portion where the protruding electrodes are formed,
The wiring group having the wider wiring interval is formed by a plurality of sub wiring groups each including a plurality of the conductor wirings, and the intervals between the conductor wirings belonging to the same sub wiring group are adjacent to each other. A wiring board characterized by being narrower than an interval provided between the sub-wiring group.
複数本の導体配線を絶縁性基材上に整列して設ける工程と、
前記絶縁性基材の前記導体配線が設けられた面にフォトレジストを形成する工程と、
前記フォトレジストに、前記導体配線を横切って前記導体配線の両側の領域に広がる開口部を形成して、前記開口部中に前記導体配線の一部を露出させる工程と、
前記露出した前記導体配線の一部に電解めっきにより金属めっきを施して突起電極を形成する工程とを備えた配線基板の製造方法において、
前記導体配線を、前記突起電極を形成すべき先端部を含む領域における配線間隔が互いに異なる複数の配線群に分けた配置により形成し、
前記突起電極を形成すべき領域の前記導体配線の配線幅を、前記配線間隔の広狭に対応させて、前記配線間隔の広い方の配線群における前記配線幅を、前記配線間隔の狭い方の配線群における前記配線幅よりも細くすることを特徴とする配線基板の製造方法。
A step of arranging a plurality of conductor wirings on an insulating base material; and
Forming a photoresist on the surface of the insulating substrate provided with the conductor wiring;
Forming an opening in the photoresist that extends across the conductor wiring to the regions on both sides of the conductor wiring, and exposing a part of the conductor wiring in the opening;
In the method of manufacturing a wiring board, comprising a step of forming a protruding electrode by performing metal plating on the part of the exposed conductor wiring by electrolytic plating,
The conductor wiring is formed by an arrangement divided into a plurality of wiring groups having different wiring intervals in a region including a tip portion where the protruding electrode is to be formed,
The wiring width of the conductor wiring in the region where the protruding electrode is to be formed corresponds to the width of the wiring space, and the wiring width in the wiring group with the larger wiring space is set to the wiring with the narrower wiring space. A method for manufacturing a wiring board, wherein the wiring board is narrower than the wiring width in the group.
前記配線間隔の広い方の配線群における前記導体配線を、前記突起電極が形成された領域の配線幅が他の領域の配線幅より細くなるように形成する請求項6記載の配線基板の製造方法。   7. The method of manufacturing a wiring board according to claim 6, wherein the conductor wiring in the wiring group with the wider wiring interval is formed so that a wiring width in a region where the protruding electrode is formed is narrower than a wiring width in another region. . 複数本の導体配線を絶縁性基材上に整列して設ける工程と、
前記絶縁性基材の前記導体配線が設けられた面にフォトレジストを形成する工程と、
前記フォトレジストに、前記導体配線を横切って前記導体配線の両側の領域に広がる開口部を形成して、前記開口部中に前記導体配線の一部を露出させる工程と、
前記露出した前記導体配線の一部に電解めっきにより金属めっきを施して突起電極を形成する工程とを備えた配線基板の製造方法において、
前記導体配線を、前記突起電極を形成すべき先端部を含む領域における配線間隔が互いに異なる複数の配線群に分けた配置により形成し、
前記フォトレジストに前記開口部を形成して前記導体配線の一部を露出させる工程において、前記開口部中に露出する各前記導体配線の上面面積を、前記配線間隔の広い方の配線群では前記配線間隔の狭い方の配線群と比べて大きくすることを特徴とする配線基板の製造方法。
A step of arranging a plurality of conductor wirings on an insulating base material; and
Forming a photoresist on the surface of the insulating substrate provided with the conductor wiring;
Forming an opening in the photoresist that extends across the conductor wiring to the regions on both sides of the conductor wiring, and exposing a part of the conductor wiring in the opening;
In the method of manufacturing a wiring board, comprising a step of forming a protruding electrode by performing metal plating on the part of the exposed conductor wiring by electrolytic plating,
The conductor wiring is formed by an arrangement divided into a plurality of wiring groups having different wiring intervals in a region including a tip portion where the protruding electrode is to be formed,
In the step of forming the opening in the photoresist and exposing a part of the conductor wiring, the upper surface area of each conductor wiring exposed in the opening is set as the wiring group with a larger wiring interval. A method of manufacturing a wiring board, wherein the wiring board is larger than a wiring group having a smaller wiring interval.
前記導体配線の配線方向における前記フォトレジストの開口部の長さを、前記配線間隔の広い方の配線群では前記配線間隔の狭い方の配線群と比べて長くする請求項8記載の配線基板の製造方法。   9. The wiring board according to claim 8, wherein the length of the opening portion of the photoresist in the wiring direction of the conductor wiring is made longer in the wiring group having a larger wiring interval than in the wiring group having a smaller wiring interval. Production method. 複数本の導体配線を絶縁性基材上に整列して設ける工程と、
前記絶縁性基材の前記導体配線が設けられた面にフォトレジストを形成する工程と、
前記フォトレジストに、前記導体配線を横切って前記導体配線の両側の領域に広がる開口部を形成して、前記開口部中に前記導体配線の一部を露出させる工程と、
前記露出した前記導体配線の一部に電解めっきにより金属めっきを施して突起電極を形成する工程とを備えた配線基板の製造方法において、
前記導体配線を、前記突起電極を形成すべき先端部を含む領域における配線間隔が互いに異なる複数の配線群に分けた配置により形成し、
前記配線間隔の広い方の配線群を、各々複数本の前記導体配線を含む複数の副配線群により形成し、同一の前記副配線群に属する各導体配線の相互間の間隔を、隣接する他の前記副配線群との間に設けられた間隔よりも狭くすることを特徴とする配線基板の製造方法。
A step of arranging a plurality of conductor wirings on an insulating base material; and
Forming a photoresist on the surface of the insulating substrate provided with the conductor wiring;
Forming an opening in the photoresist that extends across the conductor wiring to the regions on both sides of the conductor wiring, and exposing a part of the conductor wiring in the opening;
In the method of manufacturing a wiring board, comprising a step of forming a protruding electrode by performing metal plating on the part of the exposed conductor wiring by electrolytic plating,
The conductor wiring is formed by an arrangement divided into a plurality of wiring groups having different wiring intervals in a region including a tip portion where the protruding electrode is to be formed,
The wiring group having the wider wiring interval is formed by a plurality of sub wiring groups each including a plurality of the conductor wirings, and the interval between the conductor wirings belonging to the same sub wiring group is set to be adjacent to each other. A method of manufacturing a wiring board, wherein the distance is narrower than a distance provided between the sub-wiring group.
JP2005199175A 2005-07-07 2005-07-07 Wiring board and manufacturing method thereof Withdrawn JP2007019271A (en)

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