JP2007010811A - Display device and display panel - Google Patents

Abstract

【Task】
By devising the pixel arrangement, the number of drive lines is reduced.
[Solution]
Display panel 110 having a plurality of signal lines D101 to D106, a plurality of scanning lines G101 to G106, a plurality of signal lines and pixels connected to the plurality of scanning lines, and a gradation corresponding to display data input from the outside A signal line driving circuit 120 for supplying a signal to the pixel through the signal line and a scanning line driving circuit 130 for supplying a scanning signal for selecting the pixel to the pixel through the scanning line are provided. A first pixel including three subpixels arranged in an L shape and a second pixel including three subpixels arranged in an inverted L shape are disposed adjacent to each other in the scan line direction. The
[Selection] Figure 1

Description

  The present invention relates to a display panel in which one pixel is formed by at least three subpixels (for example, red, green, and blue) and a display device including the display panel. The present invention relates to a display panel in which sub-pixels in each pixel are arranged in a mosaic pattern using Luminescence), FED, plasma, and the like, and a display device including the display panel.

  As a pixel array of a conventional matrix type display device, there is a mosaic array. That is, RGB subpixels are arranged in an L shape to form one pixel, and pixels including L-shaped subpixels and pixels including subpixels in an inverted L shape are alternately arranged in the column direction (Patent Document 1). reference). In Patent Document 1, when the first to third color cells 2 constituting one pixel 1 are the first to third cells, the second cell is located on the side of the signal lines 3 in the first cell. Provided, the third cell is provided on the arrangement direction side of the scanning line 4 of the first cell and is arranged in an L-shape, and one pixel 1 and one side of the arrangement direction of the pixel 1 and the scanning line 4 Another pixel 1 adjacent to the first pixel is a first pixel having an L shape, and a second pixel having an L shape rotated by 180 ° with respect to the first pixel. The pixels are paired and combined to form a square. All the first pixels and the second pixels have the same color arrangement of the first to third cells, and the first pixel and the second pixel have the same color. It is described that the arrangement is different. When the display panel is composed of M × N (M and N are natural numbers) pixels, M × 3 (RGB) × N sub-pixels (display cells) are required. In the stripe arrangement (see FIG. 2 of Patent Document 2), M × 3 signal lines and N scanning lines are required. On the other hand, in the column direction mosaic arrangement described in Patent Document 1, there are M × 3 × 2/3 signal lines and N × 3/2 scanning lines. In a display panel that is long in the horizontal direction, that is, with a large number of pixels in one line, the total number of signal lines and scanning lines is smaller than that in the stripe arrangement. In addition, a circuit for driving the signal line can be reduced.

  As another conventional mosaic arrangement, pixel groups arranged along columns are alternately arranged in different color pixel units, and the same signal for each pixel group constituting the same color pixel unit among such color pixel units A color pixel unit of the same color in adjacent columns connected in a line, and a pixel on one side and a pixel on the other side are alternately connected around a signal line There is a display panel (see FIG. 4 of Patent Document 2). Further, R, G, R, G,... For the signal line S1, G, B, G, B,... For the signal line S2, and B, R, B, R,. As described above, the color signals are distributed in one scanning cycle (see FIG. 3 of Patent Document 2 and FIG. 13 of Patent Document 3).

  Another conventional pixel arrangement is a delta arrangement. That is, RGB subpixels are arranged in a triangle to constitute one pixel, and the display cells of the same color are shifted by one and a half cells (see FIG. 12 of Patent Document 3 and Patent Document 4).

JP 2002-32038 A Japanese Unexamined Patent Publication No. 7-248482 International Publication No. WO95 / 22782 Japanese Patent Laid-Open No. 10-74069

  In the mosaic arrangement described in Patent Document 1, since pixels including sub-pixels in an L shape and pixels including sub-pixels in an inverted L shape are alternately arranged in the column direction, the signal lines are compared with the stripe arrangement as described above. And the total number of scan lines is small, but still the total number of signal lines and scan lines is large.

  In the mosaic arrangement shown in FIGS. 3 and 4 of Patent Document 2 and FIG. 13 of Patent Document 3, RGB of one pixel is not arranged in an L shape or an inverted L shape, and RGB of one pixel is arranged in the line direction. In addition, since the RGB arrangement is only shifted from line to line, the number of signal lines and scanning lines is large, similar to the number of signal lines and scanning lines in the stripe arrangement.

  In the delta arrangement described in FIG. 12 of Patent Document 3 and Patent Document 4, since it is necessary to wire the signal lines in a zigzag shape, the length of the signal lines is equal to the length of the signal lines wired in a straight line. It becomes longer compared. As the signal line becomes longer, the influence of the grayscale signal transmission delay, the rounding of the grayscale signal waveform, and the like gradually increases. That is, in the display cell group connected to the same signal line, a difference in gradation signal is likely to occur between the display cell closer to the signal line driver circuit and the display cell farther from the signal line driver circuit. Become. Therefore, a display device having a delta arrangement is more likely to cause luminance unevenness due to the difference in the grayscale signals than a display device having a linear signal line.

  An object of the present invention is to provide a display panel and a display device in which the number of drive wirings is reduced.

  An object of the present invention is to provide a display panel and a display device in which circuits for driving signal lines are reduced and simplified.

  In the present invention, a first pixel including three sub-pixels arranged in an L shape and a second pixel including three sub-pixels arranged in an inverted L shape are adjacent to each other in the scan line direction. Deploy.

  According to the present invention, when the number of pixels in the direction along the scanning line is M and the number of pixels in the direction along the signal line is N, M × 3/2 signal lines and N × 2 scanning lines are used. Since the pixels can be driven, the total number of signal lines and scanning lines can be reduced.

  According to the present invention, pixels can be driven by M × 3/2 signal lines, so that a circuit for driving signal lines can be reduced and simplified.

  Hereinafter, examples of embodiments of the present invention will be described.

  FIG. 1 shows a configuration example of an active matrix display device to which the present invention is applied. The display device 100 includes a display panel 110 including a plurality of signal lines, a plurality of scanning lines, a plurality of display lines (pixels) connected to the plurality of signal lines and the plurality of scanning lines, and arranged in a matrix. A signal line driving circuit 120 for driving the signal lines of the panel 110, a scanning line driving circuit 130 for driving the scanning lines of the display panel 110, and the signal line driving circuit 120 and the scanning lines in accordance with the input video signal (display data) 150. And a control circuit 140 that controls the drive circuit 130. The signal line drive circuit 120 is controlled from the control circuit 140 by a signal line drive circuit control signal 160. Similarly, the scanning line driving circuit 130 is controlled from the control circuit 140 by a scanning line driving circuit control signal 170. The display panel 110 selects a display cell group arranged in a matrix, signal line groups D101 to D106 that give gradation signals corresponding to input display data to each display cell, and a display cell group that gives display data. Scanning line groups G101 to G106. Further, each display cell constituting the display panel 110 has a function of displaying one color, and in addition, each display cell changes in luminance according to the intensity of the gradation signal given by the signal line. Configure to Here, the intensity of the gradation signal is associated with the voltage value of the signal line, for example.

  In the configuration of the display device of the present invention, display cells of three colors of the first color, the second color, and the third color are arranged on the display panel 110. Then, one display cell of each color is formed, that is, a total of three display cells are used to constitute one pixel (hereinafter, each of the first color, the second color, and the third color constituting the one pixel). Display cells are called sub-pixels). Each pixel has various colors corresponding to the display data by appropriately adjusting the combination of the luminance values of the sub-pixels of the first color, the second color, and the third color according to the input display data. It is possible to express the above. Here, the first color, the second color, and the third color may be, for example, red (R), green (G), and blue (B), respectively, but may be configured by a combination of other colors. I do not care. The order of arrangement is also arbitrary. Hereinafter, in the configuration of the first embodiment, a case where RGB is applied to the first to third colors will be described as an example.

  Next, the arrangement of the subpixels of the first color, the second color, and the third color constituting the pixel in the display device 100 will be described. The pixels constituting the display device 100 are composed of first and second types of pixels. The first pixel is composed of the first, second, and third subpixels.

  The first pixel is based on the first subpixel connected to the first scanning line and the first signal line. The second sub-pixel of the first pixel is disposed adjacent to the first sub-pixel along the scan line direction, is connected to the first scan line, and is different from the first signal line. Connect to 2 signal lines. The third sub-pixel of the first pixel is disposed adjacent to the first sub-pixel along the signal line direction, is connected to the first signal line, and is different from the first scan line. Connect to the second scan line. As described above, the first pixel is arranged so as to form an L shape with the first, second, and third subpixels. Here, one color is assigned to each of the first, second, and third subpixels so as not to overlap each other from the first color, the second color, and the third color. The order of the first color, the second color, and the third color is arbitrary. FIG. 1 shows an example in which blue (B) is assigned to the first subpixel, red (R) is assigned to the second subpixel, and green (G) is assigned to the third subpixel.

  The second pixel is composed of the fourth, fifth, and sixth sub-pixels. The second pixel is based on the fifth pixel connected to the second scanning line and the third signal line. The fourth sub-pixel of the second pixel is arranged so as to be adjacent to the fifth sub-pixel along the scan line direction, is connected to the second scan line, and is connected to the second signal line. The sixth subpixel of the second pixel is disposed adjacent to the fifth subpixel along the signal line direction, is connected to the third signal line, and is connected to the first scan line . As described above, the second pixel is arranged so as to form an L shape with the fourth, fifth, and sixth subpixels. Here, one color is assigned to each of the fourth, fifth, and sixth subpixels so as not to overlap among the first color, the second color, and the third color. The order of the first color, the second color, and the third color is arbitrary. FIG. 1 shows an example in which blue (B) is assigned to the fourth subpixel, red (R) is assigned to the fifth subpixel, and green (G) is assigned to the sixth subpixel.

  The first pixel and the second pixel are configured to be adjacent along the scanning line direction (for example, the row direction). That is, the L-shaped first pixel and the L-shaped second pixel obtained by rotating the first pixel by exactly 180 degrees are combined, and the first and second pixels are arranged to form a square. However, the sub-pixel arrangement of the first pixel is different from the sub-pixel arrangement of the second pixel. That is, the first, second, and sixth subpixels are connected to the first scanning line, and the third, fourth, and fifth subpixels are connected to the second scanning line. The first and third subpixels are connected to the first signal line, the second and fourth subpixels are connected to the second signal line, and the fifth and sixth subpixels are connected to the third signal line. To do. The first and fourth subpixels are preferably the same color (eg, the first color), and the second and fifth subpixels are preferably the same color (eg, the second color), The third and sixth subpixels are preferably the same color (for example, the third color). Thereby, three different colors (for example, the first color, the second color, and the third color) are arranged in the scanning line direction. Thereby, color unevenness can be reduced.

  The display panel 110 of the display device 100 of the present invention has a configuration in which a set of the first pixel and the second pixel is used as a unit and the unit is arranged in a matrix. FIG. 1 shows an example of a display device having a resolution of 4 pixels in the direction along the scanning line, 3 pixels in the direction along the signal line, and a total of 12 pixels. However, the resolution of the display device of the present invention is as described above. It is not limited. In FIG. 1, for example, when expressed as R (x, y), the red (R) subpixel in the pixel corresponding to the xth display data along the scanning line and the yth display data along the signal line. Indicates that In the example shown in FIG. 1, the number of subpixels is 36, the number of signal lines is 6, and the number of scanning lines is 6. The total number of signal lines and scanning lines is twelve. On the other hand, in the conventional stripe arrangement, in the case of a display device with a resolution of 4 × 3 and a total of 12 pixels, 12 signal lines and 3 scanning lines are used, so a total of 15 wirings are required. Thus, it can be seen that the display device 100 to which the present invention is applied can reduce the number of wirings while maintaining the resolution as compared with the conventional stripe arrangement. In particular, by reducing the number of signal lines, the number of signal line driver circuit control signals 160 can be reduced, and the internal circuit of the signal line driver circuit control signals 160 can be simplified. In FIG. 1, an example with a small resolution is shown to simplify the description, but application of the present invention is not limited to this resolution. In FIG. 1, the shape of the display cell has been described using a rectangle, but the present invention is not particularly limited to a rectangle. For example, it may be a polygonal shape such as a triangle or a trapezoid. In this case, the pair of the first pixel and the second pixel does not necessarily have to be a rectangle, and if the first, sixth, third, and fifth subpixels are arranged at the vertices of a rectangle, good.

  FIG. 2 is an enlarged view of a part of the display panel 110 used in the display device of the present invention shown in FIG. Here, R (x, y), G (x, y), and B (x, y) are display cells, D101 to D103 are signal lines, and G101 to G104 are scanning lines.

  The scanning line G101 is connected to the display cells B (1, 1), R (1, 1), and G (2, 1). Similarly, one scanning line is connected to each of the display cells arranged in one row in the display cell group arranged in a matrix. The signal line D101 is connected to the display cells B (1,1), G (1,1), B (1,2), G (1,2). Similarly, one signal line is connected to each of the display cells arranged in one column in the display cell group arranged in a matrix. However, the signal lines may be arranged in a zigzag manner so that the subpixels of the same color are connected to the same signal line.

  In the display panel 110, for example, when a signal is supplied to the display cell R (1,1), the scanning line G101 is selected by applying a selection voltage to the scanning line G101 from the scanning line driving circuit 130, and scanning line driving is performed. A non-selection voltage is applied from the circuit 130 to the scanning lines other than the scanning line G101 so that the scanning lines other than the scanning line G101 are in a non-selected state, and a gradation signal is applied from the signal line driver circuit 120 to the signal line D102. At this time, in parallel with applying the grayscale signal to the display cell R (1, 1), the grayscale signal is appropriately applied to each signal line, whereby all the display cells connected to the scanning line G101 are applied. It is possible to give signals all at once. The operation of supplying signals to all three display cells constituting one pixel is completed by sequentially selecting two scanning lines and driving the signal lines. That is, the operation of updating the display data for one line of the video signal is realized by scanning two scanning lines. In the display device 100 of the present invention, the number of scanning lines is increased as compared with the conventional stripe arrangement, but the number of signal lines can be reduced. Since the scanning line driving circuit 130 is configured by a shift register or the like, the structure thereof is simple. However, the signal line driving circuit 120 includes a latch circuit that latches display data and a generation circuit that generates a plurality of gradation signals in advance. Since the display data is composed of a conversion circuit for converting display data into gradation signals, the structure is complicated. As the number of scanning lines increases, the number of scanning line driving circuits 130 increases and becomes complicated. However, since the structure of the scanning line driving circuit 130 is originally simple, there is no problem for the entire display device 100. By reducing and simplifying the number of signal line driving circuits 120 by decreasing the number, the circuit configuration of the entire display device 100 is simplified.

  Next, an example of a method for driving the display device 100 of the present invention will be described.

  FIG. 3 is an example of a timing chart showing a driving method of the scanning line group and the signal line group of the display panel 110 to which the present invention is applied.

  In the example shown in FIG. 3, gradation signals corresponding to two or more colors are applied to the same signal line. In the example illustrated in FIG. 3, the scanning lines G101 to G106 are driven to take binary voltage values of H and L. When selecting a scanning line, a voltage (selection voltage) H is applied to the scanning line. When the scanning line is not selected, a voltage (non-selection voltage) L is applied to the scanning line. However, three or more voltage values may be used. The signal lines D101 to D106 are driven so as to associate the intensity of the gradation signal with the value of the display data and adjust the intensity of the gradation signal (for example, associate the value of the display data with the voltage value of the signal line). ). In the example of FIG. 3, for example, when expressed as R (x, y), the gradation corresponding to the display data of red (R) of the xth pixel along the scanning line and the yth pixel along the signal line. Indicates that a signal is applied to the corresponding signal line.

  When the display data of the display panel 110 is updated (rewritten), the signal lines and the scanning lines are driven as follows. Assuming that the cycle for updating the display data is one frame period (a period in which all pixels for one screen are scanned), it is preferable to select each scanning line once in one frame period. However, each scanning line may be selected twice or more within one frame period. Then, in synchronization with the period during which each scanning line is selected, a gradation signal is appropriately applied to each signal line. More specifically, for example, during a period in which the scanning line G101 is selected, the gradation signal is applied to the signal lines D101 to D106 all at once in synchronization with the selection of the scanning line G101, and all of the lines connected to the scanning line G101 are selected. A gradation signal corresponding to display data is given to the display cell. Next, the scanning line G101 is deselected, the scanning line G102 is subsequently selected, and the gradation signal is applied to the signal lines D101 to D106 at the same time in synchronization with the selection of the scanning line G102. Give a key signal. The same operation is sequentially performed on all the scanning lines to update the data of the entire display panel 110. The plurality of scanning lines are scanned according to the scanning cycle, and a period during which each scanning line is scanned is one scanning period. The driving method of the scanning line group and the signal line group of the display device of the present invention has been described above with reference to FIG.

  Next, a configuration example of the control circuit of the display device of the present invention will be described.

  FIG. 4 is a diagram illustrating a configuration example of the control circuit 140 of the display device 100 of the present invention. The control circuit 140 has a function of receiving an input of a video signal 150 from an external device (for example, a PC main body or a mobile phone main body) and controlling the signal line driving circuit 120 and the scanning line driving circuit 130 according to the video signal. . The video signal 150 may be input serially or may be input in parallel. The control circuit 140 includes R, G, B for the first pixel, R, G, B for the second pixel, R, G, B,. . . R, G, B,. . . (M + 1) pixel R, G, B, (M + 2) pixel R, G, B, (M + 3) pixel R, G, B,. . . R, G, B,. . . The video signal 150 (display data) is input in the order of R, G, and B of the (M × N) pixel. The control circuit 140 rearranges the video signal 150 (display data) so that the first pixel B, R, the second pixel G, the third pixel B, R,. . . G,. . . (M + 1) th pixel G, (M + 2) th pixel B, R, (M + 3) th pixel G,. . . B, R,. . . The video signal 150 (display data) is input in the order of G of the (M × N) pixel. M (natural number) is the number of pixels in the scanning line direction (line direction), and N (natural number) is the number of pixels in the signal line direction (column direction).

  The control circuit 140 includes a timing conversion circuit 480, a data conversion circuit 490, a signal reception circuit 410, a signal transmission circuit 420, a timing signal generation circuit 430, and delay elements 441 to 443.

  The video signal 150 is input from an external device of the display device 100 to the display device 100 by appropriate transmission means. The video signal 150 includes, for example, RGB display data and a timing signal. The timing signal is, for example, a horizontal synchronizing signal, a vertical synchronizing signal, a data valid period signal indicating valid / invalid of display data, and the like. The signal receiving circuit 410 receives an input of the video signal 150 and extracts RGB display data (451 to 453) and a timing signal 450 from the video signal 150. The timing conversion circuit 480 converts the timing signal 450 extracted from the video signal 150 into a timing signal 460 in a format suitable for the display device. Specifically, in order to absorb the difference between the number of signal lines and the number of scanning lines between the conventional stripe arrangement and the display device 100 of the present invention shown in FIG. Adjust the number of times. The timing signal generation circuit 430 generates a signal line driver circuit timing signal 470 and a scanning line driver circuit timing signal 474 from the timing signal 460 converted by the timing conversion circuit 480. The data rearrangement circuit 490 rearranges the display data (451 to 453) extracted from the signal reception circuit 410 and converts the display data (461 to 463) into a format suitable for the display device 100. Specifically, in order to absorb the difference between the number of signal lines and the number of scanning lines between the conventional stripe arrangement and the display device 100 of the present invention as shown in FIG. Sort display data for The delay elements 441 to 443 are flip-flops, line memories, etc., and the display data 461 to 463 are moderately adjusted in order to adjust the phase between the timing signals 470 and 474 generated by the timing signal generation circuit 430 and the display data. The output display data 471 to 473 is generated by delaying. The signal transmission circuit 420 generates a signal line drive circuit control signal 160 from the signal line drive circuit timing signal 470 generated by the timing signal generation circuit 430 and the RGB display data 471 to 473, and uses appropriate transmission means. The data is transmitted to the signal line driver circuit 120. The signal transmission circuit 420 generates the scanning line driving circuit control signal 170 from the scanning line driving circuit timing signal 474 generated by the timing signal generation circuit 430, and transmits the scanning line driving circuit control signal 170 to the scanning line driving circuit 130 by an appropriate transmission unit. Note that a conversion circuit that outputs the serially input video signal 150 in parallel may be further provided. In this case, it is preferable that each pixel is output in parallel, that is, three subpixels included in the pixel are output serially. As described above, by providing the timing conversion circuit 480 and the data conversion circuit 490 in the control circuit 140, the transmission side system (not shown) of the video signal, the signal line driving circuit 120, and the scanning line driving circuit 130 can achieve the present invention. There is no need to use a display device 100 having a new function, and a display device equivalent to the conventional display device 600 can be used. 4 shows an example in which the timing conversion circuit 480 and the data conversion circuit 490 are provided inside the control device 140, but the outside of the control device 140, for example, a video signal transmission side system (not shown). And the controller 140 may be provided separately. The control circuit of the display device of the present invention has been described above with reference to FIG.

  Next, the configuration and operation of the data conversion circuit 490 shown in FIG. 4 will be described in more detail. FIG. 5 is a diagram illustrating a configuration example of the data conversion circuit 490.

  The data conversion circuit 490 has a function of rearranging and outputting input display data (shown as examples of R, G, and B in FIG. 5). The data conversion circuit 490 includes a first stage switch circuit group 511 to 513, a second stage switch circuit group 521 to 523, a third stage switch circuit group 531 to 533, and a line memory group 541 to 546. Prepare. Each of the line memories 541 and 542 stores R display data for one line, each of the line memories 543 and 544 stores G display data for one line, and each of the line memories 545 and 546 One line of B display data is stored. The line memories 541 to 546 are used for holding the input video signal in units of one line, reading it after being delayed for an appropriate period, and using it. For this purpose, the line memories 541 to 546 have a function of writing display data for at least one line of the input video signal, holding it for a predetermined period, and reading it at an appropriate timing. A switch circuit and a line memory are prepared for each color of display data. The first-stage switch circuit groups 511 to 513 select a line memory in which input display data is written. The switch circuit group in the first stage is switched every time data for one line is input. For example, a horizontal synchronization signal extracted from the input video signal can be used as a means for measuring the switch switching timing. The second-stage switch circuit groups 521 to 523 select a line memory from which display data is read. The second-stage switch circuit switches every time data for one line is input. For example, a horizontal synchronization signal extracted from the input video signal can be used as a means for measuring the switch switching timing. At this time, the first-stage switch circuit group and the second-stage switch circuit group always select different line memories, and configure the circuit so that the same line memory is not selected at the same time. Data write operation and read operation can be executed in parallel. The third-stage switch circuit groups 531 to 533 select one of the two colors from the display data selected by the second-stage switch circuit group. The switch circuit group in the third stage is switched every time data for one pixel is input.

  Here, as described above, the display device 100 of the present invention sequentially scans two scanning lines when updating one line of display data. Therefore, access to the line memories 541 to 546 is performed in parallel with writing the display data of one line to a certain line memory once, and the previous one line stored in the line memory paired with that line memory. The display data is read out twice. For example, the line memory 541 and the line memory 542 are configured as a pair, and the display data of the previous line held from the line memory 542 is read out in parallel with writing the display data to the line memory 541. Conversely, when display data is written to the line memory 541, the display data of the previous line held from the line memory 541 is read. As a result, as shown in the timing chart of FIG. 3, the signal line driver circuit 120 and the scanning line driver circuit 130 can be operated. By configuring the data conversion circuit 490 as described above, it is possible to convert a conventional video signal for stripe arrangement into a format that can be displayed on the display device 100 of the present invention.

  Let M be the number of pixels in the direction along the scanning line (for example, the row direction), and N be the number of pixels in the direction along the signal line (for example, the column direction). When displaying display data constituting one screen with M × N (M and N are natural numbers) pixels, M × 3 (RGB) × N sub-pixels (display cells) are required. In that case, the display device 100 of the present invention requires M × 3/2 signal lines and N × 2 scanning lines. The total number of signal lines and scanning lines is M × 3/2 + N × 2. For example, M = 1600 and N = 1200. In the case of displaying this on the display panel 110 (row direction mosaic arrangement) of the present invention, 2400 signal lines and 2400 scanning lines may be used for a total of 4800 driving wirings.

  On the other hand, in the stripe arrangement disclosed in FIG. 2 of Patent Document 2, a total of 6000 wirings are required for 4800 signal lines and 1200 scanning lines. Further, in the column direction mosaic arrangement disclosed in Patent Document 1, a total of 5000 wires are required for 3200 signal lines and 1800 scanning lines. Further, in the mosaic arrangement disclosed in FIGS. 3 and 4 of Patent Document 2 and FIG. 13 of Patent Document 3, a total of 6000 wirings are required for 4800 signal lines and 1200 scanning lines. Therefore, according to the present invention, since the L-shaped pixels are combined in the direction in which the number of pixels is large, that is, the direction along the scanning line (for example, the row direction), the number of wirings can be reduced. In particular, since the number of signal lines can be reduced, the number of signal line driving circuits can be reduced, the configuration of the signal line driving circuit can be simplified, and the configuration of the entire display device can be simplified.

  The cost per wiring is higher in the signal line driving circuit than in the scanning line driving circuit. This is because, as shown in FIG. 3, the scanning line driving circuit can take a binary value of a selection voltage and a non-selection voltage in principle, and can be realized with a relatively simple circuit. On the other hand, since the signal line driver circuit needs to generate and drive gradation signals having a plurality of intensities in accordance with display data, it needs to be configured in various combinations such as a digital-analog conversion circuit and a hold circuit. And the circuit becomes complicated. Therefore, when two types of display devices with the same resolution and different numbers of signal lines and scanning lines are compared, it can be said that a display device with a small number of signal lines is more advantageous for cost reduction.

  However, if the present invention is applied, the number of wirings is not necessarily reduced in all resolution panels. Depending on the resolution, the conventional configuration may be better. The number of wires is smaller in the configuration of the present invention than in the conventional configuration, that is, the present invention can be effectively applied when the resolution of the display panel satisfies the following conditions. When the resolution of the display panel is M × N, the number of wirings in the conventional stripe arrangement is expressed by Equation 1.

M × 3 + N ・ ・ ・ Equation 1
On the other hand, the number of wires in the row direction mosaic arrangement of the present invention is represented by Formula 2.

M × 3/2 + N × 2 ... Equation 2
In order for the value of Equation 2 to be smaller than Equation 1, the following Equation 3 must be satisfied.

M × 3 + N ≧ M × 3/2 + N × 2 (Equation 3)
Rearranging Equation 3 yields Equation 4.

M / N ≥ 2/3 ... number 4
When the display device has a resolution of Equation 4, that is, when the ratio of the number of pixels in the scanning line direction to the number of pixels in the signal line direction is 2/3 or more, the row direction of the present invention is more than the conventional stripe arrangement configuration. The mosaic arrangement can reduce the total number of wires.

  For example, the aspect ratio of video signals for analog terrestrial television broadcasting, personal computer monitors, and the like is often horizontal: vertical = 4: 3. In this case, when the scanning line is wired in the horizontal direction (that is, the horizontal direction) and the signal line is wired in the vertical direction (that is, the vertical direction), M / N = 4/3, and the condition of Equation 4 is satisfied. . Further, even when the vertical and horizontal directions are transposed, the scanning lines are wired in the vertical direction (that is, the vertical direction), and the signal lines are wired in the horizontal direction (that is, the horizontal direction), M / N = 3/4. The present invention is suitable because the configuration of (4) satisfies the condition of Equation (4). Apart from this, in many video signals such as high-definition broadcasting, the aspect ratio is horizontal: vertical = 16: 9. In this case, when the scanning line is wired in the horizontal direction (that is, the horizontal direction) and the signal line is wired in the vertical direction (that is, the vertical direction), M / N = 16/9 and the condition of Equation 4 is satisfied. Therefore, the present invention is suitable. However, in the case of this aspect ratio, in the case of a configuration in which the vertical and horizontal directions are transposed, M / N = 9/16, which does not satisfy the condition of Equation 4, and thus is not suitable for applying the present invention. However, it is not a big problem because it is rare to transpose and wire in this way. This is because the signal lines are arranged in the horizontal direction and the signal lines are arranged in the vertical direction, and the signal lines are arranged in the vertical direction, which is a natural configuration according to the existing video signal configuration method, that is, the display data transmission sequence. This is because the display device can be configured at low cost without the need for parts.

  Next, a method for arranging the sub-pixels of the first color, the second color, and the third color constituting the pixel of the display device of the present invention will be described.

  FIG. 6 is a diagram showing some examples of the arrangement method of the sub-pixels of three colors of the display device of the present invention. Arrangement methods other than the example shown in FIG. 6 are also possible. Although FIG. 6 shows an example in which red (R), green (G), and blue (B) are selected as the first to third sub-pixels, other colors may be used. Absent.

  As shown in FIG. 6, various arrangements of the sub-pixels of the three colors are possible. At this time, in any arrangement method, the number of pixels, the number of sub-pixels, the number of signal lines, and the number of scanning lines are the same. However, when configured as a display device, the visual characteristics perceived by humans are slightly different. The main differences are resolution and color development.

  For example, when an oblique thin straight line is displayed on the display device depending on the arrangement method, the line may be interrupted and appear to be a dotted line, or the outline may appear jagged when displaying characters, compared to a conventional display device. is there. Alternatively, depending on the arrangement method, the color may change and be perceived as compared with a conventional display device. In such a case, it is necessary to take measures to obtain a desired color by adjusting the coloring characteristics of each sub-pixel. Since these characteristics depend on the shape, size, color development characteristics, viewing angle characteristics, etc. of the display cell of the display device, an appropriate arrangement method should be selected in view of the above phenomenon when determining the arrangement method. Is desirable. In addition, some subpixel arrangement methods cannot be realized by the data rearrangement circuit illustrated in FIG. 5, but even in that case, it can be realized by slightly changing the arrangement order of the switch circuits and the wiring path in FIG. is there.

  As described above, according to the present invention, since the number of wirings is reduced, the number of drive circuits for driving the wirings can be reduced. That is, since the number of parts can be reduced, there is an advantage that it can be configured at low cost without degrading the resolution as compared with the conventional display device. Further, since the number of wirings is small, there is an advantage that the operation of connecting the wirings of the driving circuit and the display panel becomes easy. In addition, since the number of wirings is small, the area of the wiring portion in the display panel can be reduced. Since the wiring portion hinders improvement in luminance, the luminance of the entire display panel can be increased when the number of wiring portions is small. For example, when the present invention is applied to a TFT liquid crystal display panel, there is an advantage that the aperture ratio can be improved and the luminance can be improved without impairing the resolution.

1 is a diagram illustrating a configuration example of an active matrix display device to which the present invention is applied. It is a figure which shows the example of 1 structure of the display panel used for the display apparatus of this invention. It is a figure which shows an example of the drive method of the scanning line group of a display apparatus of this invention, and a signal line group. It is a figure which shows the example of 1 structure of the control circuit of the display apparatus of this invention. It is the figure which showed one structural example of the data rearrangement circuit used for the control circuit of the display apparatus of this invention. It is a figure which shows some examples of the arrangement | positioning method of the subpixel of 3 colors of the display apparatus of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Display apparatus 110 ... Display panel 120 ... Signal line drive circuit 130 ... Scan line drive circuit 140 ... Control circuit 150 ... Video signal 160 ... Signal line drive circuit control signal 170 ... Scan line drive circuit control signal D101-D106 ... Signal line G101 to G106 Scanning line

Claims (15)

A display panel having a plurality of signal lines, a plurality of scanning lines, the plurality of signal lines, and a plurality of pixels connected to the plurality of scanning lines and arranged in a matrix, and according to display data input from the outside A display device comprising: a signal line driving circuit for supplying a gradation signal to the pixel via the signal line; and a scanning line driving circuit for supplying a scanning signal for selecting the pixel to the pixel via the scanning line. In
Each pixel contains 3 subpixels,
A first pixel including three subpixels arranged in an L shape and a second pixel including three subpixels arranged in an inverted L shape are arranged adjacent to each other in the scanning line direction. A display device. The first pixel includes first, second and third subpixels;
The second pixel includes fourth, fifth and sixth sub-pixels;
The first, second and sixth sub-pixels are connected to a first scan line;
The fourth, fifth and third subpixels are connected to a second scan line;
The first and third sub-pixels are connected to a first signal line;
The second and fourth sub-pixels are connected to a second signal line;
The display device according to claim 1, wherein the sixth and fifth subpixels are connected to a third signal line. The first and fourth subpixels are a first color of red, green, and blue,
The second and fifth sub-pixels are a second color of red, green, and blue;
The display device according to claim 2, wherein the third and sixth sub-pixels are a third color of red, green, and blue. The first pixel and the second pixel form a square containing 3 × 2 sub-pixels;
4. The display device according to claim 2, wherein the first, the sixth, the third, and the fifth subpixel are located at each vertex of the square. 5.   The display data input from the outside in the order of the first, the second, the third, the fourth, the fifth, and the sixth sub-pixel are converted into the first, the second, and the sixth, respectively. 4. The display device according to claim 2, further comprising a control circuit that rearranges the subpixels in order, and rearranges the third, fourth, and fifth subpixels in order after one scanning period. . The display panel has (M × N) (M and N are natural numbers) pixels,
The number of signal lines is (M × 3/2),
The display device according to claim 1, wherein the number of scanning lines is (N × 2).   The display device according to claim 6, wherein the scanning line driving circuit scans the (N × 2) scanning lines once for each frame period.   The display device according to claim 6, wherein M / N ≧ 2/3. In a display panel having a plurality of signal lines, a plurality of scanning lines, and a plurality of pixels arranged in a matrix connected to the plurality of signal lines and the plurality of scanning lines,
Each pixel contains 3 subpixels,
A first pixel including three subpixels arranged in an L shape and a second pixel including three subpixels arranged in an inverted L shape are arranged adjacent to each other in the scanning line direction. A display panel characterized by The first pixel includes first, second and third subpixels;
The second pixel includes fourth, fifth and sixth sub-pixels;
The first, second and sixth sub-pixels are connected to a first scan line;
The fourth, fifth and third subpixels are connected to a second scan line;
The first and third sub-pixels are connected to a first signal line;
The second and fourth sub-pixels are connected to a second signal line;
The display panel according to claim 9, wherein the sixth and fifth subpixels are connected to a third signal line. The first and fourth subpixels are a first color of red, green, and blue,
The second and fifth sub-pixels are a second color of red, green, and blue;
The display panel according to claim 10, wherein the third and sixth sub-pixels are a third color of red, green, and blue. The first pixel and the second pixel form a square containing 3 × 2 sub-pixels;
12. The display panel according to claim 10, wherein the first, the sixth, the third, and the fifth sub-pixel are positioned at each vertex of the square.   The display data input from the outside in the order of the first, the second, the third, the fourth, the fifth, and the sixth sub-pixel are converted into the first, the second, and the sixth, respectively. 12. The display panel according to claim 10, further comprising a control circuit that rearranges the subpixels in order, and rearranges the third, fourth, and fifth subpixels in order after one scanning period. . The display panel has (M × N) (M and N are natural numbers) pixels,
The number of signal lines is (M × 3/2),
The display panel according to claim 9, wherein the number of scanning lines is (N × 2). The display panel according to claim 14, wherein M / N ≧ 2/3.

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