JP2006526806A - Fabrication of a high-filling reflective spatial light modulator with a hidden hinge - Google Patents

Abstract

The present invention relates to the fabrication of micromirror arrays with hidden hinges, which are useful, for example, for reflective spatial light modulators. In one embodiment, the micromirror array is made from a substrate that is a first substrate made of a single crystal material. A cavity is formed on the first side of the first substrate. Also, independently of this, electrodes and addressing and control circuits are fabricated on the first side of the second substrate. Next, the first side of the first substrate is bonded to the first side of the second substrate. Both sides are aligned so that the electrode on the second substrate and the mirror plate made on the first substrate, which the electrode will control, are in an appropriate relationship. In addition, the first substrate is thinned to the desired thickness, the hinge is etched, the sacrificial material is deposited, the top surface of the first substrate is planarized, and the reflective surface is deposited to cover the hinge. The sacrificial layer around the hinge is removed to release the hinge so that the mirror is released by etching and the hinge can rotate about an axis along the hinge.

Description

[Cross-reference of related applications]
This application is entitled “Hidden Hinge High Fill Ratio Reflective Spatial Light Modulator” and is filed June 2, 2003, US Provisional Patent Application No. 60/475, filed June 2, 2003. 404 priority is claimed and incorporated herein by reference.

  The present invention relates to spatial light modulators (SLMs), and more particularly, micros with hidden hinges to maximize pixel fill factor, minimize scattering and diffraction, and achieve high contrast ratios and high image quality. It relates to the mirror structure.

  Spatial light modulators (SLMs) have many applications in the fields of optical information processing, projection displays, video and graphics monitors, television, and electrophotographic printing. The reflective SLM modulates incident light into a spatial pattern and reflects an image corresponding to an electrical input or an optical input. This incident light may modulate the phase, intensity, polarity, or deflection direction. A reflective SLM is usually composed of addressable pixels (pixels) in a planar or two-dimensional array that can reflect incident light. An important parameter of the SLM, especially for display applications, is the ratio of the optically available area to the pixel area (also determined as the ratio of the SLM's reflective surface area to the total surface area of the SLM, Also called "rate"). Therefore, a high filling rate is desirable.

  Prior art SLMs have various drawbacks. These various disadvantages include, but are not limited to: (1) underutilized optical area that reduces optical efficiency, and (2) undulations that reduce mirror reflectivity. Reflective surfaces, (3) diffraction and scattering that reduce the contrast ratio of the display, (4) use of materials with long-term reliability challenges, and (5) complexity that increases costs and reduces device yield. Manufacturing process.

  Many prior art devices include areas that are substantially non-reflective on the surface. This results in a low filling factor and underreflection efficiency. For example, U.S. Pat. No. 4,229,732 discloses a MOSFET element formed on the surface of the device in addition to the mirror. Since this MOSFET element blocks the surface area, the percentage of optically available device area is reduced, resulting in a reduction in reflection efficiency. The MOSFET elements on the device surface also diffract incident light, which reduces the contrast ratio of the display. Furthermore, a MOSFET element exposed to intense light interferes with the normal operation of the device because the MOSFET element is charged and the circuit overheats.

  Some SLM designs have undulating surfaces that scatter incident light and reduce reflection efficiency. For example, in some SLM designs, the reflective surface is an aluminum film deposited on a silicon nitride layer formed by LPCVD. Since these are deposited as a thin film, it is difficult to control the flatness of the reflecting mirror surface. Thus, the final product has a rough surface, which reduces the reflection efficiency.

  Another challenge for reducing the reflection efficiency associated with some SLM designs, especially for designs using some hanging mirrors, is the large exposed hinge surface area. Scattering and diffraction occur due to the hinge structure of this highly exposed hinge surface area, which adversely affects the contrast ratio, among other parameters.

  Many conventional SLMs, such as the SLM disclosed in US Pat. No. 4,566,935, have a hinge made of an aluminum alloy. Aluminum, like other metals, is susceptible to fatigue and plastic deformation, creating problems in long-term reliability. Aluminum is also susceptible to cell “memory” and the stop position begins to tilt to the most occupied position. Further, the mirror disclosed in US Pat. No. 4,566,935 is released by removing the sacrificial material underlying the mirror surface. This technique often destroys the delicate micromirror structure during the release process. Also, in order to remove the sacrificial layer under the mirror with the etchant, a large gap is required between the mirrors, and as a result, the proportion of the optically available device area is reduced.

  Other conventional SLMs require multiple layers, including individual layers, for mirrors, hinges, electrodes, control circuitry, or combinations thereof. Manufacturing such a multilayer SLM requires techniques and processes for stacking thin films in multiple layers, and etching techniques and processes for multilayer thin films. If such a technique or process is used, the cost increases and the yield decreases. For example, the use of such techniques often results in the sacrificial material under the mirror plate being deposited and removed many times. When thin films are deposited and stacked under the mirror plate, the undulations on the mirror surface are usually greater, resulting in a reduction in mirror reflection efficiency. Further, having the mirror and hinge on different layers or substrates causes translational displacement when the mirror deflects. Because of this translational displacement, the mirrors in the array must be spaced to prevent mechanical interference between adjacent mirrors. The mirrors in this array cannot be placed very close to other mirrors in the array, so this SLM suffers from an underutilized optical area or low fill factor.

  Accordingly, there is a need for an SLM that improves reflection efficiency, has long-term reliability, and uses a simpler manufacturing process.

  The present invention relates to a spatial light modulator (SLM). In one embodiment, the SLM is a selectively deflectable reflective micromirror array made from a first substrate bonded to a second substrate having individually addressable electrodes. It has a micromirror array. The second substrate may also include an addressing / control circuit for the micromirror array. Alternatively, a part of the addressing / control circuit may be on another substrate and connected to the circuit and the electrode of the second substrate.

  The micromirror array includes a deflectable mirror plate having a highly reflective reflecting surface for reflecting incident light and capable of controlling deflection. The mirror plate is connected to the hinge by a connector. This hinge is then coupled to a spacer support frame with a spacer support wall. The hinge is substantially hidden under the reflecting surface. By hiding this hinge substantially beneath the reflective surface, all scattering and diffraction by light incident on and reflected from the exposed hinge structure is eliminated, thus maximizing the contrast ratio of the device.

  The mirror plate, the connector, the hinge, the spacer support frame, and the spacer support wall are made from a first substrate. The first substrate is a wafer made of a single material, for example, single crystal silicon in one embodiment. The spacer support wall controls the deflection of the mirror plate and the mirror plate and separates the electrode corresponding to the mirror plate. The electrode is positioned on the second substrate, and the second substrate is bonded to the micromirror array.

  Since the hinge and the mirror plate are in the same substrate (ie, in the same layer), there is no translational motion or translational displacement as the mirror rotates about the long axis of the hinge. Since there is no translational displacement, the distance between the mirror and the support wall is limited only by fabrication techniques and processes. Narrow spacing between the mirror plates and concealing the hinges by placing the hinges substantially below the reflective surface increases the micromirror array, increases the contrast ratio, Scattering of light and diffraction can be minimized, and light passing through the micromirror array and incident on the circuit on the second substrate can be substantially removed.

  Furthermore, since the mirror plate and the hinge are made from a single crystal silicon material in a preferred embodiment, the hinge made is more robust and more reliable, and also has a memory effect, grain boundaries. There is virtually no drawback of fracture or fatigue. The single crystal silicon substrate is substantially free from microscopic defects and cracks compared to other materials, especially thin films formed by deposition. As a result, it is unlikely to break (or propagate microscopic breaks) along the device grain boundaries. Also, by using a single substrate as in the present invention, processes and techniques for stacking thin films in multiple layers and etching processes and techniques for multilayer thin films require minimal use. In the present invention, the deposition and removal of the sacrificial material is limited to a local area, i.e. around the hinge. Furthermore, in the present invention, it is not necessary to remove the sacrificial material from under the mirror. Therefore, the removal of the sacrificial material is very easy and the upper surface of the mirror plate is kept smooth so that the reflective surface can be added on a very smooth surface.

  Since the SLM is manufactured with a small number of steps, the cost and complexity involved in manufacturing can be suppressed. A cavity is formed on the first side of the first substrate. In parallel, the electrodes and the addressing / control circuit are fabricated on the first side of the second substrate. The first side of the first substrate is bonded to the first side of the second substrate. Both sides are aligned so that the electrode on the second substrate is in proper relationship with the mirror plate that it will control. The first substrate is thinned to the desired thickness, the hinge is etched, the sacrificial material is deposited in the area around the hinge, the surface is flattened, and the reflective surface is deposited to cover the hinge. Then, the mirror plate is released by etching, and the sacrificial layer around the hinge is removed.

  The net result is an SLM that can achieve high optical efficiency and high performance and can be easily manufactured to form high quality images with high reliability and high cost efficiency.

A reflective spatial light modulator (SLM) 100 has an array 103 consisting of deflection mirrors 202. Each mirror 202 can be selectively deflected by applying a voltage bias between the mirror 202 and the corresponding electrode 126. This deflection of each mirror 202 controls the light reflected from the light source to the video display. Therefore, by controlling the deflection of the mirror 202, the light impinging on the mirror 202 can be deflected in a selected direction, thereby controlling the on / off of the pixels of the video display.
Overview of spatial light modulator

  FIG. 1 is a schematic diagram illustrating a schematic structure of an SLM 100 according to an embodiment of the present invention. This illustrated embodiment has three layers. The first layer is a mirror array 103 and has a plurality of deflecting micromirrors. In a preferred embodiment, the micromirror 103 is fabricated from a first substrate 105 that becomes a single material such as single crystal silicon used in the SLM 100 upon completion of substrate fabrication. .

  The second layer is an electrode array 104 having a plurality of electrodes 126 for controlling the micromirror 202. Each electrode 126 corresponds to the micromirror 202 and controls the deflection of the micromirror 202. An addressing circuit can select that single electrode 126 to control a particular micromirror 202 corresponding to that electrode 126.

  The third layer is a layer of the control circuit 106. The control circuit 106 includes an address designating circuit, and the control circuit 106 can control the voltage applied to the selected electrode 126 by the address designating circuit. Thereby, the control circuit 106 can control the deflection of the mirror 202 of the mirror array 103 via the electrode 126. Typically, the control circuit 106 also includes a display controller 108, line memory buffer 110, pulse width modulation array 112, and video signal 120 and graphics signal 122 inputs. In some embodiments, the mirror controller 114, the optical control circuit 116, and the flash memory 118 may be external components connected to the control circuit 106, or are included in the control circuit 106. May be. Depending on the various embodiments, some of the above components of the control circuit may not be present, may be on a separate board connected to the control circuit, or additional components may be included in the control circuit 106. As a part of the control circuit 106, or may be connected to the control circuit 106.

  In one embodiment, the second layer 104 and the third layer 106 are both fabricated on a single second substrate 107 using semiconductor fabrication techniques. That is, the second layer 104 does not necessarily need to be separated from the third layer 106 and does not have to be on the third layer 106. Rather, the term “layer” is intended to help conceptually describe the different parts of the spatial light modulator 100. For example, in one embodiment, the electrode 126 of the second layer 104 and the control circuit 106 of the third layer are both fabricated on a single second substrate 107. That is, in one embodiment, the electrodes 126 are all fabricated on a single substrate, similar to the display controller 108, the line memory buffer 110, and the pulse width modulation array 112. Conventional spatial light modulation with display controller 108, line memory buffer 110, and pulse width modulation array 112 fabricated on another substrate by integrating multiple functional components of control circuit 106 on the same substrate The effect that the data transfer rate is improved is realized for the device. Further, if the second-layer electrode array 104 and the third-layer control circuit 106 are formed on a single substrate 107, the advantages of a simple and inexpensive manufacturing process and the miniaturization of the final product are realized. .

  Once layers 103 and 107 are made, they are joined together to form SLM 100. The first layer provided with the mirror array 103 covers the second and third layers 104 and 106 together as 107. The area under mirror 202 in mirror array 103 determines how much space for electrode 126 and addressing and control circuit 106 is below first layer 103. Under the micromirror 202 of the mirror array 103, there is only a limited space to house the electrodes 126, the electronic components that form the display controller 108, the line memory buffer 110, and the pulse width modulation array 112. The present invention uses a fabrication technique that enables fabrication of small shapes, such as, for example, a process that allows fabrication of a 0.18 micron shape and a process that allows fabrication of a shape of 0.13 microns or less. The conventional spatial light modulator is manufactured by a manufacturing process in which such a small shape cannot be manufactured. Conventional spatial light modulators are typically made with a fabrication process that limits the shape to about 1 micron or more. Therefore, according to the present invention, more circuit elements such as transistors can be manufactured in a limited area under the micromirrors in the mirror array 103. This allows components such as the display controller 108, line memory buffer 110, and pulse width modulation array 112 to be integrated on the same substrate as the electrode 126. By including such a control circuit 106 on the same substrate 107 as the electrode 126, the performance of the SLM 100 is improved. This allows more components, such as display controller 108, line memory buffer 110, and pulse width modulation array 112, to be confined on the same substrate as electrode 126 and below the micromirrors in micromirror array 103. It becomes possible to integrate into the space. By including such a control circuit 106 on the same substrate 107 as the electrode 126, the performance of the SLM 100 is improved. In other embodiments, the electrodes 126 and each component in the control circuit may be made on different substrates and electrically connected in various combinations.

In other embodiments, the electrodes 126 and each component in the control circuit may be made on different substrates and electrically connected in various combinations.
mirror

  2a is a perspective view of one embodiment for one micromirror 202, and FIG. 2b is a more detailed perspective view of a corner 236 of the micromirror 202 shown in FIG. 2a. In one embodiment, the micromirror 202 includes at least one mirror plate 204, hinge 206, connector 216, and reflective surface 203. In another embodiment, the micromirror 202 further includes a spacer support frame 210 that supports the mirror plate 204, the hinge 206, the reflective surface 203, and the connector 216. The mirror plate 204, hinge 206, connector 216, and spacer support frame 210 are preferably made from a single material wafer such as single crystal silicon. Therefore, in this embodiment, the first substrate 105 shown in FIG. 1 is a single crystal silicon wafer. By fabricating the micromirror 202 from a single material wafer, the fabrication of the mirror 202 is greatly simplified. Further, by polishing single crystal silicon, it is possible to generate a flat mirror surface having a surface roughness that is one order of magnitude smoother than the deposited thin film. The mirror 202 made from single crystal silicon is mechanically rigid, so there is no unnecessary bending or warping on the mirror surface, and the hinge made from single crystal silicon is more robust. Hinges made with many other materials used in micromirror arrays are more reliable and have the disadvantages of memory effects, fracture along grain boundaries, or fatigue that are normally present There is no. In other embodiments, other materials may be used instead of single crystal silicon. One possibility is to use another type of silicon (eg, polysilicon or amorphous silicon) for the micromirror 202, or the mirror 202 can be made entirely of metal (eg, aluminum alloy or tungsten alloy). Is to make. In addition, when a single substrate is used as in the present invention, it is possible to avoid the use of processes and techniques for stacking thin films in multiple layers, and etching processes and techniques for multilayer thin films.

  As shown in FIGS. 2 a, 2 b, 3, 4 a, 4 b, 7 a and 8, and further described above, the micromirror 202 has a mirror plate 204. This mirror plate 204 is part of a micromirror 202 that is coupled to a hinge 206 by a connector 216 and is selectively deflected by applying a voltage bias between this mirror 202 and its corresponding electrode 126. The mirror plate 204 of the embodiment shown in FIG. 3 includes triangular portions 204a and 204b. In the embodiment shown in FIGS. 12a, 12b, 13, the mirror plate 204 is substantially square, approximately 15 microns by 15 microns, and an area of approximately 225 square microns. Of course, other shapes and dimensions are possible. The mirror plate 204 has an upper surface 205 and a lower surface 201. The top surface 205 is preferably a particularly flat surface with a root mean square root roughness less than 2 angstroms, and preferably constitutes the majority of the surface area of the micromirror 204. A reflective surface 203 such as aluminum or other highly reflective material is deposited on the top surface 205 of the mirror plate 204 and on a portion of the hinge 206. The thickness of the reflecting surface 203 is preferably 300 A or less. In addition, the thin reflective surface or material reflects the flat and smooth surface of the upper surface 205 of the mirror plate 204 without fail. The reflecting surface 203 has an area larger than the area of the upper surface 205 of the mirror plate 204 and reflects light from the light source at an angle determined by the deflection of the mirror plate 204. Note that the torsion spring hinge 206 is substantially formed below the upper surface 205 of the mirror plate 204 and is substantially hidden by the reflective surface 203 deposited on the upper surface 205 and on a portion of the hinge 206. I want to be. The difference between FIG. 2a and FIG. 3 is that FIG. 2a shows a mirror plate 204 with a reflective surface 204 provided on the top surface 205 and substantially concealing the hinge 206, whereas FIG. No mirror 203, that is, the mirror plate 204 that exposes the hinge 206 is shown. The hinge 206 and the mirror plate 204 are on the same substrate 105, and as shown in FIGS. 7a and 7b, the center height 796 of the hinge 206 is substantially flush with the center heights 795 and 797 of the mirror plate 204. Thus, there is no translational movement or translational displacement as the mirror 202 rotates about the long axis of the hinge 206. Due to the absence of translational displacement, the clearance between the mirror plate 204 and the support spacer walls of the spacer support frame 210 need only be limited by fabrication technology and process constraints, typically below 0.1 microns. is there. Due to the close spacing between the mirror plates 204 substantially below the reflective surface 203 and the covering of the hinge 206, the micromirror array 103 is highly filled, the contrast ratio is improved, and light scattering and diffraction are minimized. There is an effect that light that passes through the micromirror array 103 and enters the circuit on the second substrate 107 is substantially removed.

  As shown in FIGS. 2 a, 2 b, 3, 4 a, 4 b, 7 a, 8, 12 a, 12 b and 13, the mirror plate 204 is connected to the torsion spring hinge 206 by a connector 216. The torsion spring hinge 206 is connected to the spacer support frame 210, and the spacer support frame 210 holds the torsion spring hinge 206, the connector 216, and the mirror plate 204 in place. The hinge 206 includes a first arm 206a and a second arm 206b. Each arm 206 a, 206 b has both ends, and as shown in FIGS. 3 and 13, one end is connected to the spacer support frame and the other end is connected to the connector 216. In other embodiments, other springs, hinges, and coupling schemes may be used for the mirror plate 204, the hinge 206, and the spacer support frame 210. As shown briefly in FIGS. 3 and 4a, the torsion spring hinge 206 is oriented diagonally (eg, at a 45 degree angle) with respect to the spacer support wall 210 and the mirror plate 204 is in two parts or planes. Divide into That is, the first surface 204a and the second surface 204b. As shown in FIG. 7b, the two electrodes 126 correspond to the mirror 202, one electrode 126a corresponds to the first surface 204a, and the other electrode 126b corresponds to the second surface 204b. Accordingly, any of the surfaces 204a and 204b can be attracted by rotating downward to one of the electrodes 126a and 126b, thereby realizing a wide range of angular motion. The torsion spring hinge 206 causes the mirror plate 204 to apply a voltage between the mirror 202 and the corresponding electrode 126, and when a force such as electrostatic force is applied to the mirror plate 204, the mirror plate 204 is relative to the spacer support frame 210. In addition, it can rotate around the long axis of the hinge 206. This rotation causes an angular displacement in the selected direction with respect to the reflected light. The hinge 206 and the mirror plate 204 are in the same substrate 105, and the center height 796 of the hinge 206 is substantially flush with the center height 795, 797 of the mirror plate 204, as shown in FIGS. 7a and 7b. 795, the mirror 202 makes a pure rotation around the hinge 206 with no translational displacement. In one embodiment, as shown in FIGS. 7a and 8, the torsion spring hinge 206 has a width 222 that is less than the depth 223 of the hinge 206 (perpendicular to the top surface 205 of the mirror plate 204). The width 222 of the hinge 206 is preferably between about 0.12 microns and about 0.2 microns, and the depth 223 is between about 0.2 microns and about 0.3 microns. It is preferable.

  As shown in FIGS. 2 a, 2 b, 3, 4 a, 4 b, 6, and 7 a, the spacer support frame 210 allows the mirror plate 204 to be connected to the electrode 126 so that the mirror plate 204 can be deflected downward at a predetermined angle. And a predetermined distance on the addressing circuit. The spacer support frame 210 is preferably formed from the same first substrate 105 as shown in FIGS. 2a, 4a, 12a and 13, and more preferably includes a spacer support wall located at a right angle. This wall helps define the height of the spacer support frame 210. The height of the spacer support frame 210 is selected based on the desired distance between the mirror plate 204 and the electrode 126 and the three-dimensional design of the electrode. The higher the height, the larger the mirror plate 204 can be deflected, and the larger the maximum deflection angle. Higher contrast ratios are generally achieved with larger deflection angles. In one embodiment, the deflection angle of the mirror plate 204 is 12 degrees. In a preferred embodiment, the mirror plate 204 can rotate as much as 90 degrees if sufficient spacing and drive voltage are provided. The spacer support frame 210 can also support the hinge 206, and ensures a space between the mirror plate 204 and another mirror plate 204 in the mirror array 103. The spacer support frame 210 has a spacer wall width 212. When this width is added to the distance between the mirror plate 204 and the support frame 210, the distance between the adjacent mirror plates 204 of the adjacent micromirrors 202 is substantially equal. Are equal. In one embodiment, the space wall width 212 is 1 micron or less. In one preferred embodiment, the space wall width 212 is 0.5 microns or less. As a result, the mirror plates 204 are closely arranged, and the filling rate of the mirror array 103 increases.

  In some embodiments, the micromirror 202 includes parts 405a, 405b that stop deflection of the mirror plate 204 when the plate 204 deflects downward to a predetermined angle. Typically, this type of component may include motion stoppers 405a, 405b and landing tips 710a, 710b. As shown in FIGS. 4a, 6, 7a, 7b, 8, 13, and 15, when the mirror surface 204 is deflected, the motion stopper 405a or 405b on the mirror plate 204 is moved to the landing tip 710 (either 710a or 710b). ). When this happens, the mirror plate 204 cannot deflect any further. The motion stoppers 405a, 405b and landing tips 710a, 710b have several possible configurations. In the embodiment shown in FIGS. 4a, 6, 7a, 8, 13, and 15, the motion stopper is a cylindrical or mechanical stopper 405a, 405b attached to the lower surface 201 of the mirror plate 204, and the landing tip Reference numeral 710 denotes a corresponding circular region on the second substrate 107. In the embodiment shown in FIGS. 7a, 7b, and 8, the landing tips 710a, 710b are electrically connected to the spacer support frame 210 and thus have a potential difference of zero volts relative to the operating stopper 405a or 405b. 405b prevents sticking or welding to landing tips 710a or 710b, respectively. Therefore, if the mirror plate 204 is to rotate beyond a predetermined angle (determined by the length and position of the mechanical stoppers 405a, 405b) relative to the spacer support frame 210, the mechanical motion stopper 405a or 405b is , Physical contact with each landing chip 710a or 710b prevents the mirror plate 204 from rotating further.

  In a preferred embodiment, the motion stoppers 405a, 405b are made from the first substrate 105 and are made of the same material as the mirror plate 204, hinge 206, connector 216, and spacer support frame 210. The landing tips 710a and 710b are also preferably made of the same material as the motion stoppers 405a and 405b, the mirror plate 204, the hinge 206, the connector 216, and the spacer support frame 210. In an embodiment where this material is single crystal silicon, the motion stoppers 405a, 405b and landing tips 710a, 710b are made from a hard material that is functionally long-lived, so that the mirror array 103 is , Can hold up. Furthermore, since the single crystal silicon is a hard material, the operation stopper 405a or 405b can be made to have a small contact area with the landing chip 710a or 710b, respectively, thereby greatly reducing the adhesive force and the mirror plate. 204 can be freely deflected. This also means that the operation stopper 405a or 405b and the landing tip 710a or 710b are kept at the same potential, so that the operation stopper 405a or 405b and the landing tip 710a or 710b are welded at different potentials. And avoiding sticking that occurs through the charge injection process. The present invention is not limited to the components and techniques described above that stop the deflection of the mirror plate 204. Any part and technique known in the art may be used.

  FIG. 4a is a perspective view showing the back surface of a single micromirror 202, including a support wall 210, a mirror plate 204 (including surfaces 204a and 204b and having an upper surface 205 and a lower surface 201), a hinge 206, a connector 216, And mechanical stoppers 405a and 405b. 4b is a more detailed perspective view of the corner 237 of the micromirror 202 shown in FIG. 4a.

  FIG. 5 is a perspective view showing an upper part and a side part of the micromirror array 103 having nine micromirrors 202-1 to 202-9. FIG. 5 shows a micromirror array 103 having nine micromirrors 202 in three rows and three columns, but micromirror arrays 103 of other scales may be considered. Typically, each micromirror 202 corresponds to a pixel on the video display. Therefore, the larger the array 103 with more micromirrors 202, the more video display with more pixels is realized.

  As shown in FIG. 5, the surface of the micromirror array 103 has a large filling factor. That is, most of the surface of the micromirror array 103 is constituted by the reflection surface 203 of the micromirror 202. A very small portion of the surface of the micromirror array 103 is a non-reflective portion. As shown in FIG. 5, the non-reflective portion on the surface of the micromirror array 103 is a region between the reflective surfaces 203 of the micromirror 202. For example, the width of the region between the mirrors 202-1 and 202-2 includes the width 212 of the spacer support wall and the width of the gap between the mirror plate 204 and the spacer support wall 210 of the mirror 202-1 and the mirror 202-. 2 is determined by the sum of the widths of the gaps between the mirror plate 204 and the spacer support wall 210. Although a single mirror 202 as shown in FIGS. 2a, 2b, 3, 4a, and 4b has been described as having its own spacer support frame 210, typically mirrors 202-1 and 202-2 are used. Note that there are no two individually adjacent spacer walls 210 between such mirrors. On the contrary, there is usually only one physical spacer wall of the support frame 210 between the mirrors 202-1 and 202-2. Since there is no translational displacement when the mirror plate 204 is deflected, the gap and the width of the spacer wall can be made as small as the shape supported by the fabrication technique. Thus, in one embodiment, this gap is 0.2 microns, and in other embodiments, this gap is 0.13 microns or less. Since the semiconductor fabrication technique enables fabrication of a smaller shape, the spacer wall 210 and the gap can be reduced in size and a higher filling rate can be achieved. Embodiments of the present invention allow for high fill rates. In a preferred embodiment, the fill factor will be 96% or higher.

  FIG. 6 is a perspective view showing the bottom and sides of a micromirror array 103 having nine micromirrors. As shown in FIG. 6, the support wall of the spacer support frame 210 of the micromirror 202 defines a cavity below the mirror plate 204. This cavity provides a space for the mirror plate 204 to deflect downwards, and to place a second layer 103 with electrodes 126 and / or a third layer with control circuitry 106. Allocate a large area under the plate 204. FIG. 6 also shows the lower surface 201 of the mirror plate 204 (including the surfaces 204a, 204b), the bottom of the spacer support frame 210, the torsion spring hinge 206, the connector 216, and the operating stoppers 405a, 405b.

  As shown in FIGS. 5 and 6, most of the light in the normal direction of the mirror plate 204 passes through the micromirror array 103 and passes to the electrode 126 and the control circuit 104 under the micromirror array 103. Cannot reach. This is almost complete for the control circuit in which the spacer support frame 210 and the reflective surface 203 on the top surface of the mirror plate 204 and on a part of the hinge are under the micromirror array 103. It is because it covers. Further, since the spacer support frame 210 separates the mirror plate 204 and the circuit under the micromirror array 130, the light that enters the mirror plate 204 at a non-vertical angle and passes through the mirror plate 204 is There is a high possibility that it hits the wall surface of the spacer support frame 204 and does not reach the circuit under the micromirror array 103. Since the strong light incident on the mirror array 193 hardly reaches the circuit, the SLM 100 can avoid the problems associated with the strong light incident on the circuit. This problem includes incident light that heats the circuit and photons of incident light that charges the circuit elements, both of which can cause the circuit to malfunction.

12a is a perspective view of a micromirror 202 according to another embodiment of the present invention, and FIG. 12b is a more detailed perspective view of a corner 238 of the micromirror 202. FIG. The torsion hinge 206 in this embodiment is parallel to the spacer support wall of the spacer support frame 210. The mirror plate 204 is selectively deflected in the electrode direction by applying a voltage bias between the mirror plate 204 and the corresponding electrode 126. In the embodiment shown in FIG. 12a, a narrower range of angular motion is provided even from the same height support wall compared to the mirror 202 with the diagonal hinge 206 shown in FIGS. 2a and 2b. Nevertheless, like the embodiment shown in FIGS. 2a and 2b, the hinge 206 of the embodiment shown in FIGS. 12a and 12b is below the top surface 205 of the mirror plate 204 and is hidden by the reflective surface 204, An SLM 100 with high fill factor, high optical efficiency, high contrast ratio, low degree of light scattering and diffraction, and reliable and cost-effective performance can be realized. FIG. 12 b is a more detailed perspective view of the corners of the micromirror 202 showing the mirror plate 204, the hinge 206, the support wall of the spacer support frame 210, and the reflective surface 203. FIG. 13 shows the back side of a single micromirror 202 that includes a hinge 206, a connector 216, and a motion stop 405a. In other embodiments, the hinge 206 may be substantially parallel to one of the sides of the mirror plate 204 and may be positioned to divide the mirror plate 204 into two portions 405a and 405b. . 14 and 15 show perspective views of a micromirror array composed of a plurality of micromirrors 202 as shown in FIGS. 12a, 12b and 13. FIG.
Fabrication of spatial light modulator

  FIG. 9 a is a flowchart illustrating a preferred embodiment of a method for manufacturing the spatial light modulator 100. FIGS. 9b to 9m are diagrams showing in detail a preferable manufacturing method of the spatial light modulator 100, and FIGS. 16a to 16e are diagrams showing another preferable manufacturing method in combination with FIGS. 9e to 9m. .

  Referring to FIG. 9a, first, a mask is fabricated to partially fabricate the micromirror 202. FIG. A preferred embodiment of this mask 1000 is shown in FIG. 10 and is provided on one side of the first substrate 104 to form a cavity on the back surface of the micromirror array 103 that defines the spacer support frame 210 and support walls. To define the location to be etched. As shown in FIG. 10, the region 1004 of the mask 1000 is a photoresist material that prevents the first substrate 105 from being etched, or other dielectric material including a silicon oxide film or a silicon nitride film. Region 1002 in FIG. 10 is an exposed region of the substrate that is to be etched to form a cavity. The unetched region 1004 remains as it is and forms a spacer support wall of the spacer support frame 210.

  In one embodiment, the first substrate 105 is etched in a reactive ion etching chamber while SF 6 gas, HBr gas, and oxygen gas are flowed at flow rates of 100 sccm, 50 sccm, and 10 sccm, respectively. The pressure during operation is in the range of 10 to 50 mTorr, the bias power is 60 W, and the power output is 300 W. In other embodiments, the first substrate 105 is etched in a reactive ion etch chamber while flowing Cl 2 gas, HBr gas, and oxygen gas at flow rates of 100 sccm, 50 sccm, and 10 sccm, respectively. In the above embodiment, the etching process ends when the cavity is about 3-4 microns deep. This depth is measured using an in-situ etch depth monitor, such as an in-situ optical interference technique, or by looking at the etch rate.

  In other embodiments, the cavity is formed in the wafer by an anisotropic reactive ion etching process. This wafer is placed in a reaction chamber. SF 6 gas, HBr gas, and oxygen gas are introduced into the reaction chamber at flow rates of 100 sccm, 50 sccm, and 20 sccm, respectively. A bias power setting of 50 W and a power output of 150 W are used for about 5 minutes under conditions of a pressure of 50 mTorr. Next, the wafer is cooled by flowing helium gas at a flow rate of 20 sccm on the back surface at a pressure of 1 mTorr. In one preferred embodiment, the etching process ends when the cavity is about 3-4 microns deep. This depth is measured using an in-situ etch depth monitor, such as an in-situ optical interference technique, or by looking at the etch rate.

  A mask can be formed on the first substrate 105 using a standard technique such as photolithography. As previously mentioned, in one preferred embodiment, the micromirror 202 is formed from a single material, such as single crystal silicon. Thus, in a preferred embodiment, the first substrate 105 is a single crystal silicon wafer. Note that typically multiple micromirror arrays 103 used in multiple SLMs 100 are fabricated on a single wafer and later separated. Since the structure fabricated to form this micromirror array 103 is typically larger than the dimensions used for CMOS circuits, this micromirror array 103 structure can be fabricated using known techniques for fabricating CMOS circuits. It is relatively easy to form.

  FIG. 9B is a cross-sectional view showing the first substrate 105 before fabrication. The substrate 105 first includes an element layer 1615 having a predetermined thickness, an insulating oxide layer 1610, and a handling substrate 1605. The element layer 1615 is located on the first side of the substrate 105, and the handling substrate 1605 is located on the second side of the substrate 105. In a preferred embodiment, device layer 1615 is made of a single crystal silicon material and has a thickness between about 2 microns and about 3 microns. The substrate 105 as shown in FIG. 9b may be fabricated using a standard silicon-on-insulator (SOI) process known in the art, or silicon such as Soitec, Shinetsu, or Silicon Genesis. It may be purchased from a wafer supplier.

  With reference to FIG. 9 b, a shallow cavity 198 is etched into the device layer 1615 on the first side of the first substrate 105. Details of this etching are described above, particularly in paragraphs 59-61. The etching depth is approximately the end of the operation stoppers 405a, 405b (to be formed) and the second (after the second substrate 107 is bonded to the first substrate 105, as will be described below). The distance from the substrate 107 is 197. The etching depth 197 determines the length of the operation stoppers 405a and 405b that are finally produced in a later etching step. As shown in FIGS. 9c and 9d, the two motion stoppers 405a and 405b are etched from the element layer 1615 of the first substrate 105, preferably using photolithography techniques. Again, the details of this etching are described in paragraphs 59-61 above.

  Figures 16a to 16e show another method of making the first substrate 105 with cavities. FIG. 16a represents a cross-sectional view of the first substrate 105 before fabrication. Like the first substrate 105 of FIG. 9b, the first substrate 105 of FIG. 16a initially includes an element layer 1615 having a predetermined thickness, an insulating oxide layer 1610, and a handling substrate 1605. The element layer 1615 is located on the first side of the substrate 105, and the handling substrate 1605 is located on the second side of the substrate 105. Such first substrate 105 may be fabricated using a standard silicon-on-insulator (SOI) process known in the art, or purchased from a silicon wafer supplier including the above companies. Also good. In this embodiment, the device layer 1615 is made of a single crystal silicon material, and the upper end 1615a of the device layer 1615 has a predetermined thickness, preferably from 0.2 microns to 0.4 microns, as shown in FIG. 16e. Having a thickness between. The thickness of the element layer upper end portion 1615a is substantially equal to the thickness of the mirror plate 204 to be finally produced.

  Referring to FIG. 16b, after obtaining (by fabrication or purchase) the first substrate 105 having the layers 1610 and 1615 described in the previous paragraph and the substrate 1605, a dielectric material 1620 such as silicon oxide is obtained. Deposited on the device layer 1615 of the first substrate 105.

  This dielectric material 1620 is then etched using standard photolithography and etching techniques known in the art, with openings 1625 in place where the support walls of spacer support frame 210 will be located. And 1626 are formed. This etched dielectric material 1620 forms a mask and openings 1625 and 1626 for the next process step, as shown in FIG. 16c.

  In the preferred embodiment shown in FIG. 16c, the single crystal silicon material 1627 and 1628 is transformed into a dielectric material by an epitaxial growth process using the single crystal silicon material of the device layer 1615 that performs the “seed” function for epitaxial growth. Grows in 1620 openings 1625 and 1626. Usually, the material grown in the openings 1627 and 1628 is the same material as the element layer 1615 (or seed) and has the same crystal structure as the element layer 1615. In the embodiment shown in FIG. 16 c, the grown single crystal silicon materials 1627 and 1628 will eventually become the support walls of the spacer support frame 210 for the micromirror array 103.

  Finally, the dielectric material 1620 is removed, resulting in the structure shown in FIG. 16e. The resulting structure is a first substrate 105 that has the same structure as the first substrate shown in FIG. 9d, except that the structure of FIG. 16e does not have motion stoppers 405a and 405b. However, considering the above description, those skilled in the art will understand how to add the operation stoppers 405a and 405b to the structure shown in FIG. 16e. For example, the operation stoppers 405 a and 405 b may be formed by etching and epitaxial growth like the support wall of the spacer support frame 210. Thus, FIGS. 16 a-16 e provide another method of creating a cavity in the first substrate 105 in which the thickness of the upper end 1615 a of the element layer 1615 in the first substrate 105 is precisely controlled. When the steps shown in FIGS. 9e to 9m are completed, a high filling factor reflective spatial light modulator 100 with a hidden hinge is produced.

  Referring to FIG. 9a, apart from the creation of the cavity in the first substrate 105, some or all of the electrodes 126 and the addressing / control circuit 106 are connected to the second substrate 107 as shown in FIGS. 9a and 9e. Formed on the first side 703. The second substrate 107 may be a transparent material such as quartz, or may be another material. In the case where the second substrate is quartz, the transistor may be formed of polysilicon in contrast to crystalline silicon. The circuit is preferably formed using standard CMOS fabrication techniques (906). For example, in one embodiment, the control circuit 106 (906) formed or fabricated on the second substrate 107 includes an array of memory cells, a row address circuit, and a column data read circuit. There are many different ways to create an electronic circuit that performs the addressing function. Normally known DRAM devices, SRAM devices, and latch devices may all perform the addressing function. Since the area of the mirror plate 204 may be large compared to a semiconductor scale (eg, the mirror plate 204 may have an area of 225 square microns), a complex circuit is fabricated under the micromirror 202. be able to. Possible circuits include, but are not limited to, a storage buffer that stores time-series pixel information, and by driving the electrode 126 at various voltage levels, it can occur at the separation distance between the mirror plate 204 and the electrode 126. A circuit that compensates for non-uniformity and a circuit that performs pulse width modulation conversion are included.

  The control circuit 106 is covered with a protective layer such as silicon oxide or silicon nitride. Next, a metallization layer is deposited. This metallization layer is patterned and etched to define the electrode 126, and in one embodiment a bias / reset bus. This electrode 126 is placed during fabrication so that one or more electrodes 126 correspond to each micromirror 202. Typically, multiple circuit sets used in multiple SLMs are formed 906 on the second substrate 107 that will be separated later.

  The first substrate 105 shown in FIG. 9d or FIG. 16e is then bonded (910) to the second substrate 107 as shown in FIGS. 9a and 9e. As shown in FIG. 9 f, the first substrate 105 has a top layer 905 on the opposite side of the second substrate 107. The side of the first substrate 105 having the cavity and the operation stoppers 405a and 405b is bonded to the side of the second substrate having the electrode 126. The substrates 105 and 107 are aligned so that the electrodes on the second substrate 107 are in the correct position to control the deflection of the micromirrors 202 of the micromirror array 103. In one embodiment, the two substrates 105 and 107 are optically aligned by aligning the pattern on the first substrate 105 with the pattern on the second substrate 107 using a double focus microscope. . The two substrates 105 and 107 are bonded to each other using a low-temperature bonding method such as anodic bonding or eutectic bonding (910). In a preferred embodiment, this bonding (910) can be performed at any temperature below 400 degrees Celsius, including room temperature. For example, a thermoplastic or dielectric spin glass bonding material can be used, whereby the substrates 105 and 107 are thermomechanically bonded. In addition, this bonding (910) can be performed at room temperature while ensuring good mechanical adhesion between the first substrate 105 and the second substrate 107. FIG. 9e is a cross-sectional view showing the first substrate 105 and the second substrate 107 bonded to each other.

  After bonding the first substrate 105 and the second substrate 107 together (910), the top layer 905 of the first substrate 105 is thinned to a desired thickness as shown in FIGS. 9f and 9a. (912). First, the handling substrate 1605 shown in FIG. 9f or FIG. 16e is typically removed by polishing and / or etching, and then the oxide layer 1610 is any known in the art for performing oxide stripping. It is peeled off using this technique. This oxide layer 1610 serves as a stop marker for the thinning step (912) to form a thinned first substrate 105 having a desired thickness, and within the first substrate. Placed in. This thinning process may include a back etch process of silicon, such as polishing and / or etching, preferably wet etching or plasma etching. This ultimately results in an upper surface 205 of the first substrate 104 that forms the upper surface 205 of the mirror plate, as shown in FIGS. 3, 7a, 8, and 9m. As a result, the final thickness of the first substrate 105 is a few microns in the preferred embodiment.

  Next, the hinge 206 is etched using a two-step etch process (913). First, as shown in FIG. 9 g, the upper surface 205 of the first substrate 105 is etched to form a recess 910. This ensures that the hinge 206 to be formed in this recess 910 is substantially located at the end of the fabrication process below the upper surface 205 of the first substrate 105, which is the upper surface of the mirror plate 204. Is done. Next, as shown in FIGS. 9 h and 9 a, the first substrate 105 is etched again to substantially separate the hinge 206 from the mirror plate portion 915 of the first substrate 105. As shown in the embodiment illustrated in FIGS. 3, 4 a, 4 b, 12 a, 12 b and 13, both ends of the hinge 206 remain connected to the spacer support walls of the spacer support frame 210. Further, the mirror plate portion 915 of the first substrate 105 forms the mirror plate 204 of the micro mirror 202.

In one embodiment, the hinge 206 is etched in a chamber of a decoupled plasma source with Cl ₂ gas, O ₂ gas, and N ₂ gas flowing at flow rates of 100 sccm, 20 sccm, and 50 sccm, respectively. The pressure during operation is in the range of 4 to 10 mTorr, the bias power is 40 W, and the power output is 1500 W. The etching depth is measured using an in-situ etching depth monitor such as in-situ optical interference technique or by measuring the etching rate.

  A sacrificial layer 920 such as photoresist is then deposited on the first substrate 105 (914), between the hinge 206 and the mirror plate portion 915 of the first substrate 105, as shown in FIGS. 9i and 9a. And the gap on and around the hinge 206 and further on the upper surface 205 of the first substrate 105. This photoresist need only be applied onto the substrate.

  Next, as shown in FIGS. 9j and 9a, a first having a sacrificial layer 920 is then performed using either an etch back step, or a chemical mechanical processing (CMP) process, or any technique known in the art. The substrate 105 is planarized (915). This process ensures that the sacrificial layer 920 remains only on and around the hinge and not on the upper surface 205 of the first substrate 105. Note that in this planarization step, the sacrificial layer 920 is removed only from the top surface 205 of the first substrate 105, so that removal is relatively easy.

  On this flattened surface (including the upper surface 205 of the mirror plate 204 and the portion overlying the portion of the hinge 206 covered by the sacrificial layer 920), as shown in FIGS. 9k and 9a, a reflective surface 203 is formed. Deposited to form a reflective surface 203. As described above, the reflecting surface 203 has a larger area than the upper surface 205 of the mirror plate 204. The reflective surface is preferably aluminum or any other reflective material known in the art and preferably has a thickness of 300A or less. Further, the reflection surface 203 covers the upper surface 205 of the first substrate 105 and a region above a part of the hinge 206. FIG. 9 k is a cross-sectional view showing the deposited reflecting surface 203. Due to the thin reflection surface 203, the flat and smooth surface of the upper surface 205 of the mirror plate 204 is definitely reflected.

  As shown in FIGS. 9l and 9a, the reflective surface 203 and the mirror plate portion 915 are etched (917) to separate the mirror plate 204 from the mirror plate portion 915 of the first substrate 105. The reflection surface 203 and the mirror plate portion 915 are preferably etched in the same chamber.

In the preferred embodiment where the reflective surface 203 is an aluminum material, Cl ₂ gas, BCl ₃ gas, and N ₂ gas are flowed at a flow rate of 40 sccm, 40 sccm, and 10 sccm, respectively, in the chamber of the decoupled plasma source. Etching (917) of the reflective surface 203 is performed. The operating pressure is 10 mTorr, the bias power is 75 W, and the power output is 800 W. The etching depth is measured using an in-situ etching depth monitor such as in-situ optical interference technique or by measuring the etching rate. When the reflecting surface 203 of aluminum is etched (917), the mirror plate portion 915 made of silicon underneath is then supplied with HBr gas, Cl ₂ gas, and O ₂ gas at 90 sccm, 55 sccm, and Etching is performed in a chamber of a decoupled plasma source while flowing at a flow rate of 5 sccm (917). The pressure during operation is 5 mTorr, the bias power is 75 W, and the power output is 500 W. The etching depth is measured using an in-situ etching depth monitor such as in-situ optical interference technique or by measuring the etching rate.

  After the etching (917) of the reflective surface 203 and the mirror plate portion 915 is finished, the mirror plate 204 is separated, but the hinge 216 remains fixed in place by the sacrificial material 920. As a result, the mirror plate 204 and the micromirror as a whole cannot yet rotate around the hinge 206, thereby ensuring the survivability of the elements in later process steps.

The final step in making the micromirror 202 is to remove the sacrificial layer 920 that remains above and around the hinge 206 (918). Removal of the sacrificial layer 920 remaining on and around the hinge 206 is relatively easy because the sacrificial layer 920 is not under the mirror plate 204 or the mirror 202. A dry process such as plasma etching is preferred because of adsorption obstacles associated with the wet process. In one embodiment, the sacrificial layer 920 is a photoresist material that is etched away in an O ₂ plasma chamber. When this sacrificial layer 920 is removed (918), the hinge 206 is separated and the mirror plate 204 is free to rotate about the hinge 206. By following the fabrication process described above, the result is a reflective surface 203 that is substantially formed below the top surface of the mirror plate 204 and deposited on the top surface 205 of the mirror plate 204 and on a portion of the hinge 206. A hinge 206 is formed.

  In some embodiments, the micromirror array 103 is protected by a piece of glass or other transparent material. In one embodiment, when the micromirror array 103 is manufactured, a rim is left around each micromirror array 103 manufactured on the first substrate 105. To protect the micromirrors 202 of the micromirror array 103, a piece of glass or other transparent material is bonded to the rim (919), as shown in FIG. 9a. This transparent material protects the micromirror 202 from physical harm. In another embodiment, lithography is used to form an array of rims of a single layer of photosensitive resin on a glass plate. Next, epoxy is applied to the upper edge of the rim, and a glass plate is aligned with the completed reflective SLM 100 and attached to the SLM 100.

  As described above, a plurality of SLMs 100 may be made from the two substrates 105 and 107. A plurality of micromirror arrays may be formed on the first substrate 105, and a plurality of circuit sets may be formed or formed on the second substrate 107. If a plurality of SLMs 100 are manufactured, the manufacturing process efficiency of the spatial light modulator 100 is improved. However, when a plurality of SLMs 100 are manufactured at a time, the plurality of SLMs must be separated into individual SLMs 100. There are many ways to separate individual spatial light modulators 100 and make them ready for use. In the first method, each spatial light modulator 100 is die separated from other SLMs 100 on the combined substrates 105 and 107 (920). Each separated spatial light modulator 100 is then packaged using standard packaging techniques (922).

  In the second method, wafer level chip level packaging is performed, each SLM 100 is encapsulated in a separate cavity, and leads are formed before separating the SLM 100. This further protects the components that can be reflected and deflected, reducing the packaging cost. In one embodiment of this method, as shown in FIG. 9a, the back surface of the second substrate 107 is joined with solder bumps. The back surface of the second substrate 107 is then etched (926) to expose the metal connector formed when the circuit is fabricated on the second substrate 107. Thereafter, conductive wires are deposited between the metal connector and the solder bumps (928) to electrically connect the two. Finally, a plurality of SLMs are die separated (930).

FIG. 11 is a perspective view of one embodiment of an electrode 126 formed on the second substrate 107. In this embodiment, each micromirror 202 has a corresponding electrode 126. The electrode 126 in this exemplary embodiment is made higher than the other circuit portions on the second substrate 107. In a preferred embodiment, the electrode 126 is placed at the same height as the other circuit portions on the second substrate 107. In other embodiments, the electrode 126 extends above the circuit. In one embodiment of the invention, the electrode 126 is a separate aluminum pad that fits well in the bottom of the micromirror plate. Further, the shape of the electrode varies depending on the embodiment of the micromirror 202. For example, in the embodiment shown in FIGS. 2a, 2b, and 3, there are two electrodes 126 below the mirror 202, each electrode 126 preferably having a triangular shape as shown in FIG. 7b. Also, in the embodiment shown in FIGS. 12 a, 12 b, and 13, a single, square electrode 126 is preferably under the mirror 202. This electrode 126 is formed on the surface of the second substrate 107. In this embodiment, because the electrode surface area is large, the addressing voltage required to pull the mirror plate 204 down to the mechanical stop is relatively low and the mirror plate 204 can be fully deflected to a predetermined angle.
Action

  In operation, the individual reflective micromirrors 202 serve to spatially modulate the light that is selectively deflected and incident and reflected by the mirror 202.

  7a and 8 are cross-sectional views of the micromirror 202 shown along the dashed line 250 in FIG. 2a. Note that this cross-sectional view deviates from the central diagonal of the micromirror 202, and therefore the outline of the hinge 206 is shown. FIG. 7c is another cross-sectional view of micromirror 202 shown along dashed line 250 in FIG. 2a. Note that this cross-sectional view is along the central diagonal and is orthogonal to the hinge 206. FIG. 7c shows the connector 216 in relation to the mirror plates 204a and 204b. FIGS. 7 a, 7 c, and 8 show the micromirror 202 on the electrode 126. During operation, a voltage is applied to the electrode 126 corresponding to one side of the mirror 202, and the deflection of the corresponding portion of the mirror plate 204 on this electrode 126 (the surface 204a in FIG. 8) is controlled. As shown in FIG. 8, when a voltage is applied to the electrode 126, the mirror plate half 204a is attracted to the electrode 126 and the other half of the mirror plate 204b is due to the structure and rigidity of the mirror plate 204. , Away from the electrode 126 and the second substrate 107. Thereby, the mirror plate 204 can rotate around the torsion spring hinge 206. When voltage is removed from electrode 126, hinge 206 causes mirror plate 204 to bounce back to its unbiased position as shown in FIG. 7a. Alternatively, in the embodiment with the diagonal hinge 206 shown in FIGS. 2a, 2b, and 3, a voltage is applied to the electrode 126 corresponding to the opposite side of the mirror plate 204, causing the mirror 202 to deflect in the opposite direction. Also good. In this way, the light incident on the mirror 202 is reflected in a controllable direction by applying a voltage to the electrode 126.

  The operation of one embodiment is as follows. Initially, the mirror 202 is not deflected as shown in FIGS. 7a and 7c. In the state where this bias is not applied, the incident light beam obliquely incident on the SLM 100 from the light source is reflected by the mirror 202 in a flat state. For example, an optical dump may receive the reflected reflected light beam. Light reflected by the undeflected mirror 202 is not reflected by the video display.

When a voltage is applied between half of the mirror plate 204 and the electrode 126 below it, the mirror 202 deflects due to electrostatic attraction. In one embodiment, when the mirror plate 204a deflects downward as shown in FIG. 8, V _e1 is preferably 12 volts, V _b is −10 volts, and V _e2 is preferably 0 volts. Similarly (or vice versa), when mirror plate 204b is deflected downward, V _e1 is preferably 0 volts, V _b is −10 volts, and V _e2 is preferably 12 volts. Due to the design of the hinge 206, one side 204a or 204b of the mirror plate (in other words, the one on the electrode 126 to which the voltage bias is applied) is deflected downward (toward the second substrate 107) and the mirror plate The other surface 204 b or 204 a of the second substrate 107 moves away from the second substrate 107. In one preferred embodiment, all bending occurs substantially at the hinge 206 rather than at the mirror plate 204. This may be achieved in one embodiment by reducing the hinge width 222 and connecting the hinge 206 only to the struts at both ends. Further, the deflection of the mirror plate 204 is limited by the operation stopper 405a or 405b as described above. When the mirror plate 204 is completely deflected, the reflected light beam to be emitted is deflected to the imaging optical system and the video display.

  When the mirror plate 204 attempts to deflect beyond a “snapping” voltage or a “pulling” voltage (in one embodiment less than about 12 volts), the restoring mechanical force or restoring torque of the hinge 206 is no longer The electrostatic force balance can no longer be maintained, and the mirror plate half 204a or 204b on which the electrostatic force is applied suddenly snaps down towards the electrode 126 below it, and as specified, the movement stopper 405a or Full deflection, limited only by 405b, is realized. In embodiments where the hinge 206 is parallel to the support wall of the spacer support frame 210, as shown in FIGS. 12a, 12b and 13, the voltage is turned off to release the mirror plate 204 from the fully deflected position. There must be. In an embodiment where the hinge 206 is diagonal as shown in FIGS. 2a, 2b and 3, in order to release the mirror plate 204 from a fully deflected position, a voltage is applied to the other electrode to This voltage must be turned off with 202 being attracted to the other.

  The micromirror 202 is an electromechanical bistable element. Given a certain voltage between the release voltage and the snapping voltage, two polarization angles that the mirror plate 204 can take are conceivable depending on the deflection history of the mirror 202. In this way, the deflection of the mirror 202 serves as a latch. The mechanical force required to deflect the mirror 202 is approximately linear with respect to the deflection angle, while the electrostatic force in the opposite direction is inversely proportional to the distance between the mirror plate 204 and the electrode 126, so Characteristics exist.

  Since the electrostatic force between the mirror plate 204 and the electrode 126 changes according to the total voltage difference between the mirror plate 204 and the electrode 126, the negative voltage applied to the mirror plate 204 has a certain deflection amount. To achieve this, the positive voltage that needs to be applied to the electrode 126 is reduced. In this way, the voltage width condition of the electrode 126 can be reduced by applying a voltage to the mirror array 103. This is useful, for example, because the 5V switching function is more common in the semiconductor industry and more cost effective, so in some applications the maximum voltage that must be applied to electrode 126 is kept below 12V. This is because it is desirable.

  Since the maximum deflection of the mirror 202 is constant, when the SLM 100 operates at a voltage exceeding the snapping voltage, the SLM 100 can be operated digitally. This operation is essentially digital because in embodiments where the hinge 206 is parallel to the support wall of the spacer support frame 210, as shown in FIGS. 2a, 2b, and 3, the mirror plate 204 is This is because it can be completely deflected downward by applying a voltage to the corresponding electrode 126, or can jump up without applying a voltage to the corresponding electrode 126. In embodiments with diagonal hinges 206 as shown in FIGS. 12 a, 12 b, and 13, the mirror plate 204 is directed downward by applying a voltage to the electrode 126 corresponding to one side of the mirror plate 204. Deflection is performed completely, or a voltage is applied to the other electrode 26 corresponding to the other surface of the mirror plate 204 to deflect the other surface of the mirror plate 204 downward. The voltage that causes the mirror plate 204 to fully deflect downward until the physical component that stops the deflection of the mirror plate 204 stops is known as the “snapping” voltage or the “pull” voltage. Therefore, in order to deflect the mirror plate 204 completely downward, a voltage higher than the snapping voltage is applied to the corresponding electrode 126. For video display applications, when the mirror plate 204 is fully deflected downward, the light incident on the mirror plate 204 is reflected to the corresponding pixel on the video display screen, which appears bright. When the mirror plate 204 jumps up, this light is reflected in a direction that does not strike the video display screen, and the corresponding pixels appear dark.

  In such digital operation, it is not necessary to continue to apply the snapping voltage to the corresponding electrode 126 after the mirror plate 204 is completely deflected. In the “addressing phase”, the voltage to the selected electrode 126 corresponding to the mirror plate 204 that needs to be fully deflected is set to the level required to deflect the mirror plate 204. When this mirror plate 204 is deflected by the voltage to the electrode 126, the voltage required to hold the mirror plate 204 in its changed position is less than the voltage required for the actual change. This is because the distance between the deflected mirror plate 204 and the addressing electrode 126 is smaller than when the mirror plate 204 is in the deflection process. Therefore, in the “holding phase” after the addressing phase, the voltage applied to the selected electrode 126 can be reduced from its original required level without substantially affecting the deflection state of the mirror plate 204. One effect of the lower holding voltage is that the influence of electrostatic attraction on the adjacent undeflected mirror plate 204 is less, and therefore remains in a nearly zero deflection position. Thereby, the optical contrast ratio between the deflected mirror plate 204 and the undeflected mirror plate 204 is improved.

Dimensions (in one embodiment, the separation spacing by the spacer support frame between the mirror plate 204 and the electrode 126 is 1-5 microns, depending on the mirror structure and polarization angle, and the thickness of the hinge 206 is 0.05- With proper selection of materials (eg, single crystal silicon (100)) that is 0.45 microns, the reflective SLM 100 can be made to have an operating voltage of only a few volts. The rigidity of the torsion hinge 206 made of single crystal silicon is, for example, 5 × 10 ¹⁰ newtons per square meter of radium. The operating voltage of the corresponding electrode 126 to fully deflect the mirror plate 204 can be further reduced by maintaining the mirror plate 204 at an appropriate voltage (negative bias) rather than at ground potential. This produces a larger deflection angle for any voltage applied to the electrode 126. Since the maximum negative bias voltage is the release voltage, when the addressing voltage is reduced to zero, the mirror plate 204 can bounce back to the undeflected position.

It is also possible to control the deflection of the mirror plate 204 in a more “analog” manner. A voltage lower than the “snapping voltage” is applied to deflect the mirror plate 20 to control the direction in which incident light is reflected.
Other uses

  In addition to video displays, the spatial light modulator 100 is useful in other applications. One such application is photolithography without a mask, and the spatial light modulator 100 directs the light to expose the deposited photoresist. This eliminates the need for a mask to accurately expose the photoresist to the desired pattern.

  While the invention has been illustrated and described in detail with reference to a number of embodiments, those skilled in the art will recognize that various changes in form and detail may be made without departing from the spirit and scope of the invention. It is possible. For example, the mirror plate 204 can be similarly deflected by a method other than electrostatic attraction. This mirror plate 204 may instead use magnetic, thermal, or piezoelectric drive.

It is the schematic which shows the schematic structure of the spatial light modulator by one Embodiment of this invention. It is a perspective view of one micromirror in one embodiment of the present invention. It is a perspective view of the corner of the micromirror shown in FIG. 2a. It is a perspective view of one micromirror without a reflective surface which shows the upper part and side part of the mirror plate of the micromirror in one Embodiment. It is a perspective view which shows the bottom part and side part of one micromirror in one Embodiment of this invention. FIG. 4b is a perspective view of a corner of the micromirror shown in FIG. 4a. It is a perspective view which shows the upper part and side part of the micromirror array in one Embodiment of this invention. It is a perspective view which shows the bottom part and side part of the micromirror array in one Embodiment of this invention. 2b is a cross-sectional view of the micromirror in an undeflected state along a diagonal cross-section from the center of FIG. 2a. It is sectional drawing of the electrode and landing chip which are formed in the 2nd board | substrate in one Embodiment of this invention, and are under a mirror plate. 2b is a cross-sectional view of the micromirror in an undeflected state along the central diagonal cross section of FIG. It is sectional drawing of the micromirror of the deflected state shown to FIG. 2a. It is a flowchart explaining suitable embodiment of the manufacturing method of a spatial light modulator. It is sectional drawing which shows in detail the preparation of a spatial light modulator. It is sectional drawing which shows in detail the preparation of a spatial light modulator. It is sectional drawing which shows in detail the preparation of a spatial light modulator. It is sectional drawing which shows in detail the preparation of a spatial light modulator. It is sectional drawing which shows in detail the preparation of a spatial light modulator. It is sectional drawing which shows in detail the preparation of a spatial light modulator. It is sectional drawing which shows in detail the preparation of a spatial light modulator. It is sectional drawing which shows in detail the preparation of a spatial light modulator. It is sectional drawing which shows in detail the preparation of a spatial light modulator. It is sectional drawing which shows in detail the preparation of a spatial light modulator. It is sectional drawing which shows in detail the preparation of a spatial light modulator. It is sectional drawing which shows in detail the preparation of a spatial light modulator. FIG. 2 shows a preferred embodiment of a mask for forming a cavity in a first substrate. It is a perspective view of one Embodiment of the electrode formed on the 2nd board | substrate. It is a perspective view of the micromirror in another embodiment of the present invention. It is a perspective view of the corner of the micromirror shown in FIG. 12a. It is a perspective view which shows the bottom part and side part of the micromirror in embodiment shown to FIG. 12a. It is a perspective view which shows the upper part and side part of the micromirror array in another embodiment of this invention. It is a perspective view which shows the bottom part and side part of the micromirror array in another embodiment shown in FIG. It is a figure which shows another method of forming a cavity in the 1st board | substrate. It is a figure which shows another method of forming a cavity in the 1st board | substrate. It is a figure which shows another method of forming a cavity in the 1st board | substrate. It is a figure which shows another method of forming a cavity in the 1st board | substrate. It is a figure which shows another method of forming a cavity in the 1st board | substrate.

Claims (52)

A method of making a spatial light modulator comprising:
Forming a first substrate defining a cavity;
Producing an electrode on a second substrate;
Bonding the first substrate to the second substrate;
Forming a hinge and a mirror plate on the first substrate;
Forming a reflecting surface on the mirror plate and on a part of the hinge, the reflecting surface having an area larger than an area of an upper surface of the mirror plate. The method of claim 1, wherein the reflective surface substantially hides the hinge associated with the mirror plate. The method of claim 1, wherein the hinge is formed below an upper surface of the mirror plate and is substantially hidden by the reflective surface. The method of claim 1, wherein the first substrate of the spatial light modulator is a single material. The method of claim 1, wherein the first substrate of the spatial light modulator is single crystal silicon. The method of claim 1, further comprising forming a motion stop on a lower surface of the mirror plate. The method of claim 6, further comprising forming a landing chip on the second substrate at a position for receiving the motion stopper. The method of claim 1, further comprising creating addressing and control circuitry on the second substrate prior to bonding the first substrate to the second substrate. The method of claim 1, wherein a center height of the hinge is coplanar with a center height of the mirror plate. The method of claim 1, wherein the cavity is surrounded by a spacer support wall on a spacer support frame of the first substrate. The method of claim 1, wherein the circuit is formed using CMOS technology. Forming a first substrate defining a cavity comprises:
Obtaining the first substrate having an element layer of a predetermined thickness;
Depositing a dielectric material on the device layer of the first substrate;
Etching the dielectric material to form an opening in place;
A material having the same crystal structure as the element layer is grown in the opening,
The method of claim 1, comprising removing the dielectric layer. 13. The device layer according to claim 12, wherein the device layer is made of a single crystal silicon material, and the first substrate includes an insulating oxide layer on the device layer and a handling substrate on the insulating oxide layer. Method. The method of claim 12, wherein the device layer has a thickness between 0.2 microns and 0.4 microns. The method of claim 12, wherein the dielectric material is silicon oxide. The method of claim 12, wherein the material grown in the opening is grown by an epitaxial growth process. Forming a first substrate defining a cavity comprises:
A first portion defining a position of the cavity, the first portion under the first portion exposing the first substrate by etching, and a position of a support wall defining the cavity A mask comprising: a second portion defining a first portion of the first substrate, wherein the first portion under the second portion can prevent the first substrate from being etched. Put on top
Etching the first substrate under the first portion of the mask to a predetermined depth;
The method of claim 1, comprising removing the mask from the substrate. The production of the electrode on the second substrate is as follows:
Cover the control circuit with a protective layer,
Depositing a metallization layer on the protective layer;
Patterning the metallization layer into a pattern defining the electrodes;
The method of claim 1, comprising etching the metallization layer, leaving behind the material comprising the electrode. Bonding the first substrate to the second substrate is
Position the first substrate relative to the second substrate such that the electrodes on the second substrate are in positions for controlling the deflection of the corresponding micromirrors of the first substrate. Together
The method according to claim 1, comprising bonding the first substrate and the second substrate using a low temperature bonding method. Formation of the hinge and mirror plate on the first substrate is as follows:
The uppermost layer of the first substrate is thinned to a predetermined thickness,
Etching the hinge into the first substrate substantially below the top surface of the thinned first substrate;
Depositing a sacrificial layer on the first substrate;
Planarizing the first substrate to remove the sacrificial layer from the top surface of the first substrate;
Freeing the mirror plate by etching the first substrate;
The method of claim 1, comprising removing the sacrificial layer above and around the hinge so that the mirror plate can rotate about an axis defined by the hinge. Thinning the uppermost layer of the first substrate to a predetermined thickness is as follows:
21. The method of claim 20, comprising removing the handling substrate of the first substrate by polishing and / or etching and stripping the insulating oxide layer of the first substrate. Etching the hinge to the first substrate substantially below the top surface of the thinned first substrate comprises:
Etching a recess in the upper surface of the first substrate;
21. The method of claim 20, further comprising etching the first substrate while maintaining an end of the hinge connected to the first substrate to release the hinge from the first substrate. Method. The deposition of the sacrificial layer on the first substrate is
Filling the sacrificial layer over and around the hinge;
21. The method of claim 20, comprising depositing the sacrificial layer on the top surface of the first substrate. 21. The method of claim 20, wherein planarizing the first substrate to remove the sacrificial layer includes an etch back step or a chemical mechanical process to remove the sacrificial layer. 21. The method of claim 20, wherein removal of the sacrificial layer over and around the hinge includes the use of a plasma etch process. The formation of a reflective surface on the mirror plate and on a part of the hinge,
Depositing aluminum on the top surface of the first substrate;
The method of claim 1, comprising depositing aluminum over a portion of the hinge, the aluminum having a thickness of 300 mm or less. A method of making a plurality of mirrors for a spatial light modulator,
Forming a cavity on the first side of the first substrate;
Thinning the uppermost layer on the second side of the first substrate to a predetermined thickness;
Etching a hinge on the second side of the first substrate substantially below the top surface of the thinned first substrate;
A sacrificial layer is deposited on the second side of the first substrate;
Planarizing the second side of the first substrate;
Depositing a reflective surface on the second side of the first substrate;
Release the mirror by etching and
Removing the sacrificial layer above and around the hinge so that the mirror can rotate about an axis defined by the hinge. 28. A method of making a plurality of mirrors for a spatial light modulator according to claim 27, wherein the reflective surface substantially hides the hinge. 28. The spatial light modulation according to claim 27, wherein the reflecting surface is deposited on the upper surface of the first substrate and on a part of the hinge and has an area larger than an area of the upper surface of the mirror plate. A method of making a plurality of dexterous mirrors. The formation of the cavity on the first side of the first substrate is
Creating a mask defining a region to be etched from the first side of the first substrate;
Removing material in the region on the first side of the first substrate defined by the mask to form the cavity on the first side of the first substrate. 28. The method of claim 27. The formation of the cavity on the first side of the first substrate is
Obtaining the first substrate having an element layer of a predetermined thickness;
Depositing a dielectric material on the device layer of the first substrate;
Etching the dielectric material at a position where a support wall of the spacer support frame is to be formed to form an opening,
A material having the same crystal structure as the element layer is grown in the opening,
28. The method of claim 27, comprising removing the dielectric layer. The first substrate further comprises an insulating oxide layer on the device layer and a handling substrate on the insulating oxide layer, the device layer being between about 2 microns and about 3 microns. 32. The method of claim 31, having a thickness of. 31. The method of claim 30, wherein removing material in the region of the first substrate defined by the mask comprises etching the first substrate. 31. The method of claim 30, wherein removal of material in the region of the first substrate defined by the mask includes performing an anisotropic reactive ion etch using SF6, HBr, and oxygen gas flow. The thinning of the top layer on the second side of the first substrate is
Removing the handling substrate by polishing and / or etching;
28. The method of claim 27, comprising stripping the oxide layer. 28. The method of claim 27, wherein thinning the top layer on the second side of the first substrate comprises a process selected from the group consisting of polishing, back-etching silicon, wet etching, and plasma etching. . The etching of the hinge includes a first etching for forming a recess under the top surface of the first substrate on the second surface of the second side, and a mirror plate portion of the first substrate. 28. A method according to claim 27, comprising: a second etch to release the hinge from. 28. The method of claim 27, further comprising etching a motion stop on a lower surface of the mirror plate in the first substrate. A method of making a spatial light modulator including a plurality of mirrors on an array, comprising:
Creating a mask defining a region to be etched from the first side of the first substrate;
Etching the region on the first side of the first substrate defined by the mask to form a plurality of cavities on the first side of the first substrate;
An electrode is fabricated on the first side of the second substrate;
Bonding the first side of the first substrate to the first side of the second substrate;
Thinning the uppermost layer on the second side of the first substrate to a predetermined thickness;
Etching a hinge into the first substrate;
A sacrificial layer is deposited on the first substrate;
Planarizing the first substrate, leaving a sacrificial layer above and around the hinge to remove the sacrificial layer from the upper surface of the second side of the first substrate;
Depositing a reflective surface on the top surface and on a portion of the hinge;
The mirror is released by etching,
Removing the remaining sacrificial layer from the first substrate such that the mirror can rotate about an axis defined by the hinge. 40. The method of creating a spatial light modulator of claim 39, wherein the reflective surface has an area that is greater than an area of the top surface of the mirror plate. 40. A method of making a spatial light modulator according to claim 39, wherein the reflective surface substantially hides the hinge. 40. The method of making a spatial light modulator of claim 39, wherein the hinge is substantially formed below an upper surface of the first substrate and substantially hidden by the reflective surface. Etching the region on the first side of the first substrate defined by the mask to form a plurality of cavities on the first side of the first substrate includes SF6, HBr, and oxygen 40. The method of claim 39, comprising performing an anisotropic reactive ion etch using a gas flow. 40. The method of claim 39, further comprising forming a control circuit on the first side of the second substrate before forming an electrode on the first side of the second substrate. 45. The method of claim 44, wherein forming a control circuit on the first side of the second substrate includes making a memory buffer, a display controller, and a pulse width modulation array. The fabrication of the electrode on the first side of the second substrate is as follows:
The prepared control circuit is covered with a protective layer,
Depositing a metallization layer on the protective layer;
Patterning the metallization layer into a pattern that will define the electrodes;
40. The method of claim 39, comprising etching the metallization layer, leaving behind the material comprising the electrode. Before joining the first side of the first substrate to the first side of the second substrate, when the first and second substrates are joined together, the second side 40. Aligning the first substrate and the second substrate such that the electrode on the substrate is in a position to control the deflection of a mirror in the first substrate. The method described in 1. 48. The method of claim 47, wherein the alignment of the first substrate and the second substrate includes alignment of a pattern on the first substrate and a pattern on the second substrate. 40. The bonding of the first side of the first substrate and the first side of the second substrate includes the use of a low temperature bonding method performed at less than about 400 degrees Celsius. Method. The etching of the hinge releases the hinge from the mirror plate portion of the first substrate and the first etching to form a recess under the upper surface of the upper surface of the first substrate. 40. The method of claim 39, comprising a second etch for. 40. The method of claim 39, further comprising etching a motion stop on the lower surface of the mirror, wherein the reflective surface is deposited on the upper surface of the first substrate and on a portion of the hinge. Method. A method of operating a spatial light modulator, comprising:
Selecting a deflecting micromirror within the micromirror array of the spatial light modulator;
Applying a voltage between the selected micromirror and an electrode corresponding to and deflecting the selected micromirror, the micromirror substantially concealing a hinge; and A method having a reflecting surface for reflecting light incident on a micromirror.