JP2006324010A - Data reproducing apparatus and data recording apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a data reproducing apparatus and a data recording apparatus that can be used as a peripheral device of a computer (PC).
A disk control unit 10 that controls a disk mechanism unit 1 via a recording / playback unit 5 is provided. The disk control unit 10 adjusts data transfer with a peripheral unit of a PC. 29, an AV signal input / output connection unit 31 for connecting an AV signal input / output to an external camera 51, etc., and the PC interface unit 29 and the AV signal input / output connection unit 31 to select the buffer control unit 26 And a PC / AV signal switching unit 27 for transferring data to the control unit. When the host PC is connected to the connector, the PC interface 29 operates to detect this and switch the PC / AV signal switching unit 27 to the PC side.
[Selection] Figure 1

Description

  The present invention relates to a data reproducing apparatus and a data recording apparatus that can be connected to a host computer or stand alone and can input continuous data directly to an external signal source.

  2. Description of the Related Art In recent years, consumer AV signal recording / reproducing apparatuses that convert analog signals such as video and audio signals (hereinafter referred to as AV signals) into continuous digital data and perform recording and reproduction on recording media such as disks and tapes have been provided. Has been.

  By the way, continuous digital data is not recorded in a format compatible with a personal computer (hereinafter referred to as “PC”), but directly on a logical block, which is a unit of a recording area of a recording medium such as a hard disk, without using the basic software OS. MPEG (Moving Picture Experts Group) streamers, DV (Digital VCR for consumer use) storage devices, and the like are provided. In such an apparatus that directly records and reproduces logical blocks, for example, a transmission signal such as IEEE1394 is received as continuous digital data, and the continuous digital data is adjusted to a logical block size and recorded on a recording medium. is there. In addition, so-called thumbnails for accessing an index image with a plurality of still images are also performed.

  On the other hand, PC peripheral peripheral devices such as a hard disk, an optical disk, and a memory card are provided. In these PC peripheral peripheral devices, digital data is handled in units of logical blocks and recording / reproduction is performed.

  In the PC peripheral peripheral device, in order to input / output digital data via the host PC and the OS, for example, a file arrangement table and hierarchy information are recorded in the head portion of the logical block of the recording medium. Since these file allocation tables and hierarchy information can be updated only by rewriting these contents, logical blocks can be updated without accessing all data during direct access operations such as reading, additional writing, rewriting and erasing to the recording medium. This enables rapid processing for a directly accessed recording medium.

  As an example of such a PC peripheral peripheral device, a motion JPEG (Joint Photographic Coding Experts Group) still image continuous file recording apparatus is provided. This apparatus records a still image of an image compression signal in a PC compatible format, and enables deletion, editing, etc. for each still image.

  Patent documents 1-3 are known as prior art.

Japanese Patent Laid-Open No. 06-236313 Japanese Patent Application Laid-Open No. 09-050375 Japanese Patent Laid-Open No. 08-124294

  However, in the AV signal recording apparatus that directly records the continuous digital data on the logical block of the recording medium as described above, since it is not recorded in the PC compatible format, it is not recognized by the OS, but directly from the PC. Recording is not possible. For this reason, when editing continuous digital data, such as joining digital moving images and cutting mid-time portions of recorded digital moving images, it is recorded in another digital storage accessible from the PC. It was necessary to convert continuous digital data as video once. That is, after all the digital data is read and edited in a digital storage such as a disk or tape, it must be recorded again, which requires a large-scale editing apparatus and a great deal of labor.

  Here, in a digital storage having each sector, which is a physical block for data reading / writing as a minimum logical block obtained by dividing a track, such as a hard disk drive (HDD) on a medium medium, a plurality of sectors or sectors are included. In order to access in units of logical blocks in a cluster unit, when recording data, the data is compressed to match the fixed length data size of the sector or cluster, or the data size is smaller than the sector or cluster size. In some cases, after compression, redundant data is added to match the sector or cluster size. Note that the number of sectors in the cluster is determined by the OS being handled.

  In fact, more easily, writing to a sector unit, which is a physical block used for reading / writing data as the smallest logical block of an HDD or the like, is within the data usable size of one sector in sequential writing for each sector unit. If the writing of valid write data is completed with the amount of data, the drive itself automatically writes the format data as a dummy in the remaining empty data area of one sector, and is written in all the data areas in these one sector. Since all data is combined into one data and an error correction code (ECC) signal for error correction is automatically added to the whole data, even if data is not written from the outside to the free data area, The HDD originally provides data for each sector within the sector data size every time. If, writing and reading of the sector unit was made.

  However, if redundant data is added at the time of data recording as described above, it is necessary to perform processing to extract the data portion according to the data size intermittently in order to remove this redundant data at the time of reproduction. Furthermore, the presence of such redundant data has a low degree of freedom of signal compression that can be selected, which is a discontinuous data access process different from continuous writing and reading of continuous data to continuous sectors. In addition, the recording capacity possessed was further impaired. Therefore, for a digital storage that is desired to be read at a high speed and without interruption, the drive, the connection interface, and the CPU that handles the work are not subject to processing load, the loss of the data capacity of the drive, the connection interface, and the CPU that handles the processing work Incurs an increase in data extraction processing work and processing time, the load is large, and it has been an obstacle to obtaining the highest throughput with large continuous data block transfer.

  In addition, the HDD alone is used as digital storage, and video signals in the smallest random access unit or frame unit can be freely recorded while continuous compressed digital data is continuously recorded by inputting compressed signals from cameras and digital broadcast receivers. It was not possible to perform the access and cut editing operations on the way.

  On the other hand, in the PC peripheral peripheral device, the data described in the PC compatible file format that can be recognized by the OS can be recognized and used. However, if the data is recorded in units of logical blocks as described above, the digital data is converted into a file. The PC could not be used by accessing the file via the OS.

  A file for writing and reading continuous still images as individual still image data files can be accessed by the PC via the OS, but the OS periodically performs interrupt processing of various devices in the PC, Information such as information, file name, and data type is added to the file. For example, in the OS of Windows 95 (trademark of Microsoft), an interrupt is applied about every 55 ms. In this case, since various types of access information are added to each still image, the file management information addition processing operation is more difficult than a moving image 1 file in which compressed data of continuous AV signals is a single continuous data file. As a result, high-speed recording / reproducing processing becomes difficult, and at the same time, processing increases and recording capacity is wasted.

  Furthermore, in order to achieve high-speed smooth writing / reading processing, at least a digital storage that records continuous digital data, and another recording device that reads and transfers the continuous digital data stored in the digital storage and re-records separately. Therefore, an expensive and large-scale editing system including a PC that controls these and performs editing via the OS is required.

  The present invention has been made in view of the above-described problems, and an object thereof is to provide a data reproducing apparatus and a data recording apparatus that can be used as peripheral devices of a computer (PC).

  In order to solve the above-described problem, a data reproducing apparatus according to the present invention includes a detecting unit that detects whether or not a computer is connected, a recording medium control unit that reads a data string from a recording medium, and the data string. And a sending means for sending and a control means for controlling the sending medium and the sending means to reproduce data when it is detected by the detecting means that the computer is not connected to the computer. And

  The data recording apparatus according to the present invention records on a recording medium a detecting means for detecting whether or not the computer is connected, an input means for inputting a data string, and a data string input by the input means. A recording means; and a control means for controlling the recording of the data string by controlling the input means and the recording means when the detecting means detects that the computer is not connected to the computer. And

  Here, the data string may be audio / video data, and the recording medium may be an optical disk, a hard disk, or a memory storage medium.

  According to the present invention, it is possible to provide a data reproducing apparatus and a data recording apparatus capable of reproducing data and recording data independently as a peripheral device of the computer when connected to a computer, and when not connected to the computer. it can.

  Hereinafter, specific embodiments to which the present invention is applied will be described in detail with reference to the drawings.

  As shown in FIG. 1, a data recording apparatus as an example of an embodiment of the present invention has a monitor connected to a camera-integrated HDD. Specifically, the apparatus includes a disk mechanism unit 1 including a disk medium for recording data and a mechanism for driving the disk medium, and a recording / reproducing unit 5 for recording / reproducing the disk medium of the disk mechanism unit 1. Similarly, a drive system control unit 6 that controls the drive system of the disk mechanism unit 1, and a disk control unit 10 that controls data processing in the disk mechanism unit 1 via the recording / reproducing unit 5 and the drive system control unit 6, It consists of each part. The disk control unit 10 is connected to a camera 51 and a microphone 52 that input AV signals to the disk control unit 10 and a monitor 53 that can monitor the editing process in the disk control unit 10. Yes.

  The disk mechanism unit 1 includes a disk medium 3 on which a disk-shaped substrate coated with a magnetic material is rotated by being driven with a single or a plurality of disks disposed on the same rotation axis, and data is recorded by residual magnetization. The head arm 4 is arranged so as to be close to the disk medium 3 so as to be movable in the radial direction and records and reproduces data by magnetic interaction, and the disk medium 3 is rotated at a predetermined angular velocity. And a rotation drive unit (not shown) for driving.

  The recording / reproducing unit 5 controls the channel coding process for data to be read / written on each physical block of the disk medium 3, and at the same time, the user reads / writes data as a small logical block. An ECC that applies error correction polynomial processing correction to the entire data of one sector data area of a sector that is a usable physical block is added, and error correction that can be corrected using this ECC at the time of recording and reading is performed. By performing the data reading process, high-quality signal data is recorded and reproduced. The drive system control unit 6 obtains head tracking position information and rotary disk drive servo information from the servo signal read from the rotary drive unit of the disk mechanism unit 1 and the track servo information of the disk mechanism unit 1, Based on the information, the head arm 4 of the disk mechanism unit 1 and the rotation driving unit are servo-controlled.

  The disk control unit 10 includes a disk interface 25 that performs adjustment when data is transferred to and from the disk control unit 10 via the recording / reproducing unit 5 and the drive system control unit 6 with respect to the disk mechanism unit 1. A buffer 30 for temporarily storing data to be transferred via the interface 25 and a buffer control unit 26 for controlling the buffer 30 are provided.

  The disk interface unit 25 exchanges recording write signals and reproduction read signals with the recording / reproducing unit 5, and servos that have been recorded on the tracks and are read out during recording / reproduction and used for drive system control control. Read the signal. In addition, the disk interface unit 25 communicates with the drive system control unit 6 to the control signal read from the disk mechanism unit 1 and the physical block of the disk medium 3 by the firmware provided in the drive system control unit 6. The position control of the head arm 4 and the servo control of the rotation speed and the phase are performed for the rotation drive mechanism.

  The buffer 30 performs a first-in first-out (FIFO) operation under the control of the buffer control unit 26 for performing an address switching operation of a plurality of bank memories configured with a data size that is an integral multiple of each sector of the disk. This is a bank memory type RAM, which performs write processing and read processing in units of sectors of write processing and read processing to the buffer 30, and further performs parallel processing operations by bank memory switching control by switching in units of a plurality of bank memories. Is possible.

  The data write / read characteristics of the disk storage may be discontinuous in time in units of sectors, and each bank memory to be switched is adapted to this characteristic in one logical block for writing / reading to / from each bank memory. As each data small unit size, here, as an illustrative example, bank memory switching is performed in units of one sector (= 512 bytes) which is one physical block handled by a normal disk controller. In a low-cost drive, an integer multiple of data in each column when using a DRAM that performs column-by-column access of each data byte in a matrix processing address access to the data processing main memory is used as a 1-bank memory switching unit, Host P accessed via external PC bus One cluster which is one logical block consistent with the handling of the OS and an integer multiple thereof are used as one bank memory switching unit, or a data block unit in a transmission block in the case of transmission / reception of transmission data from the outside and its It is possible to use an integer multiple as a 1-bank memory switching unit.

  Here, in order to simplify the hardware configuration, a part of the RAM area constituting the buffer 30 is reserved for exclusive use, and hardware capable of accessing the above area is prepared for logical block control. It is used as a data register 30a for the CPU, a control register 30b for the microprocessor bus necessary for the PC peripheral device, and a status register 30c for corresponding to the architecture of the status status register (CSR).

  The buffer control unit 26 controls the buffer 30 to temporarily accumulate data in a predetermined case. The buffer control unit 26 exchanges data and exchanges control information with the disk interface unit 25, and transmits data from the host PC or AV signal input / output connection unit 31 via the PC / AV signal switching unit 27. Accepts and receives commands and status.

  The disk control unit 10 includes a PC interface unit 29 that adjusts data exchange with a PC peripheral unit, an AV signal input / output connection unit 31 that performs input / output connection of an AV signal to an external camera 51 and the like. And a PC / AV signal switching unit 27 for selecting the PC interface unit 29 and the AV signal input / output connection unit 31 and transferring data to the buffer control unit 26 and the editing control unit. Have.

  The PC interface unit 29 performs ATA (AT attachment), SCSI (small computer system interface) format, and serial data isochronous transfer to and from the drive register by parallel data transfer. It corresponds to an interface for a PC peripheral of an ordinary HDD in the IEEE 1394 format, and SCSI connection can be cited as an example of this specific example. When the host PC is connected to the connector, the PC interface 29 operates to detect this and switch the PC / AV signal switching unit 27 to the PC side.

  When the host PC is not connected, the AV signal input / output connection unit 31 inputs and writes the AV signal from the external camera 51 and the microphone 52 to the disk medium 3 by the driving operation of this apparatus. The AV signal input / output connection unit 31 outputs the AV signal read from the disk medium 3 to the monitor 53 and a speaker 53a included in the monitor 53, or a headphone or an earphone (not shown).

  Here, when the AV signal is recorded and written from the camera 51 to the disk medium 3 at the same time, the AV signal from the camera 51 and the microphone 52 is simultaneously displayed on the monitor 53. When reproducing from the disk medium 3, the AV signal header detection unit 28 provided in the PC / AV signal switching unit 27 waits for the AV signal header to be detected, and then outputs the AV signal to the monitor 53. When the header is not detected by the AV signal header detection unit 28, the AV signal is determined to be a PC digital signal, and the output from the AV signal input / output connection unit 31 is muted. This means, for example, that the video is displayed in a blue background and the audio is silent.

  The PC / AV signal switching unit 27 switches and selects a data path between the PC interface 29 or the AV signal input / output connection unit 31 and the buffer controller 26 and the editing control unit 11. The PC / AV signal switching unit 27 includes an AV signal header detection unit 28 therein.

  The AV signal header detection unit 28 detects a frame signal that is a frame delimiter of the video stream from the continuous stream data. Here, the continuous stream data refers to a header subcode signal that is a DV standard fixed-length frame signal header that is a fixed-length compressed signal in units of frames, or a random variable-length frame signal of an MPEG2 compressed signal that is a variable-length compressed signal. A packet header, a GOP, or the like, which is a minimum access unit header, can be used.

  As shown in FIG. 2, the AV signal header detection unit 28 includes a mode switching control register 201, a first mode switching switch 202, a second mode switching switch 203, a PC file end code detection unit 204, A DV frame head detection unit 205, an MPEG2 GOP head detection unit 206, and an MPEG2, AV stream, and packet head detection unit 207 are configured.

  The mode switching control register 201 is supplied with a control signal from the disk controller 10, and the mode switching control register 201 controls the first mode switching switch 202 and the second mode switching switch 203. .

  The first mode changeover switch 202 is supplied with a control signal from the mode changeover control register 201 and a data bus signal, and an output signal is supplied to the PC file end code detection unit 204.

  The mode switch control register 201 and the data bus signal are input to the second mode switch 203. The output signal of the second mode changeover switch 203 is supplied to the DV frame head detection unit 205, the MPEG2 GOP head detection unit 206, and the MPEG2 and AV stream packet head detection unit 207.

  The PC file end code, position, and address data from the PC file end code detection unit 204 are received from the DV frame start detection unit 205, MPEG2 start detection unit 206, and MPEG2, AV stream, packet start detection unit 207. Frame, packet unit detection, and position address data are output, and these are supplied to the disk controller 10 via a data bus.

  The detection circuit for detecting the frame unit from the continuous stream data receives the control signal from the controller to change the state state of the detection circuit to enter the header detection mode, and enters the header detection mode. This is performed by detecting the sample data code temporarily expanded in the hardware in the state machine or a predetermined memory. In the case of a fixed-length DV signal, for example, a subcode data sequence existing for each block of a 149-byte sequence excluding the first 1 byte for serial transfer of a 150-byte sequence is detected. In this case, it is possible to detect the head of the GOP that is the minimum unit of random access by detecting the data code of the start code 000001B8 (h). Alternatively, when a random access unit is used by a start code of a picture that replaces a GOP, it is detected by detecting that the start code of the picture layer and the subsequent picture type are I.

  The PC / AV signal switching unit 27 includes an AV signal header detection unit 28 for the AV signal stream write input from the outside by detecting the start position of the frame in this apparatus. For the AV signal stream read output read from the disk medium 3, in order to deal with the disturbance due to the temporal order of the continuous signal in the re-execution due to omission of the AV signal stream due to a disk defect. It is. That is, in response to the disturbance, the read data stream signal of the AV signal is temporarily stored in the buffer 30 that can be switched to the state state of the accumulation mode, and reading from the disk medium 3 is interrupted and held in the buffer 30. This is because a logical block edit position search is performed using data.

  Further, the disk control unit 10 includes an editing control unit 11 that controls a series of operations such as data editing, an editing input unit 23 that is operated by the user with respect to the editing control unit 11, and the editing control unit 11. And an edit display unit 24 for displaying the editing status and the like.

  As will be described later, the editing control unit 11 additionally has various functions capable of controlling the writing and reading of AV signals by this apparatus alone, in addition to the various control functions of a normal PC peripheral hard disk.

  The edit input unit 23 inputs various operations including a join shooting write event operation input, an edit point operation input, and a partial deletion operation input using a keyboard, buttons, and the like of the operation panel.

  The edit display unit 24 displays various edit information and edit operation inputs on the display panel including selective display of current time information from the built-in clock 21.

  The editing control unit 11 includes an MPU 12 serving as a central processing unit, a ROM unit 13 serving as a nonvolatile memory, a logical block control unit 17 for controlling a logical block in writing to the disk medium 3, and an editing input. An edit input control unit 18 that controls the edit input unit 23 via the interface 19, an edit display control unit 20 that controls the edit display unit 24, and a built-in clock that supplies timing signals to each unit of the edit control unit 11 21 is connected to the shared bus 22.

  The MPU 12 controls a series of steps in the editing operation in the editing control unit 11 based on the control code read from the ROM unit 13 or the like.

  The logical block control unit 17 is a direct AV editing register control unit inside the disk device. That is, it is a control unit for performing an editing operation at the time of direct AV signal writing / reading by a single disk drive by reading / writing data of a specific logical block of the disk medium 3.

  The ROM unit 13 includes a first ROM 14, a second ROM 15, and a third ROM 16. The ROM unit 13 includes various parameters and controls for controlling the disk control unit 10, buffer control unit 26, PC interface 29, AV signal input / output connection unit 31, various register control units for PC, logical block control unit 17, and the like. The procedure is stored, and various processing operations are performed by the access reading of the MPU 12.

  The first ROM 14 is a shared parameter storage unit, and a disk medium 3 that is a physical block that is a basic common process of a disk drive with respect to a drive as a PC peripheral and a drive as a disk storage of an AV signal. A sector block, servo control, and defect information processing procedures are included, and a defect-free logical block is provided as a user area.

  The second ROM 15 is a storage section for control procedures and parameters as a single AV signal recording / reproducing device of the disk medium 3, and an edit data storage section 15a for recording the control procedure and parameter description of edit data, and an AV signal. On the other hand, it is a recording / reproducing storage unit having a logical block storage unit 15b that can be used as a logical block storage necessary for the initial use of the disk medium 3 alone.

  The logical block storage unit 15b uses the entire user area of the disk logical block after being reformatted from the host PC as the AV signal disk storage, and describes the internal description of the first area and the second area described later. Used to write and use. That is, in the first area, the boot block, an internal medium media table such as FAT (file allocation table), and AV signal data of each PC compatible file in the third area to be secured are written as directory information data. The file directory information and the second area include as data the start point of the first editing instruction section and the access point to the start start position of the third area as the number of used data in the start block.

  The third ROM 16 is a host connection storage unit having a control / status / data control procedure and a parameter storage unit connected to the host PC as an HDD for a normal PC peripheral.

  The edit input control unit 18 receives user operation input such as an edit index point designation location from the edit input unit 23 via the edit input interface unit 19.

  The edit display control unit 20 performs display control of an edit operation including an edit number, a start / end point, and time information from the disk medium 3, and displays the edit display unit 24 such as a liquid crystal panel operation unit attached to the disk drive. To do.

  The shared bus 22 is a drive internal bus for address, data, and internal control, and performs flow control based on a predetermined control procedure by access flow control processing of the MPU 12.

  Next, a data recording method in the user area of the disk medium 3 of this data recording apparatus will be described.

  As shown in FIG. 3, the disk medium 3 has a defect-free logical block area in a cluster unit which is a logical block unit recognized by the OS as a user area on the magnetic material coating layer on the main surface of the disk medium 3. Have. The logical block area includes a replacement area 3a, a parameter area 3b, and a defect list 3c.

  The defect-free logical block area as the user area is defined by the OS as a set of one or a plurality of sectors that can be read and written by the user among the sectors used by dividing the track on the medium medium into each physical block. It is a cluster collection area that is a logical block that is recognized, accessed, and handled, and a user accesses the cluster unit via the OS.

  The cluster size is variable between 1 and 64 kbytes, but the most widely used size is 512 bytes. This corresponds to the OS system of DOS. Incidentally, in the case of a small-capacity PC card type recording medium and PC card type HDD, it may take a value of 512 bytes or less. In the file system of Unix (ATT trademark), 4 kbytes, VFAT16 of Windows (trademark of Microsoft) An example is known in which an upper limit of 32 kbytes is taken for a large-capacity HDD, and 4 kbytes are handled with one cluster size in the FAT32 of Windows.

  The replacement area 3a is an area in which replacement processing in units of blocks is performed on a defective physical sector / cylinder based on detection of the defect list 3c in the physical disk area corresponding to the user area, and is free of defects. Used to provide a logical block as a user area.

  The parameter area 3b is an area for recording a mode parameter describing a physical block arrangement pattern in the disk. For example, in a SCSI-type HDD for zone bit recording of concentric circular tracks, the block length of each track in each zone is set. Includes descriptions.

  The defect list 3c is based on the detection of a defect list existing at the time of shipment from the factory, and a defect sector in units of physical blocks based on detection of a defect list G-List that is generated and increased with the use time. This is an area for writing disk defect information for replacement processing.

  Next, an internal description of the user area of the disk medium 3 will be described. The logical block area corresponding to this user area is composed of three areas: a first area, a second area, and a third area.

  When this logical block area is used in the MS-DOS compatible system disk format, as shown in FIG. 4, the first area 71 is the IPL 72 which is a boot block and the contents information of the stored file. It includes a FAT 73 composed of file allocation table information and a directory information data area 74 which is file hierarchy content information. The FAT 73 holds information on a file name 73a, an attribute 73b, and a time 73c. In the normal DOS format, a copy of the FAT is subsequently prepared and arranged in order to cope with the case where the entire file system on the disk becomes unreadable due to data destruction due to a defect in the medium of the FAT area. Has been. The directory information data area 74 holds directory information for each continuous data filed in the MS-DOS compatible format, which is the OS format in the present description, recorded in the logical block area of the third area 80. .

  The second area 76 is an edit point instruction section, and holds edit point instruction sections respectively corresponding to a plurality of continuous recording data in the third area 80 which is a logical block area for directly recording data. In the figure, the same information as that of the first edit point instruction unit 77 that holds the start point 77a as start block position information, the end point 77b as end block position information, a time 77c, and the number of used data in block 77d. A second edit point instruction unit 78 and a third edit point instruction unit 79 are shown.

  Here, the end point, which is the end block position information, is written in the edit point instruction section, thereby enabling direct access to the end of the continuous data. As a result, the efficiency of the work can be improved in the editing work in which the head of another continuous data is connected to the end of one continuous data, for example.

  The third area 80 is a logical block area in which data is directly recorded, and serves as a logical block access unit of the disk storage in which continuous data is written and read based on continuous logical block numbers.

  The logical block area 70 may be configured as a data-dedicated disk used in the case of a medium replacement disk in which the boot block is omitted even if it is an MS-DOS compatible disk. In this case, as shown in FIG. 5, the first area 71 includes a FAT 73 and a directory information data area 74, and the IPL 72 in FIG. 4 does not exist. Since the second area 76 and the third area 80 in the logical block 70 are the same as those of the MS-DOS compatible disk in which the boot block is not omitted, a common reference numeral is given and description thereof is omitted. .

  Next, a series of steps related to pre-processing until the data recording apparatus enters an editing operation when the data recording apparatus is connected to the host PC will be described.

  As shown in FIG. 6, this series of steps includes eight steps from Step S1 to Step S8.

  In this series of steps, the control procedure is started in response to the host PC being connected to the connector of the PC interface 29. That is, the first ROM 14 and the third ROM 16 of the editing control unit 11 are read out, and the disk control unit 30 uses the data register 30a, the control register 30b, and the status register 30c included in the buffer 30 to control the disk medium 3. It is started by performing a writing / reading process.

  In step S1, the IPL 72 and FAT 73 of the first area 71 of the logical block 70 of the disk medium 3 are acquired, and in the subsequent step S2, the directory information data 74 of the first area 71 is read, and the process proceeds to step S3. move on.

  In step S3, based on the information obtained in steps S1 and S2, the file editing access information in the second area 76 of the logical block area 70 of the disk medium 3 and the plurality of pieces of information written in the third area 80 are written. It is confirmed that the continuous data file is recognized as a compatible file, and the logical block address range of the third area is secured as a writing area as a continuous data recording file. Then, the process proceeds to the next step S4.

  Step S4 is a process of making an application call on the OS corresponding to the file format access shown in FIG. 4 from the host PC side. In subsequent step S5, it is determined whether or not a corresponding application exists in the host PC. If an application exists, “YES” is determined and the process proceeds to step S7. If no application is present, “NO” is determined and the process proceeds to step S6.

  In step S6, since there is no corresponding application, the editing position order information for the DOS compatible file existing in the third area 80 that recognizes and accesses the directory indicated in the directory information data area 74 of the first area 71 is displayed. The access pointer to the described second area 76 cannot be obtained, so this series of processes is stopped and the process returns to the OS.

  In step S7, an interrupt entry is made to the OS process by the disk driver class incorporated in the application corresponding to the file format access, and the process proceeds to the next step S8.

  In step S8, based on the processing in step S7, the pointer of the edit point instruction unit in the second area 76 of the logical block area 70 is obtained and accessed by the built-in disk driver. Then, the start / end access pointers of the plurality of edit point instruction sections that have been read are stored and held, and various access read processing is performed on the host PC based on this.

  Here, when the application is activated in the host PC, it is possible to speed up the transfer of the multimedia continuous data to the PC host bus. That is, the host PC side determines the priority of interrupt processing for various peripherals on its internal bus, and provides an address range in the access window space for allocating registers for commands, status, and transfer data. ing. Of the many peripheral devices on the host bus, in the host PC, the HDD device priority is usually set to a medium level and the driver software is set to the lowest level. Interrupts of HDD and transfer channel device drivers rather than interrupt requests IRQ from floppy disk drivers, keyboard drivers, etc., excluding the minimum necessary important peripherals currently in use such as screen display, audio, communication, mouse, etc. The data transfer rate can be improved by reducing the number of interruptions to the buses of other peripherals during continuous data transfer by rearranging the priorities to the top.

  In some cases, it is possible to effectively improve access speed processing by temporarily expanding and securing the address range as an access window section for the HDD. In particular, in the case of a PC card type movable HDD, an address range as an access window that should originally be possessed as an HDD is divided into a plurality of subdivisions in the case of a PC card. Access can be improved by rearranging the address range to a free area and expanding the continuous address range.

  Next, a series of steps when performing data storage of AV signals by this data recording apparatus alone without receiving control from the host PC will be described. As shown in FIG. 7, this series of steps includes three steps from step S11 to step S13.

  This series of processes is started when the disk mechanism unit 1 is activated and the host PC is disconnected from the connector of the PC interface 29. That is, in this series of steps, the first ROM 14 and the second ROM 15 of the editing control means 11 are read out, and the start point storage unit, end point storage unit, and write last block used byte number storage of the logical block control unit 17 are stored. And a processing area for securing and activating a work area for the microprocessor on the memory.

  In step S11, the end of the IPL 72 in the first area 71 of the logical block area 70 of the disk medium 3 is recognized. For MS-DOS, for example, a data string of 55AAh is recognized or the FAT 73 is started subsequently. And proceeds to the next step S12.

  In step S12, the editing data control procedure is read from the editing data storage unit 15a of the second ROM 15, and in the subsequent step S13, the head of the multiple editing instruction unit in the second area 76 corresponding to the access pointer is accessed. Then, the start / end access pointers of a plurality of edit point instruction units are read out, and the process continues to various access read / edit / write processes on the host PC based on the edit data control procedure. This completes this series of steps.

  Next, a series of processes relating to the first area 71, the second area 76, and the third area 80 constituting the logical block area 70 will be described with reference to FIG. 1, FIG. 3, and FIG.

  First, the shared parameter control procedure recorded in the first ROM 14 of the ROM unit 13 included in the editing control unit 11 of the data recording apparatus shown in FIG. 1 is read. Then, the replacement area 3a, the parameter area 3b, and the defect list 3c of the disk medium 3 shown in FIG. 3 are read from the disk and referred to, and the disk block 3 is a physical block that is a basic common process of the disk mechanism unit 1. Sector arrangement, servo control, and defect information processing procedures are performed to provide a defect-free logical block area 70 as a user area.

  At the start of use, usually, the logical block format is already applied in the factory-shipped disk initial state, and in addition to this, writing to the portion corresponding to the first area 71 is performed.

  Then, the logical block storage unit 15b of the second ROM 15 is read, and the boot block information, the FAT information, and the address range of the predetermined logical block in the third area having a size corresponding to the necessity are recorded in the AV continuous data file. FAT information and directory information data that are reserved on the disk for use are written in the IPL 72, FAT 73, and directory information data area 74 in the first area shown in FIG. At this time, when the time information at the time of processing can be obtained from the built-in clock 21 included in the editing control unit 11 shown in FIG. 1, the time data is acquired and written in addition to the FAT.

  Subsequently, the editing data control procedure / parameter is read from the logic block area 15 b of the second ROM 15. Furthermore, an edit index point is acquired from the edit input control unit 18 and read into the start point storage unit, end point storage unit, and write last block used byte number storage unit of the logical block control unit 17.

  Then, according to each editing control procedure to be described later, the AV signal header detection unit 28 is used to read and write to each editing instruction unit in the second area 75 in the logical block area 70 of the user area, and perform the second writing. The direct data recording logical block area existing in the area 80 is accessed.

  Next, an example of a continuous shooting operation in this data recording apparatus will be described with reference to FIG. This figure schematically shows the occupied data occupation state of the bank memory type FIFO 91 of the buffer 30 of the disk control unit 10. In the figure, the right end and the left end of the bar are the data entry and exit, respectively, and the data proceeds from right to left.

  First, in the third area 80 of the logical block area 70, data is read from the last logical block of the first continuous data previously written, and the RAM of the RAM shown in FIG. The data is put into the bank memory format FIFO 91 for address switching control in units of sectors in the buffer 30 in order from the head side at the time of writing. This is a data amount smaller than one logical block.

  Here, 91a in the figure is a portion of occupied data, and 91b and 91c are portions without occupied data. Note that the bank memory format FIFO 91 referred to here is first entered in units of bank memory by address switching in units of bank memory by a plurality of normal memories and a controller for memory access, or by a combination of high-speed cache memory and normal memory. It has an operation function of fetching data in bank memory units first.

  In addition to this, the bank memory type FIFO 91 is a bank that can perform the writing process to the memory and the reading process from the memory independently in parallel by the memory controller address switching control within the period of each required switching period. In addition to having the operation function of fetching data that has entered first in memory units first, in addition to bank memory units, it is necessary to perform the switching process required for each cycle. It has a pipeline operation function of data for each addressed size data of the bank memory that can be performed in parallel by switching control. One bank memory unit can be used to switch between multiple memories using one memory as a unit, or to use a normal memory together with a cache memory that is much faster than twice the normal memory. By increasing the speed, one memory can be divided into a plurality of areas based on addresses. Then, in the state as it is, standby is performed in a continuous shooting standby state. When a write start event input is received, subsequently written data is sequentially written to the bank memory type FIFO 91 in the state state which is successively switched to the accumulation mode. In the figure, 91b in B is the data accumulated continuously.

  Here, since one sector is one bank memory switching unit, the fact that one sector of data has been stored is detected by the data count counter that detects the amount of data stored in one bank memory in the bank memory type FIFO 91 and stored on the disk. Thereafter, the bank memory type FIFO 91 is switched to the pipeline operation mode to start writing to the disk. For example, in C in the figure, writing is sequentially performed from the head of the occupied data of the bank memory format FIFO 91.

  At the actual end of recording, in response to a write end event input from the edit input control unit 18, the data is terminated in units of one frame of continuous compressed data by the frame detection signal detected by the AV signal header detection unit 28. By repeating this for each shooting, the data continuity of the continuous compressed data is ensured.

  In this specific example, one sector which is one physical block is described as one logical block. However, when there are a plurality of physical blocks in one logical block, defective physical sectors or Data transfer is interrupted during this period due to the occurrence of replacement processing and seek processing due to predicted track jump and cylinder jump, and this causes insufficient data transfer for each bank memory for each bank switching cycle. If it is the data transfer speed to be used, it is necessary to prepare another bank memory to prepare for it in advance. Even in this case, the stitching of the stitching is configured as a continuous data string of AV compressed signals. Further, in a continuous data file recorded as a DOS compatible file, its end code exists at the end of the file, and 1Ah is added as its end code to the MS-DOS compatible file format. In the case of a DV signal which is a fixed-length compressed video / audio signal, the frame signal unit is 149 blocks × 10 serial block units excluding the IEEE1394 header byte for isochronous transfer, and 1 for a DV signal which is a fixed-length compressed video / audio signal. 119200 bytes of the frame are established.

  In this serial data block, since there are sub-data blocks that follow the 80-byte header string in which the medium information such as cassette is written and the first five serial data of the frame, the frame head position This header frame detection circuit overwrites and erases the file end code when it is converted to a PC file when cut editing is performed in units of frames, and the continuous recording is continuously written in units of frames. Make it possible. This synchronous frame detection circuit is also incorporated in CXD2194, which is a link IC for IEEE 1394 DV signals, for example.

  In the case of MPEG2 as an example of the variable length compressed video / audio signal, GOP, which is the smallest random access unit in the sequence layer, or if there is not, editing is continued for each I frame of the picture layer, By detecting the header code 000001B3 (h), which is the sequence layer start synchronization code, the GOP delimiter is the GOP start synchronization code 000001B8 (h) or an alternative picture layer start synchronization code 00000100 (h). It is possible to continue editing by detecting and controlling the subsequent picture type I. This GOP or picture is also used in the random access playback function IC of the MPEG2 decoder IC corresponding to variable playback and editing which can control and use a playback data buffer having a size more than double the size of the playback data buffer assumed by the MPEG2 standard playback. Some have built-in functional blocks that perform layer start synchronization detection and picture type I discrimination detection.

  Next, processing related to the user area internal area at the time of the stitching operation will be described.

  As described above, the logical block area 70 corresponding to the user area of the disk medium 3 has three types of areas, that is, a first area 71, a second area 76, and a third area 80, as shown in FIG. Consists of

  In the second area 76, a first editing instruction unit 77, a second editing instruction unit 78, and an editing instruction unit below the third editing instruction unit 74 are provided corresponding to a plurality of splicing. . The third area 80 is an area where AV signals are directly recorded, and the first continuous data area 80a extends over a plurality of logical blocks indicated by blocks in the third area 80 in the figure. It is recorded.

  Here, the instruction access pointers of the start point 77a that is the start block position information of the first edit instruction unit 77 and the end point 77b that is the end block position information of the second area 76 are the first access point of the third area 80. This indicates the start position of the first logical block and the start position of the last logical block in the continuous data area 80a. The time 77c of the first editing instruction section 77 indicates the first continuous data recording start event occurrence time based on the built-in clock 21. The in-block use data number 77d of the first editing instruction unit 77 indicates the position P1 corresponding to the in-block use data number inside the last logical block of the first continuous data area 80a.

  The instruction access pointer of the start point 78a, which is the start block position information of the second edit instruction section 78 of the second area 76, indicates the head position of the first logical block of the second continuous data area 80b of the third area 80. ing. In the description of splicing here, as an example of the minimum necessary, in actual access, the number of used data P1 in the last block of the first continuous data area 80a is used to determine the second continuous data area. You are accessing the top. In this case, as a matter of course, an area for storing the number of used data in each block at the start point and the end point may be provided in the second area 76 as in the case of an edit cut described later.

  The instruction access pointer of the end point 78b, which is the end block position information of the second edit instruction section 78 of the second area 76, indicates the start position of the last logical block of the second continuous data area 80b of the third area 80. pointing. Further, at the time 78c of the second editing instruction section 78, the recording start event occurrence time of the second continuous data area 80b is recorded based on the built-in clock 21. Further, the in-block use data in the second continuous data area 80b of the third area 80 is included in the in-block use data number 78d of the second edit point instruction section 78. The position P2 corresponding to the number is indicated.

  Next, a series of steps related to the stitching process will be described with reference to FIG.

  In step S21, if the end data of the IPL that is the boot block of the first area 71 of the physical block corresponding to the user area of the disk medium 3 is confirmed, the head position of the editing instruction section of the second area 76 is directly accessed. In subsequent step S21a, the logical block numbers of the start point and end point of the previously recorded continuous data area are acquired. When there are a plurality of recording data, the start points and end points of all the plurality of editing instruction units may be acquired. Then, the process proceeds to next Step S22.

  In step S22, the start point and end point of the acquired editing instruction part are displayed on the display part. In subsequent step S23, when there is a selection input from the editing input part 23, the logical block of the end point of the data To access and place. If there is no instruction input, the latest data recording time is read from the editing instruction section in the second area 76, the logical block at the end of the direct recording data is accessed, and the process proceeds to step S24.

  In step S24, the data written from the last logical block in the continuous data write logical block to be joined in the user area is read out. In step S24a, the in-block use data read from the last logical block is disc-controlled. The buffer 30 via the buffer control unit 26 of the unit 10 is sequentially accumulated from the top of the writing order, and the process proceeds to step S25.

  In step S25, after the accumulation of the data of the end block in the buffer 30 is completed, the standby state waiting for a write event is entered, and the standby state is displayed on the editing display means 24 in step S26. Then, the process proceeds to next Step S27.

  In step S27, the input memory bank FIFO method 91 is used for the write event issued by the edit input means receiving the input from the edit input means section 23 and the recording start event given to the process of step S25 waiting in standby. The input process to the buffer 30 is performed, and the process proceeds to the subsequent step S28.

  In step S28, a logical block in-frame joining operation process is performed. That is, after the data accumulated in step S24a, new input data is sequentially written to the buffer 30, and when the data accumulation amount in the buffer 30 is stored for one logical sector, the counter for counting the data accumulation amount is set to one logic. Count up by sectors. The process branches depending on whether the number of accumulated data has reached the number of one logical block data. That is, if the amount of accumulated data reaches one logical block, the process proceeds to step S29 with "YES", and if the accumulated data does not reach one logical block, the process returns to step S27 with "NO".

  In step S29, the writing of the data in the buffer 30 to the disk medium 3 is started. In the next step S30, the recording of this continuous shooting is performed as a frame unit pulse of the AV signal header detection unit 28 via the buffer 30. The direct data writing to the third area 80 of the logical block area corresponding to the user area 70 of the disk is terminated. Then, in the second edit instruction section 78 of the edit instruction section, which is the second area 75 of the user area 70 shown in FIG. 9, the start point 78a is used as the start block position information of the logical block written this time by splicing. , End point 78b is the end block position information as the end block position information, end time 78c is acquired from the built-in clock 21, and the number of data used in the block at the end of writing is used in the block. By writing the data number 78d, this series of steps is completed.

  In this series of steps, even if the continuous data is compressed data, the AV continuous signal has a signal frame structure. Therefore, even in continuous recording of the disk drive, the write data in one logical block of the disk medium 3 is recorded. Continuity can be maintained.

  Next, an editing process for cutting an intermediate portion of recorded continuous data will be described.

  Here, as shown in FIG. 11, the edit point instruction section that is the second area 76 of the user area 70 includes a plurality of first instruction sections 77, second instruction sections 78, and third instruction sections 79. The editing instruction section is provided. Further, for example, the first instruction unit 77 includes a start point 77a and an end point 77b that respectively indicate a start position and an end position in units of logical blocks, a time 77c that indicates a recording time, and a data number 77d in the start block. The number of data in the end block 77e. These are provided in order to require a plurality of edit instruction sections for starting and ending a plurality of edits in order to perform a plurality of edit cuts.

  Subsequently, the processing of the data in the buffer 30 of the bank memory type FIFO 91 in the editing related to the cut of the middle portion of the continuous data area written in the third area 80 of the logical block corresponding to the user area 70 will be described. To do.

  Data is read from the continuous data area of the third area 80 into the bank memory type FIFO 91 of the buffer 30. This data is simultaneously displayed on an external display such as the edit display unit 24 as indicated by A in FIG. 12, and the operator can input edit points while searching. In the figure, a first edit point P1 and a second edit point are shown.

  Based on the edit point input, in the bank memory type FIFO 91, as indicated by B in the figure, the number of disk data from the start point of the corresponding one logical block is read by a search from the forward direction or the reverse direction. Thereafter, the frame start point after the start point in each logical block is searched, and if found, the edit point is replaced at that point. If not found, the frame start point is sequentially searched for in the subsequent logical blocks and replaced as soon as it is found. A first frame start point P1 ′ and a second frame start point P2 ′ in the figure are frame start points corresponding to the first edit point P1 and the second edit point, respectively. The first edit point P1 and the second edit point P2 are replaced with the new first frame start point P1 ′ and the new second frame start point P2 ′.

  Then, each start point and end point edit instruction point data corresponding to each continuous data is written in the second area 76 of the user area 70. That is, as indicated by C in the figure, in the bank memory type FIFO 91, from the start point of the logical block at the head of the third area 80 to the new first edit point P1 ′ and from the new second edit point P2 ′ to the end. The occupancy data corresponding to the above is divided and deleted, respectively. That is, the continuous data area 91a and the continuous data area 91b in the bank memory type FIFO 91 are continuously written as the continuous data area in the third area 80, and the occupied data areas 91a and 91b are deleted.

  Next, a series of procedures related to the cutting of the editing part in the user area 70 will be described.

  In the third area 80 in which data is directly written in the user area 70, continuous data written in the first continuous data area 80a as one piece of direct recording data to be subjected to the cutting process in the middle of editing The operation when the cut process is performed will be described.

  As shown in FIG. 13, this series of procedures is started by directly reproducing data from the disk medium 3 in step S31. In the case of data reproduction from a disk medium, the recording data to be reproduced is recorded based on the above-described joining shooting operation, and the recording end is based on the frame detection of the AV frame detection unit 28.

  Here, the first editing point instruction unit 77 of the second area 76 of the user area 70 is instructed corresponding to the start data position and end data position of the first continuous data area 80a of the third area 80. The start point 77a as the start block position information, the end point 77b as the end block position information, the time 77c, the number of data in start block 77d, and the number of data in end block 77e are written. It is assumed that the start / end instruction range of the third area 80 is reproduced based on the above. Then, the process proceeds to the next step S32.

  In step S42, the user determines an edit cut position for the one continuous record data to be reproduced while monitoring the reproduction screen displayed on the monitor 53. In step S43, the start point of the midway cut processing section is determined. The edit index point instruction input indicating the range from the end point to the end point is input to the edit input unit 23. In step S44, the logical block control unit 17 of the disk control unit 10 is input from the edit input unit 23, and the edit input control unit 18 is used to input a new first end point designation that is the start point of a new cut processing section and a new second start point designation that is the end point of the cut processing section to the logical block control unit 17. . Here, in order to execute the multi-edit cut processing, the flag 1 to n of the editing point is initialized and prepared on the processing procedure program, and if there is editing, the first editing is set by setting 1 Corresponding to indicate whether the editing of the instruction section is handled.

  In step S32, the recording / reproducing unit 2 repeats the counting up of the number of logical blocks and the counting up of the number of read data at the current time for each logical block in parallel with the reproduction of the continuous data recorded on the disk. And proceed to step S33.

  In step S33, a new new first end point designation that is input from the edit input unit 23 and is the start point of the cut processing section to the logical block control unit 17 via the edit input control unit 18, and the end of the cut processing section. By inputting the new second start point designation as a point, the new first end point 77b ′ and the new first end block use data number 77e ′, which are the logical block numbers corresponding to these, are transferred from the count counter to the register. Latch recording. The new first end point 77b ′ and the new first end block use data number 77e ′ are stored as start position instructions of the cut processing section. Further, the new second start point 77a ′ and the new second start block use number 77d ′ are latched and stored in the register from the count counter. The new second start point 77a ′ and the new second start block use number 77d ′ are stored as end position instructions of the cut processing section.

  In step S34 to step S36 and step S45, in order to replace these newly designated cut edit points with the positions of the AV frame breaks in the continuous data signal, the start data position of the 23 parts of the edit input from the disk medium 3, In response to the end data position instruction, the continuous data in the first continuous data area 80a in the third area 80 of the disk data is read, and the AV signal header detector 28 detects the AV frame delimiter. Enter the process to change the number of data.

  That is, in step S34, the logical block data of the logical block number corresponding to the new first end point 77b ′ and the new first end block used data number 77e ′, which are register stores of the start position instruction of the cut processing section. Is read from the disk medium 3, and the process proceeds to the next step S35.

  In step S35, a process for replacing the continuous data signal of the cut edit point to the frame head position is performed. That is, the AV signal header detection unit 28 detects the AV frame break for the data string from the corresponding used data number position of the logical block data read out in step S34, and stores the register with the number of data at that point. replace. This is set as a new first end point 77b 'and a new first end block use data number 77e' which are determined again. Note that the new first end point 77b ′ and the new first end block use data count 77e ′ are stored as the start position instruction of the cut processing section.

  Subsequently, the logical block data of the logical block number corresponding to the new second start point 78a ′ corresponding to the latch storage of the register for indicating the end position of the cut processing section and the used data number 77d ′ in the new second start block is obtained. The AV signal header detection unit 28 detects an AV frame break for the data string read from the disk medium 3 and corresponding to the used data number position, and the register storage is replaced with the data number at that point. The new second start point 78a 'and the new second start block use data number 78' determined by setting this again. The new second start point 78a ′ and the new second start block use data count 78d ′ are stored as the end position instruction of the cut processing section.

  If there is no expected frame delimiter in the read block, the read logical block for editing is sequentially transferred to the next logical block, and the frame delimiter of the continuous data reproduced from the disk medium 3 is detected.

  In step S36, it is determined whether all edit point replacement processing has been performed with reference to the edit flag in response to input of a valid cut edit instruction corresponding to the first to nth instruction units in the second area 76. to decide. If there is still a valid editing instruction flag (= 1), the flag count of the program processing procedure is counted up to the next valid flag. That is, if the edit flag is greater than or equal to the number of edit operation inputs, the process proceeds to step S37 as “YES”, otherwise the process proceeds to step S45 as “NO”.

  In step S45, the flag number is incremented and the edit instruction point corresponding to the next flag is called.

  As the end stage of editing, the contents of the new editing instruction section are rewritten in the second area 71 from step S37 to step S41.

  In step S37, the first edit instruction section 77, the second edit instruction section 78, the third edit instruction section 79 and the subsequent edit instruction sections in the second area 76 of the user area 70 of the disk medium are stored in the disk. The data is read to the logical block control unit 17 of the control unit 10, and the process proceeds to the next step S38.

  In step S38, the contents of the editing instruction section are sequentially replaced in descending order. That is, operations such as replacing the contents of the nth editing instruction unit with the (n + 1) th editing instruction unit and replacing the contents of the (n-1) th editing instruction unit with the nth editing instruction unit are sequentially performed. Then, the second editing instruction unit 78 following the first editing instruction unit 77 corresponding to the first continuous data area 80a of the third area 80 to be edited this time is the pre-editing read from the disk medium 3. The end point 77b, the time 77c, the number of data in end block 77e are newly set from the first edit instruction section 77, and the end position of the cut processing section in the above-described editing is newly set and determined again. The new second start point 78a 'and the new second start block use data number 78d' determined again and set corresponding to the latch storage of the register for indicating the end position of the cut processing section at the frame position, Set each register. Then, the process proceeds to next Step S39.

  In step S39, the first editing instruction unit 77 corresponding to the first continuous data area 80a of the third area 80 to be edited this time is the first pre-edit read from the disk medium 3 before the editing. From the editing instruction section 77, the start point 77a, the time 77c, the number of data in the start block 77d, and the frame position newly determined from the register storage of the end position of the cut processing section in the above-described editing are determined. The new first end point 77b 'and the new first end block use data number 77e' which are set again and corresponding to the latch storage of the register of the start position instruction of the cut processing section in FIG. The register is set, and the process proceeds to step S40.

  In step S40, finally, the register setting contents of the logical block control unit 17 are respectively changed to the first edit instruction unit 77, the second edit instruction unit 78, and the third edit instruction unit 77 in the second area of the corresponding disk data. Write to the edit instruction section below the edit instruction section.

  Here, the second area 76 has a plurality of editing instruction sections when a plurality of continuous data of the third area 80 corresponding thereto are already recorded. For example, if there are actually n consecutive data areas in the third area 80, the editing instruction section in the second area 76 has n + 1 or more editing display sections.

  However, in the case where only one recording has been made, such as continuous shooting, and when cut processing is performed later by editing, only the first editing instruction section 77 is provided as the written instruction section. For the k-th editing instruction unit in the second area 78 that increases due to the multiple editing cut process, the remaining part of the assigned logical block range is sequentially secured as the editing instruction unit. Can be used.

  Here, when designing to reduce the hardware size even if the processing time for writing / reading from the disk medium 3 is long and slow, each edit point of reading / writing in the logical block control unit 17 of the disk control unit 10 Instead of the replacement process, the n + 1 editing instruction units in the second area 76 of the disk data may be read from and written to the disk. According to this method, the processing time becomes long, but the size of the logical block control unit 17 of the disk control unit 10 can be reduced.

  That is, since the user area logical block is constant in ascending or descending order, the access point is acquired from the start point indication position to the end point indication position, and continuous data as a logical block is obtained for each designated section range for each section. Edit cuts are realized by playing them sequentially.

  Here, since the logical block and the start point designation position and the end point designation position as the number of used data in the logical block are stored as a pair, the logical block control unit 17 of the disk control unit 10 still has the cut processing result in step S39. When write data remains in the edit instruction section at the start point and end point, or when writing to the disk is completed in step S40, the logical block control section 17 of the disk control section 10 is again sent from the second area 76. An access point as a pair of start point instruction position and end point instruction position of all editing instruction units is exchanged on the register by editing operation input control means by editing operation input, and the order 1, 2,..., K -2, k-1, k, k + 1, ..., n + 1, for example, 1, 2, ... k-2, k, k-1, k + 1, ..., n + It is possible to perform the operation as expected the data playback order after you have cut processing by replacing the.

  In this case, in particular, the read access time of the disk medium 3 from the end point of each section to the start point of the next section requires about 10 ms in the seek operation in the case of a high-speed rotating disk medium of concentric tracks. Therefore, during this period, the reproduction output of the continuous data signal from the disk drive generates a time discontinuous access waiting time.

  The monitor 53 is provided with image memory means for making one screen a still image and sound output level attenuation means, and the disk control unit 10 connected to the disk mechanism unit 1 is based on the edit instruction unit register value of the logical block control unit 17. The control signal indicating that the number of data has reached the end block of the editing instruction end unit or the number of data in the end block is output, and the sound of the monitor 8 is muted silently by the memory, and the video image is final. Freeze the screen. This is to alleviate and remove the discomfort of discontinuous image noise and audio noise given to the user's appreciation during the access time from the end to the start of each instruction unit of the edit instruction unit in the second area 76. is there.

  Here, in the detection of the head portion of the frame in step S35, in the case of a DV signal which is a fixed-length compressed video / audio signal, each frame signal unit is 150 blocks × 10 serial block units, and 119200 bytes of one frame. Although it is established, in each serial data block, there are 8 head header 0 byte sequences in which medium information such as cassettes are written and the first 5 serial data of the frame have sub-data blocks following it. The AV signal header detection unit 28 can detect the start position of the frame by checking the presence / absence thereof, and additionally writes a file end code to the cut end point to make a PC file when cut editing is performed in units of frames. PC file data.

  In the case of MPEG2 as an example of a variable length compressed video / audio signal, cut editing is performed for each G frame, which is the smallest random access unit in the sequence layer, or for each I frame of the picture layer when there is no such signal. By detecting the header layer code 000001B3 (h), which is the sequence layer start synchronization code, the GOP delimiter is the GOP start synchronization code 000001B8 (h) or the alternative picture layer start synchronization code 00000100 (h) followed by the picture type It is assumed that the cut editing is performed by detecting and controlling that I. The file end code to be converted into a PC file is additionally written at the end of the front side of the continuous compressed moving image audio signal data that has been cut and edited in the middle, thereby obtaining PC compatible file data. In addition, a sequence header with the same delimiter is newly added to the head of the rear side continuous compressed moving image audio signal data with reference to the front side sequence header to write one new PC compatible file data.

  It should be noted that an AV disk storage area is provided on the disk as a single AV storage after the disk storage itself has been rewritten in the user area 70 of the disk as a medium medium, such as forcibly physical formatting or logical formatting from the host PC. Prepare formatting means to secure.

  For this purpose, a ROM unit 13 is provided as a nonvolatile memory of the disk control unit 10. That is, as described above, the second ROM 15 has a control procedure as a single AV signal recording / reproducing device of the HDD, and the parameter storage part together with the edit data storage unit 15a for storing the edit data control procedure / parameter description. A logical block storage unit 15b for storing file definition default fixed information data, which is recording information data that can be used as a logical block storage of a disk medium that is necessary for the initial setting use of the AV drive alone. Have.

  The logical block storage unit 15b is a user area of a disk logical block for securing a drive area for an HDD after being accidentally rewritten or intentionally rewritten or reformatted from the connected external PC. 70 is used as an AV disk storage to write the internal description of the first area 71 and the second area 76 to secure and use the area.

  That is, the IPL 72 as a boot block, the FAT 73 as an internal medium media table, the directory information data section 74 having means for only describing that the third area 80 reserved as directory information data is unused, and In the second area 76, the start point 77a of the first editing instruction section 77 and the access pointer to the start head position of the third area 80 as the number of used data in the start block 77d are included as the data.

  In the above description, the hard disk has been described as an example from the viewpoint of the high speed recording / reproducing / reading and access. A fast write / read FIFO like a memory can be used on the device, and if it is a recordable optical disk with defects and alternate processing, or a PC compatible record / playback drive with a relatively slow recordable memory storage medium By using the type buffer and the relatively slow writing / reading storage means, it is possible to perform editing continuous shooting and cut processing of the compressed continuous AV data.

  Note that the above-described apparatus has an AV continuous data editing order protection function in which an access point describing and setting the editing access order cannot be obtained even if a third party who does not have a drive or PC application directly tries to access continuous recording data. Is provided.

  Further, as shown in FIG. 14, this apparatus receives a signal supplied from a public communication line 56 via a personal communication line 55, a receiver 54 provided with a receiving unit 54a, a decoder 54b, and a built-in clock 54c. Can be input via the AV signal input / output connection unit 31 of the disk control unit 10.

  In the above description, in particular, considering the reduction of the total number of parts, as shown in FIG. 1, the MPU 12, the shared bus 22, and the buffer 30 are shared with the HDD, and the PC / AV signal is shared. The switching unit 27, the AV signal header detection unit 28, the logic block control unit 17 and the built-in clock 21, the edit input control unit 18, and the edit display control unit 20 have been described in the form of being incorporated in the HDD. In order to implement the present invention for a normal HDD having no built-in block, a partial effect can be obtained by providing an attachment device that is used for connection to the PC interface 29 of the normal HDD. Can do.

  The attachment device includes a PC / AV signal switching unit, an AV signal header detection unit, a bank memory type data RAM for performing bank switching based on the header detection, and a PC interface connected to the host PC bus. , An AV signal input / output connection unit, an editing control register, an editing ROM describing an editing control procedure, an editing input control unit, an editing input interface, an editing display control unit, a built-in clock, and an MPU for controlling them.

  As an operation in these cases, when only a normal host PC bus is connected, a register setting command is directly passed through the attachment by detecting the connection of the host PC bus from the PC / AV signal switching unit. The register values are set in the control register and the status register, and the data register is read and written together with the command, thereby causing normal HDD data transfer.

  By setting the register value in the edit control register set in the attachment via the host PC data bus, the mode shifts to the editable mode, and the data transfer transferred from the normal drive command and status control register setting procedure in the attachment In the read / write procedure, the data transfer flow is switched, and AV digital data is read / written to / from the drive via the bank-switched bank memory format RAM. In this case, the AV signal header is used inside the attachment device. Switching of the bank memory and reading / writing to each bank are performed by detecting the synchronization signal by the detection unit.

  However, the address is given to the drive to perform the data read / write command. However, because the bank memory is interposed, a dedicated register is used to identify the data in the bank memory that is a data set corresponding to each series of read commands. It is necessary to install and identify hardware.

  On the other hand, if it is detected that the PC / AV signal switching unit is not connected to the host PC interface of the host PC bus, and it is detected that an external AV digital signal input / output device is connected to the AV signal input / output connection unit. For example, the MPU built in the attachment device normally uses the drive by writing to and reading from the command register, status register, and data register in the HDD based on the sequential procedure of the editing ROM describing the editing control register and editing control procedure. After performing command issuance and register data value writing / reading settings, which are normal operation control, the editing register value is set, the data transfer mode is changed, and the second area of the logical block inside the HDD Write and read predetermined information data to area 3 and edit control To.

  As described above, since it is necessary to always write and read the normal command register, status register, and data register that are not used for AV inside the HDD during AV digital data transfer, it has a similar function in data transfer. A block is provided in duplicate inside and outside the drive, and there is a restriction that it corresponds to each writing / reading procedure for writing to a register in the normal HDD.

  According to the embodiment of the present invention as described above, continuous digital data frame detection means and control means are provided in the drive so that editing such as continuous digital data splicing and cut processing can be performed by the HDD alone. Can be realized.

  According to the embodiment of the present invention, the first area including at least file arrangement table information and hierarchy content information as file management information in a format that can be recognized by the PC via the OS, and the edit instruction control register means As a recording area, the second area corresponding to the disk is separated from the third area, which is the direct data recording area, thereby improving the editing efficiency of the drive alone and making the file compatible with a PC host connection. Both can be achieved.

  Furthermore, since the area is divided and used for the user area on the logical block, even when a defect occurs and increases during use, the replacement process between the nonvolatile memory of the disk drive and the disk replacement area is as follows: It can be performed in the same manner as a conventional recordable disk device.

  It should be noted that the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention.

It is a block diagram which shows the schematic structure of a data recording device. It is a block diagram which shows the schematic structure of the AV signal header detection part of the said apparatus. It is a top view which shows the division | segmentation of the area | region on the physical block in the disc recording medium of the said apparatus. It is a data structure figure of the user area | region of the system disk of MS-DOS compatibility of the said apparatus. It is a data structure figure of the user area | region of the medium replacement | exchange disk of MS-DOS compatibility of the said apparatus. It is a flowchart which shows a series of processes of the data recording method when the said apparatus is connected to host PC. It is a flowchart which shows a series of process of the said method in case the said apparatus is used alone. It is a data arrangement | positioning figure which shows the occupation of the data on a buffer in case the edit of the connection of AV signal is performed by the said method. It is a data structure figure which shows the occupation of the data in the user area | region of a disc medium when the edit of the connection of AV signal is performed by the said method. It is a flowchart which shows a series of processes in case the edit of connection of AV signal is performed by the said method. It is a data structure figure which shows occupation of the data in the user area | region of a disc medium when the edit of the cut of an AV signal is performed by the said method. It is a data arrangement | positioning figure which shows occupation of the data on a buffer in case the edit of the cut of an AV signal is performed by the said method. It is a flowchart which shows a series of processes when the edit of the cut of AV signal is performed by the said method. It is a block diagram which shows schematic structure when the said apparatus is connected to a public communication line.

Explanation of symbols

  1 disc mechanism unit, 3 disc medium, 5 recording / playback unit, 10 disc control unit, 11 edit control unit, 27 PC / AV signal switching unit, 28 AV signal header detection unit

Claims (6)

Detection means for detecting whether or not connected to a computer;
A recording medium control means for reading a data string from the recording medium;
Sending means for sending the data string;
A data reproducing apparatus comprising: a control means for controlling the recording medium control means and the sending means to reproduce data when the detecting means detects that the computer is not connected to the computer.   2. The data reproducing apparatus according to claim 1, wherein the data string is audio / video data.   2. A data reproducing apparatus according to claim 1, wherein the recording medium is an optical disk, a hard disk, or a memory storage medium. Detection means for detecting whether or not connected to a computer;
An input means for inputting a data string;
Recording means for recording the data string input by the input means on a recording medium;
Data recording comprising: control means for controlling recording of the data string by controlling the input means and the recording means when the detecting means detects that the computer is not connected to the computer apparatus.   5. The data recording apparatus according to claim 4, wherein the data string is audio / video data.   5. The data recording apparatus according to claim 4, wherein the recording medium is an optical disk, a hard disk, or a memory storage medium.

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