JP2006340065A - Image data capturing device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce a time required for reading image data and a capacity required for an image memory of an image data capturing device equipped with a solid-state image pickup element having a photodiode divided into two regions of a main pixel and a sub pixel. <P>SOLUTION: The image data capturing device is provided with: the solid-state image pickup element, in which each photoelectric conversion element is divided into the two regions of the main pixel with a larger area and a sub pixel with the remaining smaller area; and a signal processor for adding and synthesizing the image data accumulated in the main pixel with those accumulated in the sub pixel after reading them from the solid-state image pickup element. The device is also provided with a control means (a step F12) for reading a smaller number of read data of the sub pixel than that of the main pixel. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an image data capturing device such as a digital camera or a scanner, and in particular, each photodiode (photoelectric conversion element) of a solid-state imaging device to be mounted is divided into a main pixel region and a sub-pixel region. The present invention relates to an image data capturing device.

  A solid-state image sensor such as a CCD type or a CMOS type mounted on an image data capturing device such as a digital camera or a scanner includes a large number of photodiodes that photoelectrically convert incident light. A solid-state imaging device is disclosed in which a photodiode is divided into a main pixel region and a sub-pixel region.

  FIG. 7 is a schematic diagram of the surface of a solid-state imaging device in which each photodiode is divided into a main pixel region and a sub-pixel region. The solid-state imaging device shown in the figure is a CCD type, and the photodiodes 1 in the odd-numbered rows are arranged with a half pitch shift in the horizontal direction with respect to the photodiodes 1 in the even-numbered rows, and are read from the photodiodes 1. A vertical transfer path (not shown) for transferring signal charges in the vertical direction is configured to meander so as to avoid the photodiodes 1 in the vertical direction.

  In the illustrated example, each photodiode 1 includes a main pixel (also referred to as a high sensitivity pixel) 2 occupying about 4/5 of the area of the photodiode 1 and a sub pixel (low sensitivity pixel) occupying the remaining about 1/5. The charge accumulated in the main pixel 2 and the charge accumulated in the sub-pixel 3 can be separately read out and transferred to the vertical transfer path. Yes. Note that R, G, and B in the figure indicate the color filters red (R), green (G), and blue (B) stacked on each photodiode 1.

JP 2003-218343 A

  When image data is imaged with a solid-state imaging device having a photodiode divided into a main pixel 2 and a sub-pixel 3 as pixels, image data (main pixel data) imaged with the main pixel 2 and an image with the sub-pixel 3 It is necessary to distinguish from the image data (subpixel data) thus read out from the solid-state imaging device.

  FIG. 8 is a diagram showing a read sequence of image data when the above-described solid-state imaging device is mounted on a digital camera. While the mechanical shutter of the digital camera is open (main / sub-exposure period), signal charges are accumulated in the main pixel 2 and the sub-pixel 3, respectively, and the exposure ends when the mechanical shutter is closed.

  Before the signal charge is read, the vertical transfer path is swept out and unnecessary charges on the vertical transfer path are discharged, and then the signal charge (main pixel data) of the main pixel 2 is read out to the vertical transfer path and the horizontal transfer path (see FIG. (Not shown), the horizontal transfer path is transferred and output from the solid-state imaging device. Next, the signal charge (subpixel data) of the subpixel 3 is read out to the vertical transfer path, and is similarly output from the solid-state imaging device.

  The main pixel data read from the main pixel 2 of the solid-state image sensor is accumulated in the image memory for main pixel data, and the sub-pixel data read from the sub-pixel 3 is accumulated in the image memory for sub-pixel data. Is done. Then, signal processing is performed using data in each image memory, and a captured image is reproduced.

  As each pixel (photodiode) of the solid-state image sensor is divided into a main pixel and a sub-pixel, a high-resolution image can be captured, and a wide dynamic range image can be captured. Since the number of main pixel data and the number of sub-pixel data are the same, it takes twice as long to read image data compared to a solid-state image sensor that is not divided into regions, and the image memory capacity However, there is a problem that twice as much is required.

  An object of the present invention is to reduce the time required to read out image data of an image data capturing device equipped with a solid-state imaging device having photodiodes divided into main pixels and sub-pixels, and is required. The object is to reduce the capacity of the image memory.

  An image data capturing device according to the present invention includes a solid-state image sensor in which each photoelectric conversion element is divided into a main pixel having a large area and a remaining sub-pixel having a small area, and the main image is obtained from the solid-state image sensor. In an image data capturing device including a signal processing unit that reads out image data stored in a pixel and reads out image data stored in the sub-pixel and adds and synthesizes both image data. And a control means for reading out a small amount of read data of the sub-pixel.

  The control means of the image data capturing device according to the present invention is characterized in that when the image data of the sub-pixel is read out, pixel thinning-out reading is performed.

  The control means of the image data capturing device of the present invention is characterized in that when the image data of the sub-pixel is read out, the pixel mixture is read out.

  According to the present invention, it is possible to shorten the time required for reading image data of an image data capturing device equipped with a solid-state imaging device having photodiodes divided into main pixels and sub-pixels. The capacity of the image memory can be reduced.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram of a digital still camera which is an example of an image data capturing device of the present invention. A solid-state imaging device (CCD in this example) 12 is disposed on the back surface of the photographing lens 10, the optical low-pass filter 11, and a mechanical shutter (not shown). Each photodiode of the CCD 12 is divided into a main pixel 2 and a sub-pixel 3 as shown in FIG.

  FIG. 2 is a graph showing the photoelectric conversion characteristics of the main pixel 2 and the sub-pixel 3 of the CCD 12. As indicated by the characteristic line I, the output of the main pixel 2 increases linearly according to the luminance when the subject luminance (horizontal axis) is low, and saturates at a certain luminance or higher. On the other hand, as shown by the characteristic line II, the output of the sub-pixel 3 is set so that the saturation luminance is four times that of the main pixel 2, and the saturation output is set to 1/4 of the saturation output of the main pixel 2. Is done. This difference is due to the area ratio of the main pixel 2 and the sub-pixel 3, and the sensitivity of the sub-pixel 3 to the main pixel 2 is 1/16.

  The output of the CCD 12 is processed by an analog processing circuit (correlated double sampling circuit CDS or gain control amplifier GCA) 13, converted to digital data by an AD converter 14, and signal processed by a signal processing unit 15.

  The CPU 16 that controls the entire digital still camera controls the timing generator 17, and various timing signals such as an electronic shutter signal output from the timing generator 17 are given to the CCD 12 via the driver 18, and the CCD 12 is driven and controlled. Is done. Similarly, the analog processing circuit 13, the AD converter 14, and the signal processing circuit 15 are controlled by various timing signals output from the timing generator 17.

  The signal processing circuit 15 performs image processing while exchanging signals with the CPU 16 and displays a reduced image of the reproduced image data on the display unit 19 or image data compressed into JPEG data or the like on the recording medium 20. Store. Reference numeral 21 denotes an operation key for inputting a user instruction to the CPU 16.

  FIG. 3 is a detailed functional block diagram of the signal processing circuit 15. The signal processing circuit 15 according to the present embodiment includes an image memory 23 that stores main pixel data read from the main pixel 2 of the CCD 12 and an image memory 24 that stores sub-pixel data read from the sub-pixel 3 of the CCD 12. . The image memory 24 has half the capacity of the image memory 23 for reasons described later.

  The signal processing circuit 15 further includes a WB gain unit 25 for white balance of main pixel data, a WB gain unit 26 for white balance of sub pixel data, a γ conversion unit 27 for gamma conversion of main pixel data, A gamma conversion unit 28 that performs gamma conversion of pixel data, an image addition unit 29 that adds main pixel data and sub-pixel data as described later, and a synchronization processing unit 30 that synchronizes the added image data; Various correction units 31 that perform various corrections such as removing noise on the synchronized image data, a JPEG compression unit 32 that performs JPEG compression on the corrected image data, and JPEG image data are displayed. An image reduction unit 33 that reduces the image data to be displayed on the unit 19.

  FIG. 4 is a flowchart showing an operation procedure of the digital still camera configured as described above. When the power of the digital still camera is turned on, the CPU 16 waits for the switch S1 of the two-stage release button to be turned on (step F1). When the switch S1 is turned on, the focus position adjustment and photometry of the photographing lens 10 are performed in preparation for the actual photographing (step F2).

  Next, the CPU 16 calculates the luminance distribution evaluation value of the subject luminance based on the photometric data to determine how much dynamic range is necessary (step F3), and waits for the switch S2 to be turned on (step F4). . If the switch S2 is turned on, it is next determined whether or not the subject luminance is the normal reproduction range of the main pixel based on the luminance distribution evaluation value obtained in step F3 (step F5). That is, it is determined whether the subject luminance is within the range where the characteristic line I in FIG. 2 changes linearly or within the saturation range.

  If the subject luminance is within the range in which the characteristic line I changes linearly, the subject image can be satisfactorily reproduced only by the signal charge read from the main pixel. Therefore, in the image data reading sequence described with reference to FIG. Only main pixel data is read without reading (step F6). Then, normal signal processing is performed on the main pixel data read from the CCD 12 (step F7: “normal” means the same as signal processing in a solid-state imaging device that is not divided into main pixels and sub-pixels). The JPEG image data is stored in the recording medium 20 (step F8), and the current shooting process is terminated.

  If it is determined in step F5 that the subject brightness falls within the saturation region of the characteristic line I, the process proceeds from step F5 to step F9, and to what extent based on the brightness distribution evaluation value obtained in step F3. This sub-pixel signal amount is predicted, and a sub-pixel data read drive mode in step F12 to be described later is determined.

  Then, the following main pixel / subpixel independent readout is executed. That is, as shown in FIG. 5, first, main pixel data is read (step F10), this main pixel data is written to the image memory 23 of FIG. 3 (F11), and then subpixel data is read (step F12). The subpixel data is written into the image memory 24 of FIG. 3 (step F13).

In this embodiment, as the sub-pixel image data read drive mode,
Two modes are prepared: (1) pixel thinning readout mode and (2) pixel mixture readout mode. The pixel decimation readout mode is a mode in which subpixels arranged in the vertical direction are read every other pixel, and the pixel mixture readout mode is a mode in which two subpixel data are mixed on the vertical transfer path (or on the vertical transfer path). This is a read mode. When pixel mixing is performed, sub-pixel data of the same color is required. Therefore, in the solid-state imaging device illustrated in FIG. 7, it is necessary to perform pixel mixing after performing half-thinning readout in the vertical direction. How mixing can be performed depends on the arrangement of color filters provided in the solid-state imaging device, and therefore, a sub-pixel image data read drive mode is prepared in accordance with the adopted color filter arrangement.

  The example shown in FIG. 5 shows an example in which half-pixel thinning readout is performed from the sub-pixel, and the sub-pixel data readout time is shortened to ½ compared to the main pixel data readout time. Yes. Further, since the number of subpixel data is also ½ compared to the main pixel data, the subpixel data image memory 24 has a capacity of ½ compared to the main pixel data image memory 23. That's it.

  After the main pixel data and subpixel data are read and written in the image memory, wide dynamic range signal processing is performed (step F14), and the obtained image data is saved (step F8). End the process.

  In the wide dynamic range signal processing, the image addition unit 29 shown in FIG. 3 obtains image data by adding the sub-image data after white balance correction and gamma conversion to the main pixel data after white balance correction and gamma conversion. Signal processing.

  This is because, as shown in FIG. 6, after the main pixel 2 reaches the saturation point with respect to the photoelectric conversion characteristic I of the linearly changing portion of the main pixel 2, the photoelectric conversion characteristic II of the sub-pixel 3 is linear. This corresponds to the addition of the portion II ′ that changes, and image data having a wide dynamic range can be reproduced.

  In this embodiment, since the sub image data is thinned out or mixed, the resolution of the sub pixel data is lower than the resolution of the main image data. However, since the output value of the subpixel is small and further reduced by the γ conversion, this reduction in resolution is not conspicuous, and the advantages obtained by thinning out reading and mixed reading of the subpixel data, that is, shortening of the reading time, memory capacity The advantage of reduction is greater, and it becomes easier to capture moving images with a wide dynamic range. In addition, in the case of reading out by mixing pixels, the amount of signal increases, so there is an advantage that S / N is improved.

  According to the present invention, image data with a wide dynamic range can be obtained at a high speed and the required memory capacity can be reduced. Therefore, the present invention is useful as an image data capturing device such as a digital camera or a scanner for capturing moving images. .

1 is a block configuration diagram of a digital still camera which is an example of an image data capturing device of the present invention. It is a graph which shows the photoelectric conversion characteristic of the photodiode divided into the main pixel and the subpixel. It is a functional block block diagram of the signal processing circuit shown in FIG. 3 is a flowchart showing an operation procedure of the digital still camera shown in FIG. 1. It is an operation | movement sequence diagram of the digital still camera shown in FIG. It is signal processing explanatory drawing which acquires the image of a wide dynamic range with the digital still camera shown in FIG. It is a surface schematic diagram of the solid-state image sensor which has the photodiode divided into the area | region into the main pixel and the subpixel as a pixel. It is an operation | movement sequence diagram of the conventional digital camera carrying the solid-state image sensor which has the photodiode divided into the area | region by the main pixel and the subpixel as a pixel.

Explanation of symbols

1 Photodiode (photoelectric conversion element)
2 Main pixels (high sensitivity pixels)
3 Sub-pixel (low sensitivity pixel)
12 CCD
15 Signal processing circuit 23 Image memory 24 for main pixel data Image memory 29 for sub-pixel data Image adder

Claims (3)

  Each photoelectric conversion element is divided into a large-area main pixel and the remaining small-area sub-pixels, and a solid-state image pickup element, and image data accumulated in the main pixel are read from the solid-state image pickup element. In an image data capturing device including a signal processing unit that reads out image data stored in the sub-pixel and adds and synthesizes both image data, the number of read-out data of the sub-pixel is less than the number of read-out data of the main pixel An image data capturing device comprising a control means for reading.   The image data capturing device according to claim 1, wherein the control unit performs pixel thinning-out reading when reading the image data of the sub-pixel.   The image data capturing apparatus according to claim 1, wherein the control unit reads the mixed pixel when reading the image data of the sub-pixel.

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