[go: up one dir, main page]

JP2006210660A - Manufacturing method of semiconductor substrate - Google Patents

Manufacturing method of semiconductor substrate Download PDF

Info

Publication number
JP2006210660A
JP2006210660A JP2005020950A JP2005020950A JP2006210660A JP 2006210660 A JP2006210660 A JP 2006210660A JP 2005020950 A JP2005020950 A JP 2005020950A JP 2005020950 A JP2005020950 A JP 2005020950A JP 2006210660 A JP2006210660 A JP 2006210660A
Authority
JP
Japan
Prior art keywords
semiconductor substrate
substrate
nitride semiconductor
manufacturing
gan
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2005020950A
Other languages
Japanese (ja)
Inventor
Takeshi Tanaka
丈士 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP2005020950A priority Critical patent/JP2006210660A/en
Publication of JP2006210660A publication Critical patent/JP2006210660A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Led Devices (AREA)

Abstract

【課題】 シリコン基板などに窒化物半導体膜を形成するための半導体基板の製造方法を提供する。
【解決手段】 第1の窒化物半導体基板11の表面近傍にイオンを注入する工程と、その第1の窒化物半導体基板11の表面側を第2の基板2に重ね合わせる工程と、重ね合わせた2枚の基板11,2を熱処理する工程と、イオン注入された層12(13)を境として第1の窒化物半導体基板11の大部分を第2の基板2から引き剥がす工程とを含む製造方法である。
【選択図】 図1
PROBLEM TO BE SOLVED: To provide a semiconductor substrate manufacturing method for forming a nitride semiconductor film on a silicon substrate or the like.
SOLUTION: The step of implanting ions near the surface of a first nitride semiconductor substrate 11 and the step of superposing the surface side of the first nitride semiconductor substrate 11 on a second substrate 2 A manufacturing process including a step of heat-treating two substrates 11 and 2 and a step of peeling most of the first nitride semiconductor substrate 11 from the second substrate 2 with the ion-implanted layer 12 (13) as a boundary. Is the method.
[Selection] Figure 1

Description

本発明は、シリコン基板などに窒化物半導体薄膜を形成するための半導体基板の製造方法及び半導体基板に関する。   The present invention relates to a semiconductor substrate manufacturing method and a semiconductor substrate for forming a nitride semiconductor thin film on a silicon substrate or the like.

インジウム、ガリウム、アルミニウム、及び窒素からなる窒化物半導体は、そのIII族元素の組成比を制御することにより、紫外から可視光の大部分の領域をカバーする革新的な高効率発光デバイスの材料として開発が進められ、実用化されている。   Nitride semiconductors composed of indium, gallium, aluminum, and nitrogen are used as innovative high-efficiency light-emitting device materials that cover most regions from ultraviolet to visible light by controlling the composition ratio of group III elements. Development is in progress and put to practical use.

また、窒化物半導体は、高い飽和電子速度と高い絶縁破壊耐圧を有するため、将来的には高周波領域で桁違いの高効率・高出力を実現する電子デバイス用材料としての応用も期待されている。   Nitride semiconductors also have high saturation electron velocities and high breakdown voltage, so they are expected to be applied as materials for electronic devices that realize orders of magnitude higher efficiency and higher output in the high frequency range in the future. .

窒化物半導体を薄膜で形成する際、最大の問題となるのは基板の選択である。従来、単結晶の窒化物半導体そのものを製造することは極めて困難であり、これを入手することがほとんど不可能だった。このため、青色LEDなどの窒化物半導体デバイスは、サファイア基板やシリコンカーバイド基板などの上に形成されるのが常であった。   When forming a nitride semiconductor as a thin film, the biggest problem is the selection of the substrate. Conventionally, it has been extremely difficult to manufacture a single crystal nitride semiconductor itself, and it has been almost impossible to obtain it. For this reason, nitride semiconductor devices such as blue LEDs have usually been formed on sapphire substrates, silicon carbide substrates and the like.

しかし、サファイアやシリコンカーバイドは窒化物半導体と結晶系、格子定数、熱膨張率等が異なる。このため、サファイア基板やシリコンカーバイド基板などの上に形成された窒化物半導体の薄膜には高密度で転位や欠陥が導入されてしまい、これらの結晶中の欠陥がデバイス特性を経時劣化させる原因になっていた。   However, sapphire and silicon carbide differ from nitride semiconductors in crystal systems, lattice constants, thermal expansion coefficients, and the like. For this reason, dislocations and defects are introduced at a high density in a nitride semiconductor thin film formed on a sapphire substrate, a silicon carbide substrate, etc., and the defects in these crystals cause the device characteristics to deteriorate over time. It was.

一方、最近になって、サファイア基板上にHVPE(ハイドライド気相成長)法でGaN膜を厚く形成し、このGaN膜をサファイア基板から引き剥がす方法が開発された。この方法により、従来は極めて困難であった転位密度の低い単結晶窒化物半導体基板の製造が、実現できるようになった。   Recently, a method has been developed in which a GaN film is formed thick on the sapphire substrate by HVPE (hydride vapor phase epitaxy) and the GaN film is peeled off from the sapphire substrate. This method has made it possible to produce a single crystal nitride semiconductor substrate having a low dislocation density, which has been extremely difficult in the past.

この単結晶窒化物半導体を薄膜成長の基板として用いると、デバイス構造を含む薄膜中の結晶欠陥が少なくなるため、高発光強度・長素子寿命などの優れた特性を持つ窒化物半導体デバイスをつくることが可能になる。   When this single crystal nitride semiconductor is used as a substrate for thin film growth, the number of crystal defects in the thin film including the device structure is reduced, so that a nitride semiconductor device having excellent characteristics such as high light emission intensity and long device life can be produced. Is possible.

なお、この出願の発明に関連する先行技術文献情報としては、次のものがある。   The prior art document information related to the invention of this application includes the following.

特開平10−321548号公報Japanese Patent Laid-Open No. 10-321548 特開平11−40786号公報Japanese Patent Laid-Open No. 11-40786 特開平11−297583号公報JP 11-297583 A

しかしながら、HVPE法により成長するGaN基板は、1枚あたりの製造に要する時間が非常に長いため、サファイア基板などと比べて単価が桁違いに高い。すなわち、単結晶窒化物半導体基板はコストが極めて高いという問題を抱えており、低価格が要求される青色LEDや高周波電子デバイスなどへの応用は、現時点では、実用上ほとんど不可能な状態にある。   However, a GaN substrate grown by the HVPE method has an extremely long time for manufacturing per substrate, and therefore the unit price is much higher than that of a sapphire substrate or the like. That is, the single crystal nitride semiconductor substrate has a problem that the cost is extremely high, and at present, it is practically impossible to apply to a blue LED or a high-frequency electronic device that requires a low price. .

そこで、本発明の目的は、低転位密度の窒化物半導体薄膜をシリコン基板、あるいは任意の材質からなる基板上に形成するための半導体基板の製造方法を提供することにある。   Accordingly, an object of the present invention is to provide a semiconductor substrate manufacturing method for forming a low dislocation density nitride semiconductor thin film on a silicon substrate or a substrate made of an arbitrary material.

本発明は上記目的を達成するために創案されたものであり、請求項1の発明は、第1の窒化物半導体基板の表面近傍にイオンを注入する工程と、その第1の窒化物半導体基板の表面側を第2の基板に重ね合わせる工程と、重ね合わせた上記2枚の基板を熱処理する工程と、イオン注入された層を境として上記第1の窒化物半導体基板の大部分を上記第2の基板から引き剥がす工程とを含む半導体基板の製造方法である。   The present invention has been made to achieve the above object, and the invention of claim 1 includes a step of implanting ions in the vicinity of the surface of the first nitride semiconductor substrate, and the first nitride semiconductor substrate. A step of superimposing the surface side of the first nitride semiconductor substrate on the second substrate, a step of heat-treating the two superimposed substrates, and a portion of the first nitride semiconductor substrate on the boundary of the ion-implanted layer. 2 is a method for manufacturing a semiconductor substrate, including a step of peeling off from the substrate.

請求項2の発明は、第1の窒化物半導体基板の表面近傍にイオンを注入する工程と、その第1の窒化物半導体基板を熱処理する工程と、上記第1の窒化物半導体基板の表面側を第2の基板に貼り合わせる工程と、イオン注入された層を境として上記第1の窒化物半導体基板の大部分を上記第2の基板から引き剥がす工程とを含む半導体基板の製造方法である。   The invention of claim 2 includes a step of implanting ions in the vicinity of the surface of the first nitride semiconductor substrate, a step of heat-treating the first nitride semiconductor substrate, and a surface side of the first nitride semiconductor substrate. Is a method of manufacturing a semiconductor substrate, including a step of bonding the first nitride semiconductor substrate to the second substrate and a step of peeling most of the first nitride semiconductor substrate from the second substrate with the ion-implanted layer as a boundary. .

請求項3の発明は、上記第1の窒化物半導体基板の大部分を引き剥がした後、上記イオン注入された層を除去し、上記第1の窒化物半導体基板として再利用する請求項1または2記載の半導体基板の製造方法である。   According to a third aspect of the present invention, after most of the first nitride semiconductor substrate is peeled off, the ion-implanted layer is removed and reused as the first nitride semiconductor substrate. 2. A method for producing a semiconductor substrate according to 2.

請求項4の発明は、上記第1の窒化物半導体基板は、ウルツ鉱型GaNあるいはウルツ鉱型AlNからなる請求項1〜3いずれかに記載の半導体基板の製造方法である。   The invention of claim 4 is the method for manufacturing a semiconductor substrate according to any one of claims 1 to 3, wherein the first nitride semiconductor substrate is made of wurtzite GaN or wurtzite AlN.

請求項5の発明は、上記第1の窒化物半導体基板の表面は、(000−1)窒素面である請求項1〜4いずれかに記載の半導体基板の製造方法である。   The invention of claim 5 is the method for manufacturing a semiconductor substrate according to any one of claims 1 to 4, wherein the surface of the first nitride semiconductor substrate is a (000-1) nitrogen surface.

請求項6の発明は、上記第1の窒化物半導体基板の表面は、(000−1)窒素面から任意の方向に0°以上8°未満の範囲でオフカットされた面である請求項1〜5いずれかに記載の半導体基板の製造方法である。   According to a sixth aspect of the present invention, the surface of the first nitride semiconductor substrate is a surface that is off-cut within a range from 0 ° to less than 8 ° in an arbitrary direction from the (000-1) nitrogen surface. A method for producing a semiconductor substrate according to any one of?

請求項7の発明は、上記イオンは、水素、窒素、酸素、ネオン、アルゴンのうちの1種あるいは2種以上のイオンからなる請求項1〜6いずれかに記載の半導体基板の製造方法である。   A seventh aspect of the present invention is the method for manufacturing a semiconductor substrate according to any one of the first to sixth aspects, wherein the ions comprise one or more ions of hydrogen, nitrogen, oxygen, neon, and argon. .

請求項8の発明は、上記第2の基板がシリコン、ガラス、金属のいずれかからなる請求項1〜7いずれかに記載の半導体基板の製造方法である。   The invention according to claim 8 is the method for manufacturing a semiconductor substrate according to any one of claims 1 to 7, wherein the second substrate is made of any one of silicon, glass, and metal.

請求項9の発明は、上記第1の窒化物半導体基板は、厚さが400μm程度である請求項1〜8いずれかに記載の半導体基板の製造方法である。   The invention according to claim 9 is the method for manufacturing a semiconductor substrate according to any one of claims 1 to 8, wherein the first nitride semiconductor substrate has a thickness of about 400 μm.

請求項10の発明は、上記イオンの注入は、上記第1の窒化物半導体基板の表面から2μm以下の深さに濃度ピークを有するように行う請求項1〜9いずれかに記載の半導体基板の製造方法である。   The invention according to claim 10 is the semiconductor substrate according to any one of claims 1 to 9, wherein the ion implantation is performed so as to have a concentration peak at a depth of 2 μm or less from the surface of the first nitride semiconductor substrate. It is a manufacturing method.

請求項11の発明は、上記熱処理は、水素、窒素、アンモニア、酸素、アルゴン、ネオン、ヘリウムのいずれかの単体ガス、あるいはこれらの混合ガスからなるガス雰囲気中にて、温度800℃以上で2時間以上行う請求項1〜10いずれかに記載の半導体基板の製造方法である。   According to an eleventh aspect of the present invention, the heat treatment is performed at a temperature of 800 ° C. or higher in a gas atmosphere composed of a single gas of hydrogen, nitrogen, ammonia, oxygen, argon, neon, or helium, or a mixed gas thereof. It is a manufacturing method of the semiconductor substrate in any one of Claims 1-10 performed more than time.

本発明によれば、低転位密度の窒化物半導体薄膜を、低い製造コストで、シリコン基板、あるいは任意の材質からなる基板上に形成することができるという優れた効果を発揮する。   According to the present invention, the nitride semiconductor thin film having a low dislocation density can be formed on a silicon substrate or a substrate made of any material at a low manufacturing cost.

以下、本発明の好適実施の形態を添付図面にしたがって説明する。   DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, preferred embodiments of the invention will be described with reference to the accompanying drawings.

まず、本実施の形態に係る製造方法を用いて作製した半導体基板を図2(e)で説明する。   First, a semiconductor substrate manufactured using the manufacturing method according to this embodiment will be described with reference to FIG.

図2(e)に示すように、本実施の形態に係る半導体基板(半導体ウェハー、あるいはテンプレート基板)1は、第2の基板としての単結晶のシリコン基板2上に、低転位密度の単結晶窒化物半導体薄膜としてのGaN薄膜3を形成したものである。この半導体基板1は、後述するように、青色LEDや高周波電子デバイス(例えば、高周波トランジスターなど)の基板として使用される。   As shown in FIG. 2E, a semiconductor substrate (semiconductor wafer or template substrate) 1 according to the present embodiment has a single crystal of low dislocation density on a single crystal silicon substrate 2 as a second substrate. A GaN thin film 3 is formed as a nitride semiconductor thin film. As will be described later, the semiconductor substrate 1 is used as a substrate for a blue LED or a high-frequency electronic device (for example, a high-frequency transistor).

第2の基板としては、ガラス、金属からなるものを用いてもよい。窒化物半導体薄膜としては、インジウム、ガリウム、アルミニウム、及び窒素からなるもの(例えば、AlN薄膜など)であればよい。   As the second substrate, a substrate made of glass or metal may be used. The nitride semiconductor thin film may be made of indium, gallium, aluminum, and nitrogen (for example, an AlN thin film).

次に、半導体基板1の製造方法を図1および図2で説明する。   Next, a method for manufacturing the semiconductor substrate 1 will be described with reference to FIGS.

図1(a)〜図1(d)は、本発明の好適な実施の形態である半導体基板の製造工程の一部(熱処理するまでの工程)を示す断面図である。図2(a)〜(e)は、本発明の好適な実施の形態である半導体基板の製造工程の一部(熱処理後の工程)を示す断面図である。   FIG. 1A to FIG. 1D are cross-sectional views showing a part of a semiconductor substrate manufacturing process (processes until heat treatment) according to a preferred embodiment of the present invention. 2A to 2E are cross-sectional views showing a part of the semiconductor substrate manufacturing process (process after heat treatment) according to a preferred embodiment of the present invention.

まず、図1(a)に示すように、第1の窒化物半導体基板として、低転位密度の単結晶のGaN基板11(厚さd)を用意する。このGaN基板11は、ウルツ鉱型GaNからなり、表面側が(000−1)窒素面、裏面側が(0001)ガリウム面となるように配置される。   First, as shown in FIG. 1A, a single crystal GaN substrate 11 (thickness d) having a low dislocation density is prepared as a first nitride semiconductor substrate. This GaN substrate 11 is made of wurtzite GaN, and is arranged so that the front side is a (000-1) nitrogen surface and the back side is a (0001) gallium surface.

図1(b)に示すように、GaN基板11の表面近傍に上方からイオンを注入し、GaN基板11の表面から数μm程度の深さにイオン注入層12を形成する。注入するイオンは、水素、窒素、酸素、ネオン、アルゴンのうちの1種あるいは2種以上のイオンからなるものを用いる。本実施の形態では、注入するイオンとして、水素および窒素イオンを用いた。このとき、GaN基板11の表面からイオン注入層12の上面までに、最終的に得たいGaN薄膜3(図2(e)参照)となる薄膜11aが形成される。   As shown in FIG. 1B, ions are implanted from above into the vicinity of the surface of the GaN substrate 11 to form an ion implantation layer 12 at a depth of about several μm from the surface of the GaN substrate 11. As the ions to be implanted, those composed of one or more ions of hydrogen, nitrogen, oxygen, neon, and argon are used. In this embodiment, hydrogen and nitrogen ions are used as ions to be implanted. At this time, a thin film 11 a to be finally obtained GaN thin film 3 (see FIG. 2E) is formed from the surface of the GaN substrate 11 to the upper surface of the ion implantation layer 12.

図1(c)に示すように、単結晶シリコン基板2を用意し、GaN基板11の表面側をシリコン基板2の表面に重ね合わせ、密着させる。その後、重ね合わせた2枚のGaN基板11、シリコン基板2に熱処理を施し、貼り合わせる。   As shown in FIG. 1 (c), a single crystal silicon substrate 2 is prepared, and the surface side of the GaN substrate 11 is overlapped with and adhered to the surface of the silicon substrate 2. Thereafter, the two superposed GaN substrates 11 and silicon substrate 2 are heat treated and bonded together.

さて、この熱処理の際、GaN基板11中に形成したイオン注入層12内部では、イオンによって誘起された欠陥に起因して多数のダングリングボンドが平面状に形成されるため、イオン注入層12が図1(d)に示すような亀裂層13となる。すると亀裂層13の平面に沿って、熱応力等によって亀裂が発生し、亀裂層13を境としてGaN基板11は上下に分離する。   Now, during this heat treatment, a large number of dangling bonds are formed in a planar shape due to defects induced by ions inside the ion implantation layer 12 formed in the GaN substrate 11. A crack layer 13 as shown in FIG. Then, a crack occurs due to thermal stress or the like along the plane of the crack layer 13, and the GaN substrate 11 is separated vertically from the crack layer 13.

この現象を利用すると、図2(a)に示すように、シリコン基板2に貼り合わせられた表面付近の薄膜11a(図1参照)を残して、亀裂層13を境としてGaN基板11の大部分11Aをシリコン基板2から引き剥がすことができる。つまり、薄膜11aは、GaN基板11からシリコン基板2に転写され、GaN薄膜3となる。   When this phenomenon is utilized, as shown in FIG. 2A, most of the GaN substrate 11 is separated from the crack layer 13 with the thin film 11a (see FIG. 1) near the surface bonded to the silicon substrate 2 being left. 11A can be peeled off from the silicon substrate 2. That is, the thin film 11 a is transferred from the GaN substrate 11 to the silicon substrate 2 and becomes the GaN thin film 3.

その後、図2(b)に示すように、引き剥がされたGaN基板11の大部分11Aは、亀裂層13を除去することで、図2(c)に示すようなGaN基板21となる。このGaN基板21は、厚さd2が図1(a)のGaN基板11の厚さdよりも、若干薄くなっただけなので、第1の窒化物半導体基板として再利用できる。   Thereafter, as shown in FIG. 2B, most of the peeled GaN substrate 11 becomes a GaN substrate 21 as shown in FIG. 2C by removing the cracked layer 13. The GaN substrate 21 can be reused as the first nitride semiconductor substrate because the thickness d2 is only slightly smaller than the thickness d of the GaN substrate 11 of FIG.

一方、図2(d)に示すように、GaN薄膜3が表面に貼り付いたシリコン基板2は、さらなる熱処理を施して亀裂層13を除去すると、図2(e)で説明した半導体基板1が得られる。   On the other hand, as shown in FIG. 2D, when the silicon substrate 2 with the GaN thin film 3 attached to the surface is subjected to further heat treatment to remove the crack layer 13, the semiconductor substrate 1 described in FIG. can get.

本実施の形態の作用を説明する。   The operation of the present embodiment will be described.

本実施の形態に係る製造方法は、まず、GaN基板11中にイオン注入層12を形成し、そのGaN基板11をシリコン基板2に重ね合わせ、熱処理して貼り付ける。この際、イオン注入層12が亀裂層13となるため、亀裂層13を境にしてGaN基板11の大部分11Aをシリコン基板2から剥がすことで、シリコン基板2上にGaN薄膜3を形成した半導体基板1が得られる。他方、GaN基板11の大部分11Aは、亀裂層13を除去してGaN基板21となるため、GaN基板11として再利用できる。   In the manufacturing method according to the present embodiment, first, the ion implantation layer 12 is formed in the GaN substrate 11, and the GaN substrate 11 is overlaid on the silicon substrate 2 and bonded by heat treatment. At this time, since the ion implantation layer 12 becomes the crack layer 13, the semiconductor in which the GaN thin film 3 is formed on the silicon substrate 2 by peeling most of the GaN substrate 11 from the silicon substrate 2 with the crack layer 13 as a boundary. A substrate 1 is obtained. On the other hand, most of the GaN substrate 11 can be reused as the GaN substrate 11 because the crack layer 13 is removed to become the GaN substrate 21.

つまり、この製造方法を用いると、低転位密度であるが高価格という問題を抱える単結晶窒化物半導体基板(例えば、GaN基板11)のたった1枚から、低価格な基板(例えば、シリコン基板2)上に低転位密度の窒化物半導体薄膜(例えば、GaN薄膜3)を大量に「転写」でき、しかも低転位密度の窒化物半導体薄膜を有する半導体基板を大量に「複製」できる。   In other words, when this manufacturing method is used, a single crystal nitride semiconductor substrate (for example, GaN substrate 11) having a problem of low dislocation density but high price is changed from a low-cost substrate (for example, silicon substrate 2). It is possible to “transfer” a large amount of a nitride semiconductor thin film having a low dislocation density (for example, GaN thin film 3) on the semiconductor substrate and to “replicate” a semiconductor substrate having a nitride semiconductor thin film having a low dislocation density in large quantities.

特に、低価格な基板としては、単結晶窒化物半導体基板よりも数桁のオーダで安価なシリコン基板を使えばよい。すると、低転位密度の窒化物半導体薄膜を有する半導体基板の1枚あたりの単価を、単結晶窒化物半導体基板1枚と比較して、劇的に下げることができる。   In particular, a low-priced substrate may be a silicon substrate that is several orders of magnitude cheaper than a single crystal nitride semiconductor substrate. Then, the unit price per semiconductor substrate having a nitride semiconductor thin film having a low dislocation density can be drastically reduced as compared with one single crystal nitride semiconductor substrate.

したがって、本実施の形態に係る製造方法によれば、低転位密度の窒化物半導体薄膜を、低い製造コストで、シリコン基板2、あるいは任意の材質からなる基板上に形成することができる。   Therefore, according to the manufacturing method according to the present embodiment, a low dislocation density nitride semiconductor thin film can be formed on the silicon substrate 2 or a substrate made of an arbitrary material at a low manufacturing cost.

上記実施の形態では、イオン注入後のGaN基板11とシリコン基板2を重ね合わせ、これら2枚の基板11,2を熱処理して貼り合わせる例で説明したが、イオン注入後のGaN基板11を熱処理し、熱処理後のGaN基板11をシリコン基板2に貼り合わせてもよい。   In the above embodiment, the GaN substrate 11 after ion implantation and the silicon substrate 2 are overlapped, and the two substrates 11 and 2 are heat-treated and bonded. However, the GaN substrate 11 after ion implantation is heat-treated. Then, the heat-treated GaN substrate 11 may be bonded to the silicon substrate 2.

また、上記実施の形態では、窒化物半導体薄膜としてGaN薄膜3を形成する例で説明したが、窒化物半導体膜としてAlN薄膜を形成する場合には、第1の窒化物半導体基板としてウルツ鉱型AlNからなるAlN基板を用いる。   In the above embodiment, the example in which the GaN thin film 3 is formed as the nitride semiconductor thin film has been described. However, when the AlN thin film is formed as the nitride semiconductor film, the wurtzite type is used as the first nitride semiconductor substrate. An AlN substrate made of AlN is used.

(実施例1)
まず、HVPE法によって成長させた低転位密度の単結晶のGaN基板11を用意する。GaN基板11の表面側は、(000−1)窒素面となるように配置される。GaN基板11の厚さdは400μm程度である。
Example 1
First, a single crystal GaN substrate 11 having a low dislocation density grown by the HVPE method is prepared. The surface side of the GaN substrate 11 is arranged to be a (000-1) nitrogen surface. The thickness d of the GaN substrate 11 is about 400 μm.

このGaN基板11の表面近傍に、水素及び窒素イオンをイオン注入法により注入し、イオン注入層12を形成する。イオン注入は、GaN基板11の表面から2μm以下の深さにその濃度ピークを有するように行うことが望ましい。実施例1では、イオン注入のエネルギーを400keVとした。   Hydrogen and nitrogen ions are implanted in the vicinity of the surface of the GaN substrate 11 by ion implantation to form an ion implantation layer 12. The ion implantation is desirably performed so as to have a concentration peak at a depth of 2 μm or less from the surface of the GaN substrate 11. In Example 1, the ion implantation energy was set to 400 keV.

次に、(100)あるいは(111)の面方位をもつ単結晶のシリコン基板2を用意し、このシリコン基板2とイオン注入済みのGaN基板11表面を洗浄後、表面同士を重ね合わせ、密着させる。   Next, a single crystal silicon substrate 2 having a plane orientation of (100) or (111) is prepared, and after cleaning the surface of the silicon substrate 2 and the ion-implanted GaN substrate 11, the surfaces are overlapped and adhered to each other. .

この重ね合わせた基板11,2をガス置換可能なアニール炉に導入し、炉内で温度800℃以上の条件で、2時間以上の結合アニール(熱処理)を施し、シリコン基板2とイオン注入済みのGaN基板11を貼り合わせる。   The superposed substrates 11 and 2 are introduced into an annealing furnace capable of gas replacement, and bonded annealing (heat treatment) is performed in the furnace at a temperature of 800 ° C. or more for 2 hours or more, and the silicon substrate 2 and ions have been implanted. The GaN substrate 11 is bonded.

実施例1では、アニール炉内のガス雰囲気を水素と窒素の混合ガスとした。ガス雰囲気としては、水素、窒素、アンモニア、酸素、アルゴン、ネオン、ヘリウム等の単体ガス、あるいはこれらの混合ガスからなるものを用いてもよい。   In Example 1, the gas atmosphere in the annealing furnace was a mixed gas of hydrogen and nitrogen. As the gas atmosphere, a single gas such as hydrogen, nitrogen, ammonia, oxygen, argon, neon, helium, or a mixed gas thereof may be used.

結合アニールの際、イオン注入層12が亀裂層13となるため、亀裂層13を境としてGaN基板11の大部分11Aをシリコン基板2から引き剥がすことができる。結果として貼り合わせた基板11,2は、厚さが398μm程度になったGaN基板11の大部分11Aと、低転位密度であり厚さが2μm程度のGaN薄膜3が表面に貼り付いたシリコン基板2との2つに分離される。   During the bond annealing, since the ion implantation layer 12 becomes the crack layer 13, most of the GaN substrate 11 can be peeled off from the silicon substrate 2 with the crack layer 13 as a boundary. As a result, the bonded substrates 11 and 2 are a silicon substrate in which most of the GaN substrate 11 having a thickness of about 398 μm and a GaN thin film 3 having a low dislocation density and a thickness of about 2 μm are attached to the surface. 2 and 2 are separated.

このうち引き剥がされたGaN基板11の大部分11Aは、亀裂層13をケミカルメカニカルポリッシュ法などによって処理して除去することにより、GaN基板21(これはGaN基板11とほぼ同一構造)となり、再度、図1(b)以降に示すようなイオン注入によるシリコン基板2上へのGaN薄膜3の形成プロセスへ利用することができる。   Most of the peeled off GaN substrate 11 becomes a GaN substrate 21 (which has almost the same structure as the GaN substrate 11) by removing the cracked layer 13 by a chemical mechanical polishing method or the like. It can be used for the formation process of the GaN thin film 3 on the silicon substrate 2 by ion implantation as shown in FIG.

なぜならば、GaN基板21は、厚さd2がGaN基板11の厚さdよりも約0.5%程度薄くなった以外は、プロセス使用前と状態が変わらないためである。すなわち、1枚のGaN基板11は、理想的には数十回〜百回程度の再利用、使い回しが可能である。   This is because the state of the GaN substrate 21 is the same as that before the use of the process, except that the thickness d2 is about 0.5% thinner than the thickness d of the GaN substrate 11. That is, one GaN substrate 11 can be reused and reused ideally several tens to a hundred times.

低転位密度の単結晶のGaN基板11は1枚あたりの価格は高いが、上記のような単結晶のGaN基板21を再利用しつつ低転位密度のGaN薄膜3を増殖させるプロセスは、半導体基板の製造コストを著しく低減する効果がある。   Although the single crystal GaN substrate 11 having a low dislocation density is expensive per sheet, the process of growing the GaN thin film 3 having a low dislocation density while reusing the single crystal GaN substrate 21 as described above is a semiconductor substrate. This has the effect of significantly reducing the manufacturing cost.

一方、厚さ2μm程度の低転位密度のGaN薄膜3が表面に貼り付いたシリコン基板2は、さらなる熱処理を施して、イオン注入及びダングリングボンド形成によるダメージを除去(亀裂層13を除去)すると、優れた特性・信頼性をもつ窒化物半導体デバイスを形成するための、低価格な半導体基板1として使用することができる。   On the other hand, when the silicon substrate 2 on which the GaN thin film 3 having a low dislocation density of about 2 μm is adhered is subjected to further heat treatment, damage caused by ion implantation and dangling bond formation is removed (the crack layer 13 is removed). It can be used as an inexpensive semiconductor substrate 1 for forming a nitride semiconductor device having excellent characteristics and reliability.

ここで、半導体基板1を用いて作製した窒化物半導体デバイスの一例を説明する。具体的な応用例としては、図3に示すような青色LED31や、図4に示すような高周波トランジスター41がある。   Here, an example of a nitride semiconductor device manufactured using the semiconductor substrate 1 will be described. As specific application examples, there are a blue LED 31 as shown in FIG. 3 and a high-frequency transistor 41 as shown in FIG.

図3に示すように、青色LED31は、半導体基板1の上に、MOVPE法を用いてn型GaNエピタキシャル層32、InGaNとGaNからなるマルチ・カンタム・ウェル層33、p型GaNエピタキシャル層34を順次エピタキシャル成長させた後、p型GaNエピタキシャル34層の上に透明電極からなる電流拡散層35を形成し、所定のフォトリソグラフィー法で電流拡散層35の上にp型電極36を、半導体基板1の裏面にn型電極37をそれぞれ形成して構成される。   As shown in FIG. 3, the blue LED 31 includes an n-type GaN epitaxial layer 32, a multi-quantum well layer 33 made of InGaN and GaN, and a p-type GaN epitaxial layer 34 on the semiconductor substrate 1 using the MOVPE method. After sequential epitaxial growth, a current diffusion layer 35 made of a transparent electrode is formed on the p-type GaN epitaxial layer 34, and the p-type electrode 36 is formed on the current diffusion layer 35 by a predetermined photolithography method. An n-type electrode 37 is formed on the back surface.

この青色LED31は、デバイス構造中に非発光再結合中心となるような結晶欠陥が少ないため、高発光強度、長素子寿命という優れた特性を有する。   This blue LED 31 has excellent characteristics such as high light emission intensity and long element lifetime because there are few crystal defects that can be non-radiative recombination centers in the device structure.

また、図4に示すように、高周波トランジスター41は、半導体基板1の上に、MOVPE法を用いて半絶縁GaNエピタキシャル層42、アンドープAlGaNエピタキシャル層43を順次エピタキシャル成長させた後、所定のフォトリソグラフィー法でアンドープAlGaNエピタキシャル層43の上に、ソース電極44、ゲート電極45、ドレイン電極46、SiNxパッシベーション膜47をそれぞれ形成して構成される。   As shown in FIG. 4, the high-frequency transistor 41 is formed by sequentially growing a semi-insulating GaN epitaxial layer 42 and an undoped AlGaN epitaxial layer 43 on the semiconductor substrate 1 using the MOVPE method, and then performing a predetermined photolithography method. The source electrode 44, the gate electrode 45, the drain electrode 46, and the SiNx passivation film 47 are formed on the undoped AlGaN epitaxial layer 43, respectively.

この高周波トランジスター41は、デバイス構造中に電子散乱要因となるような結晶欠陥が少ないため、高速、高出力という優れた特性を有する。   The high-frequency transistor 41 has excellent characteristics such as high speed and high output because there are few crystal defects that cause electron scattering in the device structure.

(実施例2)
第1の窒化物半導体基板としてウルツ鉱型AlNからなるAlN基板を用い、実施例1と同様の方法で、シリコン基板2上にAlN薄膜を形成して半導体基板を作製した。実施例2によっても、実施例1と同様の作用効果が得られ、低転位密度の窒化物半導体薄膜を有する半導体基板を低コストで作製できる。
(Example 2)
Using an AlN substrate made of wurtzite AlN as the first nitride semiconductor substrate, an AlN thin film was formed on the silicon substrate 2 in the same manner as in Example 1 to produce a semiconductor substrate. Also in Example 2, the same effects as in Example 1 can be obtained, and a semiconductor substrate having a low dislocation density nitride semiconductor thin film can be manufactured at low cost.

(実施例3)
実施例1のGaN基板11の代わりに、(000−1)窒素面から任意の方向に0°以上8°未満、望ましくは1°以上3°未満の範囲でオフカットされた面が表面側となるように配置されたGaN基板を用い、実施例1と同様にして基板上にGaN薄膜を形成し、半導体基板を作製した。オフカットを0°以上8°未満の範囲にするのは、オフカットが8°以上になると、GaN基板上にエピタキシャル成長したGaN薄膜の表面モフォロジ(形態)が著しく劣化するからである。作製した半導体基板上に、MOVPE法で複数のエピタキシャル層を順次エピタキシャル成長させると、各エピタキシャル層のモフォロジが良好となる。
(Example 3)
Instead of the GaN substrate 11 of Example 1, a surface cut off in a range of 0 ° to less than 8 °, preferably 1 ° to less than 3 ° in any direction from the (000-1) nitrogen surface is the surface side Using the GaN substrate arranged as described above, a GaN thin film was formed on the substrate in the same manner as in Example 1 to produce a semiconductor substrate. The reason why the off cut is in the range of 0 ° or more and less than 8 ° is that when the off cut is 8 ° or more, the surface morphology (morphology) of the GaN thin film epitaxially grown on the GaN substrate is remarkably deteriorated. When a plurality of epitaxial layers are sequentially epitaxially grown on the manufactured semiconductor substrate by the MOVPE method, the morphology of each epitaxial layer is improved.

(実施例4)
実施例1のシリコン基板2の代わりに、ガラス基板あるいは金属基板を用い、実施例1と同様にして基板上にGaN薄膜3を形成し、半導体基板を作製した。第2の基板としては、工業面での技術的蓄積からシリコンを用いることが望ましいが、実施例4のようにガラスや金属などのさらに安価な材料からなる基板を用いれば、実施例1と比べて、低転位密度の窒化物半導体薄膜を有する半導体基板をさらに低コストで作製できる。
Example 4
A glass substrate or a metal substrate was used instead of the silicon substrate 2 of Example 1, and a GaN thin film 3 was formed on the substrate in the same manner as in Example 1 to produce a semiconductor substrate. As the second substrate, it is desirable to use silicon because of technical accumulation in the industrial aspect, but if a substrate made of a cheaper material such as glass or metal is used as in the fourth embodiment, it is compared with the first embodiment. Thus, a semiconductor substrate having a nitride semiconductor thin film with a low dislocation density can be manufactured at a lower cost.

図1(a)〜図1(d)は、本発明の好適な実施の形態である半導体基板の製造工程の一部(熱処理するまでの工程)を示す断面図である。FIG. 1A to FIG. 1D are cross-sectional views showing a part of a semiconductor substrate manufacturing process (processes until heat treatment) according to a preferred embodiment of the present invention. 図2(a)〜(e)は、本発明の好適な実施の形態である半導体基板の製造工程の一部(熱処理後の工程)を示す断面図である。2A to 2E are cross-sectional views showing a part of the semiconductor substrate manufacturing process (process after heat treatment) according to a preferred embodiment of the present invention. 本実施の形態に係る半導体基板を用いて作製したLEDの断面構造の一例を示す図である。It is a figure which shows an example of the cross-section of LED produced using the semiconductor substrate which concerns on this Embodiment. 本実施の形態に係る半導体基板を用いて作製した高周波トランジスターの断面構造の一例を示す図である。It is a figure which shows an example of the cross-sectional structure of the high frequency transistor produced using the semiconductor substrate which concerns on this Embodiment.

符号の説明Explanation of symbols

1 半導体基板
2 シリコン基板(第2の基板)
3 GaN薄膜(窒化物半導体薄膜)
11 GaN基板(第1の窒化物半導体基板)
12 イオン注入層
13 亀裂層
1 Semiconductor substrate 2 Silicon substrate (second substrate)
3 GaN thin film (nitride semiconductor thin film)
11 GaN substrate (first nitride semiconductor substrate)
12 Ion implantation layer 13 Crack layer

Claims (11)

第1の窒化物半導体基板の表面近傍にイオンを注入する工程と、その第1の窒化物半導体基板の表面側を第2の基板に重ね合わせる工程と、重ね合わせた上記2枚の基板を熱処理する工程と、イオン注入された層を境として上記第1の窒化物半導体基板の大部分を上記第2の基板から引き剥がす工程とを含むことを特徴とする半導体基板の製造方法。   A step of implanting ions in the vicinity of the surface of the first nitride semiconductor substrate, a step of superimposing the surface side of the first nitride semiconductor substrate on the second substrate, and heat-treating the two superimposed substrates And a step of peeling most of the first nitride semiconductor substrate from the second substrate with the ion-implanted layer as a boundary. 第1の窒化物半導体基板の表面近傍にイオンを注入する工程と、その第1の窒化物半導体基板を熱処理する工程と、上記第1の窒化物半導体基板の表面側を第2の基板に貼り合わせる工程と、イオン注入された層を境として上記第1の窒化物半導体基板の大部分を上記第2の基板から引き剥がす工程とを含むことを特徴とする半導体基板の製造方法。   A step of implanting ions in the vicinity of the surface of the first nitride semiconductor substrate; a step of heat-treating the first nitride semiconductor substrate; and attaching the surface side of the first nitride semiconductor substrate to the second substrate. A method of manufacturing a semiconductor substrate, comprising: a step of combining, and a step of peeling most of the first nitride semiconductor substrate from the second substrate with an ion-implanted layer as a boundary. 上記第1の窒化物半導体基板の大部分を引き剥がした後、上記イオン注入された層を除去し、上記第1の窒化物半導体基板として再利用する請求項1または2記載の半導体基板の製造方法。   3. The semiconductor substrate manufacturing method according to claim 1, wherein after the most part of the first nitride semiconductor substrate is peeled off, the ion-implanted layer is removed and reused as the first nitride semiconductor substrate. Method. 上記第1の窒化物半導体基板は、ウルツ鉱型GaNあるいはウルツ鉱型AlNからなる請求項1〜3いずれかに記載の半導体基板の製造方法。   The method of manufacturing a semiconductor substrate according to claim 1, wherein the first nitride semiconductor substrate is made of wurtzite GaN or wurtzite AlN. 上記第1の窒化物半導体基板の表面は、(000−1)窒素面である請求項1〜4いずれかに記載の半導体基板の製造方法。   The method of manufacturing a semiconductor substrate according to claim 1, wherein a surface of the first nitride semiconductor substrate is a (000-1) nitrogen surface. 上記第1の窒化物半導体基板の表面は、(000−1)窒素面から任意の方向に0°以上8°未満の範囲でオフカットされた面である請求項1〜5いずれかに記載の半導体基板の製造方法。   6. The surface according to claim 1, wherein the surface of the first nitride semiconductor substrate is a surface that is off-cut within a range of 0 ° or more and less than 8 ° in an arbitrary direction from the (000-1) nitrogen surface. A method for manufacturing a semiconductor substrate. 上記イオンは、水素、窒素、酸素、ネオン、アルゴンのうちの1種あるいは2種以上のイオンからなる請求項1〜6いずれかに記載の半導体基板の製造方法。   The method of manufacturing a semiconductor substrate according to claim 1, wherein the ions include one or more ions of hydrogen, nitrogen, oxygen, neon, and argon. 上記第2の基板がシリコン、ガラス、金属のいずれかからなる請求項1〜7いずれかに記載の半導体基板の製造方法。   The method for manufacturing a semiconductor substrate according to claim 1, wherein the second substrate is made of any one of silicon, glass, and metal. 上記第1の窒化物半導体基板は、厚さが400μm程度である請求項1〜8いずれかに記載の半導体基板の製造方法。   The method of manufacturing a semiconductor substrate according to claim 1, wherein the first nitride semiconductor substrate has a thickness of about 400 μm. 上記イオンの注入は、上記第1の窒化物半導体基板の表面から2μm以下の深さに濃度ピークを有するように行う請求項1〜9いずれかに記載の半導体基板の製造方法。   The method of manufacturing a semiconductor substrate according to claim 1, wherein the ion implantation is performed so as to have a concentration peak at a depth of 2 μm or less from the surface of the first nitride semiconductor substrate. 上記熱処理は、水素、窒素、アンモニア、酸素、アルゴン、ネオン、ヘリウムのいずれかの単体ガス、あるいはこれらの混合ガスからなるガス雰囲気中にて、温度800℃以上で2時間以上行う請求項1〜10いずれかに記載の半導体基板の製造方法。
The heat treatment is performed at a temperature of 800 ° C or higher for 2 hours or longer in a gas atmosphere composed of a single gas of hydrogen, nitrogen, ammonia, oxygen, argon, neon, or helium, or a mixed gas thereof. 10. A method for producing a semiconductor substrate according to claim 10.
JP2005020950A 2005-01-28 2005-01-28 Manufacturing method of semiconductor substrate Pending JP2006210660A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005020950A JP2006210660A (en) 2005-01-28 2005-01-28 Manufacturing method of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005020950A JP2006210660A (en) 2005-01-28 2005-01-28 Manufacturing method of semiconductor substrate

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2011100426A Division JP2011193010A (en) 2011-04-28 2011-04-28 Semiconductor wafer and semiconductor wafer for high frequency electronic device

Publications (1)

Publication Number Publication Date
JP2006210660A true JP2006210660A (en) 2006-08-10

Family

ID=36967157

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005020950A Pending JP2006210660A (en) 2005-01-28 2005-01-28 Manufacturing method of semiconductor substrate

Country Status (1)

Country Link
JP (1) JP2006210660A (en)

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2154709A2 (en) 2008-08-11 2010-02-17 Sumitomo Electric Industries, Ltd. Method of manufacturing group III nitride semiconductor layer bonded substrate
JP2010045262A (en) * 2008-08-15 2010-02-25 Showa Denko Kk Method of manufacturing semiconductor light emitting device
JP2010177464A (en) * 2009-01-29 2010-08-12 Sumitomo Electric Ind Ltd Method for manufacturing electronic device
JP2010238834A (en) * 2009-03-31 2010-10-21 Ube Ind Ltd Manufacturing method of light emitting diode substrate
JP2011501431A (en) * 2007-10-18 2011-01-06 コーニング インコーポレイテッド Gallium nitride semiconductor device on SOI and method of manufacturing the same
JP2011082393A (en) * 2009-10-08 2011-04-21 Sumitomo Electric Ind Ltd Semiconductor substrate, semiconductor device, method of manufacturing semiconductor substrate, and method of manufacturing semiconductor device
JP2011216543A (en) * 2010-03-31 2011-10-27 Ube Industries Ltd Light emitting diode, substrate for light emitting diode used therein, and method of manufacturing the same
WO2012063774A1 (en) 2010-11-12 2012-05-18 住友電気工業株式会社 Group iii nitride composite substrate
JPWO2011007483A1 (en) * 2009-07-14 2012-12-20 日本電気株式会社 Vertical transistor, method for manufacturing the same, and semiconductor device
US8664085B2 (en) 2010-04-20 2014-03-04 Sumitomo Electric Industries, Ltd. Method of manufacturing composite substrate
WO2014057748A1 (en) 2012-10-12 2014-04-17 住友電気工業株式会社 Group iii nitride composite substrate, manufacturing method therefor, and group iii nitride semiconductor device manufacturing method
JP2014157978A (en) * 2013-02-18 2014-08-28 Sumitomo Electric Ind Ltd Group iii nitride composite substrate, method for manufacturing the same, and method for manufacturing group iii nitride semiconductor device
WO2015020161A1 (en) 2013-08-08 2015-02-12 三菱化学株式会社 SELF-STANDING GaN SUBSTRATE, GaN CRYSTAL, METHOD FOR PRODUCING GaN SINGLE CRYSTAL, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
JP2015046486A (en) * 2013-08-28 2015-03-12 信越化学工業株式会社 Manufacturing method of composite substrate with nitride semiconductor thin film
CN104733286A (en) * 2013-12-19 2015-06-24 国际商业机器公司 Controlled spalling of group iii nitrides containing an embedded spall releasing plane
US9136337B2 (en) 2012-10-12 2015-09-15 Sumitomo Electric Industries, Ltd. Group III nitride composite substrate and method for manufacturing the same, laminated group III nitride composite substrate, and group III nitride semiconductor device and method for manufacturing the same
WO2015199180A1 (en) * 2014-06-25 2015-12-30 住友電気工業株式会社 Process for producing diamond substrate, diamond substrate, and diamond composite substrate
JP2018024539A (en) * 2016-08-08 2018-02-15 三菱ケミカル株式会社 C-plane GaN substrate
US9923063B2 (en) 2013-02-18 2018-03-20 Sumitomo Electric Industries, Ltd. Group III nitride composite substrate and method for manufacturing the same, laminated group III nitride composite substrate, and group III nitride semiconductor device and method for manufacturing the same
WO2022185906A1 (en) * 2021-03-04 2022-09-09 信越半導体株式会社 Method for manufacturing epitaxial wafer for ultraviolet light-emitting element, method for manufacturing substrate for ultraviolet light-emitting element, epitaxial wafer for ultraviolet light-emitting element, and substrate for ultraviolet light-emitting element

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000349267A (en) * 1999-03-26 2000-12-15 Canon Inc Manufacturing method of semiconductor member
JP2002175985A (en) * 2000-12-05 2002-06-21 Hitachi Cable Ltd Method for manufacturing nitride semiconductor epitaxial wafer and nitride semiconductor epitaxial wafer
JP2002373864A (en) * 2001-04-12 2002-12-26 Sumitomo Electric Ind Ltd Oxygen doping method for gallium nitride crystal and n-type gallium nitride single crystal substrate doped with oxygen
JP2003060318A (en) * 2001-06-06 2003-02-28 Matsushita Electric Ind Co Ltd GaN-based compound semiconductor epi-wafer and semiconductor device using the same
JP2003068592A (en) * 2001-08-22 2003-03-07 Toshiba Corp Method for manufacturing epitaxial substrate, method for manufacturing semiconductor element, and epitaxial substrate
JP2003078117A (en) * 2001-08-31 2003-03-14 Canon Inc Semiconductor member, semiconductor device, and manufacturing method thereof
JP2003224042A (en) * 2001-12-21 2003-08-08 Soi Tec Silicon On Insulator Technologies Method of transferring semiconductor thin layer and method of manufacturing donor wafer used therefor
JP2003229645A (en) * 2002-01-31 2003-08-15 Nec Corp Quantum well structure, semiconductor device using the same, and method of manufacturing semiconductor device
JP2003535472A (en) * 2000-05-30 2003-11-25 コミツサリア タ レネルジー アトミーク Vulnerable substrate and method of manufacturing such a substrate
JP2004517472A (en) * 2000-11-27 2004-06-10 エス オー イ テク シリコン オン インシュレータ テクノロジース Method for producing substrate, especially substrate for optics, electronics or electro-optics, and substrate obtained by this method
JP2004244307A (en) * 2003-01-20 2004-09-02 Matsushita Electric Ind Co Ltd Method of manufacturing group III nitride substrate and semiconductor device
JP2004281863A (en) * 2003-03-18 2004-10-07 Nichia Chem Ind Ltd Nitride semiconductor device and method of manufacturing the same
WO2005004232A1 (en) * 2003-06-06 2005-01-13 S.O.I.Tec Silicon On Insulator Technologies Method for simultaneously obtaining a pair of substrates covered by a useful layer

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000349267A (en) * 1999-03-26 2000-12-15 Canon Inc Manufacturing method of semiconductor member
JP2003535472A (en) * 2000-05-30 2003-11-25 コミツサリア タ レネルジー アトミーク Vulnerable substrate and method of manufacturing such a substrate
JP2004517472A (en) * 2000-11-27 2004-06-10 エス オー イ テク シリコン オン インシュレータ テクノロジース Method for producing substrate, especially substrate for optics, electronics or electro-optics, and substrate obtained by this method
JP2002175985A (en) * 2000-12-05 2002-06-21 Hitachi Cable Ltd Method for manufacturing nitride semiconductor epitaxial wafer and nitride semiconductor epitaxial wafer
JP2002373864A (en) * 2001-04-12 2002-12-26 Sumitomo Electric Ind Ltd Oxygen doping method for gallium nitride crystal and n-type gallium nitride single crystal substrate doped with oxygen
JP2003060318A (en) * 2001-06-06 2003-02-28 Matsushita Electric Ind Co Ltd GaN-based compound semiconductor epi-wafer and semiconductor device using the same
JP2003068592A (en) * 2001-08-22 2003-03-07 Toshiba Corp Method for manufacturing epitaxial substrate, method for manufacturing semiconductor element, and epitaxial substrate
JP2003078117A (en) * 2001-08-31 2003-03-14 Canon Inc Semiconductor member, semiconductor device, and manufacturing method thereof
JP2003224042A (en) * 2001-12-21 2003-08-08 Soi Tec Silicon On Insulator Technologies Method of transferring semiconductor thin layer and method of manufacturing donor wafer used therefor
JP2003229645A (en) * 2002-01-31 2003-08-15 Nec Corp Quantum well structure, semiconductor device using the same, and method of manufacturing semiconductor device
JP2004244307A (en) * 2003-01-20 2004-09-02 Matsushita Electric Ind Co Ltd Method of manufacturing group III nitride substrate and semiconductor device
JP2004281863A (en) * 2003-03-18 2004-10-07 Nichia Chem Ind Ltd Nitride semiconductor device and method of manufacturing the same
WO2005004232A1 (en) * 2003-06-06 2005-01-13 S.O.I.Tec Silicon On Insulator Technologies Method for simultaneously obtaining a pair of substrates covered by a useful layer

Cited By (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011501431A (en) * 2007-10-18 2011-01-06 コーニング インコーポレイテッド Gallium nitride semiconductor device on SOI and method of manufacturing the same
US8124498B2 (en) 2008-08-11 2012-02-28 Sumitomo Electric Industries, Ltd. Method of manufacturing group III nitride semiconductor layer bonded substrate
JP2010045098A (en) * 2008-08-11 2010-02-25 Sumitomo Electric Ind Ltd Method of manufacturing group-iii nitride semiconductor layer bonded substrate
EP2154709A2 (en) 2008-08-11 2010-02-17 Sumitomo Electric Industries, Ltd. Method of manufacturing group III nitride semiconductor layer bonded substrate
JP2010045262A (en) * 2008-08-15 2010-02-25 Showa Denko Kk Method of manufacturing semiconductor light emitting device
JP2010177464A (en) * 2009-01-29 2010-08-12 Sumitomo Electric Ind Ltd Method for manufacturing electronic device
JP2010238834A (en) * 2009-03-31 2010-10-21 Ube Ind Ltd Manufacturing method of light emitting diode substrate
JPWO2011007483A1 (en) * 2009-07-14 2012-12-20 日本電気株式会社 Vertical transistor, method for manufacturing the same, and semiconductor device
JP2011082393A (en) * 2009-10-08 2011-04-21 Sumitomo Electric Ind Ltd Semiconductor substrate, semiconductor device, method of manufacturing semiconductor substrate, and method of manufacturing semiconductor device
JP2011216543A (en) * 2010-03-31 2011-10-27 Ube Industries Ltd Light emitting diode, substrate for light emitting diode used therein, and method of manufacturing the same
US8664085B2 (en) 2010-04-20 2014-03-04 Sumitomo Electric Industries, Ltd. Method of manufacturing composite substrate
US9252207B2 (en) 2010-04-20 2016-02-02 Sumitomo Electric Industries, Ltd. Composite substrate
WO2012063774A1 (en) 2010-11-12 2012-05-18 住友電気工業株式会社 Group iii nitride composite substrate
US9136337B2 (en) 2012-10-12 2015-09-15 Sumitomo Electric Industries, Ltd. Group III nitride composite substrate and method for manufacturing the same, laminated group III nitride composite substrate, and group III nitride semiconductor device and method for manufacturing the same
US9917004B2 (en) 2012-10-12 2018-03-13 Sumitomo Electric Industries, Ltd. Group III nitride composite substrate and method for manufacturing the same, and method for manufacturing group III nitride semiconductor device
US11094537B2 (en) 2012-10-12 2021-08-17 Sumitomo Electric Industries, Ltd. Group III nitride composite substrate and method for manufacturing the same, and method for manufacturing group III nitride semiconductor device
US10600676B2 (en) 2012-10-12 2020-03-24 Sumitomo Electric Industries, Ltd. Group III nitride composite substrate and method for manufacturing the same, and method for manufacturing group III nitride semiconductor device
US20150194442A1 (en) * 2012-10-12 2015-07-09 Sumitomo Electric Industries, Ltd Group iii nitride composite substrate and method for manufacturing the same, and method for manufacturing group iii nitride semiconductor device
WO2014057748A1 (en) 2012-10-12 2014-04-17 住友電気工業株式会社 Group iii nitride composite substrate, manufacturing method therefor, and group iii nitride semiconductor device manufacturing method
US10186451B2 (en) 2013-02-08 2019-01-22 Sumitomo Electric Industries, Ltd. Group III nitride composite substrate and method for manufacturing the same, and method for manufacturing group III nitride semiconductor device
US9312165B2 (en) 2013-02-08 2016-04-12 Sumitomo Electric Industries, Ltd. Group III nitride composite substrate and method for manufacturing the same, and method for manufacturing group III nitride semiconductor device
JP2014157978A (en) * 2013-02-18 2014-08-28 Sumitomo Electric Ind Ltd Group iii nitride composite substrate, method for manufacturing the same, and method for manufacturing group iii nitride semiconductor device
US9923063B2 (en) 2013-02-18 2018-03-20 Sumitomo Electric Industries, Ltd. Group III nitride composite substrate and method for manufacturing the same, laminated group III nitride composite substrate, and group III nitride semiconductor device and method for manufacturing the same
EP3315639A1 (en) 2013-08-08 2018-05-02 Mitsubishi Chemical Corporation Self-standing gan substrate, gan crystal, method for producing gan single crystal, and method for producing semiconductor device
WO2015020161A1 (en) 2013-08-08 2015-02-12 三菱化学株式会社 SELF-STANDING GaN SUBSTRATE, GaN CRYSTAL, METHOD FOR PRODUCING GaN SINGLE CRYSTAL, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
JP2015046486A (en) * 2013-08-28 2015-03-12 信越化学工業株式会社 Manufacturing method of composite substrate with nitride semiconductor thin film
CN104733286A (en) * 2013-12-19 2015-06-24 国际商业机器公司 Controlled spalling of group iii nitrides containing an embedded spall releasing plane
US10822693B2 (en) 2014-06-25 2020-11-03 Sumitomo Electric Industries, Ltd. Method of manufacturing diamond substrate, diamond substrate, and diamond composite substrate
US10487395B2 (en) 2014-06-25 2019-11-26 Sumitomo Electric Industries, Ltd. Method of manufacturing diamond substrate, diamond substrate, and diamond composite substrate
WO2015199180A1 (en) * 2014-06-25 2015-12-30 住友電気工業株式会社 Process for producing diamond substrate, diamond substrate, and diamond composite substrate
JPWO2015199180A1 (en) * 2014-06-25 2017-04-20 住友電気工業株式会社 Diamond substrate manufacturing method, diamond substrate, and diamond composite substrate
US11359275B2 (en) 2014-06-25 2022-06-14 Sumitomo Electric Industries, Ltd. Method of manufacturing diamond substrate, diamond substrate, and diamond composite substrate
US11692264B2 (en) 2014-06-25 2023-07-04 Sumitomo Electric Industries, Ltd. Method of manufacturing diamond substrate, diamond substrate, and diamond composite substrate
JP2018024539A (en) * 2016-08-08 2018-02-15 三菱ケミカル株式会社 C-plane GaN substrate
WO2022185906A1 (en) * 2021-03-04 2022-09-09 信越半導体株式会社 Method for manufacturing epitaxial wafer for ultraviolet light-emitting element, method for manufacturing substrate for ultraviolet light-emitting element, epitaxial wafer for ultraviolet light-emitting element, and substrate for ultraviolet light-emitting element
JP2022134799A (en) * 2021-03-04 2022-09-15 信越半導体株式会社 Manufacturing method of epitaxial wafer for ultraviolet light emitting element, manufacturing method of substrate for ultraviolet light emitting element, epitaxial wafer for ultraviolet light emitting element, and substrate for ultraviolet light emitting element
JP7484773B2 (en) 2021-03-04 2024-05-16 信越半導体株式会社 Method for manufacturing an epitaxial wafer for ultraviolet light emitting device, method for manufacturing a substrate for ultraviolet light emitting device, and epitaxial wafer for ultraviolet light emitting device
EP4303940A4 (en) * 2021-03-04 2025-10-01 Shin Etsu Handotai Co Ltd Method for producing an epitaxial wafer for a UV light-emitting element, substrate for a UV light-emitting element

Similar Documents

Publication Publication Date Title
JP2006210660A (en) Manufacturing method of semiconductor substrate
CN100573822C (en) Substrate and manufacturing method thereof, and semiconductor device and manufacturing method thereof
TWI240434B (en) Method to produce semiconductor-chips
US8878189B2 (en) Group III nitride semiconductor growth substrate, group III nitride semiconductor epitaxial substrate, group III nitride semiconductor element and group III nitride semiconductor free-standing substrate, and method of producing the same
CN101253636B (en) Method and optoelectronic device for lateral separation of semiconductor wafers
US20120070929A1 (en) Method for fabricating wafer product and method for fabricating gallium nitride based semiconductor optical device
CN101651092B (en) Fabrication method of circuit structure
KR20090093887A (en) Method of prepairing a substrate having near perfect crystal thin layers
CN101861661A (en) Gallium nitride semiconductor device on SOI and process for producing the same
CN113097124A (en) Preparation method of heterogeneous integrated GaN thin film and GaN device
US11735685B2 (en) Supports for a semiconductor structure and associated wafers for an optoelectronic device
KR101219358B1 (en) Method for separating substrate and production method for bonding substrate using the same
JP4633962B2 (en) Manufacturing method of nitride semiconductor substrate
KR101236213B1 (en) Process for making a GaN substrate
US20130323906A1 (en) Method Of Manufacturing Thin-Film Bonded Substrate Used For Semiconductor Device
JP2011193010A (en) Semiconductor wafer and semiconductor wafer for high frequency electronic device
JP2010040737A (en) Semiconductor substrate and method of manufacturing the same
JP2003332237A (en) Manufacturing method of semiconductor thin film
CN102640258A (en) Method of manufacturing nitride semiconductor device
JP4192430B2 (en) Manufacturing method of nitride semiconductor epitaxial wafer
JP7484773B2 (en) Method for manufacturing an epitaxial wafer for ultraviolet light emitting device, method for manufacturing a substrate for ultraviolet light emitting device, and epitaxial wafer for ultraviolet light emitting device
JP2005005723A (en) Nitride semiconductor epitaxial wafer manufacturing method and nitride semiconductor epitaxial wafer
KR20130059677A (en) Manufacturing method of layer transferred substrate
KR100952015B1 (en) Fabrication method for a semiconductor device
JP2004146605A (en) Method for manufacturing nitride semiconductor wafer and method for manufacturing light emitting device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070216

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20100722

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100727

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100924

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110301

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110428

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20111004