JP2006261603A - Multi-chip type semiconductor device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multi-chip semiconductor device for attaining high breakdown voltage withstanding property against an input voltage without increasing a packaging area, by storing a constant voltage chip, in which a semiconductor chip fabricated in a low voltage process and a constant power supply circuit used for feeding power to the semiconductor device and fabricated in a high voltage process are integrated, in a chip-on-chip type semiconductor package. <P>SOLUTION: The multi-chip semiconductor device is provided with a semiconductor chip 3 mounted on a mounting substrate, and a constant voltage chip 2 for integrating a constant power voltage circuit for receiving power fed from an AC adaptor 10 and feeding the power to the semiconductor chip 3. After the constant voltage chip 2 is piled up on the semiconductor chip 3, the constant voltage chip 2 and the semiconductor chip 3 are molded with resin. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a multichip semiconductor device having a semiconductor chip integrated with a step-down series regulator circuit and a method for manufacturing the same, and more particularly, to a semiconductor integrated circuit chip having a low withstand voltage and an external power supply voltage on the semiconductor integrated circuit chip. The present invention relates to a multi-chip type semiconductor device in which a semiconductor chip that integrates a step-down type series regulator circuit that supplies a power supply voltage that is stepped down is configured on a chip-on-chip basis and a manufacturing method thereof.

  In recent years, electronic devices have been rapidly advanced in function, size, weight, and cost. In order to satisfy these requirements, in a semiconductor device, design rules have been miniaturized in order to mount more circuits on a smaller chip. On the other hand, since the withstand voltage of the semiconductor device has been reduced with the miniaturization, the number of cases where an overvoltage is erroneously applied to the semiconductor device has increased. In particular, in an apparatus using an AC adapter, there is a case where a fault occurs in a semiconductor device manufactured by a low-voltage process because an AC adapter having a high output voltage is erroneously connected.

In order not to break down even if an AC adapter having a high voltage is connected, and to be usable even with an AC adapter having a high voltage, it is necessary to manufacture the semiconductor device by a high voltage process. However, when a semiconductor device is manufactured by a high voltage process, the chip size is considerably larger than the current one, and further, a development cost and a development period for newly developing a semiconductor are required.
As another method, it is conceivable to connect a semiconductor device in which a step-down series regulator circuit with a high withstand voltage is integrated between a semiconductor device with a low withstand voltage and an AC adapter.

Conventionally, when there is a semiconductor chip in which a power supply circuit is integrated and a semiconductor chip that operates with its output voltage, a method is known in which each semiconductor chip is arranged in a plane and incorporated into a single package as a hybrid IC (for example, patents). Reference 1).
However, in the method of arranging semiconductor chips side by side in this way, the area of the hybrid IC is increased, and the size reduction cannot be achieved.
Therefore, in order to reduce the mounting area of the semiconductor device, a chip-on-chip system is known in which another semiconductor chip is stacked and mounted on the surface of the semiconductor chip.
JP-A-63-175906

  However, in the chip-on-chip method, when the characteristics of the circuit elements formed on the semiconductor chip change due to the stress caused by the bonding of the semiconductor chip, or when the semiconductor chip generating a large amount of heat is stacked and stacked, Since the characteristics change due to the influence of heat generated between the semiconductor chips, the types of semiconductors that can be mounted are limited to some extent. Further, in order to suppress heat generation, a heat radiating means such as a metal plate or the like closely attached to the package is necessary.

  The present invention has been made to solve the above problems, and includes a semiconductor chip manufactured by a low voltage process, and a constant voltage power supply circuit manufactured by a high voltage process for supplying power to the semiconductor chip. To obtain a multi-chip type semiconductor device and a method for manufacturing the same capable of increasing the withstand voltage against an input voltage without increasing the mounting area by housing the integrated constant voltage chip in a chip-on-chip semiconductor package. Objective.

A multi-chip type semiconductor device according to the present invention includes a first semiconductor integrated circuit chip having a predetermined function mounted on a mounting substrate;
A second semiconductor integrated circuit chip in which a power supply circuit for receiving power supplied from the outside and supplying power to the first semiconductor integrated circuit chip is integrated;
With
After the second semiconductor integrated circuit chip is overlaid on the first semiconductor integrated circuit chip, the first and second semiconductor integrated circuit chips are molded with resin.

  Specifically, the second semiconductor integrated circuit chip is smaller than the first semiconductor integrated circuit chip.

  The circuit element integrated in the second semiconductor integrated circuit chip has a higher withstand voltage than the circuit element integrated in the first semiconductor integrated circuit chip.

  Further, the second semiconductor integrated circuit chip is arranged on a portion of the circuit formed in the first semiconductor integrated circuit chip where a circuit that generates less heat during operation is formed. .

  In addition, the second semiconductor integrated circuit chip is arranged on a portion of the circuit formed in the first semiconductor integrated circuit chip where a circuit having low temperature dependency is formed.

  The first semiconductor integrated circuit chip has an analog circuit portion and a digital circuit portion, and the second semiconductor integrated circuit chip is formed with the digital circuit portion of the first semiconductor integrated circuit chip. It was arranged on the part.

  In addition, the first semiconductor integrated circuit chip has an optional circuit whose operation is determined based on specifications, and the second semiconductor integrated circuit chip is the optional circuit of the first semiconductor integrated circuit chip. Among them, the circuit is arranged on a portion where a circuit in which operation is prohibited is formed.

  Specifically, the power supply circuit integrated on the second semiconductor integrated circuit chip is a step-down series regulator.

  In this case, the step-down type series regulator outputs the predetermined constant voltage when the input voltage is larger than the predetermined constant voltage, and the input voltage when the input voltage is smaller than the predetermined constant voltage. A voltage almost equal to is output.

  In the step-down type series regulator, the predetermined constant voltage is set smaller than a maximum input voltage of the first semiconductor integrated circuit chip.

  The step-down type series regulator may include an output voltage control transistor, and the output voltage control transistor may be externally attached to the second semiconductor integrated circuit chip.

  The mounting substrate includes a connection terminal for connection to an external substrate, and a land for connection to an external connection pad provided on each of the first and second semiconductor integrated circuit chips. The lands corresponding to the external connection pads on the first and second semiconductor integrated circuit chips are connected by wire bonding.

  More specifically, a secondary battery charge control circuit is integrated in the first semiconductor integrated circuit chip.

  In this case, the secondary battery charging control circuit includes a secondary battery charging current supply transistor, and the secondary battery charging current supply transistor is externally attached to the second semiconductor integrated circuit chip. You may do it.

A method for manufacturing a multichip semiconductor device according to the present invention includes a first semiconductor integrated circuit chip having a predetermined function mounted on a mounting substrate;
A second semiconductor integrated circuit chip in which a power supply circuit for receiving power supplied from the outside and supplying power to the first semiconductor integrated circuit chip is integrated;
In a method for manufacturing a multichip semiconductor device comprising:
Overlaying the second semiconductor integrated circuit chip on the first semiconductor integrated circuit chip;
Each of the first and second semiconductor integrated circuit chips was molded with resin.

  Specifically, the second semiconductor integrated circuit chip is disposed on a portion of the circuit formed on the first semiconductor integrated circuit chip where a circuit that generates less heat during operation is formed. I did it.

  The second semiconductor integrated circuit chip may be disposed on a portion of the circuit formed in the first semiconductor integrated circuit chip where a circuit having low temperature dependency is formed. Good.

  The first semiconductor integrated circuit chip has an analog circuit portion and a digital circuit portion, and the second semiconductor integrated circuit chip is formed with the digital circuit portion of the first semiconductor integrated circuit chip. You may make it arrange | position on a part.

  In addition, the first semiconductor integrated circuit chip has an optional circuit whose operation is determined based on specifications, and the second semiconductor integrated circuit chip is the optional circuit of the first semiconductor integrated circuit chip. Of these, it may be arranged on a portion where a circuit in which operation is prohibited is formed.

  The power supply circuit integrated in the second semiconductor integrated circuit chip is a step-down series regulator, the step-down series regulator includes an output voltage control transistor, and the output voltage control transistor It may be externally attached to the two semiconductor integrated circuit chips.

  The first semiconductor integrated circuit chip is integrated with a secondary battery charge control circuit, and the secondary battery charge control circuit includes a transistor for supplying a secondary battery charge current. The transistor may be externally attached to the second semiconductor integrated circuit chip.

  According to the multichip semiconductor device of the present invention, the first semiconductor integrated circuit chip in which the power supply circuit such as the step-down series regulator manufactured by the high voltage process is integrated is operated with the output voltage of the power supply circuit. Since a multi-chip type semiconductor device using a chip-on-chip method is formed by being overlaid on the semiconductor integrated circuit chip, it is possible to increase the withstand voltage against the input voltage without increasing the mounting area.

  In addition, since the size of the step-down series regulator chip is sufficiently smaller than that of the semiconductor chip, it is possible to select and mount a position on the semiconductor chip where it is difficult to generate heat and stress, sacrificing performance. Thus, a small and high withstand voltage semiconductor device can be obtained.

  In addition, since a general-purpose semiconductor chip can be used for each of the first and second semiconductor integrated circuit chips, a large amount of development costs and a long development period are unnecessary, and an inexpensive semiconductor device can be obtained in a short period of time. Can do.

  In addition, since a device that generates heat during operation, such as a transistor for controlling the output voltage of the step-down series regulator and a transistor for supplying the secondary battery charging current of the secondary battery charging control circuit, is externally attached, a special package is used. It is possible to eliminate the need to provide heat dissipation means.

  In addition, according to the method for manufacturing a multichip semiconductor device of the present invention, for example, a second semiconductor integrated circuit chip on which a power supply circuit such as a step-down series regulator manufactured by a high voltage process is integrated is connected to the output voltage of the power supply circuit. Therefore, it is possible to obtain a method for manufacturing a multi-chip type semiconductor device that can increase the withstand voltage against the input voltage without increasing the mounting area. it can.

Next, the present invention will be described in detail based on the embodiments shown in the drawings.
First embodiment.
FIG. 1 is a block diagram showing a configuration example of a multichip semiconductor device according to the first embodiment of the present invention.
The multi-chip type semiconductor device 1 includes a constant voltage chip 2 in which constant voltage power supply circuits manufactured by a high voltage process are integrated, and a semiconductor chip 3 manufactured by a low voltage process, and includes a Vdd terminal and a GND terminal. Between these, the AC adapter 10 which makes a power supply is connected. The constant voltage chip 2 is a step-down series regulator, and the voltage Vdd output from the AC adapter 10 to the Vdd terminal is input to the power input terminal PVin of the constant voltage chip 2. The constant voltage chip 2 constitutes a second semiconductor integrated circuit chip, and the semiconductor chip 3 constitutes a first semiconductor integrated circuit chip.

The constant voltage chip 2 steps down the input voltage Vdd to a voltage within the operating voltage range of the semiconductor chip 3 and outputs it to the power input terminal CVin of the semiconductor chip 3 from the output terminal Vo. It operates with the voltage supplied to CVin as the power source. Further, the ground terminal PGND of the constant voltage chip 2 and the ground terminal CGND of the semiconductor chip 3 are connected to the GND terminal.
Since the constant voltage chip 2 is manufactured using a high voltage process, it has a withstand voltage of, for example, about 26V. For this reason, even if it receives the voltage of about 24V from AC adapter 10, for example, a malfunction does not occur. On the other hand, the semiconductor chip 3 is a highly integrated multifunctional semiconductor manufactured by using a low voltage process. For example, the rated voltage is 5V and the maximum applied voltage is about 8V.

Further, when the output voltage Vdd of the AC adapter 10 is larger than the rated output voltage of the constant voltage chip 2, the constant voltage chip 2 outputs the rated output voltage from the output terminal Vo. Conversely, when the output voltage Vdd of the AC adapter 10 becomes smaller than the rated output voltage of the constant voltage chip 2, a voltage slightly smaller than the output voltage Vdd of the AC adapter 10 is output.
The rated output voltage of the constant voltage chip 2 is set to a voltage slightly lower than the maximum applied voltage 8V of the semiconductor chip 3, in order to reduce power consumption in the constant voltage chip 2 as much as possible.

  Normally, an AC adapter 10 that outputs a voltage of 6 to 7V is connected to the multichip semiconductor device 1, but even if an AC adapter that outputs a voltage of 24V is mistakenly connected, it can operate normally. If the output voltage of the AC adapter 10 is smaller than the rated output voltage of the constant voltage chip 2 such as the normal 6 to 7 V, the output voltage control transistor in the constant voltage chip 2 is completely Since it operates in the ON state, power consumption in the constant voltage chip 2 is small, and heat generation of the chip can be minimized.

Here, FIG. 2 is a diagram illustrating an example of the internal structure of the multichip semiconductor device 1 of FIG. 1, and FIG. 2A is a perspective view of the multichip semiconductor device 1 as viewed from the side. FIG. 2B is a perspective view of the multichip semiconductor device 1 as viewed from above.
In FIG. 2, the vertical and horizontal dimensions of the constant voltage chip 2 are both sufficiently smaller than the semiconductor chip 3, and the constant voltage chip 2 can be placed at an arbitrary position on the upper surface of the semiconductor chip 3. A plurality of pads 11 and 12 for external connection are provided around the upper surfaces of the constant voltage chip 2 and the semiconductor chip 3, respectively.

  Further, the semiconductor chip 3 is on the mounting substrate 13, and the mounting substrate 13 has a plurality of connection terminals 14 for connection to an external substrate, and a plurality of connection terminals for connecting the constant voltage chip 2 and the semiconductor chip 3. Each of the lands 15 is provided. The corresponding connection terminals 14 and lands 15 are electrically connected to each other by a wiring pattern (not shown) provided on the mounting substrate 13. The pads 11 and 12 of the constant voltage chip 2 and the semiconductor chip 3 are connected to the lands 15 of the corresponding mounting substrate 13 by bonding wires 16. The semiconductor chip 3 on the mounting substrate 13, the constant voltage chip 2 on the semiconductor chip 3, and each bonding wire 16 are molded with a sealing resin 17.

Here, since the constant voltage chip 2 may generate heat, among the circuits formed in the semiconductor chip 3, the constant voltage chip 2 is mounted on a portion where a circuit that generates less heat during operation is formed. Thus, extreme concentration of heat generated by the constant voltage chip 2 and the semiconductor chip 3 can be avoided.
Further, by mounting the constant voltage chip 2 on the part of the circuit formed on the semiconductor chip 3 where the circuit having low temperature dependency is formed, the characteristics against temperature change are not deteriorated. Can do.

When the semiconductor chip 3 includes an analog circuit portion and a digital circuit portion, the constant voltage chip 2 is mounted on the portion of the semiconductor chip 3 where the digital circuit portion is formed. Thus, it is possible to avoid the influence of the characteristic change of the semiconductor element due to the influence of the stress generated when the semiconductor chip 3 is overlapped.
In addition, if the semiconductor chip 3 includes an optional circuit that selects an operation based on the specification, and the semiconductor chip 3 includes an optional circuit portion that does not perform an operation, the operation is prohibited by the optional circuit of the semiconductor chip 3. By mounting the constant voltage chip 2 on the part where the circuit is formed, the influence of heat and stress can be minimized.

Although the output voltage control transistor is formed in the constant voltage chip 2 in FIG. 1, the output voltage control transistor Q1 is externally attached to the multichip semiconductor device 1 as shown in FIG. As a result, the chip area of the constant voltage chip 2 can be reduced, and the heat generation of the constant voltage chip 2 during operation can be reduced. In this way, in the multichip semiconductor device 1 of FIG. 3, the EXT terminal for supplying the base signal from the constant voltage chip 2 to the transistor Q1 for output voltage control, and the transistor Q1 for output voltage control A Vo terminal for connecting the collector to the output terminal Vo of the constant voltage chip 2 is newly provided from FIG.
In this way, when the chip area of the constant voltage chip 2 is reduced and heat generation is reduced, the degree of freedom regarding the mounting position of the constant voltage chip 2 on the semiconductor chip 3 is increased, and the constant voltage chip 2 is placed on the semiconductor chip 3. It becomes easy to mount in the optimal position.

Further, when the secondary battery charging control circuit is mounted on the semiconductor chip 3, as shown in FIG. 4, the secondary battery charging in the secondary battery charging control circuit for controlling the charging of the secondary battery 20 is performed. The power transistor Q2 for supplying current is externally attached to the multichip semiconductor device 1. In this manner, in the multichip semiconductor device 1 of FIG. 4, the EXT terminal for supplying the base signal from the constant voltage chip 2 to the output voltage control transistor Q1, and the output voltage control transistor Q1 A base signal is sent from the semiconductor chip 3 to the power transistor Q2 for supplying the secondary battery charging current and the Vo terminal for connecting the collector and the emitter of the power transistor Q2 for supplying the secondary battery charging current to the output terminal Vo of the constant voltage chip 2. A CHG terminal for supply is newly provided from FIG.
By doing so, the heat generation in the semiconductor chip 3 is reduced, and there is no need for special consideration for heat dissipation, for example, the attachment of a metal plate or the like to the semiconductor device.

  As described above, the multi-chip type semiconductor device according to the first embodiment stores the constant voltage chip 2 and the semiconductor chip 3 in one package, so that a high voltage output type AC adapter is mistakenly connected. Even in this case, the high voltage from the AC adapter is not directly input to the semiconductor chip 3, and the occurrence of a malfunction of the semiconductor chip 3 can be prevented. Furthermore, by using the chip-on-chip method, it is possible to realize a semiconductor device having a high input withstand voltage without increasing the package mounting area of the semiconductor chip 3. Further, since both the constant voltage chip 2 and the semiconductor chip 3 can be developed for general-purpose semiconductor devices, a large amount of development costs and a long development period are not required, and an inexpensive semiconductor device can be used for a short time. Can be obtained between.

1 is a block diagram showing a configuration example of a multichip semiconductor device according to a first embodiment of the present invention. It is the figure which showed the example of the internal structure of the multichip type semiconductor device 1 of FIG. It is the block diagram which showed the other structural example of the multichip type semiconductor device in the 1st Embodiment of this invention. It is the block diagram which showed the other structural example of the multichip type semiconductor device in the 1st Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Multichip type semiconductor device 2 Constant voltage chip 3 Semiconductor chip 10 AC adapter 11, 12 Pad 13 Mounting board 14 Connection terminal 15 Land 16 Bonding wire 17 Sealing resin 20 Secondary battery Q1 Output voltage control transistor Q2 2 Power transistor for secondary battery charging current supply

Claims (21)

A first semiconductor integrated circuit chip having a predetermined function mounted on a mounting substrate;
A second semiconductor integrated circuit chip in which a power supply circuit for receiving power supplied from the outside and supplying power to the first semiconductor integrated circuit chip is integrated;
With
After the second semiconductor integrated circuit chip is overlaid on the first semiconductor integrated circuit chip, each of the first and second semiconductor integrated circuit chips is molded with resin. Chip type semiconductor device.   2. The multi-chip semiconductor device according to claim 1, wherein the second semiconductor integrated circuit chip is smaller than the first semiconductor integrated circuit chip.   3. The circuit element integrated in the second semiconductor integrated circuit chip has a higher withstand voltage than the circuit element integrated in the first semiconductor integrated circuit chip. Multi-chip type semiconductor device.   The second semiconductor integrated circuit chip is disposed on a portion of the circuit formed on the first semiconductor integrated circuit chip where a circuit that generates less heat during operation is formed. 4. The multichip semiconductor device according to claim 1, 2, or 3.   The second semiconductor integrated circuit chip is disposed on a portion of a circuit formed on the first semiconductor integrated circuit chip where a circuit having low temperature dependency is formed. Item 4. The multichip semiconductor device according to Item 1, 2 or 3.   The first semiconductor integrated circuit chip has an analog circuit portion and a digital circuit portion, and the second semiconductor integrated circuit chip is a portion of the first semiconductor integrated circuit chip where the digital circuit portion is formed. The multichip semiconductor device according to claim 1, wherein the multichip semiconductor device is disposed above.   The first semiconductor integrated circuit chip has an optional circuit whose operation is determined based on specifications, and the second semiconductor integrated circuit chip is included in the optional circuit of the first semiconductor integrated circuit chip. 4. The multi-chip type semiconductor device according to claim 1, wherein the multi-chip type semiconductor device is disposed on a portion where a circuit in which operation is prohibited is formed.   8. The multi-chip type semiconductor device according to claim 1, wherein the power supply circuit integrated in the second semiconductor integrated circuit chip is a step-down type series regulator.   The step-down type series regulator outputs the predetermined constant voltage when the input voltage is larger than the predetermined constant voltage, and is almost equal to the input voltage when the input voltage is smaller than the predetermined constant voltage. 9. The multichip semiconductor device according to claim 8, wherein a voltage is output.   10. The multi-chip type semiconductor device according to claim 9, wherein the step-down series regulator has the predetermined constant voltage set smaller than a maximum input voltage of the first semiconductor integrated circuit chip.   11. The step-down type series regulator includes an output voltage control transistor, and the output voltage control transistor is externally attached to the second semiconductor integrated circuit chip. The multichip type semiconductor device described.   The mounting substrate includes a connection terminal for connecting to an external substrate, and a land for connecting to an external connection pad provided on each of the first and second semiconductor integrated circuit chips, 2. The multi-chip type semiconductor device according to claim 1, wherein the lands corresponding to the external connection pads on the first and second semiconductor integrated circuit chips are connected by wire bonding.   2. The multi-chip semiconductor device according to claim 1, wherein a secondary battery charge control circuit is integrated in the first semiconductor integrated circuit chip.   The secondary battery charging control circuit includes a transistor for supplying a secondary battery charging current, and the transistor for supplying the secondary battery charging current is externally attached to the second semiconductor integrated circuit chip. The multi-chip type semiconductor device according to claim 13. A first semiconductor integrated circuit chip having a predetermined function mounted on a mounting substrate;
A second semiconductor integrated circuit chip in which a power supply circuit for receiving power supplied from the outside and supplying power to the first semiconductor integrated circuit chip is integrated;
In a method for manufacturing a multichip semiconductor device comprising:
Overlaying the second semiconductor integrated circuit chip on the first semiconductor integrated circuit chip;
A method of manufacturing a multi-chip type semiconductor device, wherein the first and second semiconductor integrated circuit chips are molded with resin.   The second semiconductor integrated circuit chip is disposed on a portion of the circuit formed on the first semiconductor integrated circuit chip where a circuit that generates less heat during operation is formed. 16. A method of manufacturing a multichip semiconductor device according to claim 15.   The second semiconductor integrated circuit chip is disposed on a portion of a circuit formed on the first semiconductor integrated circuit chip where a circuit having low temperature dependency is formed. Item 16. A method for manufacturing a multichip semiconductor device according to Item 15.   The first semiconductor integrated circuit chip has an analog circuit portion and a digital circuit portion, and the second semiconductor integrated circuit chip is a portion of the first semiconductor integrated circuit chip where the digital circuit portion is formed. 16. The method of manufacturing a multi-chip type semiconductor device according to claim 15, wherein the multi-chip type semiconductor device is disposed above.   The first semiconductor integrated circuit chip has an optional circuit whose operation is determined based on specifications, and the second semiconductor integrated circuit chip is included in the optional circuit of the first semiconductor integrated circuit chip. 16. The method of manufacturing a multi-chip type semiconductor device according to claim 15, wherein the method is arranged on a portion where a circuit whose operation is prohibited is formed.   The power supply circuit integrated in the second semiconductor integrated circuit chip is a step-down type series regulator, and the step-down type series regulator includes an output voltage control transistor, and the output voltage control transistor is the second voltage regulator. 20. The method for manufacturing a multi-chip type semiconductor device according to claim 15, wherein the method is externally attached to a semiconductor integrated circuit chip.   The first semiconductor integrated circuit chip is integrated with a secondary battery charge control circuit, and the secondary battery charge control circuit includes a transistor for supplying a secondary battery charge current. 20. The method of manufacturing a multi-chip semiconductor device according to claim 15, 16, 17, 18, or 19, wherein the transistor is externally attached to the second semiconductor integrated circuit chip.

Images