JP2006120027A - Programmable controller - Google Patents

Abstract

An object of the present invention is to facilitate a station number setting operation of a module and reduce a burden on a station number setter.
A programmable controller configured to be able to identify each module 2 by setting a different station number to each of the plurality of modules 2 mounted on the base board 1, the station numbers of the plurality of modules 2 are set. Set all at once on the baseboard side. Specifically, a clock signal 5 having a fixed period and an enable 6 signal used for counting the frequency of the clock signal 5 during the effective period are output to the module 2 mounted on the base board 1. Further, a plurality of slots SL1 to SL4 are provided in the base board 1 for mounting a plurality of modules 2 on the base board 1, and the valid periods of the enable signals 6, 7, and 8 are clocked as the slot number increases by one. The signal 5 is expanded by one period.
[Selection] Figure 3

Description

  The present invention relates to a programmable controller including a base board (sometimes referred to as “motherboard”. The same shall apply hereinafter). Specifically, the present invention relates to a programmable controller configured to be able to identify each module by setting a different station number for each of a plurality of modules mounted on a base board. The present invention relates to a programmable controller capable of facilitating setting work and reducing a burden on a station number setting person.

  Conventionally, when setting a station number for a module used in a programmable controller, the following two methods are mainly used.

1) A switch for setting the station number is mounted on each module, and the station number is set for each module on the module side.
2) Each station number is stored in advance in a storage medium such as a non-volatile memory by using another external device for each module.

  An example of the first method is described in, for example, Japanese Patent Application Laid-Open No. 2000-181512. In the programmable controller described in Japanese Patent Laid-Open No. 2000-181512, a switch such as a DIP switch is provided in a station number setting unit provided in each slave station (module) in order to set a station number in the slave station (module). ing.

  An example of the second method is described in, for example, Japanese Patent Application Laid-Open No. 2001-236106. In the programmable controller described in Japanese Patent Laid-Open No. 2001-236106, the already registered station number is stored in advance in a predetermined storage area such as a memory.

  Both of these two methods require a device for setting the station number on the module side. That is, the station numbers of a plurality of modules are set in each module.

  With the two methods described above, when mounting modules on the baseboard, individual station numbers must be set for all modules, and if the station number setting is wrong, the system cannot be started. There is a risk that it may become a malfunction. For this reason, the larger the system, the greater the burden on the user, such as the station number setting work for a huge number of modules and the great care to set the station numbers accurately.

JP 2000-181512 A

JP 2001-236106 A

  In view of the above problems, an object of the present invention is to provide a programmable controller capable of facilitating module station number setting work and reducing the burden on the station number setter.

  According to the first aspect of the present invention, in a programmable controller including a base board, a clock signal having a fixed period and a frequency of the clock signal during the effective period are counted for a module mounted on the base board. A programmable controller is provided that outputs an enable signal that is used to perform the operation.

  According to the second aspect of the present invention, a plurality of slots are provided in the base board for mounting a plurality of modules on the base board, and a different slot number is set for each of the plurality of slots. The programmable controller according to claim 1, wherein the valid period of the enable signal is extended by one period of the clock signal as the value of 1 increases.

  According to the third aspect of the present invention, in the programmable controller configured to be able to identify each module by setting a different station number for each of the plurality of modules mounted on the base board, the plurality of modules A programmable controller is provided in which the station numbers are collectively set on the base board side.

  According to a fourth aspect of the invention, there is provided a signal generating source for outputting a clock signal and an enable signal for setting the station numbers of the plurality of modules to the plurality of modules. Is provided.

  According to a fifth aspect of the present invention, there is provided the programmable controller according to the fourth aspect, wherein the signal generation source is mounted on the base board.

  According to the invention described in claim 6, the station numbers of the plurality of modules are set based on the frequency of the clock signal during the valid period of the enable signal. Is provided.

  According to a seventh aspect of the present invention, there is provided a programmable controller according to the sixth aspect, further comprising a valid period changing circuit for changing a valid period of the enable signal.

  According to an eighth aspect of the invention, the signal generation source and a plurality of modules are connected by a signal line, and the effective period changing circuit is arranged on the signal line connecting two adjacent modules. A programmable controller according to claim 7 is provided.

  According to the ninth aspect of the present invention, the valid period of the enable signal is extended by one period of the clock signal every time the enable signal output from the signal generation source is passed through the valid period changing circuit. A programmable controller according to claim 8 is provided.

  In the programmable controller according to claim 1, for a module mounted on the base board, a clock signal having a fixed period and a frequency of the clock signal during the effective period (the number of edges, the change point of the signal level). The enable signal used to count the number) is output. Specifically, a plurality of slots are provided in the base board for mounting a plurality of modules on the base board, and different slot numbers are set for the plurality of slots. Furthermore, as the slot number (module mounting position number) increases by 1, the valid period of the enable signal is extended by one cycle of the clock signal. For example, as the slot number increases by 1, the end of the valid period of the enable signal is delayed by one cycle of the clock signal. More specifically, an effective period changing circuit for extending the effective period of the enable signal by one period of the clock signal is arranged between adjacent slots.

  That is, in the programmable controller according to the first and second aspects, the clock signal and the enable signal are output to the module, and the station number of the module is collectively set not on the module side but on the base board side. On the module side, the value of the station number set in the module can be grasped by counting the frequency of the clock signal during the valid period of the enable signal.

  Further, in the programmable controller according to the first and second aspects, an enable signal valid period changing circuit is provided, and the valid period of the enable signal is expanded as the slot number increases. Thereby, the frequency of the clock signal counted on the module side increases as the slot number increases. That is, the frequency of the clock signal counted on the module side is different for each module and is a value specific to the slot position. That is, each module outputs an enable signal having a different effective period, and an individual station number is set for each module.

  Therefore, according to the programmable controller of claim 1 and 2, the station number setting work of the module is made easier than the case where the station numbers of a plurality of modules mounted on the base board are set in each module, for example, the user Thus, the burden on the station number setter can be reduced.

  In the programmable controller according to the third aspect, the station numbers of the plurality of modules mounted on the base board are not set in each module, but are collectively set on the base board side. Therefore, the station number setting work of the module can be facilitated and the burden on the station number setting person such as the user can be reduced as compared with the case where the station numbers of a plurality of modules mounted on the base board are respectively set in each module. .

  In the programmable controller according to any one of claims 4 to 6, a clock signal and an enable signal for setting the station numbers of the plurality of modules are output from the signal generation source mounted on the base board to each of the plurality of modules. The Therefore, station numbers are not set for each module as in the prior art, but station numbers for a plurality of modules can be set on the base board side. Preferably, the station numbers of the plurality of modules are set based on the frequency of the clock signal during the valid period of the enable signal.

  10. The programmable controller according to claim 7, wherein a signal generation source and a plurality of modules are connected by a signal line, and an effective period changing circuit for changing an effective period of an enable signal connects two adjacent modules. Is arranged on the signal line. Specifically, every time the enable signal output from the signal generation source passes through the valid period changing circuit, the valid period of the enable signal is extended by one cycle of the clock signal. Therefore, the station numbers of a plurality of modules can be set to different values.

  Hereinafter, a first embodiment of the programmable controller of the present invention will be described. The programmable controller of the first embodiment is configured such that each module can be identified by setting a different station number for each of the plurality of modules mounted on the base board. Examples of modules that can be mounted on the base board include a CPU module, a power supply module, and an input / output module.

  The input / output module is configured to transfer information signals between the electronic device controlled by the programmable controller of the first embodiment and the CPU module. More specifically, the input / output module converts the level of a signal input to the CPU module from the electronic device controlled by the programmable controller of the first embodiment into a level that can be processed by the CPU module, and further the CPU The level of the signal output from the module to the electronic device is converted to a level that can withstand long-distance transmission.

  Examples of input / output modules that can be mounted on the base board include, for example, digital input modules, digital output modules, digital input / output modules, high-speed digital input modules, digital output modules with built-in pulse train output, analog input modules, analog output modules, temperature measurement There are resistor input modules, thermocouple input modules, etc.

  For example, the CPU module described above relays an output signal notified from a host device such as a control personal computer to an electronic device connected via an input / output module, or is connected via an input / output module. An input signal sent from an electronic device is converted into a predetermined format, a predetermined arithmetic process is performed based on such an input signal, and a result of such an arithmetic process is stored in a predetermined storage area It is configured as follows.

  Another example of a module that can be mounted on the base board is a communication module. The communication module is configured to communicate with an electronic device such as a control personal computer connected to the programmable controller of the first embodiment via a communication line.

  Examples of communication modules that can be mounted on the base board include a computer level communication module, a controller level communication module, a device level communication module, and a bit level communication module.

  Another example of a module that can be mounted on the base board is a functional module. The function module stores various data such as CPU modules, stores control and management information, uploads and downloads programs with the CPU module, and reads and writes files from the control PC It is configured to go.

  Another example of the module that can be mounted on the base board is a positioning module. The positioning module is configured to perform highly accurate positioning by combining with a pulse train command input type servo amplifier / motor or a stepping motor driver, for example.

  In the programmable controller of the first embodiment, the station numbers of a plurality of modules mounted on the base board are not set in each module as in the prior art, but are set collectively on the base board side. It is configured. Specifically, in the programmable controller of the first embodiment, a clock signal and an enable signal for setting station numbers of a plurality of modules are output to each of the plurality of modules mounted on the base board. That is, the programmable controller of the first embodiment is configured so that the clock signal and the enable signal are sent to each module.

  FIG. 1 is a diagram showing a clock signal and an enable signal output to each of the modules mounted on the base board. In the programmable controller of the first embodiment, the station number of the module to which the clock signal and the enable signal are sent is determined by the clock signal and the enable signal as shown in FIG. Specifically, the station number of the module is determined by the frequency of the clock signal during the valid period (LOW level period) of the enable signal sent to the module. In the example shown in FIG. 1, the clock signal oscillates five times during the effective period of the enable signal. That is, the frequency of the clock signal during the effective period of the enable signal is 5, and the effective period of the enable signal corresponds to 5 cycles of the clock signal. That is, in the programmable controller of the first embodiment, a clock signal and an enable signal as shown in FIG. 1 are sent to the module whose station number should be set to 5.

  As described above, in the first embodiment, the valid period of the enable signal is the LOW level period of the pulse signal, but in other embodiments, the valid period of the enable signal is set to, for example, the pulse form. It can be determined by an arbitrary method such as a HIGH level period of the signal.

  FIG. 2 is a diagram showing a clock signal and an enable signal output to the three modules mounted on the base board. In the programmable controller of the first embodiment, as shown in FIG. 2, a common clock signal is sent to each of the three modules. On the other hand, a different enable signal is sent to each of the three modules. Specifically, three enable signals with different valid periods are sent to each of the three modules.

  Specifically, in the example shown in FIG. 2, among the three enable signals, the one shown in the upper stage is sent to the first module. Since the frequency of the clock signal during the effective period of the enable signal is 5, the station number of the first module is 5. The enable signal shown in the middle stage is sent to the second module. Since the frequency of the clock signal during the effective period of the enable signal is 6, the station number of the second module is 6. Further, the enable signal shown in the lower part is sent to the third module. Since the frequency of the clock signal during the effective period of the enable signal is 7, the station number of the third module is 7.

  FIG. 3 is a diagram illustrating the programmable controller according to the first embodiment. As shown in FIG. 3, in the programmable controller of the first embodiment, for example, four module mounting slots SL <b> 1 to SL <b> 4 are provided in the base board 1 in order to mount four modules 2 on the base board 1. . In addition, the base board 1 is provided with a signal generation source 4 for outputting a clock signal 5 and an enable signal 6 to the modules 2 mounted in the slots SL1 to SL4. Further, the base board 1 is provided with a station number setting switch 3 for setting the station number of the module 2 mounted in the slot SL1.

  As shown in FIG. 3, in the programmable controller of the first embodiment, the four modules 2 mounted in the slots SL1 to SL4 and the signal generation source 4 are connected by a clock signal line 5 '. Therefore, the clock signal 5 generated in the signal generation source 4 is sent to the module 2 mounted in the slot SL1 via the clock signal line 5 '. Similarly, the clock signal 5 generated in the signal generation source 4 is also supplied to the clock signal line 5 in the module 2 installed in the slot SL2, the module 2 installed in the slot SL3, and the module 2 installed in the slot SL4. 'Sent through. That is, a common clock signal 5 is sent to each module 2 installed in the slots SL1 to SL4.

  Furthermore, as shown in FIG. 3, in the programmable controller of the first embodiment, the four modules 2 mounted in the slots SL1 to SL4 and the signal generation source 4 are connected to enable signal lines 6 ′, 7 ′, and 8 ′. , 9 ′ and the valid period extending circuit 10 for extending the valid period of the enable signal.

  Specifically, when the station number of the module 2 mounted in the slot SL1 is set to 5, for example, in the station number setting switch 3, the enable signal 6 is set so that the frequency of the clock signal 5 during the effective period becomes 5. It is generated in the signal source 4 and output from the signal source 4. The enable signal 6 output from the signal generation source 4 is sent to the module 2 mounted in the slot SL1 via the enable signal line 6 '. In the module 2 installed in the slot SL1, the clock signal 5 sent via the clock signal line 5 ′ and the enable signal 6 sent via the enable signal line 6 ′ are input to the slot SL1. The station number of the installed module 2 is grasped. Specifically, since the frequency of the clock signal 5 during the effective period (LOW level period) of the enable signal 6 is 5, it is understood that the station number of the module 2 mounted in the slot SL1 is 5.

  The enable signal 6 output from the signal generation source 4 is also sent to an effective period extension circuit 10 disposed between the slot SL1 and the slot SL2. In the valid period extension circuit 10 between the slot SL1 and the slot SL2, the valid period of the enable signal 6 input to the valid period extension circuit 10 is extended by one period of the clock signal 5, and the enable signal 7 is generated. Then, the enable signal 7 is output to the downstream side of the effective period extension circuit 10. The enable signal 7 output from the effective period extension circuit 10 between the slot SL1 and the slot SL2 is sent to the module 2 mounted in the slot SL2 via the enable signal line 7 '. In the module 2 mounted in the slot SL2, the clock signal 5 sent via the clock signal line 5 ′ and the enable signal 7 sent via the enable signal line 7 ′ are input to the slot SL2. The station number of the installed module 2 is grasped. Specifically, since the frequency of the clock signal 5 during the valid period (LOW level period) of the enable signal 7 is 6, it is understood that the station number of the module 2 mounted in the slot SL2 is 6.

  The enable signal 7 output from the valid period extension circuit 10 between the slot SL1 and the slot SL2 is also sent to the valid period extension circuit 10 disposed between the slot SL2 and the slot SL3. In the valid period extension circuit 10 between the slot SL2 and the slot SL3, the valid period of the enable signal 7 input to the valid period extension circuit 10 is extended by one period of the clock signal 5, and the enable signal 8 is generated. Then, the enable signal 8 is output downstream of the valid period extension circuit 10. The enable signal 8 output from the effective period extension circuit 10 between the slot SL2 and the slot SL3 is sent to the module 2 mounted in the slot SL3 via the enable signal line 8 '. In the module 2 mounted in the slot SL3, based on the clock signal 5 sent via the clock signal line 5 ′ and the enable signal 8 sent via the enable signal line 8 ′, the slot SL3 is loaded. The station number of the installed module 2 is grasped. Specifically, since the frequency of the clock signal 5 during the valid period (LOW level period) of the enable signal 8 is 7, it is understood that the station number of the module 2 mounted in the slot SL3 is 7.

  The enable signal 8 output from the valid period extension circuit 10 between the slot SL2 and the slot SL3 is also sent to the valid period extension circuit 10 disposed between the slot SL3 and the slot SL4. In the valid period extending circuit 10 between the slot SL3 and the slot SL4, the valid period of the enable signal 8 input to the valid period extending circuit 10 is extended by one period of the clock signal 5, and the enable signal 9 is generated. Then, the enable signal 9 is output downstream of the effective period extension circuit 10. The enable signal 9 output from the effective period extension circuit 10 between the slot SL3 and the slot SL4 is sent to the module 2 mounted in the slot SL4 via the enable signal line 9 '. In the module 2 mounted in the slot SL4, based on the clock signal 5 sent via the clock signal line 5 ′ and the enable signal 9 sent via the enable signal line 9 ′, the module SL2 is inserted into the slot SL4. The station number of the installed module 2 is grasped. Specifically, since the frequency of the clock signal 5 during the valid period (LOW level period) of the enable signal 9 is 8, it is understood that the station number of the module 2 mounted in the slot SL4 is 8.

  As described above, in the programmable controller of the first embodiment, among the four modules 2 mounted on the base board 1, when the station number of the module 2 mounted in the slot SL1 is set in the station number setting switch 3, The station numbers of the remaining three modules 2 are automatically set. In other words, the station numbers of the four modules 2 mounted on the base board 1 are not set in each module as in the prior art, but are collectively set on the base board side. Therefore, the station number setting work of the module 2 is made easier than the case where the station numbers of the plurality of modules 2 mounted on the base board 1 are set in each module 2 as in the prior art. Can be reduced.

  Further, as described above, in the module 2 installed in the slots SL1 to SL4, the frequency of the clock signal 5 during the valid period of the enable signals 6 to 9 is counted, whereby the station number set in the module 2 is obtained. You can know the value.

  Further, as described above, between the two adjacent slots SL1 to SL4, the effective period extension circuit 10 that delays the end of the enable signals 6 to 8 by one clock (one period) in synchronization with the clock signal 5 is provided. Since the number of slots SL1 to SL4 increases, the valid period of the enable signals 6 to 8 becomes longer. As a result, the module 2 mounted on the base board 1 counts the number of clocks specific to the slot position of the module 2, and each module 2 mounted on the base board 1 has an individual station number. Will be set.

  In other words, in the programmable controller of the first embodiment, as shown in FIG. 3, the clock signal 5 and the enable signal 6 for setting the station numbers of the plurality of modules 2 are mounted on the base board 1. The signal is output from the signal generation source 4 toward each of the plurality of modules 2. Further, the station number of the module 2 is set based on the frequency of the clock signal 5 during the valid period of the enable signals 7, 8, 9.

  Furthermore, in the programmable controller of the first embodiment, the signal generation source 4 and the plurality of modules 2 are connected by enable signal lines 6 ', 7', 8 ', 9'. Further, an effective period extension circuit 10 for extending the effective period of the enable signals 6, 7, and 8 is disposed on a signal line that connects two adjacent modules 2. Further, each time the enable signal 6 (7, 8) output from the signal source 4 is passed through the valid period changing circuit 10, the valid period of the enable signals 6, 7, 8 is equivalent to one cycle of the clock signal 5. Can be expanded.

  According to the programmable controller of the first embodiment, all the modules 2 mounted on the baseboard 1 are automatically connected to the baseboard 1 by simply setting the head station number with the station number setting switch 4 of the baseboard 1. The station number can be set. As a result, the maintenance and manageability of the system can be greatly improved. Further, in terms of circuitry, the base board 1 is provided with the station number setting switch 3, the signal generation source 4, and the effective period extending circuit 10 for extending the effective period of the enable signal between each of the slots SL1 to SL4. Station numbers can be set in all the slots SL1 to SL4 with only one signal line. Therefore, a station number setting circuit can be constructed very easily. In addition, since it is not necessary to mount a station number setting switch or a part for storing the station number, which has been conventionally mounted on the module side, in each module, a significant cost reduction can be achieved.

  As described above, in the first embodiment, a different station number is set for each module by extending the valid period of the enable signal between two adjacent modules, but in other embodiments, instead, By shortening the valid period of the enable signal between two adjacent modules, it is possible to set a different station number for each module.

  Hereinafter, a second embodiment of the programmable controller of the present invention will be described. The programmable controller according to the second embodiment is configured in the same manner as the programmable controller according to the first embodiment described above, except for the points described below. Therefore, it is possible to achieve substantially the same effect as the programmable controller of the first embodiment.

  FIG. 4 is a diagram illustrating a programmable controller according to the second embodiment. 4, the same reference numbers as those shown in FIG. 3 indicate the same components or signals as the components or signals shown in FIG. As shown in FIG. 4, the programmable controller of the second embodiment outputs a clock signal 5, an upper digit enable signal 16, and a lower digit enable signal 17 to the module 2 mounted in the slots SL1 to SL4. A two-digit signal generation source 14 is provided on the base board 1 for this purpose.

  As shown in FIG. 4, in the programmable controller of the second embodiment, the four modules 2 mounted in the slots SL1 to SL4 and the signal generation source 4 are connected by an enable signal line 16 'of the upper digit. ing. Therefore, the upper digit enable signal 16 generated by the signal generation source 4 is sent to the module 2 mounted in the slot SL1 via the upper digit enable signal line 16 '. Similarly, in the module 2 installed in the slot SL2, the module 2 installed in the slot SL3, and the module 2 installed in the slot SL4, the high-order enable signal 16 generated in the signal generation source 4 It is sent via the digit enable signal line 16 '. In other words, the common upper digit enable signal 16 is sent to each module 2 mounted in the slots SL1 to SL4.

  Further, as shown in FIG. 4, in the programmable controller of the second embodiment, the four modules 2 mounted in the slots SL1 to SL4 and the signal generation source 4 are connected to the lower-order enable signal lines 17 ′ and 18 ′. , 19 ′, 20 ′ and the valid period extending circuit 10 for extending the valid period of the enable signal.

  More specifically, when the station number of the module 2 installed in the slot SL1 is set to 5, for example, in the station number setting switch 3, the enable signal of the lower digit so that the frequency of the clock signal 5 during the effective period becomes 5. 17 is generated in the signal generation source 4 and output from the signal generation source 4. The lower digit enable signal 17 output from the signal generation source 4 is sent to the module 2 mounted in the slot SL1 via the lower digit enable signal line 17 '. In the module 2 installed in the slot SL1, the clock signal 5 sent via the clock signal line 5 ′ and the lower digit enable signal 17 sent via the lower digit enable signal line 17 ′ are used. Based on this, the station number of the module 2 installed in the slot SL1 is grasped. Specifically, since the frequency of the clock signal 5 during the effective period (LOW level period) of the enable signal 17 of the lower digit is 5, it is grasped that the station number of the module 2 mounted in the slot SL1 is 5. .

  The lower-digit enable signal 17 output from the signal generation source 4 is also sent to the effective period extension circuit 10 disposed between the slot SL1 and the slot SL2. In the effective period extension circuit 10 between the slot SL1 and the slot SL2, the effective period of the lower digit enable signal 17 input to the effective period extension circuit 10 is extended by one cycle of the clock signal 5, and the lower digit is obtained. Enable signal 18 is generated, and the lower order enable signal 18 is output to the downstream side of the effective period extension circuit 10. The lower digit enable signal 18 output from the valid period extension circuit 10 between the slot SL1 and the slot SL2 is sent to the module 2 mounted in the slot SL2 via the lower digit enable signal line 18 '. In the module 2 installed in the slot SL2, the clock signal 5 sent via the clock signal line 5 ′ and the lower digit enable signal 18 sent via the lower digit enable signal line 18 ′. Based on this, the station number of the module 2 installed in the slot SL2 is grasped. Specifically, since the frequency of the clock signal 5 during the valid period (LOW level period) of the enable signal 18 of the lower digit is 6, it is grasped that the station number of the module 2 installed in the slot SL2 is 6. .

  The lower-digit enable signal 18 output from the valid period extension circuit 10 between the slot SL1 and the slot SL2 is also sent to the valid period extension circuit 10 arranged between the slot SL2 and the slot SL3. In the effective period extension circuit 10 between the slot SL2 and the slot SL3, the effective period of the lower digit enable signal 18 input to the effective period extension circuit 10 is extended by one cycle of the clock signal 5, and the lower digit is obtained. Enable signal 19 is generated, and the low-order digit enable signal 19 is output downstream of the effective period extension circuit 10. The lower digit enable signal 19 output from the valid period extension circuit 10 between the slot SL2 and the slot SL3 is sent to the module 2 mounted in the slot SL3 via the lower digit enable signal line 19 '. In the module 2 mounted in the slot SL3, the clock signal 5 sent via the clock signal line 5 ′ and the lower digit enable signal 19 sent via the lower digit enable signal line 19 ′ are used. Based on this, the station number of the module 2 mounted in the slot SL3 is grasped. Specifically, since the frequency of the clock signal 5 during the effective period (LOW level period) of the enable signal 19 of the lower digit is 7, it is grasped that the station number of the module 2 mounted in the slot SL3 is 7. .

  The low-order digit enable signal 19 output from the valid period extension circuit 10 between the slot SL2 and the slot SL3 is also sent to the valid period extension circuit 10 arranged between the slot SL3 and the slot SL4. In the effective period extension circuit 10 between the slot SL3 and the slot SL4, the effective period of the lower digit enable signal 19 input to the effective period extension circuit 10 is extended by one period of the clock signal 5 to obtain the lower digit. Enable signal 20 is generated, and the low-order digit enable signal 20 is output downstream of the effective period extension circuit 10. The lower-digit enable signal 20 output from the valid period extension circuit 10 between the slot SL3 and the slot SL4 is sent to the module 2 mounted in the slot SL4 via the lower-digit enable signal line 20 '. In the module 2 mounted in the slot SL4, the clock signal 5 sent via the clock signal line 5 ′ and the lower digit enable signal 20 sent via the lower digit enable signal line 20 ′ are used. Based on this, the station number of the module 2 installed in the slot SL4 is grasped. Specifically, since the frequency of the clock signal 5 during the valid period (LOW level period) of the enable signal 20 of the lower digit is 8, it is grasped that the station number of the module 2 mounted in the slot SL4 is 8. .

  In detail, in the programmable controller of the second embodiment, as the processing on the module side, the set station number value of the upper digit is raised (10 times in decimal number, 16 times in hexadecimal number), and the set station number value in the lower digit Thus, the final station number value can be known.

  The merit of the programmable controller of the second embodiment is that it is possible to prevent the effective period of the enable signal waveform from becoming long when the value of the set station number becomes large. The station number can be set with an enable signal having a length of about 1/10 in the case of a decimal number and about 1/16 in the case of a hexadecimal number, and the setting processing speed can be greatly improved.

It is the figure which showed the clock signal and enable signal which are output with respect to each of the modules mounted in the base board. It is the figure which showed the clock signal and enable signal which are output with respect to three modules mounted in the base board. It is the figure which showed the programmable controller of 1st Embodiment. It is the figure which showed the programmable controller of 2nd Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Base board 2 Module 3 Station number setting switch 4 Signal generation source 5 Clock signal 5 'Clock signal line 6, 7, 8, 9 Enable signal 6', 7 ', 8', 9 'Enable signal line 10 Effective period extension circuit

Claims (9)

  In a programmable controller including a base board, a clock signal having a fixed period and an enable signal used for counting the frequency of the clock signal during the effective period are output to a module mounted on the base board. A programmable controller characterized by that.   In order to mount a plurality of modules on the base board, a plurality of slots are provided in the base board, a different slot number is set for each of the plurality of slots, and the validity period of the enable signal increases as the slot number increases by one. The programmable controller according to claim 1, wherein the programmable controller is extended by one period of the clock signal.   By setting different station numbers for each of the multiple modules mounted on the baseboard, the programmable controller configured to identify each module can set the multiple module's station numbers at the same time on the baseboard side. A programmable controller characterized by:   4. The programmable controller according to claim 3, further comprising a signal generation source that outputs a clock signal and an enable signal for setting station numbers of the plurality of modules to the plurality of modules.   The programmable controller according to claim 4, wherein the signal generation source is mounted on the base board.   6. The programmable controller according to claim 4, wherein station numbers of a plurality of modules are set based on the frequency of the clock signal during the valid period of the enable signal.   The programmable controller according to claim 6, further comprising an effective period changing circuit for changing an effective period of the enable signal.   The programmable controller according to claim 7, wherein the signal generation source and a plurality of modules are connected by a signal line, and the effective period changing circuit is arranged on the signal line connecting two adjacent modules.   9. The programmable device according to claim 8, wherein each time the enable signal output from the signal generation source passes through the valid period changing circuit, the valid period of the enable signal is extended by one period of the clock signal. controller.

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