JP2006115630A - Power conversion circuit - Google Patents

Abstract

An object of the present invention is to reduce an increase in voltage applied to a switching element when a current of the switching element is interrupted in a power conversion device that performs conversion between a DC voltage and an AC voltage.
A voltage-controlled switching element, a control voltage generator that supplies a voltage for turning on and off the element in time series, and a low-potential side terminal of the voltage-controlled switching element connected to the arm The threshold voltage of the voltage-controlled switching element is Vth, the voltage to be turned off is supplied by the control voltage generator Vgmin, the standard withstand voltage of the voltage-controlled switching element is Vrate, the voltage-controlled switching element Le ≧ Ls where Vcc is the voltage applied between the high-voltage side terminal and the low-voltage side terminal during steady-state OFF, and Ls is the specification of the parasitic inductance that is visible from the high-voltage side terminal of the voltage-controlled switching element. And an inductor satisfying (Vth−Vgmin) / (Vrate−Vcc).
[Selection] Figure 3

Description

  The present invention relates to a power conversion device that performs conversion between a DC voltage and an AC voltage, and more particularly to a power conversion circuit having a protection function for a switching element.

  A switching element such as an IGBT (insulated gate bipolar transistor) is used in a power conversion device that performs conversion between a DC voltage and an AC voltage. For these switching elements, the resistance is confirmed in advance by conducting a test to cut off the current by flowing a considerably larger current than in a normal use state.

  When interrupting the current, a voltage larger than that at the time of steady-state OFF is temporarily applied to the switching element due to the parasitic inductance that appears outside the high-voltage side terminal of the switching element. Due to this voltage, the carrier speed is increased inside the switching element, and the current change rate di / dt is increased. Therefore, a positive feedback in which a larger voltage is applied may occur due to parasitic inductance. The voltage applied to the switching element when positive feedback occurs must also be within a range that does not exceed the standard breakdown voltage in terms of specifications.

Patent Document 1 below discloses a configuration in which an inductor is connected to a low-voltage side terminal of a switching element, which is considered as a powerful configuration to avoid such an increase in applied voltage. However, the contents of this document are concerned with an increase in power consumption at the time of current interruption, and as a result, it is described that the value of the inductor is preferably 50 nH or less per chip of the switching element.
Republished patent WO98 / 53546

  The present invention has been made in consideration of the above circumstances, and in a power conversion device that converts between a DC voltage and an AC voltage, a voltage applied to the switching element when the current flowing through the switching element is interrupted. It is an object of the present invention to provide a power conversion circuit capable of reducing the increase in power consumption.

  A power conversion circuit according to one embodiment of the present invention is a power conversion circuit that uses a voltage-controlled switching element having a high-potential side terminal, a low-potential side terminal, and a voltage control terminal as an element for turning on and off an arm current. The voltage control type switching element and the voltage control terminal of the voltage control type switching element are connected to the voltage control terminal, and a voltage for turning on and off the voltage control type switching element are applied to the voltage control terminal in time series. A control voltage generator to be supplied and an inductor connected to a low potential side terminal of the voltage controlled switching element and constituting a part of the arm, the inductance Le being a threshold of the voltage controlled switching element The voltage is Vth, the voltage for turning off the control voltage generator is Vgmin, and the voltage-controlled switching element standard The voltage applied is Vrate, the voltage applied between the high-voltage side terminal and the low-voltage side terminal of the voltage-controlled switching element during steady-state OFF is Vcc, and the voltage-controlled switching element is outside the high-voltage side terminal. When the specification of the parasitic inductance that can be seen is Ls, the inductor satisfies Le ≧ Ls (Vth−Vgmin) / (Vrate−Vcc).

  ADVANTAGE OF THE INVENTION According to this invention, when the electric current which flows into a switching element is interrupted | blocked in the power converter device which converts a DC voltage and an alternating voltage, the increase in the voltage applied to this switching element can be reduced.

  The power conversion circuit according to the present invention has an inductor connected to the low voltage side terminal of the voltage controlled switching element. The inductance Le of this inductor is selected so as to satisfy Le ≧ Ls (Vth−Vgmin) / (Vrate−Vcc). This range is obtained as a range necessary to temporarily turn on the switching element that is turned off when the current is interrupted. Since the current change rate di / dt is reduced by temporarily turning on the switching element, an increase in voltage due to parasitic inductance can be suppressed. As a result, an increase in voltage applied to the switching element can be reduced.

  As an embodiment of the present invention, the voltage-controlled switching element is an IGBT (insulated gate bipolar transistor), the high potential side terminal is the collector terminal of the IGBT, the low potential side terminal is the emitter terminal of the IGBT, The voltage control terminal can be the gate terminal of the IGBT. Here, the IGBT may be a vertical planar IGBT, a vertical trench IGBT, a horizontal planar IGBT, or a horizontal trench IGBT.

  Further, as an embodiment, the voltage-controlled switching element is a MOSFET (metal oxide semiconductor field effect transistor), the high potential side terminal is the drain terminal of the MOSFET, the low potential side terminal is the source terminal of the MOSFET, The voltage control terminal may be a gate terminal of the MOSFET. Here, the MOSFET can be exemplified as a vertical planar MOSFET, a vertical trench MOSFET, a lateral planar MOSFET, or a lateral trench MOSFET.

  Based on the above, embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing a configuration of a power conversion circuit (inverter) according to an embodiment of the present invention. A period in which an output current from the DC power source 11 shown in FIG. 1 to the inductive load (for example, a motor) 16 flows through the path of the DC current 11, the current switching unit 12, the inductive load 16, the current switching unit 15, and the DC power source 11 Then, the inductive load 16 is AC driven by repeating the DC current 11, the current switching unit 14, the inductive load 16, the current switching unit 13, and the period of flowing through the path of the DC power supply 11. The on timing of the current switching units 12 and 15 and the on timing of the current switching units 14 and 13 are set exclusively. Between the branch points to both ends of the current switching unit 12 (13, 14, 15) on the circuit is called an arm.

  In the following, the case of this single-phase inverter will be described as an example of the power conversion circuit, but this embodiment characterized by the configuration in each of the current switching units 12, 13, 14, 15 It can also be applied to the case of a circuit (three-phase inverter, rectifier circuit, etc.).

  FIG. 2 is an equivalent circuit diagram of one current switching unit (current switching unit 13 (15)) shown in FIG. As shown in FIG. 2, when the outside is viewed from the current switching unit 13 (15), a series connection of the DC power source 21 (corresponding to the DC power source 11) and the inductance Lm (corresponding to the inductive load 16) can be seen.

  The diode D connected in parallel to the inductance Lm has a voltage applied to both ends of the current switching unit 13 (15) when the current switching unit 13 (15) is steadily turned off. To be approximately equal to. Also in the case of the inverter shown in FIG. 1, when the current switching unit 13 (15) is steadily turned off, the current switching unit 12 (14) is steadily turned on, and is connected to both ends of the current switching unit 13 (15). The applied voltage is approximately equal to the output voltage of the DC power supply 11. It can be said that the inductive load 16 of the inverter is simulated by the inductance Lm and the diode D.

  The inductance Ls inserted and shown in the high potential side terminal (collector terminal c) of the current switching unit 13 (15) includes a parasitic inductance (inductance that is on the negative side of the DC power supply 21) that is visible from the high potential side terminal. The main component is the inductance of the wiring. FIG. 2 shows an equivalent circuit for the current switching unit 13 (15), but the equivalent circuit for the current switching unit 12 (14) also has a series connection of the DC power source 21 and the inductance Lm connected to both ends. That is not the case, only the order of the series connection is reversed.

  Inside the current switching unit 13 (15), the collector terminal c of the switching element Q, which is an IGBT as a voltage-controlled switching element, has a collector terminal c as a high potential side terminal, the emitter terminal e as a low potential side terminal, and the gate terminal g as a voltage. It is the structure used as a control terminal. A control voltage from the control voltage generator 13a is applied to the gate terminal g via a resistor R. The reference side of the control voltage generator 13a is connected to the other end of the inductor Le that is inserted and connected to the emitter terminal e of the switching element Q. The control voltage generator 13a generates, at both ends, a voltage for turning on and off a switching element Q in time series.

  FIG. 3 is a circuit diagram specifically showing an example of the internal configuration of each current switching unit 13 (12, 14, 15). In the case of this example, as shown in FIG. 3, the switching element Q is composed of 24 switching elements Q1 to Q24 connected in parallel. Resistors R1 to R24 are respectively connected to the gate terminals of the switching elements Q1 to Q24. Inductances Le1 to Le24 are connected to each. The number of switching elements connected in parallel is determined from their current ratings.

  The values of the inductances Le1 to Le24 are selected from the range obtained as follows. Refer to FIG. 4 for derivation of this range. FIG. 4 is an operation explanatory diagram of the current switching unit 13 (12, 14, 15) shown in FIG. 2 in FIG. 1. When FIG. 4 (a) is the present embodiment, FIG. (C) is a case of a comparative example.

  The control voltage generated by the control voltage generator 13a at the time of “switching” on the horizontal axis in FIG. 4A is changed from a positive value (voltage for turning on the switching element Qn) to a negative value (low voltage value side: switching element Qn Voltage to be turned off). Thereby, the collector current Ic of each switching element Qn is cut off in the following progress. In the first stage, the gate voltage Vge is fixed to the mirror voltage, and the carriers in the switching element Qn are discharged and the collector voltage Vce rises, but the collector current Ic hardly changes (accumulation period 31).

Next, the collector voltage Vce reaches the voltage Vcc of the DC voltage source 11, the collector current Ic begins to decrease in accordance with the expansion of the depletion layer inside the switching element Qn, and the collector voltage Vce further increases (fall period 32). . The collector voltage Vce further rises due to the parasitic inductance Ls, which increases the value obtained by multiplying the current change rate di / dt of the collector current Ic by Ls (see FIG. 2). At this time, Ls · (di / dt) + Vcc must not exceed the standard withstand voltage Vrate of the switching element Qn. That is,
Ls · (di / dt) + Vcc ≦ Vrate (1)
It is.

After a certain period of time, the gate voltage Vge temporarily increases again this time. This is due to the inductor Len inserted and connected to the emitter side of the switching element Qn, and the value of the inductor Len is selected so that the switching element Qn is temporarily turned on by this increase again. That is, referring to FIG.
Vgmin + Len · (di / dt) ≧ Vth (2)
Thus, the switching element Qn is turned on. Here, Vgmin is a voltage value on the negative side (low voltage value side) generated by the control voltage generator 13a, and Vth is a threshold voltage of the switching element Qn.

  When the switching element Qn is temporarily turned on again, the current change rate di / dt of the collector current Ic becomes gentle. The collector voltage Vce converges to Vcc without exceeding the standard withstand voltage Vrate, and the collector current Ic becomes zero. In the period up to this point, the depletion layer inside the switching element Qn stops growing and the carriers disappear due to recombination (tail period 33).

From the equations (1) and (2) shown above, if this is an equation for Len,
Len ≧ Ls (Vth−Vgmin) / (Vrate−Vcc) (3)
The relationship is guided. By selecting a value of the inductance Len that satisfies such a relationship, as described above, the collector voltage Vce of the switching element Qn does not exceed the standard withstand voltage Vrate. Here, as the parasitic inductance Ls, it is preferable to use not the actual value in the inverter but the specification value that is expected to be maximized with a margin.

  An example with practical numerical values is as follows. For example, Ls = 400 · 24 [nH] (a specification value expected as the maximum, and multiplied by 24 in terms of each switching element Qn), Vth = 5V, Vgmin = −15V, Vrate = 3300V, Vcc = If 2500 V, Len ≧ 240 [nH]. This is 1/24 in terms of an inductor Le connected to a virtual single switching element Q as shown in FIG. 2, and Le ≧ 10 nH.

  FIGS. 4B and 4C show similar voltage and current changes as comparative examples when the inductance Len is not inserted and connected to the emitter side of each switching element Qn. FIG. 4B shows a case where a positive feedback phenomenon occurs inside the switching element Q. The accumulation period 31 is the same as that shown in FIG. In the fall period 32, the collector current Ic starts to decrease in accordance with the expansion of the depletion layer inside the switching element Qn, and the collector voltage Vce further increases due to the parasitic inductance Ls.

  However, after that, the gate voltage Vge does not have any effect stably on the negative side (low voltage side), so that the depletion layer grows fast, the carrier velocity increases, and the change rate di / dt of the collector current Ic increases. To do. Therefore, a larger voltage is applied by the parasitic inductance Ls and positive feedback occurs. In such a case, at the worst, the collector voltage Vce exceeds the standard withstand voltage Vrate of the switching element Qn as shown in the figure. Thereafter, when the collector voltage Vce is clamped by the avalanche phenomenon inside the switching element Qn and the collector current Ic does not flow, Vce becomes equal to Vcc.

  In an actual case, since the parasitic inductance Ls is considered to be smaller than the maximum value expected in the specification, the increase in the collector voltage Vce indicated by Ls · (di / dt) is not so large. Therefore, in many cases, it can be said that switching (turn-off) normally occurs as shown in FIG. 4 (c), but it is not sufficient in terms of a margin when some kind of abnormality is assumed. This insufficiency is conspicuously exposed in the case of a current interruption test in which the maximum possible value is used as the parasitic inductance Ls and the current is interrupted by flowing a considerably larger current than in a normal use state. In the present embodiment, as shown in FIG. 4A, the collector voltage Vce can be prevented from exceeding the standard withstand voltage Vrate of the switching element Qn at worst.

  In addition, although the lower limit of Len was shown by Formula (3), about an upper limit, it can determine with the following references | standards. As Len is increased, the period during which the switching element Qn is temporarily turned on becomes longer. In other words, the state in which the current interruption of the switching element Qn is reduced continues, and the time until the collector current Ic is completely turned off becomes longer. Therefore, the upper limit of Len can be determined so as to be within the specifications of the time required as switching (turn-off) time (time required as an inverter).

  Although the embodiments of the present invention have been described above, specific examples of elements that can be used as the switching element Qn will be described below with reference to FIGS.

  FIG. 5 is a cross-sectional structure diagram showing a configuration of an element (vertical planar IGBT) that can be used as the switching element Qn of the current switching unit shown in FIG. Here, the vertical type is a structure in which the collector terminal c and the emitter terminal e are arranged to face each other in the vertical direction. The planar type is a structure in which each region is formed so that the channel formation region is in the horizontal direction. The vertical planar IGBT shown in FIG. 5 has, as its structure, an emitter electrode layer 41, a gate electrode layer 42, a gate insulating film 43, an N-type source layer 44, a P-type base layer 45, an N-type base layer 46, and an N-type. A buffer layer 47, a P-type emitter layer 48, and a collector electrode layer 49 are provided. A region of the P-type base layer 45 facing the gate electrode layer 42 through the gate insulating film 43 becomes a channel.

  FIG. 6 is a cross-sectional structure diagram showing the configuration of an element (vertical trench IGBT) that can be used as switching element Qn of the current switching unit shown in FIG. Here, the term “trench type” refers to a structure in which a gate electrode is embedded in a trench and each region is formed so that a channel formation region is in a vertical direction. The vertical trench IGBT shown in FIG. 6 has, as its structure, an emitter electrode layer 51, a gate electrode layer 52, a gate insulating film 53, an N-type source layer 54, a P-type base layer 55, an N-type base layer 56, and an N-type. A buffer layer 57, a P-type emitter layer 58, and a collector electrode layer 59 are provided. A region of the P-type base layer 55 facing the gate electrode layer 52 through the gate insulating film 53 becomes a channel.

  FIG. 7 is a cross-sectional structure diagram showing a configuration of an element (horizontal planar IGBT) that can be used as switching element Qn of the current switching unit shown in FIG. Here, the horizontal type is a structure in which the collector terminal c and the emitter terminal e are arranged in a horizontal relationship. The lateral planar IGBT shown in FIG. 7 has, as its structure, an emitter electrode layer 61, a gate electrode layer 62, a gate insulating film 63, an N-type source layer 64, a P-type base layer 65, an N-type base layer 66, and an N-type buffer. A layer 67, a P-type emitter layer 68, and a collector electrode layer 69 are provided. A region of the P-type base layer 65 facing the gate electrode layer 62 through the gate insulating film 63 becomes a channel.

  FIG. 8 is a cross-sectional structure diagram showing a configuration of an element (lateral trench IGBT) that can be used as switching element Qn of the current switching unit shown in FIG. “Horizontal type” and “trench type” are as described above. The lateral trench IGBT shown in FIG. 8 has, as its structure, an emitter electrode layer 71, a gate electrode layer 72, a gate insulating film 73, an N-type source layer 74, a P-type base layer 75, an N-type base layer 76, and an N-type buffer. A layer 77, a P-type emitter layer 78, and a collector electrode layer 79 are provided. A region of the P-type base layer 75 facing the gate electrode layer 72 through the gate insulating film 73 becomes a channel.

  FIG. 9 is a cross-sectional structure diagram showing the configuration of an element (vertical planar MOSFET) that can be used as the switching element Qn of the current switching unit shown in FIG. The above four examples are IGBTs, but an example of a MOSFET is shown below. In the case of a MOSFET, the drain terminal d may be used instead of the collector terminal c of the IGBT, and the source terminal s may be used instead of the emitter terminal e. The gate terminal g is the same. “Vertical” and “planar” are the same as described above. The vertical planar MOSFET shown in FIG. 9 has, as its structure, a source electrode layer 81, a gate electrode layer 82, a gate insulating film 83, an N-type source layer 84, a P-type base layer 85, an N-type base layer 86, and an N-type. A drain layer 87 and a drain electrode layer 88 are provided. A region of the P-type base layer 85 facing the gate electrode layer 82 through the gate insulating film 83 becomes a channel.

  FIG. 10 is a cross-sectional structure diagram showing the configuration of an element (vertical trench MOSFET) that can be used as switching element Qn of the current switching unit shown in FIG. “Vertical type” and “trench type” are as described above. The vertical trench MOSFET shown in FIG. 10 has, as its structure, a source electrode layer 91, a gate electrode layer 92, a gate insulating film 93, an N-type source layer 94, a P-type base layer 95, an N-type base layer 96, and an N-type. A drain layer 97 and a drain electrode layer 98 are provided. A region of the P-type base layer 95 facing the gate electrode layer 92 through the gate insulating film 93 becomes a channel.

  FIG. 11 is a cross-sectional structure diagram showing the configuration of an element (lateral planar MOSFET) that can be used as the switching element Qn of the current switching unit shown in FIG. “Horizontal type” and “planar type” are as described above. The lateral planar MOSFET shown in FIG. 11 has, as its structure, a source electrode layer 101, a gate electrode layer 102, a gate insulating film 103, an N-type source layer 104, a P-type base layer 105, an N-type base layer 106, an N-type drain. A layer 107 and a drain electrode layer 108 are provided. A region of the P-type base layer 105 facing the gate electrode layer 102 through the gate insulating film 103 becomes a channel.

  12 is a cross-sectional structure diagram showing the configuration of an element (lateral trench MOSFET) that can be used as switching element Qn of the current switching unit shown in FIG. “Horizontal type” and “trench type” are as described above. The lateral trench MOSFET shown in FIG. 12 has, as its structure, a source electrode layer 111, a gate electrode layer 112, a gate insulating film 113, an N-type source layer 114, a P-type base layer 115, an N-type base layer 116, an N-type drain. A layer 117 and a drain electrode layer 118 are provided. A region of the P-type base layer 115 facing the gate electrode layer 112 through the gate insulating film 113 becomes a channel.

The circuit diagram which shows the structure of the power converter circuit (inverter) which concerns on one Embodiment of this invention. The equivalent circuit diagram about one part of the current switching part shown in FIG. FIG. 3 is a circuit diagram specifically showing an internal configuration of the current switching unit shown in FIG. 2 in FIG. 1. Operation | movement explanatory drawing of the current switching part shown in FIG. 2 in FIG. FIG. 3 is a cross-sectional structure diagram illustrating a configuration of an element (vertical planar IGBT) that can be used as the switching element Qn of the current switching unit illustrated in FIG. 2. FIG. 3 is a cross-sectional structure diagram illustrating a configuration of an element (vertical trench IGBT) that can be used as the switching element Qn of the current switching unit illustrated in FIG. 2. FIG. 3 is a cross-sectional structure diagram illustrating a configuration of an element (horizontal planar IGBT) that can be used as the switching element Qn of the current switching unit illustrated in FIG. 2. FIG. 3 is a cross-sectional structure diagram illustrating a configuration of an element (lateral trench IGBT) that can be used as a switching element Qn of the current switching unit illustrated in FIG. 2. FIG. 3 is a cross-sectional structure diagram illustrating a configuration of an element (vertical planar MOSFET) that can be used as the switching element Qn of the current switching unit illustrated in FIG. 2. FIG. 3 is a cross-sectional structure diagram illustrating a configuration of an element (vertical trench MOSFET) that can be used as the switching element Qn of the current switching unit illustrated in FIG. 2. FIG. 3 is a cross-sectional structure diagram illustrating a configuration of an element (lateral planar MOSFET) that can be used as the switching element Qn of the current switching unit illustrated in FIG. 2. FIG. 3 is a cross-sectional structure diagram illustrating a configuration of an element (lateral trench MOSFET) that can be used as a switching element Qn of the current switching unit illustrated in FIG. 2.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 11 ... DC power supply 12, 12, 14, 15 ... Current switching part, 13a ... Control voltage generation part, 16 ... Inductive load, 22 ... DC power supply, 31 ... Accumulation period, 32 ... Fall period, 33 ... Tail period, 41, 51, 61, 71 ... emitter electrode layer, 42, 52, 62, 72 ... gate electrode layer, 43, 53, 63, 73 ... gate insulating film, 44, 54, 64, 74 ... N-type source layer, 45 55, 65, 75 ... P-type base layer, 46, 56, 66, 76 ... N-type base layer, 47, 57, 67, 77 ... N-type buffer layer, 48, 58, 68, 78 ... P-type emitter layer 49, 59, 69, 79 ... collector electrode layer, 81, 91, 101, 111 ... source electrode layer, 82, 92, 102, 112 ... gate electrode layer, 83, 93, 103, 113 ... gate insulating film, 84 , 94, 104 114 ... N-type source layer, 85, 95, 105, 115 ... P-type base layer, 86, 96, 106, 116 ... N-type base layer, 87, 97, 107, 117 ... N-type drain layer, 88, 98, 108, 118 ... drain electrode layers.

Claims (5)

A power conversion circuit that uses a voltage-controlled switching element having a high-potential side terminal, a low-potential side terminal, and a voltage control terminal as an element for turning on and off an arm current,
The voltage-controlled switching element;
A control voltage generator connected to the voltage control terminal of the voltage control type switching element and supplying a voltage for turning on and off the voltage control type switching element to the voltage control terminal in time series;
An inductor connected to a low potential side terminal of the voltage controlled switching element and constituting a part of the arm, the inductance Le of which is the threshold voltage of the voltage controlled switching element Vth, and the control voltage generation The voltage to be turned off is Vgmin, the standard withstand voltage of the voltage-controlled switching element is Vrate, and the voltage applied between the high-voltage side terminal and the low-voltage side terminal of the voltage-controlled switching element during steady-state off Vcc, and the inductor satisfying Le ≧ Ls (Vth−Vgmin) / (Vrate−Vcc), where Ls is the specification of the parasitic inductance that can be seen from the high voltage side terminal of the voltage controlled switching element. A power conversion circuit comprising:   The voltage control type switching element is an IGBT (insulated gate bipolar transistor), the high potential side terminal is the collector terminal of the IGBT, the low potential side terminal is the emitter terminal of the IGBT, and the voltage control terminal is the IGBT. The power conversion circuit according to claim 1, wherein the power conversion circuit is a gate terminal.   The power conversion circuit according to claim 2, wherein the IGBT is a vertical planar IGBT, a vertical trench IGBT, a horizontal planar IGBT, or a horizontal trench IGBT.   The voltage control type switching element is a MOSFET (metal oxide semiconductor field effect transistor), the high potential side terminal is the drain terminal of the MOSFET, the low potential side terminal is the source terminal of the MOSFET, and the voltage control terminal is the voltage control terminal. The power conversion circuit according to claim 1, wherein the power conversion circuit is a gate terminal of a MOSFET.   5. The power conversion circuit according to claim 4, wherein the MOSFET is a vertical planar MOSFET, a vertical trench MOSFET, a horizontal planar MOSFET, or a horizontal trench MOSFET.

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