JP2006032469A - Multilayer ceramic substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the number of chip parts to be surface-mounted without impairing the advantages of thinness and small size.
A multilayer ceramic substrate including a first laminate 1 in which a plurality of ceramic substrates are laminated and a passive element is formed in an inner layer, the first laminate 1 having a smaller area than the ceramic substrate. A second laminated body 3 is provided in which a plurality of ceramic substrates are laminated and a passive element is formed in the inner layer. The height of the second stacked body 3 is set to be equal to or lower than the height of the semiconductor element 2 mounted on the first stacked body.
[Selection] Figure 1

Description

  The present invention relates to a multilayer ceramic substrate in which a plurality of ceramic substrates are stacked and at least a part of a passive element is formed in an inner layer.

  In electronic devices, demands for miniaturization and thinning are increasing along with higher functionality. Correspondingly, further improvement in mounting density is expected for wiring boards on which IC chips and various passive components are mounted. Has been. As one of the substrates that satisfy these requirements, there is an LTCC (low temperature co-fired ceramics) substrate in which functions such as capacitors, inductors, filters, and couplers are built in a multilayer substrate in which many ceramic substrates are laminated. Proposed. As shown in FIG. 2, the high-frequency module having a normal LTCC substrate is manufactured by manufacturing a LTCC multilayer substrate 101 in which a plurality of ceramic substrates are stacked and passive elements such as capacitors and inductors are formed in an inner layer. A semiconductor element (IC) chip 102 that is difficult to be formed in the inner layer of the substrate is mounted on the outermost surface of the substrate, and a plurality of chip components 103 such as a large-capacitance capacitor are provided in a region other than the mounting region of the IC chip 102 ( 5 in FIG. 2).

  Regarding the LTCC substrate and the module including the LTCC substrate, various studies have been made in various fields for further enhancement of functionality. For example, in Patent Document 1, a low loss layer in which a low loss circuit is formed and noise suppression are performed. A multilayer substrate having a high loss layer with a circuit formed thereon is disclosed. Patent Document 2 discloses a high-frequency module (LTCC substrate) having a configuration in which a switch and a coupler are integrated in a high-frequency module having a plurality of dielectric layers, and a trimmable resistor is arranged on the uppermost dielectric layer. ing.

In such an LTCC substrate, it is possible to reduce the number of components by forming chip components that have been externally attached by surface mounting or the like in the inner layer of the substrate, and compared with a type in which chip components are mounted on the substrate. Thus, the substrate can be reduced in size and thickness. In addition, since the LTCC substrate is baked at a relatively low temperature, it is possible to use a good conductor such as silver (Ag) as an inner layer, which could not be used in a conventional high-temperature baked substrate. can get.
JP 2001-111184 A Japanese Patent Laid-Open No. 2002-300081

  As described above, the LTCC substrate is a promising technology for reducing the size of electronic devices. However, in the field of portable electronic devices such as mobile phones, a technology for further thinning and miniaturization is desired. Yes. Thus, a method of reducing the area of one ceramic substrate can be considered for the purpose of further reducing the size of the LTCC substrate. However, if the substrate area is reduced without increasing the number of layers of the ceramic substrate, it can be formed as an inner layer. Naturally, the number of passive elements is reduced, and a large number of external chip components are required. If we try to achieve both the number of passive elements that can be built in and the reduction in the area of the ceramic substrate, the number of layers of the ceramic substrate will have to be increased. There's a problem.

  Therefore, the present invention has been proposed in view of such a conventional situation, and a multilayer ceramic substrate capable of reducing the number of chip components to be surface-mounted without impairing the advantages of thinness and small size is provided. The purpose is to provide.

  In order to solve the above-described problems, a multilayer ceramic substrate according to claim 1 of the present invention is a multilayer ceramic substrate including a first multilayer body in which a plurality of ceramic substrates are stacked and a passive element is formed in an inner layer. A second laminated body in which a plurality of ceramic substrates having a smaller area than the ceramic substrate are laminated and a passive element is formed in an inner layer is provided on the first laminated body.

  According to the multilayer ceramic substrate as described above, the second laminate is formed by laminating the ceramic substrate on the partial region of the first laminate in which the planar ceramic substrate is laminated and the passive element is formed. An additional body is formed, and passive elements are three-dimensionally formed in the inner layer of the second laminate. In a conventional multilayer ceramic substrate such as an LTCC substrate, the laminated body in which each ceramic substrate is laminated has a flat shape and is limited by the number of elements that can be formed inside, but in the multilayer ceramic substrate of the present invention, The number of elements that can be formed in the multilayer ceramic substrate is greatly increased by providing the second laminated body in which passive elements are further formed in the space in which the conventional external chip component is mounted. For this reason, the number of necessary external chip components is reduced.

  In the multilayer ceramic substrate according to claim 2 of the present invention, the height of the second laminated body is not more than the height of the semiconductor element mounted on the first laminated body. .

  Since the semiconductor element is an element that is difficult to be formed in the inner layer of the multilayer ceramic substrate and is relatively thick, when the semiconductor element is mounted on the surface of the multilayer ceramic substrate, the height of the entire module is mainly determined. Therefore, by utilizing the height of the semiconductor element, a second stacked body having a height equal to or lower than the height of the semiconductor element is formed in a region where the semiconductor element is not mounted. Many elements can be built in.

  As described above, according to the multilayer ceramic substrate of the present invention, the second element in which the passive element is further formed on the partial region of the first laminated body in which the ceramic substrate is laminated to form the passive element. By stacking the laminates, the total number of elements that can be made on the multilayer ceramic substrate is greatly increased, and instead, chip components required as external components are reduced. The second laminated body is provided in a space for mounting, for example, an external component in a conventional multilayer ceramic substrate. Therefore, according to the present invention, a large number of passive elements can be built inside without changing the external dimensions such as the height (thickness) and area of the entire module, and the advantages such as thinness and small size are not impaired. A multilayer ceramic substrate capable of reducing the number of components can be provided.

  Hereinafter, a multilayer ceramic substrate to which the present invention is applied will be described in detail with reference to the drawings.

  FIG. 1 is a schematic perspective view showing an example of a high-frequency module including an LTCC (low temperature co-fired ceramics) substrate as a multilayer ceramic substrate to which the present invention is applied. This high frequency module is a high frequency module for mobile communication, for example. The first laminated body 1 made of an LTCC substrate has a large number of ceramic substrates having substantially the same area and a large number of passive elements such as inductors, capacitors, filters, etc., depending on the conductive pattern formed on each ceramic substrate. It is built. Electrical conduction is ensured between the conductor patterns formed on each ceramic substrate by via holes or the like. In addition, illustration of the internal structure of the 1st laminated body 1 is abbreviate | omitted. The LTCC substrate that constitutes the first laminate 1 is, for example, 900 ° C. or less, whereas a conventional alumina substrate requires high-temperature firing at about 1500 ° C. by adding a glass-based material to alumina, for example. The low temperature firing is realized. A semiconductor element (IC) chip 2 is surface-mounted on the first laminate 1.

  In the present invention, the second laminate 3 made of the LTCC substrate is formed on the first laminate 1 made of the LTCC substrate. The second laminated body 3 has a smaller area than the ceramic substrate constituting the first laminated body 1, and a plurality of ceramic substrates having substantially the same area are laminated, and the conductive material formed on each ceramic substrate. Many passive elements such as inductors, capacitors, filters, and the like are formed according to the pattern. In particular, it is preferable to build an element that does not require high accuracy, such as a large-capacity capacitor, in the second stacked body 3. Electrical conduction is ensured between the conductor patterns formed on each ceramic substrate by via holes or the like. The LTCC substrate constituting the second stacked body 3 is the same as the first stacked body 1. In addition, illustration of the internal structure of the 2nd laminated body 3 is abbreviate | omitted.

  The second stacked body 3 is formed on a partial region of the first stacked body 1 and in a region other than the region where the IC chip 2 is mounted. In a module having a conventional LTCC substrate, a plurality of elements that cannot be formed in the inner layer of the LTCC substrate, such as a large-capacity capacitor, are usually mounted in the space where the second laminate 3 is provided. Has been.

  The LTCC substrate shown in FIG. 1 is not flat but has a structure in which a second laminated body 3 having a smaller area is stacked on a partial region of the surface of the flat first laminated body 1. The second laminated body 3 is provided in a space where chip components are mounted in the conventional module structure, and a large number of elements corresponding to the chip components mounted in this space can be formed three-dimensionally inside. it can. For this reason, in the multilayer ceramic substrate to which the present invention is applied, without increasing the area of the first laminated body 1 or increasing the number of ceramic substrates to increase the thickness of the first laminated body 1, The number of attached parts can be greatly reduced compared to the conventional one.

  The height of the second stacked body 3 is set to be equal to or less than the height of the IC chip 2 disposed in the adjacent region. In particular, the height of the second stacked body 3 is substantially the same as the height of the IC chip 2. It is preferable to be equal. Since the height of a normal IC chip is higher than that of a chip component such as a large-capacitance capacitor arranged in an adjacent region, there is a gap in the upper space of the conventional chip component mounting region. In the present invention, by making the height of the IC chip 2 and the height of the second laminated body 3 substantially equal, it is possible to effectively use the space that has been wasted in the past, and to increase the thickness without increasing the thickness of the entire module. Can be built inside the LTCC substrate. Further, by making the height of the IC chip 2 and the height of the second laminated body 3 substantially equal to each other and effectively utilizing the space that has been wasted in the past, many passive elements can be formed in the inner layer of the second laminated body 3. Therefore, the area of the first laminated body 1 (entire multilayer ceramic substrate) can be reduced.

It is a schematic perspective view which shows an example of the high frequency module which has a multilayer ceramic substrate to which this invention is applied. It is a schematic perspective view which shows an example of the high frequency module which has the conventional multilayer ceramic substrate.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 1st laminated body 2 IC chip 3 2nd laminated body

Claims (2)

A multilayer ceramic substrate comprising a first laminate in which a plurality of ceramic substrates are laminated and a passive element is formed in an inner layer,
A multilayer ceramic substrate, wherein a second multilayer body in which a plurality of ceramic substrates having a smaller area than the ceramic substrate are stacked and a passive element is formed in an inner layer is provided on the first multilayer body. The multilayer ceramic substrate according to claim 1, wherein a height of the second laminated body is equal to or lower than a height of a semiconductor element mounted on the first laminated body.

Images