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JP2006019248A - Electron emitting device, electron source, image display device, and method for manufacturing electron emitting device - Google Patents

Electron emitting device, electron source, image display device, and method for manufacturing electron emitting device Download PDF

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JP2006019248A
JP2006019248A JP2005147495A JP2005147495A JP2006019248A JP 2006019248 A JP2006019248 A JP 2006019248A JP 2005147495 A JP2005147495 A JP 2005147495A JP 2005147495 A JP2005147495 A JP 2005147495A JP 2006019248 A JP2006019248 A JP 2006019248A
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conductive film
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Kunio Takada
國夫 高田
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Canon Inc
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Abstract

【課題】 表面伝導型の電子放出素子を用いてなる電子源において、高抵抗膜を用いて素子部の帯電防止を図ると同時に、該高抵抗膜の存在により発生するリーク電流を防止する。
【解決手段】 導電性膜4を形成後、該導電性膜4とその周囲を除く領域に高抵抗膜7を形成し、フォーミング処理を施して導電性膜4に亀裂5を形成した後、炭素化合物含有雰囲気下において素子電極2,3間に電圧を印加することにより、亀裂5内及び亀裂5の端部から高抵抗膜7に渡るカーボン膜6を堆積させる。
【選択図】 図1
PROBLEM TO BE SOLVED: To prevent charging of an element portion by using a high resistance film in an electron source using a surface conduction type electron-emitting device, and at the same time, preventing a leakage current generated due to the presence of the high resistance film.
After forming a conductive film 4, a high resistance film 7 is formed in a region excluding the conductive film 4 and its periphery, and a forming process is performed to form a crack 5 in the conductive film 4. By applying a voltage between the device electrodes 2 and 3 in a compound-containing atmosphere, a carbon film 6 is deposited across the high resistance film 7 in the crack 5 and from the end of the crack 5.
[Selection] Figure 1

Description

本発明は帯電防止策を図った表面伝導型の電子放出素子、及びこれを用いた電子源、さらには該電子源を用いてなる画像表示装置と、これらの製造方法に関するものである。   The present invention relates to a surface-conduction electron-emitting device in which antistatic measures are taken, an electron source using the same, an image display device using the electron source, and a method for manufacturing the same.

近年、表面伝導型の電子放出素子を用いた、平板型の表示装置の開発が盛んである。当該電子放出素子は、通常ガラス基板からなる絶縁性基板上に、互いに所定の距離をおいて配置した一対の素子電極と、該素子電極間を跨いで配置する導電性膜を形成し、該導電性膜に通電処理を施して該薄膜内に亀裂を形成してなり、上記素子電極間に電圧を印加することによって上記亀裂より電子を放出する。画像表示装置においては、該電子放出素子を絶縁性基板上に複数形成し、マトリクス配線してなる電子源基板と、該電子放出素子から放出された電子の照射によって発光する発光部材とを対向配置させて表示パネルが構成される。   In recent years, flat panel display devices using surface-conduction electron-emitting devices have been actively developed. The electron-emitting device is formed by forming a pair of device electrodes arranged at a predetermined distance from each other on an insulating substrate usually made of a glass substrate, and a conductive film arranged across the device electrodes. The conductive film is energized to form a crack in the thin film, and electrons are emitted from the crack by applying a voltage between the element electrodes. In an image display device, a plurality of the electron-emitting devices are formed on an insulating substrate, and an electron source substrate formed by matrix wiring and a light-emitting member that emits light by irradiation of electrons emitted from the electron-emitting devices are opposed to each other. Display panel is configured.

このような電子源基板においては、電子放出素子からの電子放出により、絶縁性基板表面の電位が不安定になり、放出された電子ビームの起動が不安定となるという問題を生じていた。また、絶縁性基板表面に電子、イオン等の荷電粒子が注入されると二次電子が発生するが、特に高電界下では異常放電に至るため、素子の電子放出特性が著しく低下し、最悪の場合、素子が破壊することが実験的に確かめられている。これら、真空中での電子放出特性の不安定性、素子の放電劣化を防止するためには、絶縁性の表面が露出しないように適当な高抵抗膜で被覆することが効果的である。そのため従来の電子放出素子では絶縁性表面を所定のシート抵抗を持つ高抵抗膜で覆って帯電防止を図っていた。(特許文献1,2、3参照)
特開平8−180801号公報 特開平11−317149号公報 特開平02−060024号公報
In such an electron source substrate, due to the electron emission from the electron-emitting device, the potential on the surface of the insulating substrate becomes unstable, and the startup of the emitted electron beam becomes unstable. In addition, when charged particles such as electrons and ions are injected into the surface of the insulating substrate, secondary electrons are generated, but abnormal discharge occurs particularly under a high electric field. In this case, it has been experimentally confirmed that the device is destroyed. In order to prevent the instability of electron emission characteristics in vacuum and the deterioration of device discharge, it is effective to cover with an appropriate high resistance film so that the insulating surface is not exposed. Therefore, in the conventional electron-emitting device, the insulating surface is covered with a high resistance film having a predetermined sheet resistance to prevent charging. (See Patent Documents 1, 2, and 3)
JP-A-8-180801 JP 11-317149 A Japanese Patent Laid-Open No. 02-060024

しかしながら、電子放出素子を含めて基板表面全体に高抵抗膜を形成した場合、この高抵抗膜を介して素子電極間にリーク電流が流れるが、その電流量が予想外に大きい場合がある。多大なリーク電流が流れる要因としては高抵抗膜自体の膜厚制御がうまくいかず、所望の膜厚より厚くなってしまうことが上げられる。高抵抗膜の膜厚が厚く、シート抵抗が下がってしまうとその高抵抗膜自身で非駆動時の低電圧時におけるリーク電流が大きく流れてしまい、駆動用のドライバICに大きな負担をかけるという問題があった。   However, when a high-resistance film is formed on the entire substrate surface including the electron-emitting device, a leakage current flows between the device electrodes through the high-resistance film, but the amount of current may be unexpectedly large. As a factor for the flow of a large leak current, the film thickness control of the high resistance film itself is not successful, and the film becomes thicker than desired. If the film thickness of the high-resistance film is large and the sheet resistance decreases, the high-resistance film itself causes a large leakage current at a low voltage when not driven, which places a heavy burden on the driver IC for driving. was there.

また、電子放出素子上の高抵抗膜が厚すぎる場合には、その構造によっては電子放出を阻害することもわかった。   It has also been found that when the high resistance film on the electron-emitting device is too thick, electron emission is inhibited depending on the structure.

そのため、帯電防止のために高抵抗膜を設ける場合には、その膜厚を精密に制御する必要があった。しかしながら、この高抵抗膜の膜厚制御だけではリーク電流を低減することが難しいことが分かってきた。   Therefore, when a high resistance film is provided to prevent charging, it is necessary to precisely control the film thickness. However, it has been found that it is difficult to reduce the leakage current only by controlling the film thickness of the high resistance film.

その要因として、現在の電子放出素子はその製造工程において、導電性膜に電圧を印加して電子放出部となる亀裂を形成した後、さらに、炭素化合物含有ガス雰囲気下において該導電性膜に電圧を印加する活性化工程を施している。この活性化工程によって、炭素及び/または炭素化合物を主成分とするカーボン堆積物を亀裂部分近傍に形成し、放出電子の増大を図っているが、活性化工程の条件を考慮せずに、前述の高抵抗膜を形成すると、この堆積カーボンが導電性膜端部において高抵抗膜と積層され、結果上述のように放出部近傍においてシート抵抗が下がってしまい、リーク電流の増大を招いてしまう。   As a factor, in the current electron-emitting device, in the manufacturing process, a voltage is applied to the conductive film to form a crack to be an electron-emitting portion, and then the voltage is applied to the conductive film in a carbon compound-containing gas atmosphere. The activation process of applying is applied. By this activation process, a carbon deposit mainly composed of carbon and / or carbon compounds is formed in the vicinity of the crack portion to increase the number of emitted electrons, but the above-mentioned conditions are not considered without considering the conditions of the activation process. When the high-resistance film is formed, the deposited carbon is laminated with the high-resistance film at the end of the conductive film. As a result, the sheet resistance is lowered in the vicinity of the emission portion as described above, and the leakage current is increased.

これらのリーク電流が流れることで、素子の見かけの効率が低下するという問題が生じていた。ここで素子の効率とは、表面伝導型電子放出素子の一対の対向する素子電極に電圧を印加したとき、流れる電流(以下、素子電流Ifと呼ぶ)に対する真空中に放出される電流(以下、放出電流Ieと呼ぶ)との電流比を指す。つまり、素子電流Ifはできるだけ小さく、放出電流Ieはできるだけ大きいことが望ましいが、上記のように高抵抗膜を被覆した場合には、高抵抗膜によるリーク電流が素子電流に加算されるため、効率が低下する。また、単に、導電性膜から帯電防止膜を離して形成すると、絶縁性基板の一部が露出してしまい、この露出部分が帯電してしまう。特に導電性膜近傍、特に電子放出部近傍での帯電は、電子放出部から放出される電子への帯電の影響が大きいため、放出電子の電子軌道を歪ませやすい。   The flow of these leak currents has caused a problem that the apparent efficiency of the device is lowered. Here, the efficiency of the element refers to a current (hereinafter, referred to as “device current If”) that is discharged in a vacuum relative to a flowing current (hereinafter referred to as “element current If”) when a voltage is applied to a pair of opposing element electrodes of the surface conduction electron-emitting device. The current ratio to the emission current Ie). That is, it is desirable that the element current If is as small as possible and the emission current Ie is as large as possible. However, when the high resistance film is coated as described above, the leakage current due to the high resistance film is added to the element current, so that the efficiency Decreases. If the antistatic film is simply formed away from the conductive film, a part of the insulating substrate is exposed and the exposed part is charged. In particular, charging in the vicinity of the conductive film, particularly in the vicinity of the electron emission portion, has a large influence on the charge emitted from the electron emission portion, and thus easily distorts the electron trajectory of the emitted electrons.

本発明は、上記電子放出素子及び該電子放出素子を用いてなる電子源、画像表示装置において、電子放出特性の安定化を図るための高抵抗膜を容易に形成して帯電による不具合を防止すると同時に、前記、非駆動時の低電圧における微弱なリーク電流を抑え、ドライバICの負荷を低減することで安価なドライバICの使用を可能にし、パネルコストを大幅に低減することを目的とする。   The present invention can easily form a high-resistance film for stabilizing the electron emission characteristics in the electron-emitting device, the electron source using the electron-emitting device, and the image display device to prevent problems due to charging. At the same time, an object of the present invention is to suppress the weak leakage current at a low voltage when not driven and to reduce the load on the driver IC, thereby enabling the use of an inexpensive driver IC and greatly reducing the panel cost.

上記目的を達成するために、本発明は電子放出素子の導電性膜端部と帯電を防止するための高抵抗膜との間に間隙を設けて配置し、かつその部分を電子放出素子を被覆するカーボン膜で接続することによって帯電防止効果を得ると同時に微弱なリーク電流が流れることを防止するものである。   In order to achieve the above object, according to the present invention, a gap is provided between the end of the conductive film of the electron-emitting device and the high-resistance film for preventing charging, and the portion is covered with the electron-emitting device. By connecting with a carbon film, an antistatic effect is obtained, and at the same time, a weak leak current is prevented from flowing.

即ち本発明の第1は、絶縁性基板と、
該絶縁性基板上に配置された一対の素子電極と、
前記一対の素子電極間に跨って配置され、一部に亀裂を有する導電性膜と、
前記導電性膜の端部と前記亀裂との交点から前記絶縁性基板上に渡る領域、及び前記亀裂部分に位置するカーボン膜と、
前記一対の素子電極と電気的に接続し、前記導電性膜の端部より所定の距離を含む領域を除いて、絶縁性基板を覆う高抵抗膜とを有する電子放出素子であって、
前記導電性膜の端部と前記亀裂との交点から前記絶縁性基板上に渡る領域に位置する前記カーボン膜は、前記高抵抗膜と接触していることを特徴とする。
That is, the first of the present invention is an insulating substrate;
A pair of device electrodes disposed on the insulating substrate;
A conductive film disposed between the pair of element electrodes and partially cracked;
A region extending over the insulating substrate from the intersection of the edge of the conductive film and the crack, and a carbon film located in the crack portion;
An electron-emitting device having a high resistance film that is electrically connected to the pair of device electrodes and covers an insulating substrate except for a region including a predetermined distance from an end of the conductive film,
The carbon film located in a region extending on the insulating substrate from the intersection of the end of the conductive film and the crack is in contact with the high resistance film.

本発明の第2は、電子放出素子の製造方法であって、
絶縁性基板上に、一対の素子電極と、該一対の素子電極間に渡る導電性膜とを形成する工程と、
前記導電性膜上及び該導電性膜の端部から前記絶縁性基板上の一部に渡って撥水膜を形成する工程と、
前記撥水膜の形成領域を除く前記絶縁性基板上、及び前記一対の素子電極上に高抵抗膜の前駆体を形成する工程と、
前記撥水膜及び前記高抵抗膜の前駆体が形成された前記絶縁性基板を焼成し、該高抵抗膜の前駆体から、前記導電性膜と距離を隔てた高抵抗膜を形成する工程と、
前記一対の素子電極を介して前記導電性膜に通電し、該導電性膜の一部に亀裂を形成する工程と、
炭素を含有するガス雰囲気下において、前記一対の素子電極を介して前記亀裂を有する導電性膜に通電し、該亀裂部分、及び該導電性膜の端部と該亀裂との交点から前記高抵抗膜におよぶ前記絶縁性基板上の領域にカーボン膜を形成する工程、
とを有することを特徴とする。
A second aspect of the present invention is a method for manufacturing an electron-emitting device,
Forming a pair of element electrodes and a conductive film between the pair of element electrodes on an insulating substrate;
Forming a water repellent film over the conductive film and over a portion of the conductive film from an end of the conductive film;
Forming a precursor of a high resistance film on the insulating substrate excluding a region where the water repellent film is formed, and on the pair of element electrodes;
Firing the insulating substrate on which the water repellent film and the precursor of the high resistance film are formed, and forming a high resistance film at a distance from the conductive film from the precursor of the high resistance film; ,
Energizing the conductive film through the pair of element electrodes to form a crack in a part of the conductive film;
In a gas atmosphere containing carbon, the conductive film having the crack is energized through the pair of element electrodes, and the high resistance is obtained from the crack portion and the intersection of the end portion of the conductive film and the crack. Forming a carbon film in a region on the insulating substrate extending over the film;
It is characterized by having.

本発明の第3は、絶縁性基板上に、一対の素子電極と、該一対の素子電極間に渡る導電性膜とを形成する工程と、
前記導電性膜上及び該導電性膜の端部から前記絶縁性基板上に渡って高抵抗膜の前駆体を形成する工程と、
前記高抵抗膜の前駆体が形成された絶縁性基板上の、前記導電性膜の形成領域及び該導電性膜の端部から前記絶縁性基板上の一部の領域に撥水膜を形成する工程と、
前記撥水膜及び前記高抵抗膜の前駆体が形成された前記絶縁性基板を焼成し、該高抵抗膜の前駆体から、前記導電性膜と距離を隔てた高抵抗膜を形成する工程と、
前記一対の素子電極を介して前記導電性膜に通電し、該導電性膜の一部に亀裂を形成する工程と、
炭素を含有するガス雰囲気下において、前記一対の素子電極を介して前記亀裂を有する導電性膜に通電し、該亀裂部分、及び該導電性膜の端部と該亀裂との交点から前記高抵抗膜におよぶ前記絶縁性基板上の領域にカーボン膜を形成する工程、
とを有することを特徴とする。
A third aspect of the present invention is a process of forming a pair of element electrodes and a conductive film across the pair of element electrodes on an insulating substrate;
Forming a precursor of a high resistance film on the conductive film and from the end of the conductive film to the insulating substrate;
A water-repellent film is formed on the insulating substrate on which the precursor of the high-resistance film is formed, on the conductive film forming region and a part of the insulating substrate from the end of the conductive film. Process,
Firing the insulating substrate on which the water repellent film and the precursor of the high resistance film are formed, and forming a high resistance film at a distance from the conductive film from the precursor of the high resistance film; ,
Energizing the conductive film through the pair of element electrodes to form a crack in a part of the conductive film;
In a gas atmosphere containing carbon, the conductive film having the crack is energized through the pair of element electrodes, and the high resistance is obtained from the crack portion and the intersection of the end portion of the conductive film and the crack. Forming a carbon film in a region on the insulating substrate extending over the film;
It is characterized by having.

以上説明したように、本発明の電子放出素子においては、導電性膜上に高抵抗膜がないため、導電性膜に亀裂の切れ残りがなく、良好な電子放出特性が得られる。また、導電性膜と高抵抗膜とがカーボン膜で接続されているため、従来と同様の良好な帯電防止効果が得られ、該帯電によって引き起こされる放電による素子破壊が防止される。また、亀裂の長手方向の端部において導電性膜上に高抵抗膜がないことにより、リーク電流の発生が防止され、リーク電流による駆動ICへの負担も軽減される。   As described above, in the electron-emitting device of the present invention, since there is no high-resistance film on the conductive film, the conductive film is free from cracks and good electron-emitting characteristics can be obtained. In addition, since the conductive film and the high resistance film are connected by the carbon film, the same good antistatic effect as the conventional one can be obtained, and the element destruction due to the discharge caused by the charging can be prevented. In addition, since there is no high resistance film on the conductive film at the end in the longitudinal direction of the crack, the generation of a leakage current is prevented, and the burden on the drive IC due to the leakage current is reduced.

本発明においては、上記カーボンの付着量を適当な値に管理することで帯電防止と非選択電流低減を両立させることも可能である。   In the present invention, it is possible to achieve both prevention of charging and reduction of non-selective current by managing the carbon adhesion amount to an appropriate value.

よって、本発明においては、(1)非選択の電子放出素子に流れるリーク電流、(2)電子放出素子の不要な帯電、(3)電子放出部である亀裂の形成不良、が同時に防止され、長時間表示でも画質の劣化や電子放出素子の損傷のない、信頼性の高い画像表示装置が提供される。   Therefore, in the present invention, (1) a leakage current flowing through a non-selected electron-emitting device, (2) unnecessary charging of the electron-emitting device, and (3) defective formation of a crack that is an electron-emitting portion are prevented at the same time. Provided is a highly reliable image display device that does not deteriorate image quality or damage electron-emitting devices even for long-time display.

以下に、本発明の電子放出素子、電子源、画像表示装置、及びこれらの製造方法を実施形態を挙げて説明する。   Hereinafter, embodiments of the electron-emitting device, the electron source, the image display device, and the manufacturing method thereof according to the present invention will be described.

図1は、本発明の電子放出素子の好ましい実施形態の模式図であり、図2〜図6はその製造工程を示す模式図である。図1〜図6において、(a)は平面図、(b)は(a)のA−A’断面図である。図中、1は絶縁性基板、2,3は素子電極、4は導電性膜、5は導電性膜4に形成された亀裂、6はカーボン膜、7は高抵抗膜、31は撥水膜、41は高抵抗膜の前駆体である。以下に図1の電子放出素子の製造工程を例に、本発明の電子放出素子及びその製造方法を説明する。   FIG. 1 is a schematic view of a preferred embodiment of the electron-emitting device of the present invention, and FIGS. 2 to 6 are schematic views showing the manufacturing process. 1 to 6, (a) is a plan view, and (b) is a cross-sectional view taken along line A-A ′ of (a). In the figure, 1 is an insulating substrate, 2 and 3 are element electrodes, 4 is a conductive film, 5 is a crack formed in the conductive film 4, 6 is a carbon film, 7 is a high resistance film, and 31 is a water repellent film. , 41 is a precursor of a high resistance film. The electron-emitting device and the method for manufacturing the same according to the present invention will be described below by taking the manufacturing process of the electron-emitting device of FIG. 1 as an example.

〔工程1〕
絶縁性基板1上に素子電極2,3及び該素子電極2,3間を跨いで配置する導電性膜4を形成する(図2)。
[Step 1]
The element electrodes 2 and 3 and the conductive film 4 disposed across the element electrodes 2 and 3 are formed on the insulating substrate 1 (FIG. 2).

絶縁性基板1としては、石英ガラス、Na等の不純物含有量を減少させたガラス、青板ガラス、青板ガラスにスパッタ法等によりSiO2を積層した積層体、アルミナ等のセラミックス及びSi基板等を用いることができる。 As the insulating substrate 1, quartz glass, glass with reduced impurity content such as Na, blue plate glass, a laminated body in which SiO 2 is laminated on the blue plate glass by sputtering or the like, ceramics such as alumina, and a Si substrate are used. be able to.

また、素子電極2,3の材料としては、一般的導体材料を用いることができる。これは例えばNi,Cr,Au,Mo,W,Pt,Ti,Al,Cu,Pd等の金属或いは合金及びPd,Ag,Au,RuO2,Pd−Ag等の金属或いは金属酸化物とガラス等から構成される印刷導体、In23−SnO2等の透明導電体及びポリシリコン等の半導体材料等から適宜選択することができる。 Moreover, as a material of the device electrodes 2 and 3, a general conductor material can be used. This includes, for example, metals or alloys such as Ni, Cr, Au, Mo, W, Pt, Ti, Al, Cu, and Pd, and metals or metal oxides such as Pd, Ag, Au, RuO 2 , and Pd—Ag, and glass. It can be appropriately selected from a printed conductor composed of a transparent conductor such as In 2 O 3 —SnO 2 and a semiconductor material such as polysilicon.

素子電極間隔Lは、数十nm〜数百μmであり、素子電極2,3の製法の基本となるフォトリソグラフィー技術、即ち、露光機の性能とエッチング方法等、及び、素子電極2,3間に印加する電圧により設定されるが、好ましくは、数μm〜数十μmである。   The element electrode interval L is several tens of nanometers to several hundreds of micrometers, and the photolithography technology that is the basis of the manufacturing method of the element electrodes 2 and 3, that is, the performance of the exposure machine, the etching method, and the like The voltage is set according to the voltage to be applied, but is preferably several μm to several tens of μm.

素子電極2,3の長さW2、及び膜厚は、電極の抵抗値、配線との結線、電子放出素子が多数配置される電子源の配置上の問題より適宜設計され、通常は、長さW2は数μm〜数百μmであり、膜厚は数nm〜数μmである。   The length W2 and the film thickness of the device electrodes 2 and 3 are appropriately designed in consideration of the electrode resistance value, the connection with the wiring, and the problem of the arrangement of the electron source in which a large number of electron-emitting devices are arranged. W2 is several μm to several hundred μm, and the film thickness is several nm to several μm.

導電性膜4としては、良好な電子放出特性を得るために、微粒子で構成された微粒子膜を用いるのが好ましい。その膜厚は、素子電極2,3へのステップカバレージ、素子電極2,3間の抵抗値及び後述するフォーミング条件等を考慮して適宜設定される。   As the conductive film 4, it is preferable to use a fine particle film composed of fine particles in order to obtain good electron emission characteristics. The film thickness is appropriately set in consideration of the step coverage to the device electrodes 2 and 3, the resistance value between the device electrodes 2 and 3, forming conditions to be described later, and the like.

また、素子電極2,3間に流れる素子電流If、及び放出電流Ieの大きさは、導電性膜4の幅W1に依存するので、上記素子電極2,3の形状と同様に、電子放出素子のサイズが限定された中で十分な放出電流が得られるように設計される。   In addition, since the magnitudes of the device current If and the emission current Ie flowing between the device electrodes 2 and 3 depend on the width W1 of the conductive film 4, similarly to the shape of the device electrodes 2 and 3, the electron emitting device. Is designed so that a sufficient emission current can be obtained in a limited size.

導電性膜4の熱的安定性は電子放出特性の寿命を支配する場合があり、導電性膜4の材料としては、より高融点な材料を用いるのが望ましい。しかしながら、通常、導電性膜4の融点が高いほど後述する通電フォーミングのためにより大きな電力が必要となる。さらに、その結果得られる電子放出部の形態によって、電子放出し得る印加電圧(しきい値電圧)が上昇する等、電子放出特性に問題が生じる場合がある。   The thermal stability of the conductive film 4 may dominate the lifetime of the electron emission characteristics, and it is desirable to use a material having a higher melting point as the material of the conductive film 4. However, normally, the higher the melting point of the conductive film 4, the more electric power is required for energization forming described later. Further, depending on the form of the electron emission portion obtained as a result, there may be a problem in the electron emission characteristics, such as an increase in applied voltage (threshold voltage) at which electrons can be emitted.

本発明においては、導電性膜4の材料として特に高融点のものを必要とはせず、比較的小さいフォーミング電力で良好な電子放出部が形成可能な材料・形態のものを選ぶことができる。   In the present invention, a material having a high melting point is not particularly required as the material of the conductive film 4, and a material / form that can form a good electron emission portion with a relatively small forming power can be selected.

上記条件を満たす材料の例として、Ni、Au、PdO、Pd、Pt等の導電材料をRs(シート抵抗)が1×102〜1×107Ω/□の抵抗値を示す膜厚で形成したものが好ましく用いられる。尚Rsは、厚さがt、幅がwで長さがlの薄膜の長さ方向に測定した抵抗Rを、R=Rs(l/w)とおいたときに現れる値で、抵抗率をρとすればRs=ρ/tである。上記抵抗値を示す膜厚はおよそ5nm〜50nmの範囲にある。この膜厚範囲において、それぞれの材料の薄膜は微粒子膜の形態を有していることが好ましい。 As an example of a material that satisfies the above conditions, a conductive material such as Ni, Au, PdO, Pd, or Pt is formed with a film thickness in which Rs (sheet resistance) exhibits a resistance value of 1 × 10 2 to 1 × 10 7 Ω / □. What has been used is preferably used. Rs is a value that appears when the resistance R measured in the length direction of a thin film having a thickness of t, a width of w, and a length of l is expressed as R = Rs (l / w). Then, Rs = ρ / t. The film thickness showing the resistance value is in the range of about 5 nm to 50 nm. In this film thickness range, the thin film of each material preferably has the form of a fine particle film.

ここで述べる微粒子膜とは、複数の微粒子が集合した膜であり、その微細構造は、微粒子が個々に分散配置した状態或いは微粒子が互いに隣接、或いは重なり合った状態(いくつかの微粒子が集合し、全体として島状構造を形成している場合も含む)をとっている。   The fine particle film described here is a film in which a plurality of fine particles are aggregated, and the fine structure thereof is a state in which the fine particles are individually dispersed and arranged, or a state in which the fine particles are adjacent to each other or overlap each other (some fine particles are aggregated, Including the case where an island-like structure is formed as a whole).

微粒子の粒径は、数Å〜数百nmの範囲、好ましくは、1nm〜20nmの範囲である。   The particle diameter of the fine particles is in the range of several to hundreds of nm, preferably in the range of 1 nm to 20 nm.

さらに、先に例示した材料の中でも、PdOは、有機Pd化合物の大気中焼成により容易に薄膜形成できること、半導体であるため比較的電気伝導度が低く上記範囲の抵抗値Rsを得るための膜厚のプロセスマージンが広いこと、導電性膜4に亀裂5を形成した後等に、容易に還元して金属Pdとすることができるので膜抵抗を低減し得ること、等から好適な材料である。しかしながら、本発明の効果はPdOに限られることなく、また、上記例示した材料に限られるものではない。   Furthermore, among the materials exemplified above, PdO can be easily formed into a thin film by firing an organic Pd compound in the air, and since it is a semiconductor, it has a relatively low electrical conductivity and a film thickness for obtaining a resistance value Rs in the above range. This is a suitable material because it has a wide process margin and can be easily reduced to metal Pd after the formation of a crack 5 in the conductive film 4 and the like, so that the film resistance can be reduced. However, the effects of the present invention are not limited to PdO, and are not limited to the materials exemplified above.

導電性膜4の具体的な形成方法としては、例えば、絶縁性基板1上に設けられた素子電極2と素子電極3との間に、有機金属溶液を塗布して乾燥することにより、有機金属膜を形成する。尚、有機金属溶液とは、前記導電性膜材料のPd、Ni、Au、Pt等の金属を主元素とする有機金属化合物の溶液である。この後、有機金属膜を加熱焼成処理し、リフトオフ、エッチング等によりパターニングし、導電性膜4を形成する。また、真空蒸着法、スパッタ法、CVD法、分散塗布法、ディッピング法、スピンナー法、インクジェット法等によって形成することも可能である。   As a specific method for forming the conductive film 4, for example, an organic metal solution is applied between the element electrode 2 and the element electrode 3 provided on the insulating substrate 1 and dried to obtain an organic metal. A film is formed. The organometallic solution is a solution of an organometallic compound whose main element is a metal such as Pd, Ni, Au, or Pt of the conductive film material. Thereafter, the organometallic film is heated and baked and patterned by lift-off, etching, or the like to form the conductive film 4. Further, it can be formed by vacuum deposition, sputtering, CVD, dispersion coating, dipping, spinner, ink jet, or the like.

図1〜図6においては、インクジェット方式により有機金属溶液を絶縁性基板1上に塗布して焼成し、導電性膜4を形成した例を示す。   1 to 6 show an example in which an organic metal solution is applied onto an insulating substrate 1 by an ink jet method and baked to form a conductive film 4.

〔工程2〕
導電性膜4と、該導電性膜4の端部から所定の距離を含む領域を撥水膜31で覆う(図3)。当該撥水膜31は、後工程において絶縁性基板1上に全面に(従って素子電極2,3及び導電性膜4を含む)高抵抗膜材41を付与した際に、該高抵抗膜材41をはじいて除去する部材である。具体的には、撥水性を有するジメチルジアセトキシシラン、ジエチルエトキシシランなどのシランカップリング材を用いることができる。
[Step 2]
The conductive film 4 and a region including a predetermined distance from the end of the conductive film 4 are covered with a water repellent film 31 (FIG. 3). When the water-repellent film 31 is provided with a high-resistance film material 41 over the entire surface of the insulating substrate 1 (and thus including the device electrodes 2 and 3 and the conductive film 4) in a later step, the high-resistance film material 41 It is a member to remove by repelling. Specifically, a silane coupling material such as dimethyldiacetoxysilane or diethylethoxysilane having water repellency can be used.

撥水膜31の形成方法としては、特に限定されないが、導電性膜4と同様にインクジェット方式を用いることができる。撥水膜31は、導電性膜4の端部から0.5〜10μm程度の領域を含むように(W3=W1+1〜20μm)形成する。   A method for forming the water repellent film 31 is not particularly limited, but an ink jet method can be used as in the case of the conductive film 4. The water repellent film 31 is formed so as to include a region of about 0.5 to 10 μm from the end of the conductive film 4 (W3 = W1 + 1 to 20 μm).

〔工程3〕
絶縁性基板1の全面に高抵抗膜の前駆体41を付与する。この時、導電性膜4と、該導電性膜4の端部から所定の距離を含む領域には撥水膜31が形成されているため、該撥水膜31上の高抵抗膜の前駆体41ははじかれる(図4)。
[Step 3]
A high resistance film precursor 41 is applied to the entire surface of the insulating substrate 1. At this time, since the water repellent film 31 is formed in the conductive film 4 and a region including a predetermined distance from the end of the conductive film 4, the precursor of the high resistance film on the water repellent film 31 is formed. 41 is repelled (FIG. 4).

高抵抗膜7の材料としては、容易に且つ大面積に均一な膜が得られるものが好ましく、炭素材料や酸化スズ、酸化クロム等の金属酸化物、或いは導電性材料が酸化シリコンなどに分散されたものが好ましい。また、高抵抗膜の前駆体41の付与方法としては、スプレー塗布法、スピンナー法、ディッピング法などが好ましく用いられる。   The material of the high resistance film 7 is preferably a material that can easily obtain a uniform film over a large area. A carbon material, a metal oxide such as tin oxide or chromium oxide, or a conductive material is dispersed in silicon oxide or the like. Are preferred. Further, as a method for applying the precursor 41 of the high resistance film, a spray coating method, a spinner method, a dipping method, or the like is preferably used.

尚、本発明においては〔工程2〕と〔工程3〕を入れ替えても図4の形態を得ることができる。即ち、導電性膜4の形成後、高抵抗膜の前駆体41を絶縁性基板1の全面に付与し、次いで、導電性膜4上に撥水膜31の材料溶液をインクジェット方式で付与すると、該材料溶液が導電性膜4上の高抵抗膜の前駆体41を押しのけるようにして除去し、該撥水膜31の材料溶液が導電性膜4を覆う形態を得ることができる。   In the present invention, even if [Step 2] and [Step 3] are interchanged, the embodiment of FIG. 4 can be obtained. That is, after the formation of the conductive film 4, the precursor 41 of the high resistance film is applied to the entire surface of the insulating substrate 1, and then the material solution of the water repellent film 31 is applied on the conductive film 4 by an inkjet method. The material solution is removed so as to push the precursor 41 of the high resistance film on the conductive film 4, so that the material solution of the water repellent film 31 covers the conductive film 4.

〔工程4〕
高抵抗膜の前駆体41を250℃〜400℃程度で乾燥、焼成して高抵抗膜7を形成する(図5)。この時、撥水膜31は焼成によって焼失し、撥水膜31の有った領域に、高抵抗膜7が存在しない領域51が形成される。本発明で用いられる高抵抗膜7は、シート抵抗で1×108〜1×1012Ω/□程度が好ましい。
[Step 4]
The high resistance film precursor 41 is dried and fired at about 250 ° C. to 400 ° C. to form the high resistance film 7 (FIG. 5). At this time, the water repellent film 31 is burned away by baking, and a region 51 where the high resistance film 7 does not exist is formed in a region where the water repellent film 31 is present. The high resistance film 7 used in the present invention preferably has a sheet resistance of about 1 × 10 8 to 1 × 10 12 Ω / □.

〔工程5〕
還元雰囲気下において、素子電極2,3間にフォーミングと呼ばれる通電処理を行い、亀裂5を形成する(図6)。フォーミングは、素子電極2,3間に電圧を印加することによって、導電性膜4を局所的に破壊、変形若しくは変質させることにより、電気的に高抵抗な状態の電子放出部を形成する工程である。この時、還元雰囲気下、例えば若干の水素ガスを含む真空雰囲気下で通電加熱すると、水素によって導電性膜4の還元が促進される。例えば、導電性膜4がPdOで形成されている場合には、Pd膜に変化する。そして還元変化時に、膜の還元収縮によって一部に亀裂5が形成される。
[Step 5]
In a reducing atmosphere, an energization process called forming is performed between the device electrodes 2 and 3 to form a crack 5 (FIG. 6). Forming is a process of forming an electron emission portion in an electrically high resistance state by locally destroying, deforming or altering the conductive film 4 by applying a voltage between the device electrodes 2 and 3. is there. At this time, when energized and heated in a reducing atmosphere, for example, in a vacuum atmosphere containing some hydrogen gas, the reduction of the conductive film 4 is promoted by hydrogen. For example, when the conductive film 4 is made of PdO, it changes to a Pd film. When the reduction is changed, a crack 5 is partially formed by the reduction shrinkage of the film.

本発明においては、高抵抗膜7が導電性膜4の端部(外周)に接していないことから、フォーミングによる亀裂5が導電性膜4の端部にまで確実に達し、切れ残り現象を生じない。切れ残り現象とは、従来の高抵抗膜7の如く導電性膜4にも積層され、該導電性膜4の端部に高抵抗膜7が接している時に発生しやすい現象であり、フォーミング時に導電性膜4が印加電圧と水素導入により真空中で還元しながら亀裂5を形成している過程で、導電性膜4の端部において還元不良を生じさせるために該亀裂5が端部まで形成できない現象をいう。このような切れ残り現象が生じると駆動時にその部分でリーク電流が流れてしまうのである。   In the present invention, since the high resistance film 7 is not in contact with the end portion (outer periphery) of the conductive film 4, the crack 5 due to forming reaches the end portion of the conductive film 4, and the uncut phenomenon occurs. Absent. The uncut phenomenon is a phenomenon that is likely to occur when the high resistance film 7 is laminated on the conductive film 4 like the conventional high resistance film 7 and the high resistance film 7 is in contact with the end of the conductive film 4. In the process of forming the crack 5 while the conductive film 4 is reduced in vacuum by applying voltage and introducing hydrogen, the crack 5 is formed to the end in order to cause a reduction defect at the end of the conductive film 4. A phenomenon that cannot be done. When such an uncut phenomenon occurs, a leak current flows in that portion during driving.

尚、フォーミング処理以降の電気的処理は、適当な真空装置内で行う。   The electrical processing after the forming process is performed in a suitable vacuum apparatus.

フォーミング処理は、パルス波高値が定電圧のパルスを印加する場合と、パルス波高値を増加させながら、電圧パルスを印加する場合とがある。まず、パルス波高値が定電圧のパルスを印加する場合の電圧波形を図7の(a)に示す。   In the forming process, there are a case where a pulse having a constant pulse peak value is applied and a case where a voltage pulse is applied while increasing the pulse peak value. First, FIG. 7A shows a voltage waveform when a pulse having a constant pulse height is applied.

図7(a)中、T1及びT2は電圧波形のパルス幅とパルス間隔であり、T1を1μsec〜10msec、T2を10μsec〜100msecとし、三角波の波高値(フォーミング時のピーク電圧)は適宜選択する。   In FIG. 7A, T1 and T2 are the pulse width and pulse interval of the voltage waveform, T1 is set to 1 μsec to 10 msec, T2 is set to 10 μsec to 100 msec, and the peak value of the triangular wave (peak voltage at the time of forming) is appropriately selected. .

次に、パルス波高値を増加させながら、電圧パルスを印加する場合の電圧波形を図7(b)に示す。   Next, FIG. 7B shows a voltage waveform when a voltage pulse is applied while increasing the pulse peak value.

図7(b)中、T1及びT2は電圧波形のパルス幅とパルス間隔であり、T1を1μsec〜10msec、T2を10μsec〜100msecとし、三角波の波高値(フォーミング時のピーク電圧)は、例えば0.1Vステップ程度ずつ、増加させる。   In FIG. 7B, T1 and T2 are the pulse width and pulse interval of the voltage waveform, T1 is 1 μsec to 10 msec, T2 is 10 μsec to 100 msec, and the peak value of the triangular wave (peak voltage at the time of forming) is 0, for example. Increase by about 1V step.

尚、フォーミング処理の終了は、フォーミング用パルスの間に、導電性膜4を局所的に破壊、変形しない程度の電圧、例えば0.1V程度のパルス電圧を挿入して素子電流を測定し、抵抗値を求め、例えばフォーミング処理前の抵抗の1000倍以上の抵抗を示した時、フォーミングを終了とする。   The forming process is completed by inserting a voltage that does not cause local destruction or deformation of the conductive film 4 between the forming pulses, for example, a pulse voltage of about 0.1 V, and measuring the element current. For example, when the resistance is 1000 times or more of the resistance before the forming process, the forming is finished.

以上説明した亀裂5を形成する際に、素子電極2,3間に三角波パルスを印加してフォーミング処理を行っているが、素子電極2,3間に印加する波形は三角波に限定することはなく、矩形波など所望の波形を用いてもよく、その波高値及びパルス幅、パルス間隔等についても上述の値に限ることなく、亀裂5が良好に形成されるように、電子放出素子の抵抗値等にあわせて、適当な値を選択する。   When forming the crack 5 described above, a forming process is performed by applying a triangular wave pulse between the device electrodes 2 and 3, but the waveform applied between the device electrodes 2 and 3 is not limited to a triangular wave. A desired waveform such as a rectangular wave may be used, and the resistance value of the electron-emitting device is not limited to the above values for the peak value, the pulse width, the pulse interval, and the like so that the crack 5 can be satisfactorily formed. Select an appropriate value according to the above.

〔工程6〕
フォーミングが終了した素子に活性化処理を施す。活性化処理は、炭素化合物含有ガス雰囲気の適当な真空度のもとで、素子電極2,3間に電圧を印加することで行い、この処理により、雰囲気中に存在する炭素化合物から、炭素及び/または炭素化合物を主成分とするカーボン膜6が導電性膜4の亀裂5内に堆積すると同時に、該亀裂5と導電性膜4の端部との交点から高抵抗膜7に向かってカーボン膜6が堆積し、該カーボン膜6が導電性膜4と高抵抗膜7とを接続する。
[Step 6]
An activation process is performed on the element that has been formed. The activation treatment is performed by applying a voltage between the device electrodes 2 and 3 under an appropriate vacuum degree in a carbon compound-containing gas atmosphere. By this treatment, the carbon compound existing in the atmosphere is transformed into carbon and carbon. The carbon film 6 mainly composed of a carbon compound is deposited in the crack 5 of the conductive film 4 and at the same time, the carbon film is directed from the intersection of the crack 5 and the end of the conductive film 4 toward the high resistance film 7. 6 is deposited, and the carbon film 6 connects the conductive film 4 and the high resistance film 7.

ここで、炭素及び/または炭素化合物とは、例えばグラファイト(いわゆるHOPG,PG,GCを包含するものであり、HOPGはほぼ完全なグラファイトの結晶構造、PGは結晶粒が20nm程度で結晶構造がやや乱れたもの、GCは結晶粒が2nm程度になり結晶構造の乱れがさらに大きくなったものを指す。)、及び非晶質カーボン(アモルファスカーボン及び、アモルファスカーボンと前記グラファイトの微結晶の混合物を指す)である。   Here, the carbon and / or the carbon compound includes, for example, graphite (so-called HOPG, PG, and GC, where HOPG is an almost complete crystal structure of graphite, and PG has a crystal grain of about 20 nm and a crystal structure of somewhat. Disturbed, GC refers to a crystal grain having a crystal structure of about 2 nm and further disordered crystal structure.) And amorphous carbon (amorphous carbon and a mixture of amorphous carbon and graphite microcrystals) ).

活性化工程に用いる適当な炭素化合物としては、アルカン、アルケン、アルキンの脂肪族炭化水素類、芳香族炭化水素類、アルコール類、アルデヒド類、ケトン類、アミン類、フェノール、カルボン、スルホン酸等の有機酸類等を挙げることができ、具体的には、メタン、エタン、プロパンなどCn2n+2で表される飽和炭化水素、エチレン、プロピレンなどCn2n等の組成式で表される不飽和炭化水素、ベンゼン、トルエン、メタノール、エタノール、ホルムアルデヒド、アセトアルデヒド、アセトン、メチルエチルケトン、メチルアミン、エチルアミン、フェノール、ベンゾニトリル、トルニトリル、蟻酸、酢酸、プロピオン酸等或いはこれらの混合物を使用できる。 Suitable carbon compounds used in the activation step include alkanes, alkenes, alkyne aliphatic hydrocarbons, aromatic hydrocarbons, alcohols, aldehydes, ketones, amines, phenols, carboxylic acids, sulfonic acids, etc. organic acids can be exemplified, specifically, represented methane, ethane, C n H 2n + 2 represented by a saturated hydrocarbon such as propane, ethylene, a composition formula such as propylene C n H 2n such Unsaturated hydrocarbons, benzene, toluene, methanol, ethanol, formaldehyde, acetaldehyde, acetone, methyl ethyl ketone, methylamine, ethylamine, phenol, benzonitrile, tolunitrile, formic acid, acetic acid, propionic acid, or a mixture thereof can be used.

本工程で用いられる電圧波形を図8に示した。印加電圧の最大値は、10〜24Vの範囲で適宜選択される。図8(a)中、T1は印加電圧のパルス幅、T2はパルス間隔であり、電圧値は正負の絶対値が等しく設定されている。また、図8(b)中のT1,T1’はそれぞれ、印加電圧の正と負のパルス幅、T2はパルス間隔であり、T1>T1’で、電圧値は正負の絶対値が等しく設定されている。尚、活性化時の電圧波形や、印加時間の調整、また炭素雰囲気等の諸条件によって、カーボン膜の堆積状態(堆積領域、厚み等)が決定される。本発明においては、活性化条件を所望に制御することで、導電性膜4と高抵抗膜7とをカーボン膜でつなぐようにすることも可能では有るが、活性化の条件は、所望の電子放出量を得るように設定されるため、活性化によって形成されるカーボンの領域に応じるように、撥水膜31の形成領域を決定するのが好ましい。   The voltage waveform used in this step is shown in FIG. The maximum value of the applied voltage is appropriately selected within a range of 10 to 24V. In FIG. 8A, T1 is the pulse width of the applied voltage, T2 is the pulse interval, and the voltage value is set to have the same positive and negative absolute values. Further, T1 and T1 ′ in FIG. 8B are positive and negative pulse widths of the applied voltage, T2 is a pulse interval, and T1> T1 ′, and the voltage values are set to be equal in absolute value of positive and negative. ing. The deposition state (deposition region, thickness, etc.) of the carbon film is determined by the voltage waveform at the time of activation, adjustment of the application time, and various conditions such as the carbon atmosphere. In the present invention, it is possible to connect the conductive film 4 and the high-resistance film 7 with a carbon film by controlling the activation conditions as desired. Since the discharge amount is set, it is preferable to determine the formation region of the water repellent film 31 so as to correspond to the carbon region formed by activation.

本工程で得られるカーボン膜6は、シート抵抗で換算するとほぼ高抵抗膜7のシート抵抗と同様の1×108〜1×1012Ω/□を有する。また、導電性膜4の端部と高抵抗膜7とを接続するカーボン膜6の膜厚としては、2〜50nm程度が好ましい。 The carbon film 6 obtained in this step has 1 × 10 8 to 1 × 10 12 Ω / □ which is substantially the same as the sheet resistance of the high resistance film 7 in terms of sheet resistance. The film thickness of the carbon film 6 that connects the end of the conductive film 4 and the high resistance film 7 is preferably about 2 to 50 nm.

このような工程を経て得られた電子放出素子は、安定化工程を行うことが好ましい。この工程は、真空容器内の有機物質を排気する工程である。真空容器を排気する真空排気装置は、装置から発生するオイルが素子の特性に影響を与えないように、オイルを使用しないものを用いるのが好ましい。具体的には、ソープションポンプ、イオンポンプ等の真空排気装置を挙げることができる。   The electron-emitting device obtained through such processes is preferably subjected to a stabilization process. This step is a step of exhausting the organic substance in the vacuum vessel. As the vacuum exhaust device for exhausting the vacuum vessel, it is preferable to use a device that does not use oil so that the oil generated from the device does not affect the characteristics of the element. Specifically, a vacuum exhaust apparatus such as a sorption pump or an ion pump can be used.

前記活性化の工程で、排気装置として油拡散ポンプを用い、これから発生するオイル成分に由来する有機物質ガスを用いた場合は、この成分の分圧を極力低く抑える必要がある。真空容器内の有機物質成分の分圧は、上記の炭素及び炭素化合物がほぼ新たに堆積しない分圧で1.3×10-6Pa以下が好ましく、さらには1.3×10-8Pa以下が特に好ましい。さらに真空容器内を排気するときには、真空容器全体を加熱して、真空容器内壁や、電子放出素子に吸着した有機物質分子を排気しやすくするのが好ましい。このときの加熱条件は80〜200℃で5時間以上が望ましいが、特にこの条件に限るものではなく、真空容器の大きさや形状、電子放出素子の構成などの諸条件により適宜選ばれる条件により行う。真空容器内の圧力は極力低くすることが必要で、1.3×10-5Pa以下が好ましく、さらに1.3×10-6Pa以下が特に好ましい。 In the activation step, when an oil diffusion pump is used as an exhaust device and an organic substance gas derived from an oil component to be generated is used, it is necessary to keep the partial pressure of this component as low as possible. The partial pressure of the organic substance component in the vacuum vessel is preferably 1.3 × 10 −6 Pa or less, more preferably 1.3 × 10 −8 Pa or less in terms of partial pressure at which the above carbon and carbon compounds are not newly deposited. Is particularly preferred. Furthermore, when evacuating the inside of the vacuum vessel, it is preferable to heat the entire vacuum vessel so that organic substance molecules adsorbed on the inner wall of the vacuum vessel and the electron-emitting device can be easily evacuated. The heating conditions at this time are preferably 80 to 200 ° C. for 5 hours or longer. However, the heating conditions are not particularly limited, and the heating conditions are appropriately selected according to various conditions such as the size and shape of the vacuum vessel and the configuration of the electron-emitting device. . The pressure in the vacuum vessel needs to be as low as possible, preferably 1.3 × 10 −5 Pa or less, and more preferably 1.3 × 10 −6 Pa or less.

安定化工程を行った後の駆動時の雰囲気は、上記安定化処理終了時の雰囲気を維持するのが好ましいが、これに限るものではなく、有機物質が十分除去されていれば、真空度自体は多少低下しても十分安定な特性を維持することができる。このような真空雰囲気を採用することにより、新たな炭素或いは炭素化合物の堆積を抑制でき、結果として素子電流If、放出電流Ieが、安定する。   The driving atmosphere after the stabilization process is preferably maintained at the end of the stabilization process, but is not limited to this, and the degree of vacuum itself is sufficient if the organic material is sufficiently removed. Can maintain sufficiently stable characteristics even if it is somewhat lowered. By adopting such a vacuum atmosphere, deposition of new carbon or a carbon compound can be suppressed, and as a result, the device current If and the emission current Ie are stabilized.

本発明の電子放出素子の基本特性について図11、図12を用いて説明する。   The basic characteristics of the electron-emitting device of the present invention will be described with reference to FIGS.

図11は、本発明の電子放出素子の電子放出特性を測定するための測定評価装置の概略図である。図中、111は素子に素子電圧Vfを印加するための電源、110は素子電極2,3間の電子放出部を含む導電性膜4を流れる素子電流Ifを測定するための電流計、114は素子の電子放出部より放出される放出電流Ieを捕捉するためのアノード電極、113はアノード電極114に電圧を印加するための高圧電源、112は素子の亀裂5より放出される放出電流Ieを測定するための電流計である。   FIG. 11 is a schematic view of a measurement evaluation apparatus for measuring the electron emission characteristics of the electron-emitting device of the present invention. In the figure, 111 is a power source for applying an element voltage Vf to the element, 110 is an ammeter for measuring the element current If flowing through the conductive film 4 including the electron emission portion between the element electrodes 2 and 3, and 114 is An anode electrode for capturing the emission current Ie emitted from the electron emission portion of the device, 113 is a high voltage power source for applying a voltage to the anode electrode 114, and 112 measures the emission current Ie emitted from the crack 5 of the device. This is an ammeter.

本発明の電子放出素子及びアノード電極114は真空容器内115に設置され、その真空容器には排気ポンプ116及び真空計等の真空装置に必要な機器が具備されており、所望の真空下で本素子の測定評価を行えるようになっている。尚、アノード電極114の電圧は1kV〜10kV、アノード電極114と電子放出素子との距離Hは2mm〜8mmの範囲で測定した。   The electron-emitting device and the anode electrode 114 according to the present invention are installed in a vacuum container 115, and the vacuum container is equipped with devices necessary for a vacuum device such as an exhaust pump 116 and a vacuum gauge. The device can be measured and evaluated. Note that the voltage of the anode electrode 114 was 1 kV to 10 kV, and the distance H between the anode electrode 114 and the electron-emitting device was measured in the range of 2 mm to 8 mm.

図11に示した測定評価装置により測定された放出電流Ie及び素子電流Ifと素子電圧Vfの関係の典型的な例を図12に示す。尚、放出電流Ieと素子電流Ifは大きさが著しく異なるが、図12ではIf、Ieの変化の定性的な比較検討のために、リニアスケールで縦軸を任意単位で表記した。   FIG. 12 shows a typical example of the relationship between the emission current Ie and device current If measured by the measurement evaluation apparatus shown in FIG. 11 and the device voltage Vf. Although the emission current Ie and the device current If are remarkably different in magnitude, in FIG. 12, the vertical axis is expressed in arbitrary units on a linear scale for qualitative comparison of changes in If and Ie.

本発明によって、電子放出素子の複数個を基板上に配列して電子源を構成することができ、さらには該電子源と、電子放出素子から放出された電子によって発光する発光部材とを組み合わせて画像表示装置を構成することができる。   According to the present invention, an electron source can be configured by arranging a plurality of electron-emitting devices on a substrate, and the electron source is combined with a light-emitting member that emits light by electrons emitted from the electron-emitting device. An image display device can be configured.

図10は、本発明の電子源の好ましい実施形態の平面模式図を示し、図中、91は電子源基板(図1の絶縁性基板1に相当する)、92は列方向配線(Y方向配線)、93は層間絶縁層、94は行方向配線(X方向配線)である。   FIG. 10 shows a schematic plan view of a preferred embodiment of the electron source of the present invention, in which 91 is an electron source substrate (corresponding to the insulating substrate 1 of FIG. 1), and 92 is a column-direction wiring (Y-direction wiring). , 93 is an interlayer insulating layer, and 94 is a row direction wiring (X direction wiring).

本発明の電子源の製造方法は、基本的には先に説明した本発明の電子放出素子の製造方法と同様であり、図9に示すように、絶縁性の電子源基板91上に素子電極2,3からなる電極対を複数個形成した後、素子電極3を列毎に共通に接続する列方向配線92、列方向配線92と行方向配線94を電気的に絶縁するための層間絶縁層93、素子電極2を行毎に共通に接続する行方向配線94をそれぞれ形成し、次いで、図2,図3の工程により、各電極対に導電性膜4を形成(ユニットを形成)し、該導電性膜4を覆う撥水膜31を形成する。列方向配線92、行方向配線94は、真空蒸着法、印刷法、スパッタ法等で形成し、所望のパターンとした導電性金属等からなり、多数の電子放出素子にほぼ均等な電圧が供給される様に、材料、膜厚、配線幅が設定される。   The manufacturing method of the electron source of the present invention is basically the same as the manufacturing method of the electron-emitting device of the present invention described above. As shown in FIG. 9, the device electrode is formed on the insulating electron source substrate 91. After forming a plurality of electrode pairs of 2 and 3, a column-direction wiring 92 for commonly connecting the element electrodes 3 for each column, and an interlayer insulating layer for electrically insulating the column-direction wiring 92 and the row-direction wiring 94 93, each of the row direction wirings 94 for connecting the element electrodes 2 in common for each row is formed, and then the conductive film 4 is formed on each electrode pair (unit is formed) by the steps of FIGS. A water repellent film 31 is formed to cover the conductive film 4. The column direction wiring 92 and the row direction wiring 94 are formed of a conductive metal or the like having a desired pattern formed by a vacuum deposition method, a printing method, a sputtering method, or the like, and a substantially uniform voltage is supplied to a large number of electron-emitting devices. Thus, the material, film thickness, and wiring width are set.

次いで、図5,図6に示した工程により、高抵抗膜の前駆体41を基板91上に付与し、焼成して、図10に示すように、撥水膜31で除去された領域、即ち各ユニットの導電性膜4と該導電性膜4の端部より所定の距離を含む領域を除いて、基板91、素子電極2,3、さらに配線92,94を高抵抗膜7で覆う。   5 and 6, the high resistance film precursor 41 is applied onto the substrate 91 and baked. As shown in FIG. 10, the region removed by the water repellent film 31, that is, The high resistance film 7 covers the substrate 91, the device electrodes 2 and 3, and the wirings 92 and 94 except for the conductive film 4 of each unit and the region including a predetermined distance from the end of the conductive film 4.

このようにして製造される電子源を用いた本発明の画像表示装置の好ましい実施形態を図13に示す。図13は画像表示装置の表示パネルを部分的に切り欠いて基本構成を模式的に示した斜視図である。図13において、132は電子源基体91を固定したリアプレート、131はガラス基板136の内面に蛍光膜137とメタルバック138等が形成されたフェースプレート、133は支持枠、134はスペーサー、139は電子放出素子である。尚、便宜上、電子源基板91上の高抵抗膜は省略した。図13のパネルにおいては、リアプレート132、支持枠133及びフェースプレート131をフリットガラスを塗布し、大気中或いは、窒素中で、400〜500℃で、10分以上焼成することで封着して、外囲器を構成する。   FIG. 13 shows a preferred embodiment of the image display device of the present invention using the electron source thus manufactured. FIG. 13 is a perspective view schematically showing the basic configuration by partially cutting away the display panel of the image display apparatus. In FIG. 13, 132 is a rear plate to which the electron source substrate 91 is fixed, 131 is a face plate in which a fluorescent film 137 and a metal back 138 are formed on the inner surface of a glass substrate 136, 133 is a support frame, 134 is a spacer, 139 is An electron-emitting device. For convenience, the high resistance film on the electron source substrate 91 is omitted. In the panel of FIG. 13, the rear plate 132, the support frame 133, and the face plate 131 are sealed by applying frit glass and baking in air or nitrogen at 400 to 500 ° C. for 10 minutes or more. The envelope is configured.

外囲器は、上述の如く、フェースプレート131、支持枠133、リアプレート132で構成したが、リアプレート132は主に電子源基板91の強度を補強する目的で設けられるため、基板91自体で十分な強度を持つ場合は別体のリアプレート132は不要であり、基板91に直接支持枠133を封着し、フェースプレート131、支持枠133及び基板91で外囲器を構成してもよい。   As described above, the envelope is composed of the face plate 131, the support frame 133, and the rear plate 132. However, since the rear plate 132 is provided mainly for the purpose of reinforcing the strength of the electron source substrate 91, the substrate 91 itself is used. If it has sufficient strength, the separate rear plate 132 is not necessary, and the support frame 133 may be directly sealed on the substrate 91, and the face plate 131, the support frame 133, and the substrate 91 may constitute an envelope. .

図13のパネルにおいては、フェースプレート131、リアプレート132間に、スペーサー134と呼ばれる支持体を設置することにより、大気圧に対して十分な強度を持つ外囲器を構成している。   In the panel of FIG. 13, an envelope having sufficient strength against atmospheric pressure is configured by installing a support body called a spacer 134 between the face plate 131 and the rear plate 132.

フェースプレート131には、さらに蛍光膜137の導電性を高めるため、蛍光膜137の外面側に透明電極(不図示)を設けてもよい。   In order to further increase the conductivity of the fluorescent film 137, a transparent electrode (not shown) may be provided on the face plate 131 on the outer surface side of the fluorescent film 137.

外囲器は、不図示の排気管を通じ、1.3×10-5Pa程度の真空度にした後、封止が行われる。また、外囲器の封止後の真空度を維持するために、ゲッター処理を行う場合もある。これは、外囲器の封止を行う直前或いは封止後に、抵抗加熱或いは高周波加熱等の加熱法により、外囲器内の所定の位置に配置されたゲッター(不図示)を加熱し、蒸着膜を形成する処理である。ゲッターは通常Ba等が主成分であり、該蒸着膜の吸着作用により、例えば1.3×10-3Pa〜1.3×10-5Paの真空度を維持するものである。 The envelope is sealed after the degree of vacuum is about 1.3 × 10 −5 Pa through an exhaust pipe (not shown). In addition, a getter process may be performed to maintain the degree of vacuum after sealing the envelope. This is because vapor deposition is performed by heating a getter (not shown) disposed at a predetermined position in the envelope by a heating method such as resistance heating or high-frequency heating immediately before or after sealing the envelope. This is a process for forming a film. The getter usually contains Ba or the like as a main component, and maintains a degree of vacuum of, for example, 1.3 × 10 −3 Pa to 1.3 × 10 −5 Pa by the adsorption action of the deposited film.

以上により完成した画像表示装置において、各電子放出素子139には、容器外端子Dx1〜Dxm、Dy1〜Dynより行方向配線94及び列方向配線92に電圧を印加することにより、電子放出させ、高圧端子Hvを通じ、メタルバック138或いは透明電極(不図示)に数kV以上の高圧を印加し、電子ビームを加速し、蛍光膜137に衝突させ、励起・発光させることで画像を表示するものである。   In the image display device completed as described above, each electron-emitting device 139 emits electrons by applying a voltage from the external terminals Dx1 to Dxm and Dy1 to Dyn to the row direction wiring 94 and the column direction wiring 92, thereby generating high voltage. A voltage of several kV or higher is applied to the metal back 138 or transparent electrode (not shown) through the terminal Hv, the electron beam is accelerated, collides with the fluorescent film 137, and is excited and emitted to display an image. .

尚、以上述べた構成は、表示等に用いられる好適な画像表示装置を作製する上で必要な概略構成であり、例えば各部材の材料等、詳細な部分は上述内容に限られるものではなく、画像表示装置の用途に適するよう適宜選択する。   The configuration described above is a schematic configuration necessary for producing a suitable image display device used for display or the like. For example, detailed parts such as materials of each member are not limited to the above-described contents. It selects suitably so that it may suit the use of an image display apparatus.

(実施例1)
図10に示した構成の電子源を、図2〜図6に示した工程に従って作製した。
Example 1
The electron source having the configuration shown in FIG. 10 was produced according to the steps shown in FIGS.

電子源基板91として、アルカリ成分が少ないPD200(旭ガラス(株)社製)の2.8mm厚ガラスの上にナトリウムブロック層としてSiO2膜100nmを塗布焼成したものを用いた。 As the electron source substrate 91 used was coated calcining SiO 2 film 100nm as the sodium blocking layer on a 2.8mm thick glass PD200 alkali components is small (manufactured by Asahi Glass Co.).

上記基板91上にスパッタリング法によってまず下引層としてTiを5nm、その上にPtを40nmの厚さにそれぞれ成膜した後、フォトレジストを塗布し、露光、現像、エッチングという一連のフォトリソグラフィー法によってパターニングし、素子電極2,3を形成した。   First, a Ti film having a thickness of 5 nm and a Pt film having a thickness of 40 nm are formed on the substrate 91 as a subbing layer by sputtering, and then a photoresist is applied, followed by exposure, development, and etching. To form device electrodes 2 and 3.

Agペースト(ノリタケカンパニー製)を用い、素子電極3に接する厚さ約10μm、線幅50μmのライン状のパターンをスクリーン印刷法で印刷し、その後580℃、8分で焼成し、列方向配線92を形成した。   Using an Ag paste (manufactured by Noritake Company), a line-shaped pattern having a thickness of about 10 μm and a line width of 50 μm in contact with the device electrode 3 is printed by a screen printing method, and then baked at 580 ° C. for 8 minutes. Formed.

次に、行方向配線94と列方向配線92を絶縁するために層間絶縁層93を形成した。本例ではペースト材料としてPbOを主成分としてガラスバインダーを混合したものを使用し、列方向配線92と同様にスクリーン印刷法で印刷し、580℃、8分の焼成工程を、絶縁性を確保するために2回繰り返して行った。この層間絶縁層93の厚みは約30μm、線幅150μmで形成した。この時、行方向配線94と素子電極2が接触できるように絶縁層93にはコンタクトホールを形成した。   Next, an interlayer insulating layer 93 was formed in order to insulate the row direction wiring 94 from the column direction wiring 92. In this example, a paste material containing PbO as a main component and a glass binder is used, and printing is performed by the screen printing method in the same manner as the column-direction wiring 92, and a baking process at 580 ° C. for 8 minutes is ensured for insulation. For this reason, the test was repeated twice. The interlayer insulating layer 93 was formed with a thickness of about 30 μm and a line width of 150 μm. At this time, a contact hole was formed in the insulating layer 93 so that the row direction wiring 94 and the element electrode 2 could be in contact with each other.

上記絶縁層93の上に、列方向配線と同様のAgペーストを用いてスクリーン印刷法で素子電極2に接するライン状のパターンを印刷し、480℃、10分で焼成し、行方向配線94を形成した。配線の厚さは約15μmとした。   On the insulating layer 93, a line-shaped pattern in contact with the element electrode 2 is printed by screen printing using the same Ag paste as the column-direction wiring, and baked at 480 ° C. for 10 minutes. Formed. The thickness of the wiring was about 15 μm.

図示していないが、外部駆動回路への引き出し端子もこれと同様の方法で形成した。   Although not shown, the lead terminal to the external drive circuit was also formed by the same method.

素子電極2,3の間にインクジェット塗布方法により導電性膜4を形成した。本工程では基板91上における個々の素子電極2,3の平面的ばらつきを補償するために、基板91上の数箇所においてパターンの配置ずれを観測し、観測結果に基づいて、導電性膜材料を含む溶液を塗付する事によって、全画素の位置ずれをなくして、対応した位置に的確に塗付するようにした。   A conductive film 4 was formed between the device electrodes 2 and 3 by an ink jet coating method. In this step, in order to compensate for the planar variations of the individual device electrodes 2 and 3 on the substrate 91, pattern misalignment is observed at several locations on the substrate 91, and the conductive film material is selected based on the observation results. By applying the solution containing it, the positional deviation of all the pixels was eliminated, and it was applied accurately at the corresponding position.

本例では、導電性膜4としてPd膜を得る目的で、先ず水85質量%:イソプロピルアルコール(IPA)15質量%からなる水溶液に、Pd−プロリン錯体0.15質量%を溶解し、有機パラジウム含有溶液を得た。この他若干の添加剤を加えた。   In this example, for the purpose of obtaining a Pd film as the conductive film 4, first, 0.15% by mass of Pd-proline complex is dissolved in an aqueous solution composed of 85% by mass of water and 15% by mass of isopropyl alcohol (IPA) to prepare organic palladium. A containing solution was obtained. In addition, some additives were added.

この溶液の液滴を、液滴付与手段として、ピエゾ素子を用いたインクジェット噴射装置を用い、ドット径が60μmとなるように液滴量を調整して素子電極2,3間に付与した。その後この基板91を空気中にて、350℃で30分間の加熱焼成処理をしてPdOとした。焼成完了後のドットの直径(図2のW1)は約60μm、厚みは最大で10nmの導電性膜4が得られた。   The droplets of this solution were applied between the device electrodes 2 and 3 by adjusting the amount of the droplets so that the dot diameter was 60 μm using an ink jet ejecting apparatus using a piezoelectric element as a droplet applying unit. Thereafter, the substrate 91 was heated and fired at 350 ° C. for 30 minutes in the air to obtain PdO. The conductive film 4 having a dot diameter (W1 in FIG. 2) of about 60 μm and a maximum thickness of 10 nm after firing was obtained.

次いで、導電性膜4の上にさらにインクジェット法により撥水膜31を形成した。インクとして、シランカップリング材(DDS)を用い、導電性膜4の端部から1.5μm広がるように直径63μmの大きさに形成した。   Next, a water repellent film 31 was further formed on the conductive film 4 by an ink jet method. A silane coupling material (DDS) was used as the ink, and was formed to have a diameter of 63 μm so as to spread 1.5 μm from the end of the conductive film 4.

高抵抗膜の前駆体41として、酸化スズの微粒子を分散させた微粒子分散系溶液をスプレー塗布により、基板91全面に均一に塗布した。この時、撥水膜31上では高抵抗膜の前駆体41がはじかれていた。塗布された高抵抗膜材41を、380℃で30分間、乾燥、焼成し、高抵抗膜7を得た。また、撥水膜31はベークの熱によりほぼ焼失していた。得られた高抵抗膜7はシート抵抗で1.2×1010Ω/□であった。 As the high-resistance film precursor 41, a fine particle dispersion solution in which fine particles of tin oxide were dispersed was uniformly applied to the entire surface of the substrate 91 by spray coating. At this time, the precursor 41 of the high resistance film was repelled on the water repellent film 31. The applied high resistance film material 41 was dried and baked at 380 ° C. for 30 minutes to obtain a high resistance film 7. Further, the water repellent film 31 was almost burned out by the heat of baking. The obtained high resistance film 7 had a sheet resistance of 1.2 × 10 10 Ω / □.

若干の水素を導入した還元雰囲気において、図7の(a)の電圧波形で、T1を1msec、T2を80msecに設定し、フォーミング処理を行った。フォーミング処理の終了は、フォーミング用パルスの間に、導電性膜を局所的に破壊、変形しない程度の電圧、例えば0.1V程度のパルス電圧を挿入して素子電流を測定し、抵抗値を求め、フォーミング処理前の抵抗に対して1000倍以上の抵抗を示した時点で、フォーミングを終了とした。   In a reducing atmosphere into which some hydrogen was introduced, the forming process was performed with T1 set to 1 msec and T2 set to 80 msec in the voltage waveform of FIG. At the end of the forming process, a voltage at which the conductive film is not locally broken or deformed between the forming pulses, for example, a pulse voltage of about 0.1 V is inserted to measure the element current to obtain the resistance value. The forming was terminated when a resistance of 1000 times or more with respect to the resistance before the forming process was shown.

本例では、上記のフォーミング処理により、導電性膜4には端部から端部まで切れ残り現象のない亀裂5が形成されていた。   In this example, the crack 5 having no uncut phenomenon was formed in the conductive film 4 from end to end by the forming process.

次に、活性化工程を行った。カーボン源としてトルニトリルを用い、スローリークバルブを通して真空空間内に導入し、1.3×10-4Paを維持した。この状態で、図8の(a)の電圧波形で、T1を1msec、T2を20msec、電圧値の絶対値を22Vに設定して電圧パルスを印加し、導電性膜4の端部と亀裂5の交点から高抵抗膜7に達するようにカーボン膜6を堆積させた。電圧パルス印加から約60分後に放出電流Ieがほぼ飽和に達した時点で通電を停止し、スローリークバルブを閉め、活性化処理を終了した。得られた電子放出素子を図1に示す。 Next, an activation process was performed. Tolunitrile was used as a carbon source and introduced into the vacuum space through a slow leak valve to maintain 1.3 × 10 −4 Pa. In this state, in the voltage waveform of FIG. 8 (a), T1 is set to 1 msec, T2 is set to 20 msec, the absolute value of the voltage value is set to 22 V, and a voltage pulse is applied. The carbon film 6 was deposited so as to reach the high resistance film 7 from the intersection of the two. Energization was stopped when the emission current Ie almost reached saturation about 60 minutes after the voltage pulse application, the slow leak valve was closed, and the activation process was completed. The obtained electron-emitting device is shown in FIG.

得られたカーボン膜6のサンプルを分析した結果、導電性膜4と高抵抗膜7の間のカーボン膜6はシート抵抗で換算するとほぼ高抵抗膜と同じ1.0×1010Ω/□のシート抵抗を有することが分かった。また、カーボン膜の膜厚としては15nm程度であった。 As a result of analyzing a sample of the obtained carbon film 6, the carbon film 6 between the conductive film 4 and the high resistance film 7 is approximately 1.0 × 10 10 Ω / □ which is almost the same as the high resistance film when converted in terms of sheet resistance. It was found to have sheet resistance. The film thickness of the carbon film was about 15 nm.

本例の電子源の電子放出特性を図11の測定評価装置を用いて評価した。素子電極2,3間に印加する電圧は17Vを標準電圧として測定した。その時の行方向配線94側の走査線電圧は−11Vとし、列方向配線92側の信号線電圧は+6Vとした。アノード電極114と電子源との間に印加するVaは1kVで測定した結果、If=1mA、Ie=1.2μA、効率=0.12%の値を得た。この時選択されていない素子には非選択電圧として6Vが印加されることになる。図12に示すI−V特性曲線から分かるように、非選択電圧印加時においても素子には素子電流Ifが流れることとなり、駆動ICにはこの非選択電流が非選択素子の数だけ流れることになる。   The electron emission characteristics of the electron source of this example were evaluated using the measurement evaluation apparatus shown in FIG. The voltage applied between the device electrodes 2 and 3 was measured using 17 V as a standard voltage. At that time, the scanning line voltage on the row direction wiring 94 side was set to -11V, and the signal line voltage on the column direction wiring 92 side was set to + 6V. As a result of measuring Va applied between the anode electrode 114 and the electron source at 1 kV, values of If = 1 mA, Ie = 1.2 μA, and efficiency = 0.12% were obtained. At this time, 6 V is applied as a non-selection voltage to the element not selected. As can be seen from the IV characteristic curve shown in FIG. 12, the element current If flows through the element even when the non-selection voltage is applied, and the non-selection current flows through the drive IC by the number of the non-selected elements. Become.

本例のような導電性膜4が高抵抗膜7との間に距離を有する電子源においては、非選択の電子放出素子に6Vが印加された場合でもそのリーク電流は0.1μA以下と非常に微弱なものであり、駆動ドライバICへの負荷はほとんど問題ならないものであった。   In an electron source having a distance between the conductive film 4 and the high resistance film 7 as in this example, even when 6 V is applied to a non-selected electron-emitting device, the leakage current is as low as 0.1 μA or less. The load on the drive driver IC is hardly a problem.

同時に電子放出素子近傍の帯電状態も電子放出効率の変動と言う形で計測したが、帯電による効率変動もなく、放電による素子ダメージも観測されなかった。   At the same time, the state of charge in the vicinity of the electron-emitting device was also measured in the form of fluctuations in electron emission efficiency.

(実施例2)
本実施例においては、導電性膜4を形成した後、高抵抗膜の前駆体41を先に基板91全面に塗布し、次に各ユニットの導電性膜4上に撥水膜31の材料溶液をインクジェット方式で付与して該導電性膜4上の高抵抗膜の前駆体41を除去する以外は、実施例1と同様にして電子源を作製した。
(Example 2)
In this embodiment, after the conductive film 4 is formed, a high-resistance film precursor 41 is first applied to the entire surface of the substrate 91, and then the material solution of the water repellent film 31 on the conductive film 4 of each unit. Was prepared in the same manner as in Example 1 except that the high-resistance film precursor 41 on the conductive film 4 was removed by an inkjet method.

得られた電子源は、各電子放出素子において、導電性膜4の端部と亀裂5の交点から高抵抗膜7に達するカーボン膜6が形成されており、高抵抗膜7及びカーボン膜6のシート抵抗は実施例1と同様であった。また、得られた電子源の電子放出特性を実施例1と同様にして評価したところ、実施例1と同様の結果が得られた。   In the obtained electron source, in each electron-emitting device, a carbon film 6 reaching the high resistance film 7 from the intersection of the end of the conductive film 4 and the crack 5 is formed, and the high resistance film 7 and the carbon film 6 The sheet resistance was the same as in Example 1. Further, when the electron emission characteristics of the obtained electron source were evaluated in the same manner as in Example 1, the same result as in Example 1 was obtained.

(比較例)
撥水膜31を形成せずに、スプレー塗布方法で基板91全面に高抵抗膜7を形成する以外は実施例1と同様にして電子源を作製した。フォーミング後の電子放出素子をSEM(走査型電子顕微鏡)で観察したところ、導電性膜4の端部まで亀裂5が形成されておらず、いわゆる切れ残り状態を発生していた。また、活性化後の電子放出素子をSEMで観察したところ導電性膜4の端部で高抵抗膜7の上に活性化で生じるカーボンが大量に堆積していた。得られた電子源の電子放出特性を実施例1と同様にして評価したところ、非選択時に流れるリーク電流は初期ですでに1〜2mA/Lineに達し、駆動とともにさらに上昇し、ついには駆動用ドライバICの容量オーバーとなり、表示パネルを構成した際に暗線結果が多数発生するようになった。
(Comparative example)
An electron source was produced in the same manner as in Example 1 except that the high resistance film 7 was formed on the entire surface of the substrate 91 by the spray coating method without forming the water repellent film 31. When the electron-emitting device after forming was observed with an SEM (scanning electron microscope), the crack 5 was not formed up to the end of the conductive film 4, and a so-called uncut state was generated. Further, when the activated electron-emitting device was observed with an SEM, a large amount of carbon generated by activation was deposited on the high resistance film 7 at the end of the conductive film 4. The electron emission characteristics of the obtained electron source were evaluated in the same manner as in Example 1. As a result, the leakage current that flowed at the time of non-selection already reached 1 to 2 mA / Line in the initial stage, and further increased with driving, and finally for driving. The capacity of the driver IC is over, and many dark line results are generated when the display panel is constructed.

本発明の電子放出素子の好ましい実施形態の構成を示す模式図である。It is a schematic diagram which shows the structure of preferable embodiment of the electron emission element of this invention. 図1の電子放出素子の製造工程を示す模式図である。It is a schematic diagram which shows the manufacturing process of the electron emission element of FIG. 図1の電子放出素子の製造工程を示す模式図である。It is a schematic diagram which shows the manufacturing process of the electron emission element of FIG. 図1の電子放出素子の製造工程を示す模式図である。It is a schematic diagram which shows the manufacturing process of the electron emission element of FIG. 図1の電子放出素子の製造工程を示す模式図である。It is a schematic diagram which shows the manufacturing process of the electron emission element of FIG. 図1の電子放出素子の製造工程を示す模式図である。It is a schematic diagram which shows the manufacturing process of the electron emission element of FIG. 本発明の電子放出素子の製造方法に用いるフォーミング電圧波形を示す図である。It is a figure which shows the forming voltage waveform used for the manufacturing method of the electron-emitting element of this invention. 本発明の電子放出素子の製造方法に用いる活性化電圧波形を示す図である。It is a figure which shows the activation voltage waveform used for the manufacturing method of the electron-emitting element of this invention. 本発明の電子源の好ましい実施形態の製造工程を示す図である。It is a figure which shows the manufacturing process of preferable embodiment of the electron source of this invention. 本発明の電子源の好ましい実施形態の構成を示す模式図である。It is a schematic diagram which shows the structure of preferable embodiment of the electron source of this invention. 本発明の電子放出素子の電子放出特性の測定評価装置の構成を示す模式図である。It is a schematic diagram which shows the structure of the measurement evaluation apparatus of the electron emission characteristic of the electron emission element of this invention. 本発明の電子放出素子の電子放出特性を示す図である。It is a figure which shows the electron emission characteristic of the electron-emitting element of this invention. 本発明の画像表示装置の好ましい実施形態の表示パネルの構成を示す模式図である。It is a schematic diagram which shows the structure of the display panel of preferable embodiment of the image display apparatus of this invention.

符号の説明Explanation of symbols

1 絶縁性基板
2,3 素子電極
4 導電性膜
5 亀裂
6 カーボン膜
7 高抵抗膜
31 撥水膜
41 高抵抗膜材
51 高抵抗膜材のない領域
91 電子源基板
92 列方向配線
93 層間絶縁層
94 行方向配線
110,112 電流計
111,113 電源
115 真空容器
116 排気ポンプ
131 フェースプレート
132 リアプレート
133 側壁
134 スペーサー
136 ガラス基板
137 蛍光膜
138 メタルバック
139 電子放出素子
DESCRIPTION OF SYMBOLS 1 Insulating board | substrate 2,3 Element electrode 4 Conductive film 5 Crack 6 Carbon film 7 High resistance film 31 Water repellent film 41 High resistance film material 51 Area | region without a high resistance film material 91 Electron source substrate 92 Column direction wiring 93 Interlayer insulation Layer 94 Row-direction wiring 110, 112 Ammeter 111, 113 Power source 115 Vacuum vessel 116 Exhaust pump 131 Face plate 132 Rear plate 133 Side wall 134 Spacer 136 Glass substrate 137 Fluorescent film 138 Metal back 139 Electron emitting device

Claims (8)

絶縁性基板と、
該絶縁性基板上に配置された一対の素子電極と、
前記一対の素子電極間に跨って配置され、一部に亀裂を有する導電性膜と、
前記導電性膜の端部と前記亀裂との交点から前記絶縁性基板上に渡る領域、及び前記亀裂部分に位置するカーボン膜と、
前記一対の素子電極と電気的に接続し、前記導電性膜の端部より所定の距離を含む領域を除いて、絶縁性基板を覆う高抵抗膜とを有する電子放出素子であって、
前記導電性膜の端部と前記亀裂との交点から前記絶縁性基板上に渡る領域に位置する前記カーボン膜は、前記高抵抗膜と接触していることを特徴とする電子放出素子。
An insulating substrate;
A pair of device electrodes disposed on the insulating substrate;
A conductive film disposed between the pair of element electrodes and partially cracked;
A region extending over the insulating substrate from the intersection of the edge of the conductive film and the crack, and a carbon film located in the crack portion;
An electron-emitting device having a high resistance film that is electrically connected to the pair of device electrodes and covers an insulating substrate except for a region including a predetermined distance from an end of the conductive film,
The electron-emitting device, wherein the carbon film located in a region extending from the intersection of the end portion of the conductive film and the crack to the insulating substrate is in contact with the high resistance film.
前記高抵抗膜のシート抵抗が1×108〜1×1012Ω/□である請求項1に記載の電子放出素子。 2. The electron-emitting device according to claim 1, wherein the high-resistance film has a sheet resistance of 1 × 10 8 to 1 × 10 12 Ω / □. 前記導電性膜の端部と前記亀裂との交点から前記絶縁性基板上に渡る領域に位置する前記カーボン膜のシート抵抗が1×108〜1×1012Ω/□である請求項1または2に記載の電子放出素子。 The sheet resistance of the carbon film located in a region extending on the insulating substrate from the intersection of the end of the conductive film and the crack is 1 × 10 8 to 1 × 10 12 Ω / □. 3. The electron-emitting device according to 2. 前記導電性膜の端部と前記亀裂との交点から前記絶縁性基板上に渡る領域に位置する前記カーボン膜の厚さが50nm以下である請求項1〜3のいずれかに記載の電子放出素子。   4. The electron-emitting device according to claim 1, wherein a thickness of the carbon film located in a region extending on the insulating substrate from an intersection between an end portion of the conductive film and the crack is 50 nm or less. . 絶縁性基板上に、複数の電子放出素子と、該電子放出素子を接続する配線とを備えた電子源であって、該電子放出素子が請求項1〜4のいずれかに記載の電子放出素子であることを特徴とする電子源。   An electron source comprising a plurality of electron-emitting devices and wiring connecting the electron-emitting devices on an insulating substrate, the electron-emitting devices according to any one of claims 1 to 4 An electron source characterized by 絶縁性基板上に、複数の電子放出素子と、該電子放出素子を接続する配線とを備えた電子源、及び、上記電子放出素子から放出された電子の照射によって発光する発光部材を備えた画像表示装置であって、前記電子源が請求項5に記載の電子源であることを特徴とする画像表示装置。   An image including an electron source including a plurality of electron-emitting devices and wiring connecting the electron-emitting devices on a insulating substrate, and a light-emitting member that emits light by irradiation of electrons emitted from the electron-emitting devices. An image display device, wherein the electron source is the electron source according to claim 5. 電子放出素子の製造方法であって、
絶縁性基板上に、一対の素子電極と、該一対の素子電極間に渡る導電性膜とを形成する工程と、
前記導電性膜上及び該導電性膜の端部から前記絶縁性基板上の一部に渡って撥水膜を形成する工程と、
前記撥水膜の形成領域を除く前記絶縁性基板上、及び前記一対の素子電極上に高抵抗膜の前駆体を形成する工程と、
前記撥水膜及び前記高抵抗膜の前駆体が形成された前記絶縁性基板を焼成し、該高抵抗膜の前駆体から、前記導電性膜と距離を隔てた高抵抗膜を形成する工程と、
前記一対の素子電極を介して前記導電性膜に通電し、該導電性膜の一部に亀裂を形成する工程と、
炭素を含有するガス雰囲気下において、前記一対の素子電極を介して前記亀裂を有する導電性膜に通電し、該亀裂部分、及び該導電性膜の端部と該亀裂との交点から前記高抵抗膜におよぶ前記絶縁性基板上の領域にカーボン膜を形成する工程、
とを有することを特徴とする電子放出素子の製造方法。
A method for manufacturing an electron-emitting device, comprising:
Forming a pair of element electrodes and a conductive film between the pair of element electrodes on an insulating substrate;
Forming a water repellent film over the conductive film and over a portion of the conductive film from an end of the conductive film;
Forming a precursor of a high resistance film on the insulating substrate excluding a region where the water repellent film is formed, and on the pair of element electrodes;
Firing the insulating substrate on which the water repellent film and the precursor of the high resistance film are formed, and forming a high resistance film at a distance from the conductive film from the precursor of the high resistance film; ,
Energizing the conductive film through the pair of element electrodes to form a crack in a part of the conductive film;
In a gas atmosphere containing carbon, the conductive film having the crack is energized through the pair of element electrodes, and the high resistance is obtained from the crack portion and the intersection of the end portion of the conductive film and the crack. Forming a carbon film in a region on the insulating substrate extending over the film;
A method for manufacturing an electron-emitting device, comprising:
電子放出素子の製造方法であって、
絶縁性基板上に、一対の素子電極と、該一対の素子電極間に渡る導電性膜とを形成する工程と、
前記導電性膜上及び該導電性膜の端部から前記絶縁性基板上に渡って高抵抗膜の前駆体を形成する工程と、
前記高抵抗膜の前駆体が形成された絶縁性基板上の、前記導電性膜の形成領域及び該導電性膜の端部から前記絶縁性基板上の一部の領域に撥水膜を形成する工程と、
前記撥水膜及び前記高抵抗膜の前駆体が形成された前記絶縁性基板を焼成し、該高抵抗膜の前駆体から、前記導電性膜と距離を隔てた高抵抗膜を形成する工程と、
前記一対の素子電極を介して前記導電性膜に通電し、該導電性膜の一部に亀裂を形成する工程と、
炭素を含有するガス雰囲気下において、前記一対の素子電極を介して前記亀裂を有する導電性膜に通電し、該亀裂部分、及び該導電性膜の端部と該亀裂との交点から前記高抵抗膜におよぶ前記絶縁性基板上の領域にカーボン膜を形成する工程、
とを有することを特徴とする電子放出素子の製造方法。
A method for manufacturing an electron-emitting device, comprising:
Forming a pair of element electrodes and a conductive film between the pair of element electrodes on an insulating substrate;
Forming a precursor of a high resistance film on the conductive film and from the end of the conductive film to the insulating substrate;
A water-repellent film is formed on the insulating substrate on which the precursor of the high-resistance film is formed, on the conductive film forming region and a part of the insulating substrate from the end of the conductive film. Process,
Firing the insulating substrate on which the water repellent film and the precursor of the high resistance film are formed, and forming a high resistance film at a distance from the conductive film from the precursor of the high resistance film; ,
Energizing the conductive film through the pair of element electrodes to form a crack in a part of the conductive film;
In a gas atmosphere containing carbon, the conductive film having the crack is energized through the pair of element electrodes, and the high resistance is obtained from the crack portion and the intersection of the end portion of the conductive film and the crack. Forming a carbon film in a region on the insulating substrate extending over the film;
A method for manufacturing an electron-emitting device, comprising:
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