JP2006013108A - Integrated circuit and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To form an integrated circuit to be used in actual, using a p-type FET which is formed of a polymer system organic semiconductor material. <P>SOLUTION: Only a p-type FET is used as a transistor to form an integrated circuit. As an example of a base circuit, (a) an inverter circuit, (b) an AND circuit, and (c) an OR circuit, are illustrated. In this figure, numerals 1 to 12 are p-type FETs. It is also possible to form an analog amplifier which is formed only of the p-type FET and uses a source follower circuit using only the p-type FET to an output circuit. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an integrated circuit using a field effect transistor using a polymer-based p-type organic semiconductor material, and more particularly to an organic semiconductor transistor that can be manufactured by a simple method such as an inkjet printing method by using a polymer-based organic semiconductor. The present invention relates to an integrated circuit applicable to an amplifier circuit and a digital circuit used, and a driving element such as a liquid crystal display using the same, and a manufacturing method thereof.

  Conventionally, many patents have been filed for the configuration of C-type FETs (complementary field effect transistors) using pn bipolar materials for oligomers rather than polymers. For example, there is JP-A-2002-324931 (Patent Document 1) filed by Lucent Technologies Inc.

  Many patents using pn bipolar materials have been filed to construct C-type FETs or bipolar transistors. However, it is not currently possible to find a content that consists only of pMOS.

JP 2002-324931 A

  Conventionally, high-speed performance is usually pursued. However, in inorganic semiconductors, pn-channel materials are not in principle present, and p-channel FETs with low speed are used for parts that do not affect high-speed performance. I used it. Further, the channel for increasing the speed is an n-channel related to electron conduction, and there is no integrated circuit using only the p-channel.

In the following, the problems of the prior art and available technologies are listed.
(A) The polymer-based organic semiconductor material has a high degree of freedom in material development that a derivative that is easily soluble in a solvent can be easily produced.
(B) Therefore, it is easy to apply using ink jet or printing technology.

(C) Examples of organic semiconductor materials that are not polymers include pentacene and anthracene. Since these are relatively insoluble in organic solvents and an organic semiconductor layer is produced by vapor deposition, the production requires a vacuum process as in the case of inorganic systems, which is troublesome.

(D) As described above, the polymer-based organic semiconductor material is practically only a p-type semiconductor (at least at present).
(E) Even if an n-type polymer organic semiconductor material can be produced in the future, it is not always useful because of its low mobility, and an FET made of an organic semiconductor is produced by improvements based on the current p-type circuit configuration. What you can do is very useful.

(F) Therefore, it is necessary not to use a C-type FET configuration that requires both pn type semiconductors.
(G) For this reason, a circuit composed only of a p-type FET is required.

(H) Especially in the case of an analog amplifier, it is desirable to configure a C-type FET with extremely high power efficiency (FIG. 2 (b) (d) corresponds to (c) in FIG. 2 (a)). Since the organic semiconductor material is only a p-type semiconductor, a voltage is output using a source follower or the like.

(I) As described above, it seems to be particularly well known that a large number of n-channels on one side are used even in inorganic semiconductors (silicon-based, compound semiconductor-based, etc.) for speeding up.

(J) However, when speeding up is a target, not all transistors are used as one, but many have a strong meaning of using them as much as possible in a part that affects the speed of the circuit.

(K) In inorganic semiconductors, the effective mobility differs only by a few times, so if the usage is selected, it is not always necessary to use one type of semiconductor for all.

(L) Also, even in the case of a circuit using a bipolar transistor (although not directly related to the FET), the carrier travel distance is long in order to speed up even a little by using only the horizontal type for ease of fabrication. In many cases, an npn type having an n type on the source side and the collector side is used, and such a circuit has been frequently used.

(M) However, inorganic semiconductors have never used a circuit composed solely of pFETs having a low mobility.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide an integrated circuit including a p-type FET using a polymer organic semiconductor material and a manufacturing method thereof.

  The present invention is characterized by adopting the following configuration in order to achieve the above object. Hereinafter, the structure for each claim will be described.

a) The invention according to claim 1 is an integrated circuit including a transistor using an organic semiconductor made of a polymer organic material, wherein the transistor is composed of only a p-channel field effect transistor.

  The invention described in claim 2 is an integrated circuit including a transistor using an organic semiconductor made of a polymer-based organic material, wherein a source follower circuit using a p-channel field effect transistor is used in an output stage circuit. .

  A third aspect of the present invention is a method of manufacturing an integrated circuit according to the first or second aspect, wherein a step of forming a source electrode and a drain electrode by printing a conductive polymer on a substrate, and the source electrode and the drain electrode A step of printing a p-type polymer organic material so as to connect, a step of forming an insulating layer on the p-type polymer organic material, and a step of forming a gate electrode on the insulating layer. It is said.

  The present invention has the following effects by adopting the above configuration. The effects of each claim will be described below.

  According to the first aspect of the present invention, since a circuit using only a p-type FET is configured, various integrated circuits using polymer organic semiconductors that are extremely advantageous for manufacturing can be manufactured. Further, a high-performance integrated circuit can be obtained without using an n-type polymer organic semiconductor as a material.

  According to the second aspect of the present invention, in an integrated circuit using a transistor using an organic semiconductor made of a polymer organic material, a source follower circuit using a p-type FET is used for a circuit of an output stage. Thus, a polymer-based organic semiconductor analog integrated circuit can be realized without using a push-pull circuit or a CMOS circuit (see FIG. 2B) that must be used with an nMOS-FET that is difficult to fabricate with a polymer-based organic semiconductor.

  According to invention of Claim 3, the integrated circuit of Claims 1 and 2 can be manufactured by a simple method.

  As for the part related to the novelty of the present invention, the polymer-based organic semiconductor is often due to hole drift, and there is also an n-type organic semiconductor material as an exception even in the polymer system, but because the mobility is currently about two orders of magnitude lower, This is based on the fact that it was found to be extremely difficult to use in the same circuit.

  The configurations of various circuits taken up as embodiments of the present invention are generally known. That is, in the case of inorganic systems (materials capable of producing pn bipolar semiconductors such as compound semiconductors such as silicon and GaAs), the description will be made on the basis of an already known circuit configuration.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a diagram showing three typical types of digital logic circuits. FIG. 1A shows an inverter circuit, FIG. 1B shows an AND circuit, and FIG. 1C shows an OR circuit. Since both are composed only of p-type FETs, -VDD is a power supply lower than the ground potential (VDD itself is a voltage higher than the ground potential).

  The operation of the inverter circuit of FIG. 1A, the AND circuit of FIG. 1B, and the OR circuit of FIG. 1C will be described below. In this example, the voltage of −VDD (voltage lower than the ground potential) is set to logic “1”, and the ground potential is set to logic “0”.

<Description of Operation of Inverter Circuit of FIG. 1A>
B) When the input is at ground potential (= “0”), the operation of the lower p-type FET 1 is “OFF”, so the upper p-type FET 2 operates as an active load (resistance), and the output potential Becomes a potential of approximately −VDD “= 1” lower than the ground potential.

B) On the other hand, if the input has a potential close to −VDD (= “1”), the p-type FET 1 is turned on, so that the output potential is almost equal to the ground potential (= “0”). Become.

<Description of Operation of AND Circuit in FIG. 1B>
B) Only when the input A and the input B are simultaneously “1” (= ˜−VDD), both the p-type FETs 3 and 4 in the first stage are ON, and the p-type FET 6 in the second stage is “OFF”. The output becomes a potential close to −VDD, and the output becomes “1”.

B) When either one or both of inputs A and B are “0” (= ˜GND), one or both of p-type FETs 3 and 4 in the first stage are turned OFF and p-type on the first stage The FET 5 operates as an active load (resistance), and a potential close to −VDD is applied to the lower p-type FET 6 in the second stage to be “ON”, so that the output potential is “0” (= ˜GND).

<Description of Operation of OR Circuit in FIG. 1C>
B) When either one or both of input A or B becomes “1” (= ˜−VDD), the ground potential (= “0”) is almost applied to the gate electrode of the p-type FET in the output stage, and it is turned OFF. Therefore, the output is “1” (= ˜−VDD).

B) When either one or both of the inputs A and B are “0” (= ˜GND), approximately −VDD (= “1”) is applied to the gate electrode of the p-type FET 10 in the output stage to turn it ON. Therefore, the output is “0” (= ˜GND).

  In this way, a basic logic circuit (inverter (NOT) circuit, AND circuit, OR circuit) can be configured by using only a p-type FET, and by combining them, an amplifier circuit, various digital circuits, and a liquid crystal display using them. A driving element such as can be realized.

FIG. 2 is an example of an amplifier circuit according to the present invention, and is a diagram illustrating a circuit example in which an analog amplifier is configured by only a p-type FET.
B) The input stage takes the configuration of the operational amplifier 20 having a common source, and the common source is connected on the + VDD side through a current source constituted by the current mirror circuit 21.

B) On the other hand, a current mirror circuit 22 called an active load is inserted on the drain side of the circuit, that is, on the output side.
C) These are all configured only by p-type FETs, and the output is input to the operational amplifier circuit in the output stage via the source follower circuit 23.

D) The output stage has the same configuration as the above-described input stage. The output stage outputs via the source follower circuit 24.
E) The output voltage is fed back to the input via a resistor RF to realize an analog operation as a whole.

  FIG. 3A is a configuration diagram of the p-type FET used in the above circuit. As the p-type FET element, the polymer shown in FIG. 4 having a molecular weight of 109000 was used.

Hereinafter, the manufacturing method of the p-type FET according to the present invention will be described with reference to FIG.
B) A conductive polymer was printed on the substrate 101 by ink jet to form a source electrode 1-2S and a drain electrode 102-D.

B) Next, the p-type polymer organic semiconductor material 103 is printed by inkjet.
C) An organic insulating film 104 made of polyvinyl alcohol is applied thereon as an insulating film.
D) Further, a conductive polymer is applied thereon to form a gate electrode 102-G.

E) As described above, the p-type FET according to the present invention can be easily manufactured.
F) When a bias voltage Vd is applied between the source and drain of the p-type FET and Vg is a source-gate voltage, the voltage-current characteristics are as shown in FIG. The bias of the p-type FET becomes active when the source voltage is applied to the negative side and the gate voltage is applied to the negative side.

G) As described above, Id was changed by the voltage applied to Vg, and the current Id could be “On” and “OFF” between the source and drain.
H) In the p-type FET, the direction of current flow is as shown by the arrow in FIG. In the polymer organic semiconductor material 103, it flows from the drain to the source (when viewed as holes, it flows from the source to the drain).

  FIG. 4 is a typical structural diagram of a polymer organic semiconductor material according to the present invention. However, even if a polymer organic semiconductor material having another structure is used, it operates as a p-type semiconductor. In the present invention, it is possible to use polymer-based organic semiconductor materials having these other structures.

It is a figure which shows three typical types of the digital logic circuit based on this invention. It is an example of an amplifier circuit according to the present invention, and is a diagram illustrating a circuit example in which an analog amplifier is configured by only a p-type FET. It is a block diagram of p-type FET which concerns on this invention. 1 is a typical structural diagram of a polymer organic semiconductor material according to the present invention.

Explanation of symbols

1-12: p-type FET
20: Operational amplifier 21, 22: Current mirror circuit 23, 24: Source follower circuit 101: Substrate 102-S: Source electrode 102-D: Drain electrode 102-G: Gate electrode 103: Polymer-based organic semiconductor material 104: Organic insulation film

Claims (3)

  An integrated circuit including a transistor using an organic semiconductor made of a polymer organic material, wherein the transistor is composed only of a p-channel field effect transistor.   An integrated circuit including a transistor using an organic semiconductor made of a polymer organic material, wherein a source follower circuit using a p-channel field effect transistor is used as an output stage circuit.   3. A method of manufacturing an integrated circuit according to claim 1, wherein a conductive polymer is printed on a substrate to form a source electrode and a drain electrode, and a p-type polymer system is connected so as to connect the source electrode and the drain electrode. A method of manufacturing an integrated circuit, comprising: printing an organic material; forming an insulating layer on the p-type polymer organic material; and forming a gate electrode on the insulating layer.

Images