JP2006013090A - Exposure apparatus and device manufacturing method - Google Patents

Abstract

To achieve both high exposure accuracy and high throughput.
In step 502, shot map data is read, and in step 504, mark detection is performed when priority is given to an exposure operation based on shot map data and default alignment parameters and exposure parameters. Time T ₁ and exposure time T ₂ are calculated. Further, in step 506, step 508, and step 512, the magnitude relationship between the total time (T ₁ + T _W ) of the mark detection time T ₁ and the wafer exchange time T _W and the exposure time T ₂ is compared. In 514, alignment parameters are adjusted so that alignment accuracy and the like are improved within a range where the overall throughput does not decrease.
[Selection] Figure 8

Description

  The present invention relates to an exposure apparatus and a device manufacturing method, and more specifically, uses an exposure apparatus that exposes a photosensitive object with an energy beam and transfers a predetermined pattern to a plurality of shot areas on the photosensitive object, and the exposure apparatus. The present invention relates to a device manufacturing method.

  Conventionally, in a lithography process for manufacturing a semiconductor element, a liquid crystal display element or the like, a resist or the like is applied to a pattern formed on a mask or a reticle (hereinafter collectively referred to as “reticle”) via a projection optical system. Projection exposure apparatus for transferring onto a substrate such as a wafer or a glass plate (hereinafter collectively referred to as “wafer”), for example, a step-and-repeat reduction projection exposure apparatus (so-called stepper), and improvements to this stepper Sequentially moving projection exposure apparatuses such as step-and-scan type scanning exposure apparatuses (so-called scanning steppers) are used relatively frequently.

  In such an exposure apparatus, it is important to improve the throughput, that is, the throughput of how many wafers can be exposed within a predetermined time, that is, the throughput, and various techniques have been proposed in order to improve the throughput. . In recent years, in particular, a plurality of wafer stages for holding wafers are provided, and one wafer stage side performs exposure operation on the held wafer, while the other wafer stage side applies to the held wafer. An exposure apparatus of a twin wafer stage type that performs a wafer exchange operation and an alignment mark detection operation (an operation for measuring an alignment mark) has also been proposed (see Patent Documents 1 and 2).

  However, even when the above-described technique is adopted, an operation performed on one wafer stage (for example, an exposure operation) and an operation performed on the other wafer stage (for example, a wafer replacement and mark detection operation) are required. When the time on one stage is almost finished and the operation on the other stage is not yet finished, for one stage, the operation on the other stage is rare No processing was performed until ending, just waiting.

On the other hand, in the exposure apparatus, it is important to improve the exposure accuracy as well as improve the throughput. In order to improve the exposure accuracy (especially the overlay accuracy of overlay exposure), the alignment mark detection operation performed before exposure increases the number of alignment mark measurement points on the wafer. Is directly related to the overlay accuracy of shot areas). Further, in the exposure operation of the scanning stepper, the lower the so-called scanning speed, the lower the influence of the dynamic characteristics of the stage, so that the exposure accuracy is improved. However, if the number of alignment mark measurement points is increased or the scanning speed is lowered, the time required for the alignment operation and the exposure operation becomes longer and the throughput is lowered. That is, the throughput and exposure accuracy are in a so-called trade-off relationship.
Japanese Patent Laid-Open No. 10-163098 Special table 2000-511704 gazette

  The present invention has been made under such circumstances, and a first object of the invention is to provide an exposure apparatus capable of achieving both high exposure accuracy and high throughput.

  A second object of the present invention is to provide a device manufacturing method capable of improving the productivity of microdevices.

  The invention according to claim 1 is an exposure apparatus (100) for exposing a photosensitive object (W1, W2) with an energy beam and transferring a predetermined pattern to a plurality of shot areas on the photosensitive object. And two stages (WST1, WST2) that can move independently within a two-dimensional plane; and at least one mark detection system (ALG1, ALG2) that detects a mark formed on the photosensitive object; On the other stage using the mark detection system according to the required detection accuracy when the exposure operation of the photosensitive object on one stage is prioritized according to the default parallel processing sequence according to the shot map A calculation device (20) for calculating a time required for the mark detection operation of the photosensitive object; and a time required for the mark detection operation calculated by the calculation device; A parameter setting device (20) for setting a predetermined parameter so that at least one of the overall throughput and the position detection accuracy of the photosensitive object is improved according to the magnitude relationship with the time required for the exposure operation; And a processing device (20) that executes the exposure operation and the mark detection operation in parallel using the two stages based on parameters set by the device.

  According to this, the calculation device calculates the time required for the exposure operation on one of the two stages and the time required for the mark detection operation on the other stage from the input shot map. To do. Then, the parameter setting device performs setting of predetermined parameters so that at least one of the overall throughput and the position detection accuracy of the photosensitive object is improved according to the magnitude relation of these times. After that, the processing device executes parallel processing of the exposure operation and the mark detection operation using the two stages based on the set parameters. In this way, each operation performed in each of the two stages can be performed so that at least one of the throughput and the position detection accuracy is improved within a range where the overall throughput does not decrease. Both high exposure accuracy and high throughput can be achieved.

  In this case, as in the exposure apparatus according to claim 2, the parameter setting apparatus includes a first time which is a total time of the calculated time required for the mark detection operation and a certain margin time, and the exposure. It can be determined which of the second time required for the operation is greater, and the predetermined parameter is set according to a predetermined reference according to the determination result.

  In this case, as in the exposure apparatus according to claim 3, the margin time is a time required for exchanging the photosensitive object performed on the one stage prior to the mark detection operation of the photosensitive object. be able to.

  4. The exposure apparatus according to claim 2 or 3, wherein the required detection accuracy is an accuracy corresponding to a default setting, as in the exposure apparatus according to claim 4. Is less than the second time, the first time is as large as possible within a range not exceeding the second time, and the first time is greater than the second time. In this case, the parameter relating to the mark detection operation can be changed so that the first time is in a range not exceeding the second time.

  In the exposure apparatus according to claim 2 or 3, as in the exposure apparatus according to claim 5, the required detection accuracy is stricter than a default setting, and the parameter setting device includes the first setting unit. If the time is smaller than the second time, the parameter relating to the mark detection operation is changed so that the first time becomes as large as possible without exceeding the second time, and the first time Is larger than the second time, the exposure parameter can be changed so that the second time does not exceed the first time and the exposure accuracy is improved.

  In this case, as in the exposure apparatus according to claim 6, the exposure parameter includes at least one of a shot exposure order, a scanning speed in the case of scanning exposure, a settling time, and a waiting time in a stage moving sequence; can do.

  In the exposure apparatus according to claim 4 or 5, as in the exposure apparatus according to claim 7, the parameters relating to the mark detection operation include the number of marks to be measured, the measurement order of the marks, the arrangement, and the mark detection. It can include at least one of the number of measurement screens when the system is an image processing system.

  The invention described in claim 8 is a device manufacturing method including a lithography process, wherein the exposure is performed using the exposure apparatus according to any one of claims 1 to 7 in the lithography process. This is a device manufacturing method. In such a case, since exposure is performed using the exposure method according to any one of claims 1 to 7, both high exposure accuracy and high throughput can be realized. Productivity can be improved.

  Hereinafter, an embodiment of the present invention will be described with reference to FIGS.

  FIG. 1 shows a schematic configuration of an exposure apparatus according to an embodiment of the present invention. The exposure apparatus 100 is a step-and-scan type scanning exposure apparatus, that is, a so-called scanning stepper.

  The exposure apparatus 100 includes an illumination system 10 that illuminates a reticle R as a mask with illumination light IL as an energy beam, and the reticle R mainly in a predetermined scanning direction (here, the X-axis direction (the left-right direction in FIG. 1)). A reticle drive system including a reticle stage RST that is driven to the right, a projection optical system PL disposed below the reticle stage RST, and a wafer W1 and a wafer W2 as photosensitive objects respectively disposed below the projection optical system PL. , A stage device 50 including a wafer stage WST1 and a wafer stage WST2 that are independently movable in two dimensions are provided.

  The illumination system 10 includes a light source, an illuminance uniformizing optical system including an optical integrator, a relay lens, as disclosed in, for example, Japanese Patent Application Laid-Open No. 2001-313250 (corresponding US Patent Application Publication No. 2003/0025890). A variable ND filter, a variable field stop (also called a reticle blind or a masking blade), a dichroic mirror, and the like (all not shown) are configured. Here, as the optical integrator, a fly-eye lens, an internal reflection type integrator (such as a rod integrator), or a diffractive optical element is used.

The illumination system 10 has a slit-shaped illumination area IAR (see FIG. 2) defined by the reticle blind on the reticle R on which a circuit pattern or the like is drawn with an illumination light IL as an energy beam with substantially uniform illuminance. Illuminate. Here, as the illumination light IL, far ultraviolet light such as KrF excimer laser light (wavelength 248 nm), vacuum ultraviolet light such as ArF excimer laser light (wavelength 193 nm), F ₂ laser light (wavelength 157 nm), or the like is used. .

  The reticle drive system includes a reticle stage RST that holds the reticle R and is movable in an XY two-dimensional plane along the reticle base board 32 shown in FIG. 1, a reticle drive unit 30 that drives the reticle stage RST, and a reticle. A reticle interferometer system 36 for measuring the position of the stage RST is provided.

  The reticle stage RST is actually floated and supported above the upper surface of the reticle base board 32 via an air bearing, for example, and a Y axis that is in the scanning direction by a linear motor (not shown) constituting the reticle driving unit 30. The reticle coarse movement stage driven in a predetermined stroke range in the direction, and the reticle driving unit 30 in the X axis direction, the Y axis direction, and the θz direction (rotation direction about the Z axis) with respect to the reticle coarse movement stage. And a reticle fine movement stage that can be finely driven by a voice coil motor or the like. The reticle R is attracted and held on the reticle fine movement stage via an electrostatic chuck or a vacuum chuck (not shown).

  The reticle stage RST is a stage that is finely driven in the X-axis and Y-axis directions, finely rotated in the θz direction, and scan-driven in the Y-axis direction by the reticle driving unit 30. The reticle drive unit 30 is a mechanism that uses a linear motor, a voice coil motor, or the like as a drive source, but is shown as a simple block in FIG. 1 for convenience of illustration.

  On the reticle stage RST, as shown in FIG. 2, a parallel plate moving mirror 34 made of the same material (for example, ceramic) as the reticle stage RST is provided at one end (+ X side) in the X-axis direction. It extends in the axial direction, and a reflecting surface is formed on one surface of the movable mirror 34 in the X-axis direction by mirror finishing. An interferometer beam from an interferometer indicated by a measurement axis BI6X constituting the reticle interferometer system 36 of FIG. 1 is irradiated toward the reflecting surface of the movable mirror 34, and the interferometer receives the reflected light. The position of reticle stage RST is measured by measuring the relative displacement with respect to the reference surface. Here, the interferometer having the measurement axis BI6X actually has two interferometer optical axes that can be measured independently, and measures the position of the reticle stage RST in the X-axis direction and yawing (θz rotation). ) The quantity can be measured. The interferometer having this length measurement axis BI6X is yawing information and X position information of wafer stage WST1 (or WST2) from interferometer 16 (or 18) having length measurement axis BI1X (or BI2X) on the wafer stage side, which will be described later. Is used to control the rotation of reticle stage RST in a direction that cancels the relative rotation (rotation error) between the reticle and the wafer, and to perform X-axis direction synchronization control (position alignment). The end surface of reticle stage RST may be mirror-finished to form a reflecting surface (corresponding to the reflecting surface of movable mirror 34).

  On the other hand, as shown in FIG. 2, a pair of corner cube mirrors (retro reflectors) is provided on one side of the reticle stage RST in the non-scanning direction (non-scanning direction) in the Y-axis direction (the front side in FIG. 1). 35A and 35B are installed. Then, from a pair of double path interferometers (not shown), these corner cube mirrors 35A and 35B are irradiated with interferometer beams indicated by measurement axes BI7Y and BI8Y in FIG. These interferometer beams are returned from the corner cube mirrors 35A and 35B to a reflecting surface (not shown) provided on the reticle base board 32, and the reflected lights reflected there return the same optical path, and each double-pass interferometer. The relative displacement from the reference position (reflecting surface on the reticle base board 32 at the reference position) of each corner cube mirror 35A, 35B is measured. Then, the measurement values of these double path interferometers are supplied to the stage control device 19 in FIG. 1, and the stage control device 19 calculates the position of the reticle stage RST in the Y-axis direction based on the average value of the measurement values.

  In the present embodiment, a reticle interferometer system 36 (see FIG. 1) is configured by the interferometer indicated by the measurement axis BI6X and the pair of double path interferometers indicated by the measurement axes BI7Y and BI8Y.

Returning to FIG. 1, the projection optical system PL is telecentric on both the object plane side (reticle side) and the image plane side (wafer side), for example, and has a predetermined projection magnification β (β is, for example, 1/4 or 1/5). ) Is used. For this reason, when the illumination light IL is irradiated from the illumination system 10 onto the reticle R, the illumination area IAR (see FIG. 2) illuminated by the illumination light IL in the circuit pattern area formed on the reticle R The imaging light beam is incident on the projection optical system PL, and a partially inverted image of the circuit pattern is slit-shaped in the exposure area IA (see FIG. 2) as an irradiation area at the center of the field on the image plane side of the projection optical system PL (or FIG. 2). The image is limited to a rectangular shape (polygon). As a result, the partially inverted image of the projected circuit pattern is, for example, one shot area among a plurality of shot areas S _M (see FIG. 4) on the wafer W2 arranged on the imaging plane of the projection optical system PL. Reduced transfer is performed on the resist layer on the surface.

As shown in FIG. 1, in the exposure apparatus 100, stage surface plates 12 _{1 to} 12 ₃ are arranged on a floor surface (not shown) so as to be aligned in the X-axis direction. The stage device 50 is independent of each other on a stage surface plate 12 _{1 to} 12 ₃ in a two-dimensional plane, that is, in the X-axis direction (the left-right direction on the paper surface in FIG. 1) and the Y-axis direction (the orthogonal direction on the paper surface in FIG. 1). A movable wafer stage WST1, WST2 and a stage drive system for driving the wafer stages WST1, WST2 are provided.

In FIG. 1, wafer stage WST1 is levitated and supported on stage surface plate 12 ₁ via an air bearing (not shown), but it can also move on stage surface plate 12 _3. It is levitated and supported on the surface plate 12 ₃ via an air bearing (not shown). In FIG. 1, wafer stage WST2 is levitated and supported on stage surface plate 12 ₃ via an air bearing (not shown), but can also move on stage surface plate 12 _2. Is levitated and supported on the stage surface plate 12 ₂ via an air bearing (not shown).

That is, the bottom surface of the wafer stages WST1, WST2 is provided to the air bearing several places (not shown), the wafer stages WST1, WST2 are formed on the upper surface of the stage surface plate 12 ₁ to 12 ₃ These air bearings For example, it is levitated and supported at a distance of several microns from the guide surface.

Further, as shown in the plan view of FIG. 3, a pair of X-axis linear guides extending in the X-axis direction (for example, arranged at predetermined intervals along the X-axis direction) on the stage surface plates 12 _{1 to} 12 ₃ . 86 and 87 (consisting of a magnetic pole unit containing a plurality of permanent magnets) are arranged at a predetermined interval in the Y-axis direction. The X-axis linear guides 86 and 87 are actually separated into a part on the stage surface plate 12 ₁ , a part on the stage surface plate 12 ₂ , and a part on the stage surface plate 12 _3. The vibration generated in any part on the surface plate is not transmitted to any part on the other surface plate. However, since the interval between the adjacent portions is such that interference between the portions due to vibration is prevented (several microns), in FIG. 3, the portion on the stage surface plate 12 ₁ and the stage surface plate 12 ₂ And the part on the stage surface plate 12 ₃ are shown as X-axis linear guides 86 and 87 which are substantially integrated.

Above these X-axis linear guides 86, 87, two sliders 82 ₁ , 82 ₂ and 83 ₁ , 83 ₂ that can move along the respective X-axis linear guides 86, 87 are not shown air bearings. For example, it is levitated and supported through a clearance of about several μm. The total of the four sliders 82 ₁ , 82 ₂ , 83 ₁ , 83 ₂ has an inverted U-shaped cross section that surrounds the X-axis linear guide 86 or 87 from above and from the side. Each child coil is built in. In other words, in the present embodiment, moving coil type X-axis linear motors are configured by sliders (armature units) 82 ₁ and 82 ₂ each containing an armature coil and the X-axis linear guide 86, respectively. The sliders (armature units) 83 ₁ and 83 ₂ and the X-axis linear guide 87 constitute moving coil type X-axis linear motors. In the following, each of the four X-axis linear motors, with each of the sliders 82 ₁ constituting the movable element 82 _2, 83 _1, 83 ₂ same reference numerals and, as appropriate, X-axis linear motors 82 ₁ , X-axis linear motor 82 ₂ , X-axis linear motor 83 ₁ , and X-axis linear motor 83 ₂ . Note that the above-described separation structure of the X-axis linear guides 86 and 87 does not affect the sliding of the sliders 82 ₁ , 82 ₂ , 83 ₁ , 83 ₂ .

Two of the four X-axis linear motors (sliders) 82 _{1 to} 83 ₂ , that is, the X-axis linear motors 82 ₁ and 83 ₁ are arranged in a Y-axis linear guide (for example, arranged in the Y-axis direction). are respectively fixed to a plurality of consisting armature unit that incorporates armature coils) 80 ₁ in the longitudinal direction of the one end and the other end which is. The remaining two X-axis linear motors 82 ₂ and 83 ₂ are fixed to one end and the other end of a similar Y-axis linear guide 80 ₂ extending in the Y-axis direction. Therefore, the Y-axis linear guides 80 ₁ and 80 ₂ are driven along the X-axis by the pair of X-axis linear motors 82 ₁ , 83 ₁ , 82 ₂ , and 83 ₂ , respectively.

At the bottom of the wafer stage WST1, and the magnetic pole unit (not shown) is provided with a permanent magnet, driven by the magnetic pole unit and one of the Y-axis linear guides 80 _1, the wafer stage WST1 in the Y-axis direction moving A magnet type Y-axis linear motor is configured. Further, the bottom of the wafer stage WST2, and the magnetic pole unit (not shown) is provided with a permanent magnet, by a magnetic pole unit and the other Y-axis linear guide 80 _2, the wafer stage WST2 in the Y-axis direction drive A moving magnet type Y-axis linear motor is configured. In the following description, these Y-axis linear motors are appropriately referred to as Y-axis linear motor 80 ₁ , Y-axis linear motor 80 ₂ using the same reference numerals as linear guides 80 ₁ and 80 ₂ constituting the respective stators. Shall be called.

In the present embodiment, the X-axis linear motors 82 _1, 83 ₁ and Y-axis linear motor 80 ₁ as described above, the stage drive system that drives the two-dimensional wafer stage WST1 within the XY plane is formed, X-axis linear motors 82 ₂ , the 83 ₂ and Y-axis linear motors 80 _2, stage drive system that drives two-dimensionally within the XY plane of the wafer stage WST2 independently of the wafer stage WST1 is configured. Each of the X-axis linear motors 82 _{1 to} 83 ₂ and the Y-axis linear motors 80 ₁ and 80 ₂ is controlled by a stage control device 19 shown in FIG.

It should be noted that yawing of wafer stage WST1 can be controlled by making the thrusts generated by the pair of X-axis linear motors 82 ₁ and 83 ₁ slightly different. Similarly, yawing of wafer stage WST2 can be controlled by making the thrust generated by the pair of X-axis linear motors 82 ₂ and 83 ₂ slightly different.

  A wafer holder H1 is provided on the wafer stage WST1 as shown in FIGS. The wafer holder H1 sucks and holds the wafer W1 by a vacuum suction force of a vacuum pump (not shown).

  On the upper surface of wafer stage WST1, for example, as shown in FIG. 2, fiducial mark plate FM1 is installed so as to be approximately the same height as wafer W1. As shown in FIG. 3, a pair of first reference marks MK1 and MK3 and a second reference mark MK2 are formed on the surface of the reference mark plate FM1 with a predetermined positional relationship.

  Further, on the upper surface of wafer stage WST1, an X moving mirror 96X having a reflecting surface orthogonal to the X axis at one end (−X side end) in the X axis direction is extended in the Y axis direction, and one end in the Y axis direction ( A Y movable mirror 96Y having a reflecting surface perpendicular to the Y axis is extended in the X axis direction at the + Y side end). As shown in FIG. 2, interferometer beams (measurement beams) from the interferometers of the respective measurement axes constituting the interferometer system to be described later are projected on the reflecting surfaces of the movable mirrors 96X and 96Y. By receiving the reflected light with each interferometer, from the reference position of each movable mirror reflecting surface (generally, a fixed mirror is placed on the side of the projection optical system or the side of the alignment system, which is used as the reference surface) Thus, the two-dimensional position in the XY plane of wafer stage WST1 is measured.

  The configuration of the other wafer stage WST2 is substantially the same as wafer stage WST1.

  That is, as shown in FIG. 2, wafer W2 is vacuum-sucked on wafer stage WST2 via wafer holder H2.

  As shown in FIG. 2, fiducial mark plate FM2 is installed on the upper surface of wafer stage WST2 so as to be approximately the same height as wafer W2. The first reference marks MK1, MK3 and the second reference mark MK2 are also formed on the upper surface of the reference mark plate FM2 with the same positional relationship as the reference mark plate FM1.

  Further, on the upper surface of wafer stage WST2, an X moving mirror 97X having a reflecting surface orthogonal to the X axis at one end in the X axis direction (+ X side end) extends in the Y axis direction, and ends in the Y axis direction (+ Y A Y moving mirror 97Y having a reflecting surface perpendicular to the Y axis is extended in the X axis direction at the side end). Interferometer beams from the interferometers of the respective measurement axes constituting the interferometer system described later are projected onto the reflecting surfaces of these movable mirrors 97X and 97Y, and the two-dimensional position in the XY plane of wafer stage WST2 is Measurement is performed in the same manner as the wafer stage WST1.

  Returning to FIG. 1, a pair of alignment systems ALG1 and ALG2 as off-axis type mark detection systems having the same function are provided on both sides of the projection optical system PL in the X-axis direction. The optical axis AX of the PL (almost coincident with the projection center of the reticle pattern image) is installed at a position separated by the same distance.

  As the alignment systems ALG1 and ALG2, in this embodiment, FIA (Filed Image Alignment) type alignment sensors, which are a kind of image processing type imaging type alignment sensor, are used. These alignment systems ALG1 and ALG2 include a light source (for example, a halogen lamp) and an imaging optical system, an index plate on which an index mark serving as a detection reference is formed, an image sensor (CCD), and the like. In these alignment systems ALG1 and ALG2, a mark to be detected is illuminated by broadband light from a light source, and reflected light from the vicinity of the mark is received by the CCD via an imaging optical system and an index. At this time, the mark image is formed on the image pickup surface of the CCD together with the index image. Then, by performing predetermined signal processing on the image signal (imaging signal) from the CCD, the position of the mark with respect to the center of the index mark that is the detection reference point is measured. FIA-type alignment sensors such as alignment systems ALG1 and ALG2 are particularly effective for detecting asymmetric marks on the aluminum layer and the wafer surface.

  In the present embodiment, alignment system ALG1 is used for measuring the position of the alignment mark of wafer W1 held on wafer stage WST1, the reference mark formed on reference mark plate FM1, and the alignment system ALG2 is used for wafer stage. This is used for measuring the position of the alignment mark of wafer W2 held on WST2 and the reference mark formed on reference mark plate FM2.

  Image signals from alignment systems ALG1 and ALG2 are converted into digital waveform signals by A / D conversion by an alignment control device (not shown). Then, the alignment control device calculates the waveform signal and detects the position of the mark with reference to the index center. Information on the mark position is sent to the main controller 20 from an alignment controller (not shown).

  In the alignment systems ALG1 and ALG2, it is possible to perform imaging a plurality of times when imaging the mark to be detected. The number of times of imaging is set as an adjustable apparatus parameter in the exposure apparatus 100 (specifically, a storage device (not shown) that can be read and written by the main controller 20).

  Next, the interferometer system that measures the two-dimensional position of each wafer stage in the XY plane will be described with reference to FIGS.

  As shown in FIG. 2, on the reflection surface of the X moving mirror 96X on the wafer stage WST1, the optical axis AX of the projection optical system PL and the optical axis SXa of the alignment system ALG1 (coincident with the center of the index mark described above) The interferometer beam indicated by the measurement axis BI1X from the X-axis interferometer 16 (see FIGS. 1 and 3) is irradiated along the X-axis passing through. Similarly, on the reflection surface of the X moving mirror 97X on the wafer stage WST2, the X axis passing through the optical axis AX of the projection optical system PL and the optical axis SXb of the alignment system ALG2 (coincident with the center of the above-described index mark) is provided. Along with this, the interferometer beam indicated by the measurement axis BI2X from the X-axis interferometer 18 (see FIGS. 1 and 3) is irradiated. The X-axis interferometers 16 and 18 receive the reflected light from the X-moving mirrors 96X and 97X, respectively, thereby measuring the relative displacement from the reference position of each reflecting surface, and the X-axis direction of the wafer stages WST1 and WST2 The position is measured. Here, as shown in FIG. 2, the X-axis interferometers 16 and 18 are three-axis interferometers each having three optical axes. In addition to the measurement of the wafer stages WST1 and WST2 in the X-axis direction, pitching ( Measurement of rotation about the Y axis (θy rotation) and yawing (rotation in the θz direction) is possible. The output value of each optical axis can be measured independently.

  It should be noted that the interferometer beams of the measurement axis BI1X and the measurement axis BI2X always come into contact with the X movable mirrors 96X and 97X over the entire movement range of the wafer stages WST1 and WST2. Accordingly, with respect to the X-axis direction, the position of wafer stage WST1, WST2 is the measurement axis BI1X, the measurement axis when the exposure is performed using projection optical system PL, or when alignment systems ALG1, ALG2 are used. Management is based on the measured value of BI2X.

  In the present embodiment, as shown in FIGS. 2 and 3, a Y-axis interferometer 46 having a measurement axis BI2Y perpendicular to the measurement axes BI1X and BI2X at the optical axis AX of the projection optical system PL; Y-axis interferometers 44 and 48 having length measuring axes BI1Y and BI3Y respectively perpendicular to the length measuring axes BI1X and BI2X on the optical axes SXa and SXb of the alignment systems ALG1 and ALG2 are provided.

  In the case of the present embodiment, for the position measurement in the Y-axis direction of wafer stages WST1, WST2 at the time of exposure using projection optical system PL, the Y axis having measurement axis BI2Y that passes through optical axis AX of projection optical system PL. The measurement value of the interferometer 46 is used, and for the position measurement in the Y-axis direction of wafer stage WST1 when using alignment system ALG1, the Y-axis interference having measurement axis BI1Y passing through optical axis SXa of alignment system ALG1 is used. The Y axis interferometer 48 having the measurement axis BI3Y passing through the optical axis SXb of the alignment system ALG2 is used for the position measurement in the Y axis direction of the wafer stage WST2 when the alignment system ALG2 is used. The measured value is used.

  Thus, in this embodiment, an interferometer system that manages the XY two-dimensional coordinate positions of wafer stages WST1 and WST2 by a total of five interferometers, that is, X-axis interferometers 16 and 18 and Y-axis interferometers 44, 46, and 48. Is configured. As is apparent from FIG. 2, the Y-axis interferometers 44, 46, and 48 are two-axis interferometers each having two optical axes. In addition to the measurement in the Y-axis direction of the wafer stages WST1 and WST2, rolling (X Measurement of rotation around the axis (θx rotation) is possible. In addition, the output value of each optical axis can be measured independently.

  As can be seen from the above description, in this embodiment, depending on the situation, the measurement axis of the Y-axis interferometer deviates from the reflection surface of wafer stages WST1 and WST2. That is, when the movement from the alignment position to the exposure position or the movement from the exposure position to the wafer exchange position occurs, the state in which the interferometer beam in the Y-axis direction does not hit the movable mirrors of wafer stages WST1 and WST2 occurs. It is essential to switch the interferometer used in In consideration of this point, a linear encoder (not shown) that measures the position of wafer stages WST1 and WST2 in the Y-axis direction is provided.

  That is, in the present embodiment, the stage controller 19 moves from the main controller 20 when the wafer stages WST1 and WST2 move from the alignment position to the exposure position or from the exposure position to the wafer exchange position. In response to the instruction, the X positions of wafer stages WST1 and WST2 measured by the X-axis interferometer and the Y position information of wafer stages WST1 and WST2 measured by the linear encoder are used. Controls movement of position and Y position.

  Of course, in the stage controller 19, when the interferometer beam from the Y-axis interferometer again hits the movable mirrors of the wafer stages WST1 and WST2 in response to an instruction from the main controller 20, the stage controller 19 has not been used for the control so far. The Y-axis interferometer of the measured length axis is reset (or preset), and then the movement of the wafer stages WST1, WST2 is controlled based only on the measured values of the X-axis interferometer and Y-axis interferometer constituting the interferometer system. To do.

  The end surfaces of wafer stages WST1 and WST2 may be mirror-finished to form reflecting surfaces (corresponding to the reflecting surfaces of movable mirrors 96X, 96Y, 97X, and 97Y).

  The measured values of the interferometers constituting the interferometer system configured as described above are sent to the stage controller 19 shown in FIG. 1 and the main controller 20 via the stage controller 19. In response to an instruction from main controller 20, stage controller 19 controls wafer stages WST1 and WST2 via the stage drive systems described above based on the output values of the interferometers. In other words, in this embodiment, wafer stages WST1 and WST2 are driven in the XY two-dimensional direction independently of each other and without mechanical interference.

  Further, in the present embodiment, although not shown, in order to simultaneously observe the reticle mark on the reticle R and the marks on the reference mark plates FM1 and FM2 via the projection optical system PL above the reticle R. There is provided a TTR (Through The Reticle) type reticle alignment detection system using light of the exposure wavelength. Detection signals of these reticle alignment detection systems are supplied to the main controller 20 via an alignment controller (not shown). The configuration of the reticle alignment detection system is disclosed in detail in, for example, Japanese Patent Application Laid-Open No. 7-176468.

  Although not shown, each of the projection optical system PL and alignment systems ALG1 and ALG2 has an autofocus / autoleveling measurement mechanism (hereinafter referred to as “AF / AL system”) for examining the in-focus position. Are provided. The configuration of the exposure apparatus in which the AF / AL system is provided in each of the projection optical system PL and the pair of alignment systems ALG1 and ALG2 is disclosed in detail in, for example, Japanese Patent Laid-Open No. 10-214783.

<Parallel processing sequence>
Next, a basic parallel processing sequence of the exposure apparatus 100 performed using the wafer stages WST1 and WST2 configured as described above will be described.

  Here, a case where the exposure operation is performed on the wafer W2 by the step-and-scan method on the wafer stage WST2 below the projection optical system PL, and the wafer exchange and the mark detection operation are performed on the wafer stage WST1. Think. At this time, the position control of wafer stage WST2 during the exposure operation is performed based on the measurement values of the measurement axes BI2X and BI2Y of the interferometer system, and the position control of wafer stage WST1 in which the wafer exchange and wafer alignment measurement operations are performed. Is performed based on the measurement values of the measurement axes BI1X and BI1Y of the interferometer system.

  First, the wafer exchange operation will be described. In parallel with the exposure operation on wafer stage WST2, the wafer is exchanged between wafer stage WST1 and a transfer system (not shown) at a predetermined left wafer exchange position (load position / unload position). By this wafer exchange operation, wafer W1 is unloaded onto wafer stage WST1, and a new wafer is loaded as wafer W1. Here, it is assumed that the residual rotation error of the newly loaded wafer W1 is almost zero. As an example, the position at which the reference mark MK2 on the reference mark plate FM1 can be detected by the alignment system ALG1 is determined as the left wafer replacement position.

  In this case, on wafer stage WST1, an alignment mark attached to a shot area formed on wafer W1 is detected as described later, following the wafer exchange operation. At the left wafer exchange position, the reference mark MK2 on the reference mark plate FM1 of the wafer stage WST1 is arranged directly below the alignment system ALG1. For this reason, the stage controller 19 resets the interferometer of the measurement axis BI1Y of the interferometer system before detecting the reference mark MK2 by the alignment system ALG1 in accordance with an instruction from the main controller 20. .

  That is, following the wafer exchange operation and the resetting of the interferometer, for example, wafer alignment on the wafer stage WST1 is performed by, for example, EGA (Enhanced Global Alignment) system wafer, and each shot area on the wafer W1. The array coordinates are calculated. More specifically, while managing the position of wafer stage WST1 by interferometer systems (measurement axes BI1X, BI1Y), wafer stage WST1 is sequentially applied based on design shot arrangement data (alignment mark position data). While moving, the position coordinates of a plurality of alignment shot areas (sample shot areas) on the wafer W1 are detected based on the detection result of the alignment mark attached to the alignment shot area by the alignment system ALG1 and the interferometer system (length measurement) at the time of detection. All the shot array data are calculated by the statistical calculation by the least square method based on the calculation results of the axes BI1X and BI1Y) and the calculated coordinate data of the shot array. The EGA is disclosed in detail in Japanese Patent Application Laid-Open No. 61-44429.

  The operation of each part in the EGA is controlled by the main controller 20, and the above calculation is performed by the main controller 20. In this case, the position of wafer stage WST1 is controlled by stage controller 19 based on an instruction from main controller 20. Note that the above calculation result is preferably converted into a coordinate system based on the position of the reference mark MK2 of the reference mark plate FM1. The main controller 20 controls the mark detection operation, that is, the alignment mark detection operation of the wafer W1 by the alignment system ALG1 based on the set value of the alignment parameter described later.

  While the wafer exchange operation and the mark detection operation are performed on the wafer stage WST1 side, the wafer stage WST2 side performs step-and-scan exposure on the wafer W2. Specifically, EGA wafer alignment is performed in advance in the same manner as on the wafer W1 side described above, and the resulting shot arrangement data on the wafer W2 (reference mark MK2 on the reference mark plate FM2). Are sequentially moved below the optical axis of the projection optical system PL, and each time the shot areas are exposed, the reticle stage RST and wafer stage WST2 are moved in the scanning direction. By performing synchronous scanning, scanning exposure is performed. The operation of each part during scan exposure for wafer W2 is also controlled by main controller 20, and the position of wafer stage WST2 is controlled by stage controller 19 based on an instruction from main controller 20. In addition, the operation of each unit during the scan exposure is also controlled based on a set value of an exposure parameter described later set as an apparatus parameter.

  Then, after the scanning exposure for wafer W2 is completed and wafer stage WST2 is retracted from directly below projection optical system PL, wafer stage WST1 has a reference mark plate directly below optical axis AX (projection center) of projection optical system PL. Although the reference marks MK1 and MK3 on the FM1 are moved until the center positions come, the interferometer beam of the measurement axis BI1Y is not incident on the moving mirror 96Y of the wafer stage WST1 during the movement. Therefore, in the stage controller 19, the position of the wafer stage WST 1 is changed from that time to the position of the wafer stage WST 1 after that time, the measured value of the interferometer 16 having the measurement axis BI 1 X, and the measured value of the linear encoder (not shown). And control based on.

  Then, main controller 20 measures the relative positional relationship between reference marks MK1 and MK3 on reference mark plate FM1 and the corresponding reticle mark on reticle R using a reticle alignment detection system (not shown). Prior to the step, the interferometer 46 having the measurement axis BI2Y is reset. The reset operation can be executed when the interferometer beam of the length measurement axis to be used next can irradiate the movable mirror 96Y of wafer stage WST1.

  As described above, the reason why high-precision alignment is possible even if the reset operation of the interferometer is performed is that the alignment mark ALK1 detects the reference mark MK2 on the reference mark plate FM1, and then performs the above-described EGA wafer alignment. The virtual position (coordinate position of each shot area on the wafer W1) calculated based on the alignment mark detection result of the alignment shot area by the alignment system ALG1 is used as the position coordinate of the coordinate system with the reference mark MK2 as a reference. This is because it is converted. Since the relative distance between the reference mark and the position to be exposed is obtained at this point, if the correspondence between the exposure position and the reference mark position is obtained by the reticle alignment detection system before the exposure, the relative distance is included in the value. Thus, even if the interferometer beam of the interferometer in the Y-axis direction is cut during the movement of the wafer stage and reset again, a highly accurate exposure operation can be performed. Therefore, the measurement accuracy of the linear encoder does not have to be so high, and the wafer stage WST1 (or WST2) is positioned directly below the center (projection center) of the optical axis AX of the projection optical system PL. It suffices if the accuracy is high enough to move to the position where the upper reference marks MK1 and MK3 come.

  Then, a step-and-scan exposure operation is performed on wafer W1 on wafer stage WST1 in the same manner as described above.

  On the other hand, wafer stage WST2 for which the exposure operation has ended is moved (retracted) from the exposure end position to the right wafer replacement position as described above. The right wafer exchange position is set so that the reference mark MK2 on the reference mark plate FM2 is positioned below the alignment system ALG2 in the same way as the left wafer exchange position described above, and is the same as the wafer exchange operation and mark detection operation described above. When each operation is completed, the wafer stage WST1 waits for the exposure operation on the wafer W1 to end. Of course, the reset operation of the interferometer of the measuring axis BI3Y of the interferometer system is executed prior to the mark detection on the reference mark plate FM2 by the alignment system ALG2.

  In this embodiment, in this way, the parallel processing sequence of wafer stages WST1 and WST2 is continuously repeated.

Here, the exposure operation in the parallel processing sequence will be described more specifically. Here, a description will be given of a case where a plurality of (for example, 76) shot regions on the wafer W2 as shown in FIG. 4 are exposed through a route as shown in FIG. Here, in the line including the arrow passing over the shot area S _M (M = 1 to 76) of the wafer W2 in FIG. 4, the center of the exposure area IA (this point is set as the point P) is each shot. This corresponds to a trajectory passing over the area, and corresponds to the order of exposure of the shot areas. The solid line in this locus indicates the path of the center P (hereinafter also referred to as “point P”) of the exposure area IA (see FIG. 2) at the time of exposure of each shot, and the dotted line is in the same row in the non-scanning direction. The movement locus of the point P between adjacent shots is shown, and the alternate long and short dash line shows the movement locus of the point P between different rows. Actually, the point P is fixed and the wafer W2 (more precisely, the wafer stage WST2) moves. However, in FIG. 4, the point P (exposure region) is placed on the wafer W2 for easy understanding. It is shown as if the center P) of IA is moving. In the exposure apparatus 100, it is assumed that such “exposure order of shot areas” is set as an adjustable apparatus parameter, and in the scheduling process described later, the exposure order of the shot areas is appropriately adjusted. It becomes like this.

  Further, a basic (general) exposure operation for one shot area in the exposure apparatus 100 will be described. Here, a case where scanning exposure is performed on wafer W2 on wafer stage WST2 will be described.

  Wafer stage WST2 basically performs acceleration motion → constant speed motion → deceleration motion in the scanning direction when performing scanning exposure of each shot area. That is, first, the center P of the exposure area IA is positioned at a position spaced apart from the shot end of the shot area, and acceleration of the wafer stage WST2 is started. Then, when wafer stage WST2 approaches a predetermined speed (scanning speed), synchronous control of reticle R and wafer W is started. The time from the acceleration start time of wafer stage WST2 to the synchronization control start time is referred to as “acceleration time”. After the synchronous control is started, follow-up control by the reticle stage RST is performed until the displacement error between the wafer and the reticle becomes a predetermined relationship, and exposure is started. The time from the synchronization control start time to the exposure start time is called “settling time”.

  The time from the start of acceleration to the start of exposure, that is, the sum of acceleration time and settling time is referred to as “pre-scan time”. In exposure apparatus 100, “average acceleration”, “scan speed”, and “settling time” of wafer stage WST1 (or WST2) during the acceleration time are set as adjustable apparatus parameters. That is, main controller 20 drives wafer stage WST2 based on the set values of “average acceleration”, “scan speed”, and “settling time” set as device parameters. In other words, the “acceleration time” can be predicted from the set values of “average acceleration” and “scan speed”. From the “acceleration time” and the parameterized “settling time” , “Pre-scan time” can be calculated. The acceleration of wafer stage WST2 during the acceleration time may be acceleration at a constant acceleration, or may be acceleration such that the acceleration changes smoothly with time. That is, as a result, the average value of the acceleration of wafer stage WST1 (or WST2) during the acceleration time may be “average acceleration”.

  After this “pre-scan time” has elapsed, scanning exposure is performed by constant speed movement at the “scan speed” in the scanning direction. The time during which this scanning exposure is performed is referred to as “exposure time”. This “exposure time” is determined by the size of the shot area in the scanning direction and the “scanning speed” set as a parameter.

  In order to improve the throughput, in the step-and-scan method, the normal reticle R is alternately scanned (reciprocating scan) to sequentially expose the next shot. Therefore, in the exposure apparatus 100, after the exposure time has elapsed, The reticle R is further moved from the exposure end point by the same distance as the movement distance in the pre-scan, and the reticle R is returned to the scanning start position for exposure of the next shot (therefore, the wafer W corresponding to this). Must also be moved in the scanning direction). The time for this is the “overscan time”. This “overscan time” can be divided into a “constant speed overscan time” in which the scan speed is maintained and a “deceleration overscan time” in which the speed is reduced. The “average deceleration” in the “deceleration overscan time” may be set to the same value as the “average acceleration” in the acceleration time described above. The “constant overscan time” is also set as an adjustable apparatus parameter.

FIG. 5A shows the center point P of the exposure area IA when the adjacent shot, the first shot S ₂ , the second shot S ₂ , and the third shot S ₃ that are located in the same row as shown in FIG. The route is shown. As shown in FIG. 5A, after passing through the shot area S ₁ , the point P passes through the position O (0, 0), passes through the shot area S ₂ via B (Bx, By), reaches the C (Cx, Cy), passing through the shot area S _3.

In FIG. 5B, the point P moves from the position B (Bx, By) to the position C (Cx, Cy) in FIG. 5A, and the X axis when performing the scanning exposure on the shot region S _{2 is shown} . The moving speed in the direction (scanning direction) is shown. As shown in FIG. 5 (B), with respect to the scanning exposure for the shot area S _2, the time t1 is "acceleration time", the time t2 is "settling time", the time t3 is located at "exposure time" The time t4 is the “constant speed overscan time”, and the time t5 is the “deceleration overscan time”. That is, here, the “prescan time” is t1 + t2, and the “overscan time” is t4 + t5. FIG. 5C shows the moving speed in the Y-axis direction when performing the scanning exposure.

  As is apparent from FIG. 5A, in exposure apparatus 100, pre-scan and over-scan of wafer stage WST2 in the scanning direction (X-axis direction) and wafer stage WST2 in the non-scan direction (Y-axis direction) are performed. Stepping is performed in parallel. This is to shorten the moving distance between shots of wafer stage WST2 and improve the throughput.

  By the way, as described above, since the pre-scan time includes a settling time for causing the reticle R to follow the wafer W completely, acceleration / deceleration control in the non-scan direction is finished as early as possible from the start of the settling time. It is desirable. In order to realize this, as shown in FIG. 5C, in the present embodiment, non-scanning of wafer stage WST2 is performed during constant speed overscan time t4 in the scanning direction of wafer stage WST2 following the end of exposure. Stepping in the direction is started, and control is performed so as to end the acceleration / deceleration control that occurs in the non-scanning direction earlier by the constant speed overscan time t4. In this way, the settling time t2 can be shortened because it is possible to concentrate on only the synchronization control in the scan direction during the settling time t2.

  In the exposure apparatus 100 of the present embodiment, scanning exposure is sequentially performed on each shot area on the wafer W2 by repeating prescan → exposure → overscan → prescan → exposure → overscan as described above. As described above, the prescan time, the exposure time, and the overscan time are determined by the scan length of the shot area, the scan speed, and the average acceleration (average deceleration). In the exposure apparatus 100 of the present embodiment, as will be described later, before performing actual scanning exposure, the prescan time, the exposure time, and the overscan time are set based on the scan length, scan speed, average acceleration, and the like of the shot area. The time required for scanning exposure of the shot area on the wafer (second time) is calculated in advance. The second time is calculated by “exposure order of shot areas”, “average acceleration (deceleration)”, “settling time”, “scan speed”, “constant overscan time” set as apparatus parameters. This is performed based on the set value. Here, the apparatus parameters related to such an exposure operation are particularly called exposure parameters.

  Next, the alignment mark detection operation will be described more specifically. FIG. 6 shows an example of the detection order of the alignment marks attached to each shot area on wafer W1 held on wafer stage WST1.

  In FIG. 6, the sample shot region to which the alignment mark to be detected is attached is indicated by oblique lines, and the detection visual field of the alignment system ALG1 is moved stepwise in the order indicated by the path indicated by the solid arrow. Thus, the alignment mark attached to the sample shot area is detected.

  In wafer alignment, the larger the number of sample shots (this number corresponds to the number of alignment marks to be detected), the better from the viewpoint of alignment accuracy, but the longer the time required for detection. This is not desirable from the viewpoint of throughput. In EGA, the number of normal sample shots is 3 to 15, but the most common number of sample shots is about eight. Therefore, in FIG. 6, the number of sample shots is eight.

  In wafer alignment, the arrangement of sample shot areas for detecting alignment marks is also a very important point in terms of alignment accuracy. For example, in order to increase the alignment accuracy, it is desirable that the sample shot regions are arranged as dispersed on the wafer as possible. Therefore, in the wafer W1 in FIG. 6, a shot area near the week outside the wafer is selected as a sample shot. If the arrangement of the sample shots is determined, the measurement order of the sample shots can be adopted, for example, the measurement order with the shortest measurement path. Further, main controller 20 moves wafer stage WST1 at “stepping speed” during alignment mark detection as an adjustable apparatus parameter, and the alignment mark attached to the sample shot enters the detection field of alignment system ALG1. The wafer stage WST1 is positioned as described above, and the vibration amplitude of the wafer stage WST1 generated due to the step movement converges within a certain allowable value (hereinafter referred to as “step allowable value”). The alignment mark is detected by the alignment system ALG1. The main controller 20 repeats this mark detection operation along a route as shown in FIG. 6, for example, and performs the mark detection operation. In exposure apparatus 100, “number of sample shots”, “arrangement of sample shots”, “measurement path”, and “stepping speed” are also set as adjustable apparatus parameters. As described above, the number of sample shots and the like directly affect the alignment accuracy. Therefore, in the exposure apparatus 100, the number of sample shots that satisfy the required accuracy is set as a parameter setting value in the exposure apparatus 100. The default setting (8 is set in the above example). Main controller 20 controls wafer stage WST1 based on the set values of these parameters when performing a mark detection operation. This means that the time required for the mark detection operation can be predicted from the number of sample shots, arrangement, measurement path, stepping speed, and the like.

  Note that since the number of sample shots and the like vary depending on the shot map of each wafer, the number of sample shots and the parameters of the arrangement may be set for each shot map. Here, the shot map is a map in which the arrangement, number, size, etc. of shots to be formed on the wafer are defined. The shot map is included in a process program transmitted from, for example, a host computer of the lithography system in which the exposure apparatus 100 is operated to the main controller 20, and the main controller 20 performs the wafer alignment before performing wafer alignment. Each stage is controlled so as to perform alignment and scanning exposure according to the shot map after analyzing the shot map and grasping the arrangement, number, and size (especially the scan length in the scanning direction) of the shot.

  In order to more accurately predict the time required for the mark detection operation, it is necessary to consider the time until the amplitude of the vibration after the step movement converges to the step allowable value. In the exposure apparatus 100, this “step allowable value” is also set as an adjustable apparatus parameter. The convergence time is determined from the step allowable value and the servo gain of the control system that controls the position of wafer stage WST2 (for example, position loop gain and velocity loop gain, which are also adjustable apparatus parameters). Can be predicted. Such parameters relating to the mark detection operation such as “number and arrangement of sample shots”, “step allowable value”, “servo gain” are particularly called alignment parameters.

  Actually, in the mark detection operation, for each shot area, it is necessary to separately detect the wafer X mark indicating the X position of the shot area and the wafer Y mark indicating the Y position. The mark measurement path is more complicated than that shown in FIG.

  The time required for this alignment mark detection operation and the time required for wafer replacement as a margin time are added, and the total time is defined as the first time.

  The operations for performing the exposure operation for wafer stage WST2 and the mark detection operation for wafer stage WST1 have been described above. However, the exposure operation for wafer stage WST1 and the mark detection operation for wafer stage WST2 are performed in the same manner as described above. Of course.

  Further, when the exposure operation for wafer stage WST2 and the mark detection operation for wafer stage WST1 are performed in the exposure path shown in FIG. 4 and the measurement path as shown in FIG. 6, immediately after the start of the exposure operation and mark detection operation. Since each operation is performed on the shot region on the + X side from the center of the wafers W1 and W2, the wafer stages WST1 and WST2 are generally − with respect to the center of the projection optical system PL or the detection field of the alignment system ALG1. It depends on the X side. Then, immediately before the exposure operation and the alignment mark detection operation are completed, each operation is performed on the shot region on the −X side from the center of the wafer, so that the wafer stages WST1 and WST2 are in the center of the projection optical system PL. Or, it is based on the + X side with respect to the detection visual field of the alignment system ALG1. That is, if an exposure path and a mark detection path as shown in FIGS. 4 and 6 are employed, wafer stages WST1 and WST2 advance from the −X side to the + X side as the exposure operation and mark detection operation progress. . In this way, when the exposure operation is completed, wafer stage WST2 is located at a position close to the wafer exchange position, so that it can be quickly moved to the wafer exchange position. When the mark detection operation is completed, wafer stage WST1 is positioned at a position close to the exposure position, and the exposure operation can be started promptly. In addition, the interval between wafer stage WST1 and wafer stage WST2 can be made as short as possible, resulting in an advantage in throughput.

  In the case where the exposure operation is performed on the wafer W1 and the mark detection operation is performed on the wafer W2, in the scanning exposure on the wafer W1, the exposure is started from the shot region located closest to the −X side, and the most + X The exposure operation for the wafer W2 is completed by the exposure of the shot region located on the side, and in the alignment mark detection operation for the wafer W2, the mark is started from the alignment mark provided in the shot region located on the most -X side. As a matter of course, the measurement of the alignment mark on the wafer W2 is completed by the measurement of the alignment mark attached to the shot region located closest to the + X side.

  By the way, in order to prevent interference between both stages due to movement of both stages WST1 and WST2 that perform each operation, the operation on one stage is temporarily suspended until one stage no longer interferes with the other stage. It is necessary to be in a waiting state. In the exposure apparatus 100, it is assumed that such waiting time for each operation is also set as an adjustable apparatus parameter.

  In the present embodiment, as described above, the time required for wafer replacement (hereinafter abbreviated as “wafer replacement time”) and the time required for alignment mark detection (hereinafter referred to as “mark detection time”) by scheduling processing described later. The first time (also referred to as wafer exchange / mark detection operation time) and the time required for the exposure operation (second time, hereinafter abbreviated as “exposure time”) are predicted. The predicted first time and the second time are compared, and the above-described exposure parameters and alignment parameters are adjusted based on the comparison result.

In the exposure operation and the wafer exchange / mark detection operation performed in parallel on the two wafer stages WST1 and WST2 described above, the wafer exchange / mark detection operation generally ends first. For example, as shown in FIG. 7, the exposure time of the wafer stage WST2 and T _2, the wafer exchange time at the wafer stage WST1 and T _W, when the mark detection time _{T 1, T 2> (T} 1 + T _W ). If the parallel processing sequence is executed as it is without performing the scheduling process which will be described later, the exposure time T ₂ and the mark detection time T ₁ are not changed. After the wafer exchange / mark detection operation is completed, the wafer stage WST1 Until the exposure operation on the wafer stage WST2 side is completed, the standby state is maintained. Then, when the exposure operation on wafer W2 is completed, movement of wafer stages WST1 and WST2 is started. Therefore, in the present embodiment, before performing the above-described parallel processing sequence, the parallel processing sequence is scheduled so that the time during which one stage is in a standby state is minimized. In FIG. 7, the time T _E indicates the total time required in the parallel processing sequence.

For example, the total time of the wafer exchange time T _W, a mark detection time T ₁ with respect to the wafer stage WST1 is shorter than the exposure time T ₂ of the on wafer stage WST2, for example increased and the number of sample shots, further Many alignment marks are detected. In this way, it becomes possible to further increase the alignment accuracy of the wafer alignment, and it is possible to achieve higher accuracy of exposure (overlay exposure) on the wafer.

  In the present embodiment, two modes are prepared as processing modes of the scheduling process. In one mode, the exposure operation is prioritized over the alignment mark detection operation (that is, when both stages interfere with each other, the stage performing the exposure operation is operated with priority, and the stage performing the mark detection operation is set in the waiting state. If the first time (total time of wafer exchange time and mark detection time) exceeds the second time (exposure time), the mark detection time is shortened. In this mode, the detection operation is adjusted. This is the first mode.

  Another mode is a mode in which the mark detection operation is prioritized over the exposure operation. For example, when the first time exceeds the second time, the exposure operation is always performed over the mark detection operation. If the priority of the mark detection operation is not prioritized (the stage that performs the mark detection operation is always kept in a waiting state), but the overall time required for the parallel processing sequence is reduced, the mark detection operation is performed. Is a mode that adopts a sequence that prioritizes and puts a waiting state in the exposure operation. This is the second mode.

  The selection criteria for these two modes depend on the level of accuracy required for the alignment of the wafer. That is, the first mode is selected when the required accuracy for alignment is a normal level, and the second mode is selected when the required accuracy for alignment is stricter than the normal level.

  That is, when the required accuracy for alignment is sufficiently satisfied by the mark detection operation based on the alignment parameters set in the exposure apparatus 100, the scheduling process is executed in the first mode, and the required accuracy for alignment is determined by the exposure apparatus. When the accuracy is higher than the accuracy achieved by the mark detection operation based on the alignment parameter set to 100, the mark detection operation is performed under the condition that the required accuracy is satisfied. Information on the required accuracy for alignment is included in a process program transmitted from a host computer or the like of a lithography system in which the exposure apparatus 100 is operated.

  In the following, the scheduling processing of the parallel processing sequence performed by the processing of the CPU in the main control device 20 of the exposure apparatus 100 of the present embodiment configured as described above is shown in FIG. 8 or FIG. A description will be given along the flowchart with reference to other drawings as appropriate.

FIG. 8 shows a scheduling process executed when the first mode is set, and FIG. 9 shows a scheduling process executed when the second mode is set. Has been. Here also, a case will be described in which an exposure operation is performed on wafer W2 on wafer stage WST2 and a scheduling process is performed for performing wafer exchange and mark detection operations on wafer W1 on wafer stage WST1 in parallel. It is assumed that the timing for executing this scheduling process is at least before the time T _S shown in FIG. Further, it is assumed that, for wafer W2 on wafer stage WST2, shot map data relating to wafer W2 has already been read from the process program, and the wafer exchange / mark detection operation has already been completed.

  First, the scheduling process when the first mode is set will be described. As shown in FIG. 8, first, in step 502, shot map data relating to a shot region to be formed on wafer W1 loaded on wafer stage WST1 is obtained from, for example, a host computer of a lithography system in which exposure apparatus 100 is operated. Read from the sent process program.

Then, in the next step 504, the exposure of the wafer W2 is performed by the above-described procedure based on the shot map data relating to the wafer W2 on the wafer stage WST2 already read and the shot map data relating to the wafer W1 read in step 502. A time T ₂ and a mark detection time T ₁ of the wafer W1 are calculated. When calculating the required time, the required time in the state in which the exposure operation is prioritized so that the exposure operation on the wafer W2 is not affected by the mark detection operation on the wafer W1. calculate. As described above, the required time includes the number of shot areas included in the shot map data, the shot size (for example, scan length), the exposure order of shots set as default exposure parameters, and the average acceleration ( (Average deceleration), settling time, scan speed, constant overscan time, waiting time during sequence during stage movement, number of sample shots (number of marks to be measured), sample set as default alignment parameters It can be easily calculated from the shot measurement order (measurement order of the mark), the number of times of measurement of one mark (number of measurement screens), the stepping speed, the step allowable value, the servo gain, and the like. The wafer exchange time T _W of the wafer W1 is assumed to be set as a certain time, i.e. margin time.

In the next step 506, a time T obtained by subtracting the time (T ₁ + T _W ) from the time T ₂ is obtained. In step 508, it is determined whether or not the time T is greater than zero. If this determination is affirmed, the process proceeds to step 510, and if not, the process proceeds to step 512.

In step 510, the absolute value of T is taken, and a new measurement shot area in which mark measurement can be performed for time | T | is added as a sample shot, and the mark detection operation is adjusted. Specifically, for example, as shown in FIG. 10A, by adding the shot region S ₁₂ to a new sample shot, the time T ₂ does not exceed the time (T ₁ + T _W ). Determine a new sample shot. When the time T ₂ becomes almost the time (T ₁ + T _W ) and the time T ₂ exceeds the time (T ₁ + T _W ) when the number of sample shots is further increased, the adjustment of the alignment mark detection operation is finished. Go to step 516.

On the other hand, in step 512, it is determined whether or not the time T is smaller than zero. If this determination is affirmed, the process proceeds to step 514, and if not, (T ₁ + T _W ) ≈T ₂ , and the scheduling process is terminated.

In step 514, the mark detection operation is adjusted by reducing sample shots by time | T |. Specifically, as shown in FIG. 10B, the exposure time T ₂ becomes shorter than the total time (T ₁ + T _W ) by deleting the shot region S ₆₈ from the sample shot or the like, or The number of sample shots is reduced as long as it does not fall below the minimum number of sample shots as a predetermined reference indicating the lower limit of alignment accuracy. When the exposure time T ₂ becomes substantially equal to the total time (T ₁ + T _W ) or falls below the minimum number of sample shots, the adjustment of the alignment parameter is aborted and the process proceeds to step 516.

  In step 516, the number of sample shots determined in step 510 or step 514 is set as an alignment parameter to update the alignment parameter, and the scheduling process ends.

  Next, the scheduling process when the second mode is selected will be described.

  First, in step 602 of FIG. 9, a process program is transmitted, for example, from a host computer of a lithography system in which the exposure apparatus 100 operates, shot map data relating to a shot area to be formed on wafer W1 loaded on wafer stage WST1. Read from.

Then, in the next step 604, the wafer when the exposure operation is prioritized based on the shot map data relating to the wafer W2 on the wafer stage WST2 already read and the shot map data relating to the wafer W1 read in step 602. and duration T ₂ of the exposure sequence of W2, calculates the mark detection time T ₁ of the wafer W1. However, here, not based on the set value of the alignment parameter set as the apparatus parameter, but based on the alignment parameter specified in the information relating to the required accuracy of alignment of the wafer W1 included in the process program, for example, the number of sample shots and the arrangement. Thus, the mark detection time T ₁ of the wafer W1 is calculated.

In the next step 606, a time T obtained by subtracting the sum of the wafer exchange time T _W and the mark detection time T ₁ from the exposure time T ₂ is obtained. In step 608, it is determined whether time T is smaller than zero. If this determination is affirmed, the process proceeds to step 610, and if not, the process proceeds to step 612.

In step 610, it is determined whether the overall time T _E (see FIG. 7) is shortened by giving priority to the mark detection operation and adding a waiting time during the exposure operation. If this determination is affirmed, the process proceeds to step 614, and if not, the process proceeds to step 618.

In step 614, exposure parameters are adjusted. Specifically, as long as the exposure time T ₂ does not exceed the total time (T ₁ + T _W ), for example, the set value of “scan speed” is lowered, or the set value of “settling time” is further increased. Then, a set value that satisfies T ₂ ≈ (T ₁ + T _W ) is obtained. Thus, (the degree to which parallel processing sequence whole time T _E is not longer) while maintaining the throughput, it is possible to improve exposure accuracy. After step 614 ends, the process proceeds to step 616. If wafer stages WST1 and WST2 interfere during each operation and a waiting time occurs in the mark detection operation, the mark detection operation is prioritized and the wait state of wafer stage WST2 is inserted during the exposure operation. In this case, it is determined whether or not the time TE of the entire parallel processing sequence is shortened. If it is determined that the time T _E is shortened, the waiting time may be set as a device parameter.

  In step 616, values such as the scan speed and settling time adjusted in step 614 are set as new exposure parameter setting values, and the exposure parameters are updated.

  On the other hand, in step 618, the number of sample shots for time | T | is reduced, and the alignment parameters are adjusted in the same manner as in step 514 in FIG.

In step 612, it is determined whether T is greater than zero. If the determination is affirmed, the process proceeds to step 620. If the determination is negative, it is assumed that T ₂ ≈ (T ₁ + T _W ), and the scheduling process ends.

  In step 620, a new sample shot capable of mark measurement for time | T | is added, and alignment parameters are adjusted in the same manner as in step 510 of FIG. After step 620, the process proceeds to step 622.

  In step 622, the setting value of the alignment parameter is updated to the value adjusted in step 618 or step 620. After step 622 is completed, the scheduling process is ended.

  Thereafter, the main control device 20 as the processing device performs the exposure operation on the wafer stage WST2 and the wafer exchange operation on the wafer stage WST1 based on the read shot map, the adjusted exposure parameter, and the alignment parameter at the time Ts. Perform mark detection.

  In the present embodiment, it is needless to say that the same scheduling process as described above is performed when performing an exposure operation on wafer stage WST1, a wafer exchange operation on wafer stage WST2, and a mark detection operation.

  As is clear from the above description, in the present embodiment, the main control device 20 corresponds to the exposure device calculation device, parameter setting device, and processing device of the present invention. That is, the function of the calculation device is realized by the processing of step 502 to step 506 (FIG. 8) or step 602 to step 606 performed by the CPU of the main control device 20, and step 508 to step 516 (FIG. 8) or step 608 to The function of the parameter setting device is realized by the processing in step 622 (FIG. 9). However, it goes without saying that the present invention is not limited to this.

As described above in detail, in the exposure apparatus of this embodiment, in step 506 (FIG. 8) or step 606 (FIG. 9), exposure is performed on one of the two wafer stages (WST1, WST2). The time T ₂ required for the operation and the time T ₁ required for the mark detection operation on the other stage are calculated from the input shot map. In step 508 to step 514 (FIG. 8) or step 608 to step 622 (FIG. 9), at least one of the overall throughput, the alignment accuracy of the wafers W1 and W2, and the exposure accuracy is determined according to the time relationship. A predetermined parameter (exposure parameter or alignment parameter) is adjusted so as to improve. After that, the main controller 20 executes parallel processing of the exposure operation and the mark detection operation on the two stages based on the set parameters. In this way, parameters that define each operation performed on both stages can be adjusted in a direction in which the alignment accuracy or exposure accuracy is improved within a range in which the overall throughput does not decrease. Since each operation can be performed with the set parameters, both high exposure accuracy and high throughput can be achieved.

  In the above embodiment, the alignment parameter to be adjusted is only the number of sample shots. However, the adjustable alignment parameter is not limited to the number of sample shots. For example, the measurement order of sample shots (that is, alignment marks to be measured), the arrangement of sample shots, step tolerances, servo gains, etc. may be adjusted, and the alignment systems ALG1 and ALG2 adopt an image processing method. Alternatively, the number of measurement screens per mark may be adjusted.

  In the above embodiment, the exposure parameters to be adjusted are the scan speed, the settling time, and the waiting time during the stage movement sequence. However, the adjustable exposure parameters are not limited to these. For example, the exposure order of shots may be adjusted.

  Moreover, in the said embodiment, although two modes were prepared as a processing mode of a scheduling process, only one of the modes may be sufficient and there may exist another processing mode.

  In the above embodiment, the stepping in the non-scanning direction is performed simultaneously with the overscan and prescan in the scanning direction of the wafer stage during the exposure operation. However, the present invention is not limited to this, and the overscan and prescan May be stepped non-simultaneously or may be stepped during overscan.

  Further, in the above-described embodiment, the configuration including the two wafer stages WST1 and WST2 is adopted as the configuration of the stage apparatus 30, but the present invention is not limited to this. That is, it suffices to have a plurality of wafer stages, and of course, it may have three or more wafer stages.

In the above-described embodiment, far ultraviolet light such as KrF excimer laser light, illumination light IL, vacuum ultraviolet light such as F ₂ laser and ArF excimer laser, or ultraviolet bright line (g-line, However, the present invention is not limited to this, and other vacuum ultraviolet light such as Ar ₂ laser light (wavelength 126 nm) may be used. Further, for example, not only laser light output from each of the above light sources as vacuum ultraviolet light, but also single wavelength laser light in the infrared region or visible region oscillated from a DFB semiconductor laser or fiber laser, for example, erbium (Er) A harmonic that is amplified by a fiber amplifier doped with erbium and ytterbium (Yb) and wavelength-converted into ultraviolet light using a nonlinear optical crystal may be used.

  Further, an exposure apparatus that uses EUV light, X-rays, or charged particle beams such as an electron beam or an ion beam as illumination light IL, a projection system that does not use a projection optical system, such as a proximity type exposure apparatus, a mirror projection aligner, and The present invention may also be applied to an immersion type exposure apparatus disclosed in International Publication WO99 / 49504 and the like in which a liquid is filled between the projection optical system PL and the wafer.

  In the above-described embodiment, the case where the present invention is applied to a scanning exposure apparatus such as a step-and-scan method has been described, but it is needless to say that the scope of the present invention is not limited to this. That is, the present invention can be suitably applied to a step-and-repeat reduction projection exposure apparatus.

  An illumination optical system and projection optical system composed of a plurality of lenses are incorporated into the exposure apparatus body for optical adjustment, and a reticle stage and wafer stage made up of a number of mechanical parts are attached to the exposure apparatus body to provide wiring and piping. , And further performing general adjustment (electrical adjustment, operation check, etc.), the exposure apparatus of the above embodiment can be manufactured. The exposure apparatus is preferably manufactured in a clean room where the temperature, cleanliness, etc. are controlled.

  The present invention is not limited to an exposure apparatus for manufacturing a semiconductor, but is used for manufacturing a display including a liquid crystal display element. An exposure apparatus for transferring a device pattern onto a glass plate and a device used for manufacturing a thin film magnetic head. The present invention can also be applied to an exposure apparatus that transfers a pattern onto a ceramic wafer, and an exposure apparatus that is used for manufacturing an imaging device (CCD or the like), micromachine, organic EL, DNA chip, and the like. Further, in order to manufacture reticles or masks used in not only microdevices such as semiconductor elements but also light exposure apparatuses, EUV exposure apparatuses, X-ray exposure apparatuses, electron beam exposure apparatuses, etc., glass substrates or silicon wafers, etc. The present invention can also be applied to an exposure apparatus that transfers a circuit pattern. Here, in an exposure apparatus using DUV (far ultraviolet) light, VUV (vacuum ultraviolet) light, or the like, a transmission type reticle is generally used. As a reticle substrate, quartz glass, fluorine-doped quartz glass, meteorite, Magnesium fluoride or quartz is used. Further, in a proximity type X-ray exposure apparatus or an electron beam exposure apparatus, a transmission mask (stencil mask, membrane mask) is used, and a silicon wafer or the like is used as a mask substrate.

  A semiconductor device includes a step of performing functional / performance design of a device, a step of manufacturing a reticle based on the design step, a step of manufacturing a wafer from a silicon material, and a reticle by the above-described method using the exposure apparatus of the above-described embodiment. This pattern is manufactured through a step of transferring the pattern to a wafer, a device assembly step (including a dicing process, a bonding process, and a packaging process), an inspection step, and the like.

  As described above, the exposure apparatus of the present invention is suitable for a lithography process for manufacturing semiconductor elements, liquid crystal display elements, and the like. The device manufacturing method of the present invention is suitable for the production of micro devices.

It is a front view which shows the structure of the exposure apparatus of one Embodiment of this invention. It is a perspective view which shows the structure of an exposure apparatus roughly. It is a front view which shows the structure of a stage apparatus. It is a figure which shows the path | route of the center point of the exposure area | region in scanning exposure. FIG. 5A is a diagram showing the path of the center point of the exposure region in one shot region, and FIG. 5B is a graph showing the speed of the wafer stage in the scanning direction, and FIG. ) Is a graph showing the speed of the wafer stage in the non-scanning direction. It is a figure which shows the detection path | route of alignment mark detection. It is a figure which shows an example of a parallel processing sequence. It is a flowchart which shows the scheduling process when the 1st mode is set in the exposure apparatus of one Embodiment of this invention. It is a flowchart which shows the scheduling process when the 2nd mode is set in the exposure apparatus of one Embodiment of this invention. FIG. 10A is a diagram illustrating a detection path when a sample shot is added, and FIG. 10B is a diagram illustrating a detection path when the sample shot is reduced.

Explanation of symbols

DESCRIPTION OF SYMBOLS 20 ... Main control apparatus (calculation apparatus, parameter setting apparatus, processing apparatus), 100 ... Exposure apparatus, ALG1, ALG2 ... Alignment system, W1, W2 ... Wafer, WST1, WST2 ... Wafer stage.

Claims (8)

An exposure apparatus that exposes a photosensitive object with an energy beam and transfers a predetermined pattern to a plurality of shot areas on the photosensitive object,
Two stages on which a photosensitive object can be placed and can move independently in a two-dimensional plane;
At least one mark detection system for detecting a mark formed on the photosensitive object;
The other stage using the mark detection system according to the required detection accuracy when priority is given to the exposure operation of the photosensitive object on one stage according to the default parallel processing sequence according to the input shot map A calculation device for calculating the time required for the detection operation of the mark on the photosensitive object above;
A predetermined parameter that improves at least one of the overall throughput and the position detection accuracy of the photosensitive object in accordance with the magnitude relationship between the time required for the mark detection operation calculated by the calculation device and the time required for the exposure operation. A parameter setting device for setting
An exposure apparatus comprising: a processing device that executes the exposure operation and the mark detection operation in parallel using the two stages based on parameters set by the parameter setting device.   The parameter setting device determines which one of a first time that is a total time of the calculated time required for the mark detection operation and a certain margin time and a second time required for the exposure operation is greater. 2. The exposure apparatus according to claim 1, wherein the predetermined parameter is set according to a predetermined reference according to the determination result.   The exposure apparatus according to claim 2, wherein the margin time is a time required for exchanging the photosensitive object performed prior to the detection operation of the mark of the photosensitive object on the one stage. The required detection accuracy is an accuracy corresponding to a default setting,
When the first time is smaller than the second time, the parameter setting device is configured to increase the first time as much as possible without exceeding the second time. 4. The parameter relating to the mark detection operation is changed so that the first time is within a range not exceeding the second time when the time is larger than the second time. The exposure apparatus described in 1. The required detection accuracy is stricter than the default setting,
In the parameter setting device, when the first time is smaller than the second time, the parameter relating to the mark detection operation is set so that the first time becomes as large as possible within a range not exceeding the second time. Change
When the first time is larger than the second time, the exposure parameter is changed so that the second time does not exceed the first time and the exposure accuracy is improved. The exposure apparatus according to claim 2 or 3, wherein the exposure apparatus is characterized in that:   6. The exposure apparatus according to claim 5, wherein the exposure parameters include at least one of a shot exposure order, a scanning speed in the case of scanning exposure, a settling time, and a waiting time during a stage movement sequence.   The parameter relating to the mark detection operation includes at least one of the number of marks to be measured, the measurement order and arrangement of the marks, and the number of measurement screens when the mark detection system is an image processing system. Item 6. The exposure apparatus according to Item 4 or 5. A device manufacturing method including a lithography process,
In the said lithography process, it exposes using the exposure apparatus as described in any one of Claims 1-7, The device manufacturing method characterized by the above-mentioned.

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