[go: up one dir, main page]

JP2006005208A - Semiconductor device and mounting method thereof - Google Patents

Semiconductor device and mounting method thereof Download PDF

Info

Publication number
JP2006005208A
JP2006005208A JP2004180728A JP2004180728A JP2006005208A JP 2006005208 A JP2006005208 A JP 2006005208A JP 2004180728 A JP2004180728 A JP 2004180728A JP 2004180728 A JP2004180728 A JP 2004180728A JP 2006005208 A JP2006005208 A JP 2006005208A
Authority
JP
Japan
Prior art keywords
semiconductor device
resin
substrate
circuit board
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2004180728A
Other languages
Japanese (ja)
Inventor
Shigeji Oida
成志 老田
Toshiyuki Nakazawa
利行 仲澤
Hiroharu Omori
弘治 大森
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2004180728A priority Critical patent/JP2006005208A/en
Publication of JP2006005208A publication Critical patent/JP2006005208A/en
Withdrawn legal-status Critical Current

Links

Images

Landscapes

  • Wire Bonding (AREA)

Abstract

【課題】 半導体装置の突起電極面に設けられている樹脂を最適量にして、半導体装置をプリント基板に簡易な方法で実装することができる。
【解決手段】 複数の配線が設けられた基板1と、基板1上に搭載され配線パッドを有する半導体素子2と、基板1の複数の配線と半導体素子2の配線パッドとを電気的に接続した接続手段3と、基板1の半導体素子2とは反対側に設けられた複数の突起電極4と、複数の突起電極4間の基板面に設けられた樹脂5とを備えた半導体装置であって、樹脂5が設けられた下面の面積が基板面の面積と同等以上である。これにより、最適な樹脂量を提供することが可能であり、プリント基板実装後の樹脂形状は大きなフィレットを形成するため信頼性向上に大きく貢献することが可能である。
【選択図】 図1
PROBLEM TO BE SOLVED: To mount a semiconductor device on a printed circuit board by a simple method with an optimal amount of resin provided on the protruding electrode surface of the semiconductor device.
A substrate 1 provided with a plurality of wirings, a semiconductor element 2 mounted on the substrate 1 and having wiring pads, and a plurality of wirings of the substrate 1 and wiring pads of the semiconductor element 2 are electrically connected. A semiconductor device comprising a connecting means 3, a plurality of protruding electrodes 4 provided on the opposite side of the substrate 1 from the semiconductor element 2, and a resin 5 provided on the substrate surface between the plurality of protruding electrodes 4. The area of the lower surface provided with the resin 5 is equal to or larger than the area of the substrate surface. Thereby, it is possible to provide an optimal amount of resin, and the resin shape after mounting on the printed circuit board can greatly contribute to the improvement of reliability because it forms a large fillet.
[Selection] Figure 1

Description

この発明は、半導体装置のプリント基板への実装工程を容易にし、かつ実装後の信頼性向上を目的として半導体装置とプリント基板の間隙に樹脂を塗布する半導体装置およびその実装方法に関するものである。   The present invention relates to a semiconductor device for applying a resin to a gap between a semiconductor device and a printed circuit board for the purpose of facilitating a mounting process of the semiconductor device on a printed circuit board and improving reliability after mounting, and a mounting method thereof.

半導体装置が軽薄短小化していくにつれ、その半導体装置の接続電極も狭ピッチ化され、電極自身は小体積化、小面積化の方向へと推移している。半導体装置を用いてのプリント基板実装においても同様であり、半導体装置とプリント基板を接続する電極は小体積化、小面積化することにより、基板実装信頼性の低下が危ぶまれている。この基板実装信頼性を向上させる手段として、プリント基板実装メーカーにおいては半導体装置とプリント基板の間隙に熱硬化性樹脂を注入、加熱硬化する方法が一般的に行なわれている。また最近では硬化樹脂をあらかじめ半導体装置側に準備しておく工法なども考えられている。   As semiconductor devices are becoming lighter, thinner, and smaller, the connection electrodes of the semiconductor devices are also narrowed, and the electrodes themselves are shifting toward smaller volumes and smaller areas. The same applies to printed circuit board mounting using a semiconductor device, and the electrodes connecting the semiconductor device and the printed circuit board are reduced in volume and area, and there is a danger of lowering the mounting reliability of the board. As means for improving the board mounting reliability, a method of injecting a thermosetting resin into a gap between the semiconductor device and the printed board and heat-curing is generally performed in a printed board mounting manufacturer. Recently, a method of preparing a cured resin on the semiconductor device side in advance has been considered.

以下、従来の熱硬化性樹脂の塗布方法について、図面を参照しながら説明する。   Hereinafter, a conventional thermosetting resin coating method will be described with reference to the drawings.

図11および図12は従来の半導体装置を用いた実装方法のフロー図である。まずプリント基板104上にある電極パッド(図示せず)にはんだペースト103を塗布するはんだ印刷工程があり、半導体装置101を準備しプリント基板104に載置する半導体装置製品搭載工程があり、プリント基板104や半導体装置101を含む全体を加熱してはんだペースト103を溶融させるリフロー工程がある。通常はこの工程まででプリント基板が完成するが、さらなる信頼性向上のためにプリント基板の電気的検査を行なったのち半導体装置101とプリント基板104の間隙に固定樹脂所謂アンダーフィル102を注入する工程があり、再度加熱することによりアンダーフィルを熱的硬化させる工程があり、これらの工程を経ることで半導体装置101とプリント基板104はより強固に固定される。この従来工法の場合、アンダーフィル102の注入および硬化工程が通常工程よりも余分であるため設備費用の面、時間的な面、マンパワーなど様々な負担が大きいといわれている。さらに近年の狭ピッチ化に伴い接続ランドの面積も狭小化の傾向にあるため、前述のはんだ印刷工程においてはんだペーストが印刷マスク穴から抜けない所謂はんだのマスク残り現象が発生してしまう。またリフロー後にははんだペースト中に含まれるフラックス剤がはんだボール周りに固形化し付着するため、のちのアンダーフィル注入工程においてアンダーフィルの進入を妨げられてしまい半導体製品とプリント基板の間隙の最深部まで注入できなくなってしまう。またアンダーフィルを注入するためのスペースを確保する必要があるため、隣り合う半導体製品の部品間距離を広げなければならず、高密度設計ができなくなってしまう。そこで図12に示すようにアンダーフィル樹脂剤105をあらかじめ半導体装置101に塗布し、リフロー実装と同時にプリント基板に固定される工法がいくつかの文献で述べられてきている。   11 and 12 are flow charts of a mounting method using a conventional semiconductor device. First, there is a solder printing process in which a solder paste 103 is applied to an electrode pad (not shown) on the printed circuit board 104, and there is a semiconductor device product mounting process in which the semiconductor device 101 is prepared and placed on the printed circuit board 104. There is a reflow process in which the solder paste 103 is melted by heating the entire device 104 and the semiconductor device 101. Normally, the printed circuit board is completed by this process, but after the electrical inspection of the printed circuit board for further improvement in reliability, a process of injecting a so-called underfill 102 into the gap between the semiconductor device 101 and the printed circuit board 104. There is a step of thermally curing the underfill by heating again. Through these steps, the semiconductor device 101 and the printed board 104 are more firmly fixed. In the case of this conventional construction method, it is said that various burdens such as equipment cost, time and manpower are large because the injection and curing steps of the underfill 102 are extra than the normal steps. Furthermore, since the area of the connecting lands tends to be narrowed along with the recent narrowing of the pitch, a so-called solder mask remaining phenomenon in which the solder paste does not come out of the printing mask hole occurs in the above-described solder printing process. In addition, after the reflow, the flux agent contained in the solder paste solidifies and adheres around the solder balls, so that intrusion of the underfill is hindered in the subsequent underfill injection process, and the deepest part of the gap between the semiconductor product and the printed circuit board is reached. It becomes impossible to inject. In addition, since it is necessary to secure a space for injecting underfill, it is necessary to increase the distance between parts of adjacent semiconductor products, which makes high-density design impossible. Therefore, as shown in FIG. 12, a method for applying an underfill resin agent 105 to the semiconductor device 101 in advance and fixing it to a printed circuit board simultaneously with reflow mounting has been described in several documents.

例えば、特許文献1では、半導体装置の突起電極と突起電極の間に熱可塑性樹脂が設けられている構造となっている。
特開平11−297750号公報
For example, Patent Document 1 has a structure in which a thermoplastic resin is provided between a protruding electrode and a protruding electrode of a semiconductor device.
JP-A-11-297750

しかしながら上記従来の方法には、熱可塑性樹脂の量が不足する恐れがあり、プリント基板へリフロー加熱実装した後の実装信頼性が懸念される。   However, there is a fear that the amount of the thermoplastic resin is insufficient in the conventional method, and there is a concern about mounting reliability after reflow heating mounting on a printed board.

したがって、この発明の目的は、半導体装置の突起電極面に設けられている樹脂を最適量にして、半導体装置をプリント基板に簡易な方法で実装することができる半導体装置およびその実装方法を提供することである。   Accordingly, an object of the present invention is to provide a semiconductor device capable of mounting a semiconductor device on a printed circuit board by a simple method with an optimal amount of resin provided on the protruding electrode surface of the semiconductor device, and a mounting method thereof. That is.

前記課題を解決するためにこの発明の請求項1記載の半導体装置は、複数の配線が設けられた基板と、前記基板上に搭載され配線パッドを有する半導体素子と、前記基板の複数の配線と前記半導体素子の配線パッドとを電気的に接続した接続手段と、前記基板の前記半導体素子とは反対側に設けられた複数の電極と、前記複数の電極間の基板面に設けられた樹脂とを備えた半導体装置であって、前記樹脂が設けられた下面の面積が前記基板面の面積と同等以上である。   In order to solve the above problem, a semiconductor device according to claim 1 of the present invention includes a substrate provided with a plurality of wirings, a semiconductor element mounted on the substrate and having a wiring pad, and a plurality of wirings on the substrate. Connecting means for electrically connecting wiring pads of the semiconductor element; a plurality of electrodes provided on the opposite side of the substrate from the semiconductor element; and a resin provided on a substrate surface between the plurality of electrodes; The area of the lower surface provided with the resin is equal to or greater than the area of the substrate surface.

請求項2記載の半導体装置は、半導体素子と、前記半導体素子に設けられた複数の電極と、前記複数の電極間の半導体素子面に設けられた樹脂とを備えた半導体装置であって、前記樹脂が設けられた下面の面積が前記半導体素子面の面積と同等以上である。   The semiconductor device according to claim 2 is a semiconductor device comprising a semiconductor element, a plurality of electrodes provided on the semiconductor element, and a resin provided on a semiconductor element surface between the plurality of electrodes, The area of the lower surface provided with the resin is equal to or greater than the area of the semiconductor element surface.

請求項3記載の半導体装置は、請求項1または2記載の半導体装置において、前記樹脂は熱可塑性樹脂もしくは熱硬化性樹脂のいずれか一方である。   A semiconductor device according to a third aspect is the semiconductor device according to the first or second aspect, wherein the resin is either a thermoplastic resin or a thermosetting resin.

請求項4記載の半導体装置は、請求項1,2または3記載の半導体装置において、前記基板は、有機基板もしくはポリイミド系樹脂からなる薄いフィルム材から構成されるプラスチックBGA、42アロイもしくは銅の金属フレームからなるリードフレームタイプBGAまたは、セラミック材から構成されるセラミック型BGAである。   A semiconductor device according to claim 4 is the semiconductor device according to claim 1, 2 or 3, wherein the substrate is a plastic BGA, 42 alloy or copper metal made of an organic substrate or a thin film material made of polyimide resin. A lead frame type BGA made of a frame or a ceramic type BGA made of a ceramic material.

請求項5記載の半導体装置は、請求項1,2,3または4記載の半導体装置において、前記半導体装置の電極は、前記樹脂が設けられた下面に対して同一面もしくは埋没させて凹み形状にした。   The semiconductor device according to claim 5 is the semiconductor device according to claim 1, 2, 3, or 4, wherein the electrodes of the semiconductor device are formed on the same surface or buried in the bottom surface on which the resin is provided. did.

請求項6記載の半導体装置の実装方法は、請求項1,2,3,4または5記載の半導体装置をプリント基板へ加熱実装する工程において、前記樹脂は酸化物除去効果を持つ成分を含み、前記樹脂が溶融すると同時に前記プリント基板の電極上の酸化物を除去し、前記半導体装置の電極と前記プリント基板の電極を接続する。   A method for mounting a semiconductor device according to claim 6 is a step of heating and mounting the semiconductor device according to claim 1, 2, 3, 4 or 5 on a printed circuit board, wherein the resin includes a component having an oxide removing effect, Simultaneously with the melting of the resin, the oxide on the electrode of the printed board is removed, and the electrode of the semiconductor device and the electrode of the printed board are connected.

請求項7記載の半導体装置の実装方法は、請求項1,2,3,4または5記載の半導体装置と、酸化物除去効果を持つ溶剤とを準備し、前記半導体装置をプリント基板へ加熱実装する工程において、前記溶剤を前記プリント基板の電極上に塗布した後、前記半導体装置の電極と前記プリント基板の電極を接続する。   A method for mounting a semiconductor device according to claim 7 comprises preparing the semiconductor device according to claim 1, 2, 3, 4 or 5 and a solvent having an oxide removing effect, and mounting the semiconductor device on a printed circuit board by heating. In this step, after the solvent is applied onto the electrode of the printed board, the electrode of the semiconductor device and the electrode of the printed board are connected.

この発明の請求項1記載の半導体装置によれば、複数の配線が設けられた基板と、基板上に搭載され配線パッドを有する半導体素子と、基板の複数の配線と半導体素子の配線パッドとを電気的に接続した接続手段と、基板の半導体素子とは反対側に設けられた複数の電極と、複数の電極間の基板面に設けられた樹脂とを備え、樹脂が設けられた下面の面積が基板面の面積と同等以上であるので、最適な樹脂量を提供することが可能である。これにより、プリント基板実装後の樹脂形状は大きなフィレットを形成するため信頼性向上に大きく貢献することが可能である。また、樹脂の塗布量を多くしても電極が樹脂に埋もれることが無く、電極に検査ピンを接触させる電気特性検査や、電極の位置ずれ検査などの外観検査も容易にできる。   According to the semiconductor device of the first aspect of the present invention, there is provided a substrate provided with a plurality of wirings, a semiconductor element mounted on the substrate and having a wiring pad, a plurality of wirings on the substrate, and a wiring pad of the semiconductor element. An electrically connected connecting means, a plurality of electrodes provided on the opposite side of the substrate from the semiconductor element, and a resin provided on the substrate surface between the plurality of electrodes, the area of the lower surface provided with the resin Is equal to or larger than the area of the substrate surface, so that an optimal amount of resin can be provided. Thereby, since the resin shape after mounting on the printed circuit board forms a large fillet, it can greatly contribute to the improvement of reliability. Further, even if the amount of resin applied is increased, the electrode is not buried in the resin, and an appearance inspection such as an electrical characteristic inspection in which an inspection pin is brought into contact with the electrode or an electrode displacement inspection can be easily performed.

この発明の請求項2記載の半導体装置によれば、半導体素子と、半導体素子に設けられた複数の電極と、複数の電極間の半導体素子面に設けられた樹脂とを備え、樹脂が設けられた下面の面積が半導体素子面の面積と同等以上であるので、半導体素子からのみ成る半導体装置、所謂ウエハレベルパッケージまたはフリップチップパッケージにおいて請求項1と同様の効果が得られる。   According to a second aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor element; a plurality of electrodes provided on the semiconductor element; and a resin provided on a semiconductor element surface between the plurality of electrodes. Since the area of the lower surface is equal to or larger than the area of the semiconductor element surface, the same effect as in the first aspect can be obtained in a semiconductor device composed of only semiconductor elements, so-called wafer level package or flip chip package.

請求項3では、請求項1または2記載の半導体装置において、樹脂は熱可塑性樹脂もしくは熱硬化性樹脂のいずれか一方であることが望ましい。なお、プリント基板実装後の不良半導体装置の取り外し工程所謂リペア工程において容易に取り外しが可能であることを目的とするなら熱可塑性樹脂であることが望ましい。   According to a third aspect of the present invention, in the semiconductor device according to the first or second aspect, the resin is preferably either a thermoplastic resin or a thermosetting resin. Note that a thermoplastic resin is desirable for the purpose of being able to be easily removed in a so-called repair process of removing a defective semiconductor device after mounting on a printed circuit board.

請求項4では、請求項1,2または3記載の半導体装置において、基板は、有機基板もしくはポリイミド系樹脂からなる薄いフィルム材から構成されるプラスチックBGA、42アロイもしくは銅の金属フレームからなるリードフレームタイプBGAまたは、セラミック材から構成されるセラミック型BGAであることが望ましい。   5. The semiconductor device according to claim 1, wherein the substrate is a plastic BGA made of a thin film material made of an organic substrate or a polyimide resin, 42 alloy, or a lead frame made of a copper metal frame. A type BGA or a ceramic type BGA made of a ceramic material is desirable.

請求項5では、請求項1,2,3または4記載の半導体装置において、半導体装置の電極は、樹脂が設けられた下面に対して同一面もしくは埋没させて凹み形状にすることが望ましい。   According to a fifth aspect of the present invention, in the semiconductor device according to the first, second, third, or fourth aspect, it is desirable that the electrodes of the semiconductor device have the same surface or a recessed shape with respect to the lower surface provided with the resin.

この発明の請求項6記載の半導体装置の実装方法によれば、請求項1,2,3,4または5記載の半導体装置をプリント基板へ加熱実装する工程において、樹脂は酸化物除去効果を持つ成分を含み、樹脂が溶融すると同時にプリント基板の電極上の酸化物を除去し、半導体装置の電極とプリント基板の電極を接続するので、プリント基板へのリフロー加熱実装した後の実装信頼性をより向上でき、かつプリント基板への実装工程を容易にできる。この場合、樹脂が溶融すると同時にプリント基板の電極上の酸化物を除去する所謂フラックス効果を発揮することで、半導体装置とプリント基板を容易に接続することができる。   According to the method for mounting a semiconductor device according to claim 6 of the present invention, the resin has an oxide removal effect in the step of heat mounting the semiconductor device according to claim 1, 2, 3, 4 or 5 onto the printed circuit board. As the resin melts, the oxide on the printed circuit board electrode is removed and the electrode of the semiconductor device is connected to the printed circuit board electrode. It can be improved and the mounting process on the printed circuit board can be facilitated. In this case, the semiconductor device and the printed board can be easily connected by exhibiting a so-called flux effect that removes the oxide on the electrode of the printed board simultaneously with the melting of the resin.

この発明の請求項7記載の半導体装置の実装方法によれば、請求項1,2,3,4または5記載の半導体装置と、酸化物除去効果を持つ溶剤とを準備し、半導体装置をプリント基板へ加熱実装する工程において、溶剤をプリント基板の電極上に塗布した後、半導体装置の電極とプリント基板の電極を接続するので、酸化物除去効果を持つ溶剤所謂フラックス剤を用いても、プリント基板へのリフロー加熱実装した後の実装信頼性をより向上でき、かつプリント基板への実装工程を容易にできる。   According to a method for mounting a semiconductor device according to a seventh aspect of the present invention, the semiconductor device according to the first, second, third, fourth or fifth aspect and a solvent having an oxide removing effect are prepared, and the semiconductor device is printed. In the process of heat mounting on the substrate, the solvent is applied onto the electrode of the printed circuit board, and then the electrode of the semiconductor device and the electrode of the printed circuit board are connected. The mounting reliability after reflow heating mounting on the board can be further improved, and the mounting process on the printed board can be facilitated.

以下、本発明の半導体装置およびその実装方法の実施形態について、図面を参照しながら説明する。   Embodiments of a semiconductor device and a mounting method thereof according to the present invention will be described below with reference to the drawings.

この発明の第1の実施の形態を図1〜図4に基づいて説明する。図1は本発明の第1の実施形態の半導体装置の側面図、図2は同半導体装置の突起電極面側から見た平面図、図3は図1のA部拡大図である。   A first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a side view of a semiconductor device according to a first embodiment of the present invention, FIG. 2 is a plan view of the semiconductor device viewed from the protruding electrode surface side, and FIG. 3 is an enlarged view of a portion A in FIG.

図1〜図3に示すように、複数の配線が設けられた基板1と、基板1上に搭載され配線パッドを有する半導体素子2と、基板1の複数の配線と半導体素子2の配線パッドとを電気的に接続した接続手段3(図1ではスタッドバンプボンディング方式を図示)と、基板1上の半導体素子2とは反対側に設けられた複数の突起電極4と、複数の突起電極4間の基板面に熱可塑性樹脂もしくは熱硬化性樹脂のいずれか一方の樹脂5が設けられている半導体装置6があり、樹脂5が設けられている下面の面積が基板面の面積と同等もしくはそれ以上となっている。この構成によりプリント基板実装後の樹脂形状は大きなフィレットを形成するため信頼性向上に大きく貢献することが可能である。   As shown in FIG. 1 to FIG. 3, a substrate 1 provided with a plurality of wirings, a semiconductor element 2 mounted on the substrate 1 and having wiring pads, a plurality of wirings on the substrate 1, and wiring pads of the semiconductor elements 2 Connecting means 3 (stud bump bonding method is shown in FIG. 1), a plurality of protruding electrodes 4 provided on the opposite side of the semiconductor element 2 on the substrate 1, and a plurality of protruding electrodes 4 There is a semiconductor device 6 in which either one of a thermoplastic resin or a thermosetting resin 5 is provided on the substrate surface, and the area of the lower surface on which the resin 5 is provided is equal to or larger than the area of the substrate surface. It has become. With this configuration, the resin shape after mounting on the printed board forms a large fillet, which can greatly contribute to the improvement of reliability.

図4は図1のA部に相当する拡大図であり、図3とは別の事例を示している。図4に示すように、プリント基板実装後の大きなフィレットを確保するため、半導体装置6に具備された樹脂5は基板1の側面まではみ出す構成となっている。この構成により樹脂5の塗布量を多くしても突起電極4が樹脂5に埋もれることが無く、故に突起電極4に検査ピンを接触させる電気特性検査や、突起電極4の位置ずれ検査などの外観検査も容易にできる。   FIG. 4 is an enlarged view corresponding to part A of FIG. 1, and shows a case different from FIG. As shown in FIG. 4, the resin 5 provided in the semiconductor device 6 is configured to protrude to the side surface of the substrate 1 in order to secure a large fillet after the printed circuit board is mounted. With this configuration, the protruding electrode 4 is not buried in the resin 5 even when the amount of the resin 5 applied is increased. Therefore, the external appearance such as an electrical characteristic inspection in which the inspection pin is brought into contact with the protruding electrode 4 and a positional deviation inspection of the protruding electrode 4 is performed. Inspection is also easy.

本実施形態において半導体装置6に用いられる基板1は幾層かの金属層からなる有機系基板、金属層が貼り付けられたポリイミド系フィルム、42アロイや銅などの金属板からなるリードフレーム、タングステンやモリブデンに代表される金属層が貼り付けられたセラミックなどが挙げられ、半導体装置の目的に応じて構成される所謂パッケージ形状により基材材質が選択される。詳しいパッケージ形状については図面を用いて後述する(第4の実施形態)。   In this embodiment, the substrate 1 used for the semiconductor device 6 is an organic substrate made of several metal layers, a polyimide film to which a metal layer is attached, a lead frame made of a metal plate such as 42 alloy or copper, tungsten And a ceramic with a metal layer typified by molybdenum or the like attached thereto, and the base material is selected according to a so-called package shape configured in accordance with the purpose of the semiconductor device. A detailed package shape will be described later with reference to the drawings (fourth embodiment).

本実施形態において突起電極は、直径0.2mm前後から直径0.8mm前後の金属ボールであることが多く、金属組成はスズ鉛共晶はんだのほか近年の環境問題に即して鉛を用いない所謂鉛フリーはんだなどが挙げられる。またバンプと呼ばれる、より小径の突起電極などが使われる場合もある。なお、突起電極は、樹脂が設けられた下面に対して同一面もしくは埋没させて凹み形状にしてもよい。   In this embodiment, the protruding electrode is often a metal ball having a diameter of about 0.2 mm to about 0.8 mm, and the metal composition does not use lead in accordance with recent environmental problems in addition to tin-lead eutectic solder. Examples include so-called lead-free solder. In some cases, a bump electrode called a bump having a smaller diameter is used. Note that the protruding electrodes may be recessed on the same surface or embedded with respect to the lower surface provided with the resin.

本実施形態において樹脂5は熱可塑性もしくは熱硬化性のいずれか一方であることが望ましいが、プリント基板実装後の不良半導体装置の取り外し工程所謂リペア工程において容易に取り外しが可能であることを目的とするなら熱可塑性樹脂であることが望ましい。また近年ではリペアが可能な熱硬化性樹脂の開発も進んできている。   In this embodiment, it is desirable that the resin 5 is either thermoplastic or thermosetting, but the purpose is that the defective semiconductor device can be easily removed in a so-called repair process after mounting the printed circuit board. If so, a thermoplastic resin is desirable. In recent years, thermosetting resins that can be repaired have been developed.

この発明の第2の実施の形態を図5および図6に基づいて説明する。図5および図6は本発明の第1の実施形態の半導体装置の実装方法の側面図である。   A second embodiment of the present invention will be described with reference to FIGS. 5 and 6 are side views of the semiconductor device mounting method according to the first embodiment of the present invention.

図5に示すように、第1の実施形態の半導体装置6を用いた実装方法であり、ここではボールグリッドアレイ7をプリント基板8へ加熱実装する工程において、プリント基板8に設けられた複数の配線パッド(電極)9は半導体装置6の突起電極4と対向しており、位置合わせを行ないながらプリント基板8上に載置され加熱リフロー実装される。樹脂5には酸化物除去作用を持つ成分所謂フラックス剤が含まれているのが望ましく、よってリフロー実装の予備加熱時に配線パッド9や突起電極4の表面を活性化させることができる。予備加熱は通常炉内温度は140℃前後から180℃前後で経過時間は数十秒から数分必要で、プリント基板の大きさ、搭載部品の大きさや数、はんだペーストの組成などに応じて適した条件を選ぶ必要がある。リフロー実装の本加熱時には半導体装置6の突起電極4がプリント基板8の配線パッド9に自ら整合する所謂セルフアライメント効果が発揮できるように、樹脂5の粘度は出来る限り低い方が良い。リフロー実装の本加熱を通過すると突起電極4は配線パッド9と金属間結合し、その後樹脂5が固形化され半導体装置6とプリント基板8が固定される。   As shown in FIG. 5, the mounting method uses the semiconductor device 6 of the first embodiment. Here, in the step of heating and mounting the ball grid array 7 on the printed circuit board 8, a plurality of the mounting methods provided on the printed circuit board 8 are used. The wiring pads (electrodes) 9 are opposed to the protruding electrodes 4 of the semiconductor device 6 and are placed on the printed circuit board 8 while being aligned and mounted by heating reflow. It is desirable that the resin 5 contains a so-called flux agent having an oxide removing action, so that the surfaces of the wiring pads 9 and the protruding electrodes 4 can be activated during preheating for reflow mounting. Preheating usually requires a furnace temperature of around 140 ° C to around 180 ° C and an elapsed time of several tens of seconds to several minutes. It is suitable for the size of the printed circuit board, the size and number of mounted components, and the solder paste composition. It is necessary to select the conditions. At the time of the main heating in the reflow mounting, the viscosity of the resin 5 is preferably as low as possible so that the so-called self-alignment effect in which the protruding electrodes 4 of the semiconductor device 6 align themselves with the wiring pads 9 of the printed circuit board 8 can be exhibited. When the main heating for reflow mounting is passed, the protruding electrode 4 is bonded to the wiring pad 9 between the metals, and then the resin 5 is solidified and the semiconductor device 6 and the printed board 8 are fixed.

また、図6に示すように、樹脂5にフラックス剤が含まれていない場合は半導体装置6をプリント基板8へ搭載する前にあらかじめプリント基板8の主に配線パッド9の上にフラックス剤10を塗布しておく。もしくは半導体装置6をプリント基板8へ搭載する直前に突起電極4へフラックス剤を塗布転写する方法でも良い(図示せず)。プリント基板実装後の信頼性向上を目的とするならば樹脂5は半導体装置6とプリント基板8の間隙だけでなく半導体装置の側面にまで及ぶフィレットを形成する方が望ましいため、樹脂5を多めにしたほうが良い。その構成は図1から図3を用いて前述したとおりである。   Further, as shown in FIG. 6, when the resin 5 does not contain a flux agent, the flux agent 10 is preliminarily applied mainly on the wiring pads 9 of the printed circuit board 8 before the semiconductor device 6 is mounted on the printed circuit board 8. Apply. Alternatively, a method of applying and transferring a flux agent to the protruding electrode 4 immediately before mounting the semiconductor device 6 on the printed circuit board 8 (not shown) may be used. For the purpose of improving the reliability after mounting the printed circuit board, it is desirable that the resin 5 forms a fillet that extends not only to the gap between the semiconductor device 6 and the printed circuit board 8 but also to the side surface of the semiconductor device. It's better to do it. The configuration is as described above with reference to FIGS.

この発明の第3の実施の形態を図7に基づいて説明する。図7は本発明の第3の実施形態の半導体装置の製造方法の側面図である。   A third embodiment of the present invention will be described with reference to FIG. FIG. 7 is a side view of the semiconductor device manufacturing method according to the third embodiment of the present invention.

図7に示すように、第1の実施形態の半導体装置6において、主に樹脂5の成分を主体としたものであるならば液状樹脂11を用いても構わない。液状樹脂11のメリットとして半導体装置6(半導体素子など図示せず)の大きさに応じて、また突起電極(図示せず)の大きさに応じて塗布量を自在に制御することが可能であり、塗布場所も自由に選択できる。   As shown in FIG. 7, in the semiconductor device 6 of the first embodiment, the liquid resin 11 may be used as long as it is mainly composed of the resin 5 component. As a merit of the liquid resin 11, it is possible to freely control the coating amount according to the size of the semiconductor device 6 (semiconductor elements and the like not shown) and according to the size of the protruding electrodes (not shown). The application location can also be freely selected.

この発明の第4の実施の形態を図8〜図10に基づいて説明する。図8〜図10は本発明の第4の実施形態の半導体装置で、パッケージ形状が異なる例を示す側面図である。   A fourth embodiment of the present invention will be described with reference to FIGS. 8 to 10 are side views showing examples of different package shapes in the semiconductor device according to the fourth embodiment of the present invention.

図8に示す半導体装置14はプラスチックタイプBGAあるいはOMPAC型BGAと呼ばれており、幾層かの金属層と樹脂層が順に積層された有機基板15に半導体素子2が搭載され金属細線16により有機基板15の配線パッド(図示せず)と半導体素子2の電極パッド(図示せず)が電気的に接続され主にエポキシ系の封止樹脂25で保護されており、半導体素子2とは反対側の面にははんだボール4と本発明の第1の実施形態と同様の樹脂5が具備されている。有機基板15は金属層が貼り付けられたポリイミド系フィルムにすることにより、所謂テープタイプBGAとなる。   The semiconductor device 14 shown in FIG. 8 is called a plastic type BGA or an OMPAC type BGA. The semiconductor element 2 is mounted on an organic substrate 15 in which several metal layers and a resin layer are laminated in order, and the organic thin wires 16 are used to A wiring pad (not shown) of the substrate 15 and an electrode pad (not shown) of the semiconductor element 2 are electrically connected and protected mainly by an epoxy-based sealing resin 25, and is opposite to the semiconductor element 2. This surface is provided with a solder ball 4 and a resin 5 similar to that of the first embodiment of the present invention. The organic substrate 15 becomes a so-called tape type BGA by using a polyimide film to which a metal layer is attached.

図9に示す半導体装置17はリードフレームタイプBGAと呼ばれており、42アロイや銅などの金属板からなるリードフレーム18に半導体素子2が搭載され金属細線16によりリードフレーム18と半導体素子2の電極パッド(図示せず)が電気的に接続され主にエポキシ系の封止樹脂25で保護されており、半導体素子2とは反対側の面のリードフレーム18にはんだボール4と本発明の第1の実施形態と同様の樹脂5が具備されている。   The semiconductor device 17 shown in FIG. 9 is called a lead frame type BGA. The semiconductor element 2 is mounted on a lead frame 18 made of a metal plate such as 42 alloy or copper, and the lead frame 18 and the semiconductor element 2 are connected by a thin metal wire 16. An electrode pad (not shown) is electrically connected and is mainly protected by an epoxy-based sealing resin 25, and the solder ball 4 and the first electrode of the present invention are provided on the lead frame 18 on the surface opposite to the semiconductor element 2. A resin 5 similar to that of the first embodiment is provided.

図10に示す半導体装置19はウエハレベルパッケージと呼ばれており、半導体素子2と、半導体素子2に設けられた複数の突起電極20と、複数の突起電極20間の半導体素子面に設けられた樹脂5とを備えた半導体装置であって、樹脂5が設けられた下面の面積が半導体素子面の面積と同等以上である。この場合、半導体素子2の電極パッドに突起電極20が設けられており、突起電極20と同一面に本発明の第1の実施形態と同様の樹脂5が具備されている。なお、半導体装置はフリップチップパッケージとしてもよい。   The semiconductor device 19 shown in FIG. 10 is called a wafer level package, and is provided on the semiconductor element 2, the plurality of protruding electrodes 20 provided on the semiconductor element 2, and the semiconductor element surface between the plurality of protruding electrodes 20. A semiconductor device including the resin 5, wherein an area of a lower surface on which the resin 5 is provided is equal to or greater than an area of a semiconductor element surface. In this case, the protruding electrode 20 is provided on the electrode pad of the semiconductor element 2, and the same resin 5 as that of the first embodiment of the present invention is provided on the same surface as the protruding electrode 20. The semiconductor device may be a flip chip package.

これらは代表的な半導体装置を挙げているが、本発明の実施形態はこれらの半導体装置にのみ限定するものではなく、突起電極をもつ半導体装置ばかりか、突起電極が無いランドのみのタイプ所謂ランドグリッドアレイタイプLGAに適用することもできる。この場合プリント基板への実装後の半導体装置とプリント基板の間隙は非常に狭くなるため、その間隙に応じた適量の樹脂を具備する必要がある。場合によっては半導体装置のランド部全体に樹脂を具備するのではなく、ランド部以外の箇所のみの具備でも構わない。   These are representative semiconductor devices. However, the embodiments of the present invention are not limited to these semiconductor devices, and are not only semiconductor devices having protruding electrodes, but also land types without protruding electrodes, so-called lands. It can also be applied to a grid array type LGA. In this case, since the gap between the semiconductor device after mounting on the printed circuit board and the printed circuit board becomes very narrow, it is necessary to provide an appropriate amount of resin corresponding to the gap. In some cases, the resin may not be provided on the entire land portion of the semiconductor device, but only on portions other than the land portion.

以上のように本発明を用いることにより、最適な樹脂量を提供することが可能であり、プリント基板へリフロー加熱実装した後の実装信頼性もより向上でき、かつプリント基板への実装工程を容易にできる。   As described above, by using the present invention, it is possible to provide the optimum amount of resin, the mounting reliability after reflow heating mounting on the printed circuit board can be further improved, and the mounting process on the printed circuit board is easy. Can be.

本発明にかかる半導体装置およびその実装方法は、最適な樹脂量を提供することが可能であり、プリント基板へリフロー加熱実装した後の実装信頼性もより向上でき、かつプリント基板への実装工程を容易にできる等の効果を有し、半導体装置のプリント基板実装時の信頼性を向上させる手段として有用である。   The semiconductor device and the mounting method thereof according to the present invention can provide an optimal amount of resin, can further improve mounting reliability after reflow heating mounting on a printed circuit board, and can perform a mounting process on the printed circuit board. It has an effect that it can be easily performed, and is useful as a means for improving the reliability of a semiconductor device mounted on a printed circuit board.

本発明の第1の実施形態の半導体装置の側面図である。1 is a side view of a semiconductor device according to a first embodiment of the present invention. 図1の半導体装置の突起電極面側から見た平面図である。FIG. 2 is a plan view of the semiconductor device of FIG. 図1のA部拡大図である。It is the A section enlarged view of FIG. 図1のA部に相当する別の例の拡大図である。It is an enlarged view of another example corresponding to the A section of FIG. 本発明の第1の実施形態の半導体装置の実装方法の側面図である。It is a side view of the mounting method of the semiconductor device of a 1st embodiment of the present invention. 本発明の第1の実施形態の半導体装置の実装方法の別の例の側面図である。It is a side view of another example of the mounting method of the semiconductor device of the 1st Embodiment of this invention. 本発明の第3の実施形態の半導体装置の製造方法の側面図である。It is a side view of the manufacturing method of the semiconductor device of the 3rd Embodiment of this invention. 本発明の第4の実施形態の半導体装置で、パッケージ形状が異なる例を示す側面図である。It is a side view which shows the example from which a package shape differs in the semiconductor device of the 4th Embodiment of this invention. 本発明の第4の実施形態の半導体装置で、パッケージ形状が異なる例を示す側面図である。It is a side view which shows the example from which a package shape differs in the semiconductor device of the 4th Embodiment of this invention. 本発明の第4の実施形態の半導体装置で、パッケージ形状が異なる例を示す側面図である。It is a side view which shows the example from which a package shape differs in the semiconductor device of the 4th Embodiment of this invention. 従来の半導体装置を用いた実装方法の側面図である。It is a side view of the mounting method using the conventional semiconductor device. 従来の半導体装置を用いた実装方法の別の例の側面図である。It is a side view of another example of the mounting method using the conventional semiconductor device.

符号の説明Explanation of symbols

1 基板
2 半導体素子
3 接続手段
4 突起電極
5 樹脂
6 半導体装置
7 ボールグリッドアレイタイプパッケージ(BGA)
8 プリント基板
9 配線パッド
10 フラックス剤
11 液状樹脂
12 凹み
13 ダム
14 半導体装置
15 有機基板
16 金属細線
17 半導体装置
18 リードフレーム
19 半導体装置
20 突起電極
101 半導体装置
102 アンダーフィル
103 はんだペースト
104 プリント基板
105 アンダーフィル樹脂剤
DESCRIPTION OF SYMBOLS 1 Board | substrate 2 Semiconductor element 3 Connection means 4 Projection electrode 5 Resin 6 Semiconductor device 7 Ball grid array type package (BGA)
8 Printed circuit board 9 Wiring pad 10 Flux agent 11 Liquid resin 12 Dent 13 Dam 14 Semiconductor device 15 Organic substrate 16 Metal thin wire 17 Semiconductor device 18 Lead frame 19 Semiconductor device 20 Protruding electrode 101 Semiconductor device 102 Underfill 103 Solder paste 104 Printed circuit board 105 Underfill resin agent

Claims (7)

複数の配線が設けられた基板と、前記基板上に搭載され配線パッドを有する半導体素子と、前記基板の複数の配線と前記半導体素子の配線パッドとを電気的に接続した接続手段と、前記基板の前記半導体素子とは反対側に設けられた複数の電極と、前記複数の電極間の基板面に設けられた樹脂とを備えた半導体装置であって、前記樹脂が設けられた下面の面積が前記基板面の面積と同等以上であることを特徴とする半導体装置。   A substrate provided with a plurality of wirings, a semiconductor element mounted on the substrate and having a wiring pad, a connection means for electrically connecting the plurality of wirings of the substrate and the wiring pads of the semiconductor element, and the substrate A semiconductor device comprising a plurality of electrodes provided on the opposite side of the semiconductor element and a resin provided on a substrate surface between the plurality of electrodes, wherein an area of a lower surface provided with the resin is A semiconductor device having an area equal to or greater than the area of the substrate surface. 半導体素子と、前記半導体素子に設けられた複数の電極と、前記複数の電極間の半導体素子面に設けられた樹脂とを備えた半導体装置であって、前記樹脂が設けられた下面の面積が前記半導体素子面の面積と同等以上であることを特徴とする半導体装置。   A semiconductor device comprising a semiconductor element, a plurality of electrodes provided on the semiconductor element, and a resin provided on a semiconductor element surface between the plurality of electrodes, wherein an area of a lower surface provided with the resin is A semiconductor device having an area equal to or greater than the area of the semiconductor element surface. 前記樹脂は熱可塑性樹脂もしくは熱硬化性樹脂のいずれか一方である請求項1または2記載の半導体装置。   The semiconductor device according to claim 1, wherein the resin is one of a thermoplastic resin or a thermosetting resin. 前記基板は、有機基板もしくはポリイミド系樹脂からなる薄いフィルム材から構成されるプラスチックBGA、42アロイもしくは銅の金属フレームからなるリードフレームタイプBGAまたは、セラミック材から構成されるセラミック型BGAである請求項1,2または3記載の半導体装置。   The substrate is a plastic BGA made of an organic substrate or a thin film material made of polyimide resin, a lead frame type BGA made of a 42 alloy or copper metal frame, or a ceramic type BGA made of a ceramic material. The semiconductor device according to 1, 2 or 3. 前記半導体装置の電極は、前記樹脂が設けられた下面に対して同一面もしくは埋没させて凹み形状にした請求項1,2,3または4記載の半導体装置。   5. The semiconductor device according to claim 1, wherein the electrodes of the semiconductor device are formed in the same surface or a recessed shape with respect to the lower surface provided with the resin. 請求項1,2,3,4または5記載の半導体装置をプリント基板へ加熱実装する工程において、前記樹脂は酸化物除去効果を持つ成分を含み、前記樹脂が溶融すると同時に前記プリント基板の電極上の酸化物を除去し、前記半導体装置の電極と前記プリント基板の電極を接続することを特徴とする半導体装置の実装方法。   6. The step of heat-mounting the semiconductor device according to claim 1, 2, 3, 4, or 5 on a printed circuit board, wherein the resin includes a component having an oxide removing effect, and at the same time as the resin melts, on the electrode of the printed circuit board A method for mounting a semiconductor device, comprising removing the oxide and connecting the electrode of the semiconductor device and the electrode of the printed circuit board. 請求項1,2,3,4または5記載の半導体装置と、酸化物除去効果を持つ溶剤とを準備し、前記半導体装置をプリント基板へ加熱実装する工程において、前記溶剤を前記プリント基板の電極上に塗布した後、前記半導体装置の電極と前記プリント基板の電極を接続することを特徴とする半導体装置の実装方法。   6. A step of preparing the semiconductor device according to claim 1, 2, 3, 4 or 5 and a solvent having an oxide removing effect, and heating and mounting the semiconductor device on a printed circuit board. A method for mounting a semiconductor device, comprising: connecting an electrode of the semiconductor device and an electrode of the printed circuit board after coating on the substrate.
JP2004180728A 2004-06-18 2004-06-18 Semiconductor device and mounting method thereof Withdrawn JP2006005208A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004180728A JP2006005208A (en) 2004-06-18 2004-06-18 Semiconductor device and mounting method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004180728A JP2006005208A (en) 2004-06-18 2004-06-18 Semiconductor device and mounting method thereof

Publications (1)

Publication Number Publication Date
JP2006005208A true JP2006005208A (en) 2006-01-05

Family

ID=35773314

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004180728A Withdrawn JP2006005208A (en) 2004-06-18 2004-06-18 Semiconductor device and mounting method thereof

Country Status (1)

Country Link
JP (1) JP2006005208A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007207475A (en) * 2006-01-31 2007-08-16 Ibaraki Univ Portable atmospheric pressure plasma generator
US9520544B2 (en) 2014-09-30 2016-12-13 Nichia Corporation Light source including ceramic substrate mounted on mounting substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007207475A (en) * 2006-01-31 2007-08-16 Ibaraki Univ Portable atmospheric pressure plasma generator
US9520544B2 (en) 2014-09-30 2016-12-13 Nichia Corporation Light source including ceramic substrate mounted on mounting substrate
US10833235B2 (en) 2014-09-30 2020-11-10 Nichia Corporation Light source, method of manufacturing the light source, and method of mounting the light source

Similar Documents

Publication Publication Date Title
JP3070514B2 (en) Semiconductor device having protruding electrode, method of mounting semiconductor device, and mounting structure thereof
US6046910A (en) Microelectronic assembly having slidable contacts and method for manufacturing the assembly
TWI478254B (en) Flip-chip interconnect of bumps on leads
TWI419300B (en) Substrate with built-in electronic parts and manufacturing method thereof
US7921551B2 (en) Electronic component mounting method
KR100367955B1 (en) Semiconductor device having reinforced coupling between solder balls and substrate
KR20120033973A (en) Method of manufacturing electronic device and electronic device
JP2004342988A (en) Method of manufacturing semiconductor package and method of manufacturing semiconductor device
KR101140518B1 (en) Wiring b0ard and semic0nduct0r device
KR20080030897A (en) Semiconductor devices, semiconductor packages, and manufacturing methods thereof
US20020089836A1 (en) Injection molded underfill package and method of assembly
JP2009099669A (en) Electronic component mounting structure and mounting method
JP4051570B2 (en) Manufacturing method of semiconductor device
JP3972209B2 (en) Semiconductor device and manufacturing method thereof, circuit board, and electronic apparatus
JP3477486B2 (en) Manufacturing method of electronic component package
US8168525B2 (en) Electronic part mounting board and method of mounting the same
JP2006005208A (en) Semiconductor device and mounting method thereof
JP4511266B2 (en) Semiconductor device and manufacturing method thereof
JP2006049695A (en) Semiconductor device and mounting method thereof
JP4381795B2 (en) Electronic component mounting method
JP4835406B2 (en) Mounting structure and manufacturing method thereof, and semiconductor device and manufacturing method thereof
JP4561969B2 (en) Semiconductor device
JP3450838B2 (en) Manufacturing method of electronic component package
JP2000058597A (en) Electronic component mounting method
JP2008244277A (en) Semiconductor device and manufacturing method thereof

Legal Events

Date Code Title Description
RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20060706

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20070220

A761 Written withdrawal of application

Free format text: JAPANESE INTERMEDIATE CODE: A761

Effective date: 20070731