JP2006080275A - Semiconductor laser element - Google Patents

Abstract

A semiconductor laser device that suppresses mechanical stress and improves heat dissipation is provided.
A first clad layer 6 on an active layer 5, a ridge including a second clad layer 8 a disposed on the first clad layer 6, and a ridge 11 sandwiched between the first clad layer 6. And a pair of current blocking layers 12a and 12b facing each other, and metal dummy ridges 13a and 13b disposed on the pair of current blocking layers 12a and 12b, respectively, spaced apart from the ridge 11.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor laser device, and more particularly to a semiconductor laser diode having a ridge structure.

  For high-power semiconductor laser devices such as a high-power ridge type laser diode (LD) used for a writable compact disc (CD-R) and a writable digital versatile disc (DVD-R), −10 ° C. Operation guarantee at about + 70 ° C is required. During high output operation, the current density of laser oscillation is high, and heat generation in the operation layer including the active layer is large. The active layer of the LD is provided in the vicinity of the ridge surface. In order to ensure good heat dissipation in the operation layer, face-down mounting is generally used in which the ridge side is mounted on a package base.

  In a conventional LD, a p-type semiconductor contact layer is formed on a p-type semiconductor ridge including a p-type cladding layer. In regions on both sides of the ridge, a current blocking layer such as an n-type semiconductor having an opposite conductivity type or an insulating film is provided. Generally, the current blocking layer is thinner than the ridge. Therefore, mechanical stress concentrates on the ridge when the electrode provided on the surface of the ridge contact layer is mounted on the package base. Therefore, there is a problem that characteristic fluctuations and mechanical damage occur due to stress.

  In order to suppress mechanical stress during mounting, a dummy ridge having the same semiconductor layer as the ridge is provided when the ridge is formed (see, for example, Patent Document 1). In Patent Document 1, a current blocking layer of a conductive type semiconductor opposite to the ridge and the dummy ridge is provided in the entire surface of the dummy ridge and the region between the dummy ridge and the ridge to prevent leakage current from flowing through the dummy ridge. ing. In some cases, a ridge and a dummy ridge are formed by selective growth. (For example, refer to Patent Document 2).

  In general, there is anisotropy in etching rate and growth rate in wet etching and crystal growth of compound semiconductors used in LD. In Patent Document 1, the ridge and the dummy ridge are formed by wet etching a p-type growth layer. On the side wall of the dummy ridge, an inactive crystal plane with a slow etching rate is exposed. On the inert crystal plane exposed by wet etching, the growth rate is low. Therefore, it is difficult to uniformly grow the current blocking layer over the entire dummy ridge. It is difficult to suppress the leakage current flowing through the dummy ridge during the high output operation of the LD.

  Further, the selective growth has a loading effect in which the growth rate changes depending on the exposed surface area ratio. In Patent Document 2, in order to control the thickness and composition of the ridge, a surface having a desired area is exposed in the vicinity of the ridge, and a dummy ridge is formed together with the ridge. However, impurity contamination, crystal defects, and the like are introduced into the surface on which the ridge is selectively grown by a manufacturing process such as selective growth mask formation. The selective growth surface is located in the vicinity of the active layer. Impurities and crystal defects taken in by the selective growth deteriorate the light emission characteristics of the LD.

As described above, the semiconductor laser device according to the prior art can improve the heat dissipation by suppressing the mechanical stress of the ridge, but it is difficult to realize the high output light emission characteristics by suppressing the leakage current. .
Japanese Patent Laid-Open No. 10-326935 (page 3-4, FIG. 1) JP 2002-223093 ((page 4-6, FIG. 1))

  The present invention provides a semiconductor laser device that can improve heat dissipation by suppressing mechanical stress, and can realize high output light emission characteristics by suppressing leakage current.

  According to the first aspect of the present invention, (b) a first cladding layer on the active layer; (b) a ridge including the second cladding layer disposed on the first cladding layer; A semiconductor laser device comprising: a pair of current blocking layers facing each other across a ridge on the first cladding layer; and (d) a metal dummy ridge disposed on the pair of current blocking layers apart from the ridge. Provided.

  According to the second aspect of the present invention, (b) a first cladding layer on the active layer; (b) a ridge including the second cladding layer disposed on the first cladding layer; A semiconductor laser device comprising: a pair of current blocking layers facing each other across the ridge on the first cladding layer; and (d) an insulating film dummy ridge disposed on the pair of current blocking layers and spaced apart from the ridge. Is provided.

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to provide the semiconductor laser element which can suppress a mechanical stress and can improve heat dissipation, and suppresses a leakage current and implement | achieves a high output light emission characteristic.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

(First embodiment)
As shown in FIG. 1, the semiconductor laser device according to the first embodiment of the present invention is a p-type (second type) provided on an active layer 5 on an n-type (first conductivity type) clad layer 4. (Conductivity type) A ridge 11 including a p-type second cladding layer 8 a disposed on the first cladding layer 6 is provided on the p-type first cladding layer 6 so as to be spaced apart from the ridge 11 with the ridge 11 interposed therebetween. Metal dummy ridges 13a and 13b disposed on the n-type current blocking layers 12a and 12b. The first conductivity type and the second conductivity type are opposite to each other. That is, if the first conductivity type is n-type, the second conductivity type is p-type, and if the first conductivity type is p-type, the second conductivity type is n-type. In the following description, for convenience, the n-type is the first conductivity type and the p-type is the second conductivity type, but the p-type may be the first conductivity type and the n-type may be the second conductivity type. In the description, a red LD having an emission wavelength of 650 nm band based on an indium gallium aluminum phosphorus (InGaAlP) III-V mixed crystal is used as the semiconductor laser element, but is not limited thereto.

The n-type cladding layer 4 is provided on the surface of the buffer layer 2 on the substrate 1. The active layer 5 is a light emitting layer. For example, the n-type cladding layer 4 is In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P having a thickness of 1.2 μm. The buffer layer 2 is n-type GaAs having a thickness of 0.5 μm. The substrate 1 is GaAs having a thickness of 100 μm. The p-type first cladding layer 6 is In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P having a thickness of 0.2 μm. The active layer 5 has a non-doped In (GaAl) P / non-doped InGaP multiple quantum well (MQW) structure.

The ridge 11 includes a p-type second cladding layer 8a, a low resistance layer 9a, and a contact layer 10a. The p-type second cladding layer 8 a is provided on the surface of the etching stop layer 7 on the p-type first cladding layer 6. For example, the etching stop layer 7 is p-type InGaP having a thickness of 0.01 μm. The p-type second cladding layer 8a is In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P with a thickness of 0.9 μm. The low resistance layer 9a is p-type InGaP having a thickness of 0.1 μm. The contact layer 10a is p-type GaAs having a thickness of 0.1 μm.

  The surfaces of the dummy ridges 13a and 13b are higher than the surface of the ridge 11 by a height difference ΔHr, for example, 0.3 μm. The dummy ridges 13a and 13b are, for example, a metal such as gold (Au) having a thickness of 1.3 μm. The current blocking layers 12a and 12b are n-type GaAs having a thickness of 0.1 μm. The dummy ridges 13a, 13b and the p-type first cladding layer 6 are electrically insulated from each other by the pn junctions of the current blocking layers 12a, 12b and the p-type first cladding layer 6.

Between the ridge 11 and each of the dummy ridges 13a and 13b, for example, planarization films 14a and 14b such as a silicon oxide (SiO ₂ ) film having a thickness of 1 μm are provided. The first electrode 15 is provided so as to extend from the surface of the ridge 11 to part of the surface of the dummy ridges 13a and 13b via the planarization films 14a and 14b. The height of the surface immediately above the ridge 11 of the first electrode 15 is set lower than the surface immediately above the dummy ridges 13a and 13b by a difference ΔHe that is substantially the same height as the difference ΔHr. The first electrode 15 is a p-type ohmic metal containing Au. Further, a second electrode 16 of n-type ohmic metal containing Au is provided on the back surface of the substrate 1.

  In the first embodiment, the surface corresponding to the ridge 11 of the first electrode 15 is made lower by a difference ΔHe than the surfaces corresponding to the dummy ridges 13a and 13b. Therefore, the mechanical stress at the time of face-down mounting in which the first electrode 15 side is mounted on the package base is distributed to the dummy ridges 13a and 13b. In the ridge 11, mechanical stress is relieved, so that the crystallinity deterioration of the laser oscillation operation layer including the active layer is suppressed. In the first embodiment, the difference ΔHe is about the same as the difference ΔHr and is about 0.3 μm. However, the same effect can be obtained if the difference ΔHe is in the range of 0 to 1 μm, preferably 0 to 0.6 μm.

  Due to the face-down mounting, the heat dissipation of the ridge 11 is improved. Since the dummy ridges 13a and 13b are a metal having a high thermal conductivity, the heat dissipation can be further improved. Further, since the dummy ridges 13a and 13b are provided on the surfaces of the current blocking layers 12a and 12b, it is possible to suppress a leakage current through the dummy ridges 13a and 13b.

  Next, a method for manufacturing the semiconductor laser device according to the first embodiment will be described with reference to process cross-sectional views in FIGS.

(A) As shown in FIG. 2, a plurality of growths are performed on a substrate 1 by crystal growth methods such as molecular beam epitaxial growth (MBE), metal organic chemical vapor deposition (MOCVD), and liquid phase epitaxial growth (LPE). A semiconductor layer 20 including the layers is formed. For example, an n-type GaAs buffer layer 2 having a thickness of 0.5 μm is first grown on the surface of a substrate 1 made of n-type GaAs having a thickness of 250 μm. Then, an n-type In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P n-type cladding layer 4 having a thickness of 1.2 μm and an active layer 5 having an MQW structure of non-doped In (GaAl) P / non-doped InGaP are grown. Thereafter, a 0.2 μm-thick p-type In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P p-type first cladding layer 6, a 0.01 μm-thick p-type InGaP etching stop layer 7, a 0.9 μm-thick p-type In _{A 0.5} (Ga _0.3 Al _0.7 ) _0.5 P p-type second cladding layer 8, a 0.1 μm-thick p-type InGaP low-resistance layer 9, and a 0.1 μm-thick p-type GaAs contact layer 10 are grown.

(B) An insulating film such as 0.2 μm thick SiO ₂ is deposited on the surface of the contact layer 10 by CVD or the like. The insulating film is selectively removed by photolithography, reactive ion etching (RIE), or the like to form a first insulating film pattern 22 as shown in FIG. Using the first insulating film pattern 22 as a mask, vertical processing is performed at a depth of about 1 μm from the surface of the contact layer 10 by the RIE method. As a result, as shown in FIG. 4, a ridge 11 having a contact layer 10a having a vertical sidewall, a low resistance layer 9a, and a p-type second cladding layer 8a is formed. The p-type second cladding layer 8 in the region not masked by the first insulating film pattern 22 is left with a thickness of about 0.1 μm from the etching stopper layer 7. An insulating film such as SiO _{2 having a} thickness of 0.5 μm is deposited by the CVD method or the like while leaving the first insulating film pattern 22. The deposited insulating film is etched back by the RIE method or the like, and the second insulating film pattern 24 is formed by selectively leaving the insulating film on the surface and the sidewall of the ridge 11 as shown in FIG. Using the second insulating film pattern 24 as a mask, the p-type second cladding layer 8 around the ridge 11 has a depth of about 0.9 μm and the etching stopper layer 7 is removed by wet etching, as shown in FIG. The

  (C) n-type GaAs is regrown to a thickness of 0.1 μm on the exposed surface of the p-type first cladding layer 6. The n-type GaAs is selectively removed by photolithography and etching techniques, and current blocking layers 12a and 12b are formed apart from the ridge 11 as shown in FIG. Spin-on glass (SOG) or the like is spin-coated to deposit an insulating film having a thickness of 1.5 μm. The insulating film on the current blocking layers 12a and 12b is selectively removed by photolithography, RIE, or the like so that the surface of the p-type first cladding layer 6 is not exposed, and as shown in FIG. Is formed.

  (D) A conductive base layer made of metal containing Au is deposited on the exposed surfaces of the current blocking layers 12a and 12b and the planarizing film 14 by vapor deposition or the like. A resist mask is selectively formed on the surface of the planarizing film 14 by photolithography, and a metal such as Au is selectively plated on the exposed surfaces of the current blocking layers 12a and 12b to a thickness of about 1.3 μm. . By removing the resist mask and the conductive underlayer, dummy ridges 13a and 13b are formed on the current blocking layers 12a and 12b as shown in FIG.

  (E) The planarization film 14 is etched back so that the surface of the contact layer 10a of the ridge 11 is exposed. As shown in FIG. 8, a flat surface having a thickness of about 1 μm is formed between the ridge 11 and the dummy ridges 13a and 13b. Chemical films 14a and 14b are formed. First, a p-type ohmic metal containing Au is deposited by using a lift-off technique or the like, and extends from the surface of the ridge 11 to part of the surface of the dummy ridges 13a and 13b via the planarization films 14a and 14b. Electrode 15 is formed.

  (F) Next, after polishing the back surface of the substrate 1 to a thickness of about 100 μm, an n-type ohmic metal containing Au is vapor-deposited on the back surface of the substrate 1, as shown in FIG. The electrode 16 is formed. In the first and second electrodes 15 and 16, ohmic contact can be obtained by heat treatment at 450 ° C. for 15 minutes in an argon (Ar) atmosphere. Thereafter, the substrate 1 is cleaved into a rectangular shape, and the semiconductor laser device shown in FIG. 1 is manufactured.

  In the first embodiment, the n-type GaAs of the current blocking layers 12 a and 12 b is grown on the flat surface of the p-type first cladding layer 6. Therefore, since the current blocking layers 12a and 12b are accurately and uniformly controlled to a desired thickness, it is possible to suppress the leakage current flowing through the dummy ridges 13a and 13b. Further, the thickness of the dummy ridges 13a and 13b can be accurately controlled by selective plating. Since the first electrode 15 is formed by vapor deposition, the height difference ΔHe in the region corresponding to the ridge 11 and the dummy ridges 13a and 13b on the surface of the first electrode 15 is equal to the ridge 11 and the dummy ridges 13a and 13b. Is substantially the same as the difference in height ΔHr. Therefore, the region corresponding to the ridge 11 of the first electrode 15 can be made lower by a difference ΔHe than the region corresponding to the dummy ridges 13a and 13b, and the mechanical stress applied to the ridge 11 in the face-down mounting is suppressed. It becomes possible. The face-down mounting improves the heat dissipation of the ridge 11, and the dummy ridges 13a and 13b are made of a metal having a high thermal conductivity, so that the heat dissipation can be further improved.

(Second Embodiment)
In the semiconductor laser device according to the second embodiment of the present invention, as shown in FIG. 9, dummy ridges 13a and 13b separated from the ridge 11 provided in the semiconductor layer 20 on the substrate 1 It is provided so as to face each other. The dummy ridges 13 a and 13 b are disposed on the current blocking layers 112 a and 112 b provided on the surface of the semiconductor layer 20. First conductive ground layers 30a and 30b are provided between the dummy ridges 13a and 13b and the current blocking layers 112a and 112b, respectively. The current blocking layers 112 a and 112 b and the first conductive base layers 30 a and 30 b extend to the side wall of the ridge 11. The first electrode 15a is provided so as to extend from the surface of the ridge 11 to part of the surfaces of the dummy ridges 13a and 13b with the second conductive base layer 34 interposed therebetween. Note that the semiconductor layer 20 used for the description of the second embodiment is the same as that of the first embodiment, and thus a duplicate description is omitted.

For example, the current blocking layers 112a and 112b are insulating films such as SiO ₂ having a thickness of 0.3 μm. The dummy ridges 13a and 13b are, for example, a metal such as Au having a thickness of 1 μm. The first conductive base layers 30a and 30b are a metal containing Au. The second conductive base layer 34 is a metal containing Au. The first electrode 15a is a metal containing Au. Since the current blocking layers 112a and 112b are insulating films, the dummy ridges 13a and 13b and the semiconductor layer 20 are electrically insulated.

  The surfaces of the dummy ridges 13a and 13b are set higher than the surface of the ridge 11 by a difference ΔHr, for example, 0.3 μm. The height of the surface immediately above the ridge 11 of the first electrode 15a is set lower than the surface immediately above the dummy ridges 13a and 13b by a difference ΔHe that is substantially the same height as the difference ΔHr. Therefore, the mechanical stress at the time of face-down mounting in which the first electrode 15a side is mounted on the package base is distributed to the dummy ridges 13a and 13b. In the ridge 11, mechanical stress is relieved, so that the crystallinity deterioration of the laser oscillation operation layer including the active layer is suppressed. Further, the heat dissipation of the ridge 11 is improved by the face-down mounting. Since the dummy ridges 13a and 13b are a metal having a high thermal conductivity, the heat dissipation can be further improved. In addition, since the dummy ridges 13a and 13b are provided on the current blocking layers 112a and 112b, it is possible to suppress a leakage current via the dummy ridges 13a and 13b.

  Next, a method for manufacturing a semiconductor laser element according to the second embodiment will be described with reference to process cross-sectional views in FIGS.

(A) The semiconductor layer 20 including a plurality of growth layers is formed on the substrate 1 by a crystal growth method such as MBE, MOCVD, or LPE. The ridge 11 is formed in the semiconductor layer 20 by photolithography, RIE, or the like. As shown in FIG. 10, a current blocking layer 112 made of an insulating film such as SiO ₂ is deposited to a thickness of 0.3 μm on the surface of the semiconductor layer 20 on which the ridge 11 is formed by CVD or the like.

  (B) On the current blocking layer 112, a metal first conductive underlayer 30 containing Au is deposited to a thickness of 0.1 μm by vapor deposition or the like. As shown in FIG. 11, dummy ridges 13 a and 13 b such as Au are selectively formed with a thickness of 1 μm by photolithography and plating techniques using the resist pattern 32 as a mask.

(C) The resist pattern 32 is etched back by RIE using oxygen (O ₂ ) gas to form resist patterns 32a and 32b covering the side walls of the ridge 11 as shown in FIG. Expose the surface. By the ion milling method, the first conductive base layer 30 on the exposed ridge 11 surface is selectively removed to form the first conductive base layers 30a and 30b. Subsequently, the current blocking layers 112a and 112b are formed by selectively removing the current blocking layers 112 by RIE using carbon tetrafluoride (CF ₄ ) gas.

(D) The resist patterns 32a and 32b are peeled off by the O ₂ ashing method. A second conductive base layer 34 containing Au is deposited with a thickness of 0.1 μm by vapor deposition or the like. As shown in FIG. 13, a resist pattern 36 is formed by photolithography so that a part of the dummy ridges 13 a and 13 b and a region including the ridge 11 are opened. Using the resist pattern 36 as a mask, the first electrode 15a such as Au—Sn is selectively formed by plating technique. The resist pattern 36 is removed by an O ₂ ashing method. Subsequently, as shown in FIG. 14, the second conductive base layer 34 is selectively removed by an ion milling method or the like using the first electrode 15a as a mask. Furthermore, after the back surface of the substrate 1 is polished to a thickness of 100 μm, an ohmic metal such as Au—Ge is deposited on the back surface of the substrate 1 to form a second electrode (not shown).

  In the second embodiment, the insulating films of the current blocking layers 112a and 112b under the dummy ridges 13a and 13b are deposited on the flat surface of the p-type first cladding layer 6 by the CVD method or the like. Therefore, since the current blocking layers 112a and 112b are accurately and uniformly controlled to a desired thickness, it is possible to suppress the leakage current flowing through the dummy ridges 13a and 13b. Further, the thickness of the dummy ridges 13a and 13b can be accurately controlled by selective plating. Since the first electrode 15a is also formed by selective plating, the height difference ΔHe of the region corresponding to the ridge 11 and the dummy ridges 13a and 13b on the surface of the first electrode 15a is equal to the ridge 11 and the dummy ridge 13a, This is substantially the same as the height difference ΔHr from 13b. Therefore, the region corresponding to the ridge 11 of the first electrode 15a can be made lower by a difference ΔHe than the region corresponding to the dummy ridges 13a and 13b, and mechanical stress applied to the ridge 11 is suppressed by face-down mounting. It becomes possible. The face-down mounting improves the heat dissipation of the ridge 11, and the dummy ridges 13a and 13b are made of a metal having a high thermal conductivity, so that the heat dissipation can be further improved.

(Third embodiment)
As shown in FIG. 15, the semiconductor laser device according to the third embodiment of the present invention includes an n-type cladding layer 4, an active layer 5, a p-type first cladding layer 6, and an etching stop layer on a substrate 1. 7 are stacked. On the etching stop layer 7, a ridge 11a having a p-type second cladding layer 8a and a contact layer 10a is provided. Dummy ridges 113a and 113b separated from the ridge 11a are provided to face each other across the ridge 11a. The dummy ridges 113 a and 113 b are disposed on the current blocking layers 112 a and 112 b provided on the surface of the p-type first cladding layer 6. The current blocking layers 112 a and 112 b extend to the side wall of the ridge 11. Planarization films 114a and 114b are provided between the ridge 11a and the dummy ridges 113a and 113b, respectively. The first electrode 15b is provided so as to extend from the surface of the contact layer 10a of the ridge 11a to part of the surfaces of the dummy ridges 113a and 113b.

For example, the substrate 1 is n-type GaAs having a thickness of 250 μm. The n-type cladding layer 4 is In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P with a thickness of 1.2 μm. The active layer 5 has a non-doped In (GaAl) P / non-doped InGaP MQW structure. The p-type first cladding layer 6 is an In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P layer having a thickness of 0.2 μm. The etching stop layer 7 is a p-type In _0.5 Ga _0.5 P layer having a thickness of 0.01 μm. The p-type second cladding layer 8a is In _0.5 (Ga _0.3 Al _0.7 ) _0.5 P having a thickness of 1.1 μm. The contact layer 10a is p-type GaAs having a thickness of 0.3 μm. The ridge 11a has a width of 2 μm and a height of 1.4 μm.

The current blocking layers 112a and 112b are insulating films such as SiO ₂ having a thickness of 0.5 μm. The dummy ridges 113a and 113b are insulating films such as silicon nitride (Si ₃ N ₄ ) having a thickness of 1.5 μm. The planarization films 114a and 114b are organic films such as polyimide. The first electrode 15b is an ohmic metal containing Au. The distance between the opposing side walls of the ridge 11a and the dummy ridges 113a and 113b is 3 μm. Since the dummy ridge 113a, the dummy ridges 113a and 113b, and the current blocking layers 112a and 112b are insulating films, the gap between the first electrode 15b and the p-type first cladding layer 6 in the region corresponding to the dummy ridges 13a and 13b is between It is electrically insulated.

  The surfaces of the dummy ridges 113a and 113b are made higher than the surface of the ridge 11a by a difference ΔHr, for example, 0.6 μm. The height of the surface immediately above the ridge 11a of the first electrode 15b is set lower than the surface immediately above the dummy ridges 113a and 113b by a difference ΔHe that is substantially the same height as the difference ΔHr. Therefore, the mechanical stress at the time of face-down mounting in which the first electrode 15b side is mounted on the package base is distributed to the dummy ridges 113a and 113b. In the ridge 11a, since mechanical stress is relieved, the crystallinity deterioration of the laser oscillation operation layer including the active layer 5 is suppressed. Further, the heat dissipation of the ridge 11a is improved by the face-down mounting. The dummy ridges 113a and 113b and the current blocking layers 112a and 112b are insulating films, and the leakage current through the dummy ridges 113a and 113b can be ignored.

  Next, a method for manufacturing a semiconductor laser element according to the third embodiment will be described with reference to process cross-sectional views in FIGS.

(A) In _0.5 (Ga _0.3 Al _0.7 ) _0.5 Pn type cladding layer 4 having a thickness of 1.2 μm on an n-type GaAs substrate 1 having a thickness of 250 μm by a crystal growth method such as MBE, MOCVD, and LPE. Non-doped In (GaAl) P / non-doped InGaP MQW structure active layer 5, In _0.5 (Ga _0.3 Al _0.7 ) _0.5 Pp-type first cladding layer 6 having a thickness of 0.2 μm, p-type having a thickness of 0.01 μm The In _0.5 Ga _0.5 P etching stop layer 7, the In _0.5 (Ga _0.3 Al _0.7 ) _0.5 Pp-type second cladding layer 8 a having a thickness of 1.1 μm, and the p-type GaAs contact layer 10 a having a thickness of 0.3 μm are sequentially formed. grow up. As shown in FIG. 16, the ridge 11a is formed by selectively removing the contact layer 10a and the p-type second cladding layer 8a on the etching stopper layer 7 by photolithography, RIE, or the like. The width of the ridge 11a is 2 μm. In the region where the ridge 11a is not formed, the etching stop layer 7 is removed by a wet etching method or the like, and the surface of the p-type first cladding layer 6 is exposed.

(B) A current blocking layer 112 made of an insulating film such as SiO ₂ is deposited to a thickness of 0.5 μm on the surface of the semiconductor layer 20 on which the ridge is formed by CVD or the like. An insulating film such as Si ₃ N ₄ is deposited on the current blocking layer 112 to a thickness of 1.5 μm by plasma CVD (p-CVD) or the like. As shown in FIG. 17, the insulating film deposited on the current blocking layer 112 is selectively removed by photolithography and RIE, and dummy ridges 113a and 113b are formed with the ridge 11a interposed therebetween. The distance between the opposing side walls of the ridge 11a and the dummy ridges 113a and 113b is 3 μm.

  (C) An organic film such as polyimide is spin-coated on the current blocking layer 112 on which the ridge 11a and the dummy ridges 113a and 113b are formed. The applied organic film is etched back by the RIE method or the like to expose the surface of the current blocking layer 112 on the ridge 11a. Subsequently, the exposed current blocking layer 112 is selectively removed by RIE or the like, and the contact layer 10a of the ridge 11a is exposed as shown in FIG. Current blocking layers 112a and 112b and planarization films 114a and 114b are formed between the ridge 11a and the dummy ridges 113a and 113b.

  (D) Ohmic metal containing Au is deposited by photolithography, vapor deposition, etc., and as shown in FIG. 19, the first electrode 15b extends from the surface of the contact layer 10a to the surface of a part of the dummy ridges 113a, 113b. Selectively formed. Subsequently, after the back surface of the substrate 1 is polished to a thickness of 100 μm, an n-type ohmic metal containing Au is deposited on the back surface of the substrate 1 to form a second electrode (not shown).

  In the third embodiment, the dummy ridges 113a and 113b and the current blocking layers 112a and 112b are insulating films and have good insulating properties. Further, the thickness of the dummy ridges 113a and 113b can be accurately controlled by a p-CVD method or the like. Since the first electrode 15b is also formed by vapor deposition or the like, the height difference ΔHe between the ridge 11a and the dummy ridges 113a and 113b on the surface of the first electrode 15b is equal to the ridge 11a and the dummy ridge 113a. , 113b and substantially the same as the height difference ΔHr. Therefore, the region corresponding to the ridge 11a of the first electrode 15b can be made lower by the difference ΔHe than the region corresponding to the dummy ridges 113a and 113b, and the mechanical stress applied to the ridge 11a in the face-down mounting is suppressed. It becomes possible. Further, the heat dissipation of the ridge 11a can be improved by the face-down mounting.

(Fourth embodiment)
In the semiconductor laser device according to the fourth embodiment of the present invention, dummy ridges 213a and 213b spaced from the ridge 11 are provided opposite to each other with the ridge 11 interposed therebetween, as shown in FIG. The dummy ridges 213a and 213b include p-type second cladding layers 8b and 8c, low resistance layers 9b and 9c, and contact layers 10b and 10c similar to the ridge 11, and a current blocking layer provided on the contact layers 10b and 10c. 18b and 18c. For example, the current blocking layers 18b and 18c are n-type InGaP having a thickness of 0.1 μm. The surfaces of the dummy ridges 213a and 213b are higher than the surface of the ridge 11 by the thickness of the current blocking layers 18b and 18c. That is, the difference ΔHr is 0.1 μm. Further, the height of the surface of the first electrode 15 immediately above the ridge 11 is lower than the surface of the dummy ridges 213a and 213b by a difference ΔHe that is substantially the same height as the difference ΔHr. The fourth embodiment is different from the first embodiment in that the dummy ridges 213a and 213b include a semiconductor layer similar to that of the ridge 11 and further have current blocking layers 18b and 18c on the surface. Other configurations are the same as those of the first embodiment, and thus redundant description is omitted.

  The dummy ridges 213a and 213b are insulated by pn junctions of the n-type InGaP current blocking layers 18b and 18c and the p-type GaAs contact layers 10b and 10c. Accordingly, it is possible to suppress the leakage current flowing from the first electrode 15 via the dummy ridges 213a and 213b. Since the height of the surface immediately above the ridge 11 of the first electrode 15 is lower than the surface immediately above the dummy ridges 213a and 213b by the difference ΔHe, mechanical stress during face-down mounting can be suppressed. Further, the heat dissipation of the ridge 11 can be improved by face-down mounting.

  Next, a method for manufacturing a semiconductor laser element according to the fourth embodiment will be described with reference to process cross-sectional views in FIGS.

(A) An n-type GaAs buffer layer 2 having a thickness of _0.5 μm and an In _0.5 (Ga having a thickness of 1.2 μm are formed on an n-type GaAs substrate 1 having a thickness of 250 μm by crystal growth methods such as MBE, MOCVD, and LPE. _0.3 Al _0.7 ) _0.5 Pn-type cladding layer 4, non-doped In (GaAl) P / non-doped InGaP MQW active layer 5, 0.2 μm thick In _0.5 (Ga _0.3 Al _0.7 ) _0.5 Pp-type first cladding layer 6, 0.01 μm thick p-type InGaP etching stop layer 7, 0.9 μm thick In _0.5 (Ga _0.3 Al _0.7 ) _0.5 Pp second cladding layer 8, 0.1 μm thick p-type InGaP low resistance layer 9,. A p-type GaAs contact layer 10 having a thickness of 1 μm and an n-type InGaP current blocking layer 18 having a thickness of 0.1 μm are sequentially grown.

(B) An insulating film such as SiO _{2 having a} thickness of 0.2 μm is deposited on the surface of the current blocking layer 18 by a CVD method or the like. Using the first insulating film pattern 22 selectively removed by photolithography and RIE as a mask, as shown in FIG. 22, the surface is perpendicular to the surface of the current blocking layer 18 at a depth of 1.1 μm. Processing. As a result, the ridge 11b having the current blocking layer 18a, the contact layer 10a, the low resistance layer 9a, and the p-type second cladding layer 8a, the current blocking layer 18b, the contact layer 10b, the low resistance layer 9b, and the p-type second layer. A dummy ridge 213a having the cladding layer 8b, and a dummy ridge 213b having the current blocking layer 18c, the contact layer 10c, the low resistance layer 9c, and the p-type second cladding layer 8c are formed. The p-type second cladding layer 8 in the region not masked by the first insulating film pattern 22 is left with a thickness of about 0.1 μm from the etching stopper layer 7. An insulating film such as SiO _{2 having a} thickness of 0.5 μm is deposited by the CVD method or the like while leaving the first insulating film pattern 22. The deposited insulating film is etched back by the RIE method or the like, and the insulating film is selectively left on the surface and the side wall of the ridge 11 respectively. As shown in FIG. 23, the p-type second cladding layer 8 and the stop layer between the ridge 11 and the dummy ridges 213a and 213b are formed by wet etching using the second insulating film pattern 24 thus formed as a mask. 7 is removed.

  (C) Spin-on glass (SOG) or the like is spin-coated, and an insulating film is deposited so as to cover the ridge 11 and the dummy ridges 213a and 213b. The applied insulating film is etched back by the RIE method or the like to expose the surfaces of the current blocking layers 18a to 18c. The surface of the current blocking layers 18b and 18c of the dummy ridges 213a and 213b is covered with a resist mask by photolithography and RIE, etc., and the current blocking layer 18a of the ridge 11 is selectively removed. After removing the resist mask, as shown in FIG. 24, planarized films 14a and 14b are formed between the ridge 11 where the contact layer 10a is exposed and the ridge 11 and the dummy ridges 213a and 213b.

  (D) A p-type ohmic metal containing Au is deposited using a lift-off technique or the like, and extends from the surface of the ridge 11 to a part of the surface of the dummy ridges 213a and 213b via the planarization films 14a and 14b. A first electrode 15 is formed. Subsequently, after polishing the back surface of the substrate 1 to a thickness of about 100 μm, an n-type ohmic metal containing Au is vapor-deposited on the back surface of the substrate 1, and the second electrode 16 is formed as shown in FIG. It is formed.

  In the fourth embodiment, the n-type InGaP of the current blocking layer 18 is grown on the flat surface of the contact layer 10 when the semiconductor layer of the semiconductor laser element including the active layer 5 is grown. Thereafter, current blocking layers 18b and 18c are formed as the outermost surface layers of the dummy ridges 213a and 213b. Therefore, since the thicknesses of the current blocking layers 18b and 18c are accurately and uniformly controlled, the leakage current flowing through the dummy ridges 213a and 213b can be suppressed. The surfaces of the dummy ridges 213a and 213b are higher than the surface of the ridge 11 by the thickness of the current blocking layers 18b and 18c. Since the first electrode 15 is formed by vapor deposition, the height difference ΔHe between the ridge 11 and the dummy ridges 213a and 213b on the surface of the first electrode 15 is equal to the ridge 11 and the dummy ridges 13a and 13b. Is substantially the same as the height difference ΔHr. Therefore, the region corresponding to the ridge 11 of the first electrode 15 can be made lower than the region corresponding to the dummy ridges 213a and 213b by the thickness of the current blocking layers 18b and 18c, and is given to the ridge 11 for face-down mounting. It is possible to suppress the mechanical stress generated. Further, the heat dissipation of the ridge 11 can be improved by face-down mounting.

(Other embodiments)
As described above, the first to fourth embodiments of the present invention have been described. However, it should not be understood that the descriptions and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

  In the embodiment of the present invention, a red LD having an emission wavelength of 650 nm band due to an InGaAlP III-V mixed crystal is used as a semiconductor laser element. However, it goes without saying that the semiconductor laser element may be, for example, an infrared to purple LD made of a group III-V mixed crystal such as AlGaAsP or InAlGaN. Further, it may be a II-VI group semiconductor laser element such as zinc selenide (ZnSe), zinc sulfide (ZnS), cadmium zinc selenide (CdZnSe), or magnesium selenide magnesium sulfide (ZnMgSSe).

  As described above, the present invention naturally includes various embodiments that are not described herein. Accordingly, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.

1 is a cross-sectional view showing an example of a semiconductor laser element according to a first embodiment of the present invention. It is process sectional drawing (the 1) which shows an example of the manufacturing method of the semiconductor laser element which concerns on the 1st Embodiment of this invention. It is process sectional drawing (the 2) which shows an example of the manufacturing method of the semiconductor laser element which concerns on the 1st Embodiment of this invention. It is process sectional drawing (the 3) which shows an example of the manufacturing method of the semiconductor laser element concerning the 1st Embodiment of this invention. FIG. 8 is a process cross-sectional view (part 4) illustrating the example of the method for manufacturing the semiconductor laser element according to the first embodiment of the present invention. It is process sectional drawing (the 5) which shows an example of the manufacturing method of the semiconductor laser element concerning the 1st Embodiment of this invention. It is process sectional drawing (the 6) which shows an example of the manufacturing method of the semiconductor laser element concerning the 1st Embodiment of this invention. It is process sectional drawing (the 7) which shows an example of the manufacturing method of the semiconductor laser element concerning the 1st Embodiment of this invention. It is sectional drawing which shows an example of the semiconductor laser element which concerns on the 2nd Embodiment of this invention. It is process sectional drawing (the 1) which shows an example of the manufacturing method of the semiconductor laser element concerning the 2nd Embodiment of this invention. It is process sectional drawing (the 2) which shows an example of the manufacturing method of the semiconductor laser element concerning the 2nd Embodiment of this invention. It is process sectional drawing (the 3) which shows an example of the manufacturing method of the semiconductor laser element concerning the 2nd Embodiment of this invention. It is process sectional drawing (the 4) which shows an example of the manufacturing method of the semiconductor laser element concerning the 2nd Embodiment of this invention. It is process sectional drawing (the 5) which shows an example of the manufacturing method of the semiconductor laser element concerning the 2nd Embodiment of this invention. It is sectional drawing which shows an example of the semiconductor laser element concerning the 3rd Embodiment of this invention. It is process sectional drawing (the 1) which shows an example of the manufacturing method of the semiconductor laser element concerning the 3rd Embodiment of this invention. It is process sectional drawing (the 2) which shows an example of the manufacturing method of the semiconductor laser element concerning the 3rd Embodiment of this invention. It is process sectional drawing (the 3) which shows an example of the manufacturing method of the semiconductor laser element concerning the 3rd Embodiment of this invention. It is process sectional drawing (the 4) which shows an example of the manufacturing method of the semiconductor laser element concerning the 3rd Embodiment of this invention. It is sectional drawing which shows an example of the semiconductor laser element concerning the 4th Embodiment of this invention. It is process sectional drawing (the 1) which shows an example of the manufacturing method of the semiconductor laser element concerning the 4th Embodiment of this invention. It is process sectional drawing (the 2) which shows an example of the manufacturing method of the semiconductor laser element concerning the 4th Embodiment of this invention. It is process sectional drawing (the 3) which shows an example of the manufacturing method of the semiconductor laser element concerning the 4th Embodiment of this invention. It is process sectional drawing (the 4) which shows an example of the manufacturing method of the semiconductor laser element concerning the 4th Embodiment of this invention. It is process sectional drawing (the 5) which shows an example of the manufacturing method of the semiconductor laser element concerning the 4th Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Substrate 2 Buffer layer 4 N-type cladding layer 5 Active layer 6 P-type first cladding layer 7 Etching stop layer 8, 8a, 8b P-type second cladding layer 9, 9a, 9b Low resistance layer 10, 10a, 10b Contact layer 11, 11a Ridges 12a, 12b, 18a-18c, 112a, 112b Current blocking layers 13a, 13b, 113a, 113b, 213a, 213b Dummy ridges 14, 14a, 14b, 114a, 114b Planarization films 15, 15a, 15b First Electrode 16 second electrode

Claims (5)

A first cladding layer over the active layer;
A ridge including a second cladding layer disposed on the first cladding layer;
A pair of current blocking layers facing each other across the ridge on the first cladding layer;
And a metal dummy ridge disposed on the pair of current blocking layers and spaced apart from the ridge.   2. The semiconductor laser device according to claim 1, wherein a surface of the dummy ridge is higher than a surface of the ridge.   The semiconductor laser device according to claim 1, wherein a planarizing film is provided between the ridge and the dummy ridge. A first cladding layer over the active layer;
A ridge including a second cladding layer disposed on the first cladding layer;
A pair of current blocking layers facing each other across the ridge on the first cladding layer;
A semiconductor laser device, comprising: a dummy ridge of an insulating film disposed on the pair of current blocking layers apart from the ridge. The semiconductor laser device according to claim 4, wherein a surface of the dummy ridge is higher than a surface of the ridge.

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