JP2006060174A - Capacitance element, semiconductor device using the same, and method for manufacturing semiconductor device - Google Patents

Abstract

In a capacitive element using a perovskite oxide high dielectric thin film formed by sputtering, it is possible to achieve both a low leakage current and a high relative dielectric constant, and provide a high quality capacitive element.
A capacitive element of the present invention includes a capacitive dielectric film made of a SrTiO ₃ film between a lower electrode made of a Ti film 103 / Pt film 104 and an upper electrode made of a Pt film. The capacitive dielectric film is divided into two layers, the main part is an SrTiO ₃ film 105 containing excessive Sr, and the layer on the upper electrode side is made of an SrTiO ₃ film 107 containing excessive Ti.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor device having a high dielectric thin film capacitive element and a method for manufacturing the same.

A capacitive element using a perovskite oxide high dielectric thin film ABO ₃ (A is a group II, B is a group IV metal atom) such as SrTiO ₃ (hereinafter referred to as STO) has a small loss in the quasi-microwave band, Since it does not show frequency dispersion up to 60 GHz, it is used as a capacitor for GaAs MMICs operating at high frequency (see, for example, Non-Patent Document 1).

  In such a capacitive element, since a large leakage current is a problem, as disclosed in Non-Patent Document 1, in order to reduce the leakage current, the end surfaces of the dielectric film and the electrode are separated from each other. It is used by avoiding leaks or suppressing leak current by filling oxygen vacancies in the dielectric film by annealing in an oxygen atmosphere.

On the other hand, the perovskite oxide high dielectric thin film has different electrical characteristics depending on its composition. For example, in STO and (Ba _x Sr _1-x ) TiO ₃ (hereinafter referred to as BST), it is known that leakage current is suppressed in a state in which Ti atoms are contained in excess of the stoichiometric ratio, In that case, it has been reported that the crystal structure becomes a microcrystal or an amorphous structure (see Patent Document 1 and Non-Patent Document 2).
JP-A-11-330411 "New GaAs-MMIC process technology using low-temperature deposited SrTiO3 thin film 95," by M. Nishituji et al., "New GaAs-MMIC process technology using low-temperature deposited SrTiO3 thin film capacitance, SrTiO3 thin film capacitance". Year, Vol. 31, p. 137 Kunio Meido et al., “Fabrication and evaluation of high voltage SrTiO3 thin film”, Toyota Central R & D Review, September 1997, Vol. 32, No. 3, p. 61-70

  However, in order to increase the breakdown voltage of the high dielectric thin film, as disclosed in the prior art, it is necessary to make the high dielectric thin film Ti-excess and to change the crystal state to microcrystal or amorphous. In such a case, there arises a problem that the relative permittivity is significantly reduced (see Patent Document 1 and Non-Patent Document 1).

  Therefore, in order to avoid this problem, Patent Document 1 discloses a configuration in which the dielectric film is made to have a stoichiometric composition ratio and a part of which is excessive in Ti to prevent a decrease in the dielectric constant. ing.

  However, there are the following problems in realizing such a configuration.

  As a method for forming a perovskite oxide high dielectric thin film, a sputtering method has been mainly used in recent years in order to prevent impurities from being mixed into the film and to obtain a high quality film. In this case, a target having almost the same composition as the film composition is usually used as the sputtering target. However, since the sputtering rate of each atom differs with respect to the gas used for sputtering (usually using Ar), for example, STO. When a target is used, a film containing excessive Sr is formed, but this film has a columnar crystal structure and tends to increase leakage current.

  In order to form a film containing excessive Ti, the target composition may be set to excessive Ti. However, as described above, in this case, a significant decrease in the relative dielectric constant is inevitable. In addition, since the sputtering rate actually varies depending on the discharge conditions and the like, it is not easy to precisely control the composition by simply changing the composition ratio of the target. In addition, even if a dielectric thin film is formed using two targets having different compositions, if the composition is rapidly changed in the dielectric film, the relative permittivity and breakdown voltage are greatly reduced due to the disorder of the crystal structure. Cause problems.

  From the above, it has been difficult to form a perovskite oxide high dielectric thin film having a low leakage and a high relative dielectric constant using a sputtering method.

Accordingly, the present invention has been made in view of the above problems, and the structure of the capacitive dielectric film ABO ₃ includes a layer containing an excessive amount of B atoms and a layer containing an excessive amount of A atoms. Thus, a semiconductor device having a capacitor with a low leakage and a high relative dielectric constant and a method for manufacturing the same are provided.

In order to solve the above-mentioned problems, the capacitive element of the present invention uses a high dielectric thin film ABO ₃ (A is a group II, B is a group IV metal atom) having a perovskite structure as a capacitive dielectric film. A capacitive element having an upper electrode and a lower electrode sandwiched therebetween, wherein the capacitive dielectric film has a layered structure of at least two layers, and the first layer of the layered structure has a ratio A to the stoichiometric ratio. Atoms are excessively contained, and the second film is characterized in that the B atoms are excessively contained with respect to the stoichiometric ratio.

  In the first layer, the content ratio of the A atom continuously increases as the distance from the region in contact with the second layer increases. In the region in contact with the second layer, the content ratio of the A atom is The second layer is preferably substantially the same as the second layer.

  The first layer preferably has a relative dielectric constant higher than that of the second layer, and the second layer preferably has a higher withstand voltage than the first layer.

  The first layer preferably has a columnar structure, and the second layer is preferably microcrystalline or amorphous.

  More preferably, the A atom includes Sr, Ba, or both, and the B atom is Ti.

  More preferably, the first layer is located on the lower electrode side, and the second layer is located on the upper electrode side.

  In the semiconductor device of the present invention, the semiconductor element and the capacitor element of the present invention are formed on the same substrate.

  The substrate is preferably a compound semiconductor substrate such as GaAs or InP.

  The substrate preferably has an epitaxial layer of GaAs, GaAlAs, InAlAs, InGaP or the like.

  It is preferable that the surface of the substrate is provided with an epitaxial layer of GaAs, GaAlAs, or InAlAs containing a high concentration impurity of one conductivity type.

The method of manufacturing a semiconductor device according to the present invention includes a step of forming a metal to be a lower electrode of a capacitor element on one main surface of a semiconductor substrate, and a high dielectric thin film ABO having a perovskite structure on the metal to be the lower electrode. ₃ (A is a group II, B is a group IV metal atom), a step of forming a metal to be an upper electrode of the capacitive element on the high dielectric thin film, the upper electrode metal, Etching the dielectric thin film and the lower electrode metal to form a capacitor element in a predetermined region on the semiconductor substrate, leaving the upper electrode metal, the high dielectric thin film, and the lower electrode metal. A method of manufacturing a semiconductor device, wherein the high dielectric thin film has a layered structure of at least two layers, and the first layer of the layered structure contains the A atom excessively with respect to the stoichiometric ratio. And the second membrane has a B It is formed so as to contain excessive atoms.

  The step of forming the high dielectric thin film further includes the step of forming the first high dielectric film containing the metal atom B excessively, and the metal atom A alone or the metal atom A excessively included thereon. Forming a second film; and heat-treating the semiconductor substrate including the first film and the second film to diffuse the metal atoms A into the second film. It is preferable.

  The high dielectric thin film is preferably formed by co-sputtering.

  According to the present invention, the second layer containing excessive B atoms is used as the main part of the capacitive dielectric film, so that the capacitance can be ensured, and the first layer containing excessive A atoms can ensure the breakdown voltage. It is possible to realize a capacitor element that suppresses current and has a high withstand voltage and a high relative dielectric constant.

  In addition, by disposing a capacitive element having a high withstand voltage and a high relative dielectric constant in the semiconductor device, the capacitive element connected to the outside of the semiconductor device is not required, so that the semiconductor device can have high functionality and high integration. It becomes.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIG. 1 and FIG. 2 are explanatory diagrams of the manufacturing process of the capacitive element according to the first embodiment of the present invention, and FIG. 2 shows a comparison between the conventional method of composition distribution in the dielectric film and the present invention. is there.

A plasma SiO ₂ film 102 is formed on the front surface of the GaAs epitaxial substrate 101 using a plasma CVD method. On top of this, a Ti film 103 and a Pt film 104 to be lower electrodes are formed by sputtering (FIG. 1A).

Next, an SrTiO ₃ film 105 is formed on the Pt film 104 by RF sputtering in Ar plasma containing O ₂ (FIG. 1B). In this case, since a target having a stoichiometric composition ratio is used as the sputtering target, the SrTiO ₃ film 105 contains excessive Sr.

Next, a Ti film 106 is formed on the SrTiO ₃ film 105 by DC sputtering (FIG. 1C).

Further, heat treatment is applied to diffuse the Ti film 106 into the SrTiO ₃ film, thereby forming the SrTiO ₃ film 107 containing excessive Ti (FIG. 1D).

Next, annealing is performed in an oxygen atmosphere to promote SrTiO ₃ crystallization and compensate for oxygen deficiency. At this time, most of the unoxidized of Ti present in excess in the SrTiO ₃ film 107 is changed to titanium oxide. Whether the SrTiO ₃ film 107 has a microcrystal or an amorphous structure is determined depending on the conditions of the first Ti diffusion heat treatment or the above-described oxidation treatment, particularly the temperature. The higher the processing temperature, the easier the microcrystalline structure.

Next, a Pt film 108 serving as an upper electrode is formed on the SrTiO ₃ films 105 and 107 by sputtering (FIG. 1E).

  A photoresist mask 109 is formed in a predetermined region to be the upper electrode, and the Pt film and the dielectric film are etched simultaneously (FIG. 2 (f)).

  Further, a photoresist mask 110 is formed in a predetermined region to be the lower electrode, and the Ti / Pt film is etched to form the lower electrode (FIG. 2G).

Next, a plasma SiO ₂ film 111 is formed on the entire surface of the substrate including the capacitive element by using a plasma CVD method (FIG. 2H). This is to protect the capacitor end and to maintain insulation between the Au wiring formed in the next process and the capacitor.

  Next, wirings 112 and 113 connected to the upper electrode and the lower electrode are respectively formed by using an Au plating method, thereby completing the capacitor structure (FIG. 2 (i)).

  As shown in FIG. 3, the STO film formed by the conventional normal RF sputtering method has an Sr content ratio higher than that of Ti throughout the film thickness direction. In the dielectric thin film produced by the method shown, the content ratio of Sr is higher than that of Ti from the lower electrode side to the middle of the film, and the content ratio of Ti continuously increases from there. It can be seen that the content ratio is higher than that of Sr.

  As described above, according to the present embodiment, the main part of the capacitive dielectric film has a relative dielectric constant relatively higher than that of the film excessively containing Ti, that is, the Sr-rich layer, so that the ratio of the entire capacitive film is increased. While suppressing a decrease in the dielectric constant, a part of the Ti is excessively changed, that is, a Ti-rich layer, and the crystal structure is changed to a microcrystalline or amorphous structure, thereby suppressing leakage current and improving withstand voltage. This makes it possible to obtain a capacitive element with excellent electrical characteristics.

  Further, according to the present embodiment, since the Ti-rich layer is formed by thermally diffusing Ti from the surface of the STO film, the thickness of the Ti-rich layer is almost determined by the Ti film thickness deposited first. The Therefore, it is easy to control the film thickness of the Ti rich layer.

  Furthermore, since the STO film is modified from the surface side, the process can be controlled independently from the film deposition of the entire capacitive dielectric film, and the film structure and film composition change in the main part of the capacitive dielectric film. It is possible to obtain a good capacitive dielectric film that does not cause the damage and does not impair the electrical characteristics.

In the manufacturing method described above, a Ti film is deposited on the surface of the STO film and further thermally diffused to form a Ti-rich layer whose composition is continuously changed. However, other methods such as a known co-sputtering method are used. It is also possible to improve the Ti content in the vicinity of the surface of the film by applying power independently to each of the TiO ₂ target and the SrO ₂ target.

Alternatively, an RF power is applied to the STO target to form a Sr-rich STO film, and then power is independently applied to the Ti target, the TiO ₂ target, or the STO target containing excessive Ti to move the Ti toward the film surface. You may make it improve a content rate. When the co-sputtering method is applied, the method of continuously changing the composition is not limited to the above method, and various modes can be applied.

  Further, the formation of the STO film with the composition changing as described above is not limited to the co-sputtering method, and other methods such as a method of separately forming layers having different compositions using a vapor deposition method or another apparatus may be used. .

(Embodiment 2)
FIG. 4 is a cross-sectional view showing the configuration of the semiconductor device on which the capacitive element according to the second embodiment of the present invention is mounted.

  In the semiconductor device shown in FIG. 4, on a GaAs epitaxial substrate 300, an FET portion 301 constituting a signal processing circuit, a large-capacity STO capacitor portion 302 serving as a bypass capacitor between terminals, and an epitaxial layer serving as a low-resistance element. A resistor 303, a WSiN resistor 304 serving as a high resistance element, and a small-capacity SiN capacitor 305 serving as an internal capacitor are formed by a feedback bias circuit or the like.

  In this apparatus, the DC component of the input signal is cut by the STO capacitor unit 302, the signal is amplified by the FET unit 301 at the subsequent stage, and the signal bias level is variable by the epi resistor unit 303, the WSiN resistor unit 304, the SiN capacitor unit 305, and the like. Is a medium output amplifier.

  In the FET portion 301, a gate electrode 307, a source electrode 306, and a drain electrode 308 made of a laminated film of Ti and Au are formed. The STO capacitor 302 includes an upper electrode 309 made of Pt, an STO capacitor film 310, and a lower electrode 311 made of Ti / Pt. The resistor of the epi resistor 303 includes an InGaAs epi resistor 312 doped with impurities at a high concentration, and the resistor of the WSiN resistor 304 includes a WSiN resistor 313. The SiN capacitor unit 305 includes a substrate or a semiconductor layer on the substrate as a lower electrode, and includes a SiN capacitor film 315 and an upper electrode 314 made of a laminated film of Ti and Au.

  Here, the STO capacitor film 310 has the structure shown in Embodiment 1, that is, the structure including the Sr rich layer and the Ti rich layer.

  According to the present embodiment, since the ferroelectric material is used as the dielectric film of the capacitor element in the STO capacitor portion, the capacitor element can be reduced in size, and the bypass capacitor that has conventionally been an external component is replaced with a semiconductor. It is possible to reduce the number of parts and reduce the cost by taking it into the device.

  Furthermore, in the STO capacitor element of this embodiment, the leakage current can be suppressed and the breakdown voltage can be increased without impairing the capacitance value, so that the reliability of the semiconductor device can be greatly improved.

In the first and second embodiments, SrTiO ₃ has been described. However, other perovskite oxide dielectric thin films such as BaSrTiO ₃ (BST) also have the above-described effects. Further, the same effect can be obtained with films obtained by adding oxidation impurities such as SiOx to these films.

  In the second embodiment, the semiconductor device formed on the GaAs epitaxial substrate has been described. However, another compound semiconductor substrate such as InP or an epitaxial layer such as GaAs, AlGaAs, InAlAs, or InGaP is formed on the substrate. A semiconductor substrate may be used.

  The capacitive element of the present invention may also be applied to a semiconductor device having a storage device such as DRAM or FeRAM.

  The capacitive element according to the present invention has a large capacity, excellent electrical characteristics such as low leakage and high breakdown voltage, and can be applied to an amplifier IC circuit having interstage capacitance of several tens to several thousand pF or bypass capacitance. As particularly useful.

Manufacturing process explanatory drawing of the capacitive element in Embodiment 1 of this invention Manufacturing process explanatory drawing of the capacitive element in Embodiment 1 of this invention The figure which shows the comparison with the conventional method of the composition distribution in the dielectric film of the capacitive element in Embodiment 1 of this invention, and this invention Sectional drawing which showed the structure of the semiconductor device carrying the capacitive element in Embodiment 2 of this invention

Explanation of symbols

101 GaAs epitaxial substrate 102 plasma SiO ₂ film 103 Ti film 104 Pt film 105 SrTiO ₃ film containing excessive Sr 106 Ti film 107 SrTiO ₃ film containing excessive Ti 108 Pt film 109 photoresist mask 110 photoresist mask 111 plasma SiO ₂ film 112 the wiring 300 GaAs epitaxial substrate 301 FET unit 302 STO capacitance section 303 epitaxial resistor unit 304 WSiN resistance unit 305 SiN capacitor portion 306 source electrode 307 gate electrode 308 drain electrode 309 upper wiring 113 connected to the lower electrode to be connected to the upper electrode Electrode 310 STO capacitive film 311 Lower electrode 312 InGaAs epiresistance 313 WSiN resistance 314 Upper electrode 315 SiN capacitive film

Claims (13)

A capacitive element comprising a high dielectric thin film ABO ₃ (A is a group II, B is a group IV metal atom) having a perovskite structure as a capacitive dielectric film, and an upper electrode and a lower electrode sandwiching the capacitive dielectric film. ,
The capacitive dielectric film has a layered structure of at least two layers,
The first layer of the layered structure contains the A atom in excess relative to the stoichiometric ratio,
The capacitor element, wherein the second film contains an excess of the B atom relative to the stoichiometric ratio. In the first layer, the content ratio of the A atom continuously increases as the distance from the region in contact with the second layer increases.
2. The capacitor according to claim 1, wherein a content ratio of the A atom is substantially the same as that of the second layer in a region in contact with the second layer. 3. The capacitive element according to claim 1, wherein the first layer has a relative dielectric constant higher than that of the second layer, and the second layer has a higher withstand voltage than the first layer. . 3. The capacitive element according to claim 1, wherein the first layer has a columnar structure, and the second layer is microcrystalline or amorphous. 4. The capacitive element according to claim 1, wherein the A atom includes Sr, Ba, or both, and the B atom is Ti. 5. The capacitive element according to claim 1, wherein the first layer is located on the lower electrode side, and the second layer is located on the upper electrode side. 6. A semiconductor device in which a semiconductor element and the capacitive element according to claim 1 are formed on the same substrate. 8. The semiconductor device according to claim 7, wherein the substrate is a compound semiconductor substrate such as GaAs or InP. 9. The semiconductor device according to claim 8, wherein the substrate has an epitaxial layer of GaAs, GaAlAs, InAlAs, InGaP or the like. 9. The semiconductor device according to claim 8, further comprising an epitaxial layer of GaAs, GaAlAs, or InAlAs containing a high-concentration impurity of one conductivity type on the surface of the substrate. Forming a metal to be a lower electrode of the capacitive element on one main surface of the semiconductor substrate;
A high dielectric thin film ABO ₃ of a perovskite structure (A is a group II,
B is a group IV metal atom),
Forming a metal to be an upper electrode of the capacitive element on the high dielectric thin film;
Etching the upper electrode metal, the high dielectric thin film, and the lower electrode metal to form a capacitor element in a predetermined region on the semiconductor substrate, leaving the upper electrode metal, the high dielectric thin film, and the lower electrode metal. A method of manufacturing a semiconductor device comprising:
The high dielectric thin film has a layered structure of at least two layers,
The first layer of the layered structure contains the A atom in excess relative to the stoichiometric ratio,
The method of manufacturing a semiconductor device, wherein the second film is formed so that the B atom is excessively contained relative to the stoichiometric ratio. The step of forming the high dielectric thin film further includes a step of forming a first high dielectric film that contains the metal atom B in excess.
Forming a second film containing only the metal atom A or an excess of the metal atom A thereon;
11. The method according to claim 10, further comprising: heat-treating the semiconductor substrate including the first film and the second film to diffuse the metal atoms A into the second film. A method for manufacturing a semiconductor device. 11. The method of manufacturing a semiconductor device according to claim 10, wherein the high dielectric thin film is formed by a co-sputtering method.

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