JP2005327007A - Integrated computer control program, recording medium for recording its program and integrated system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an integrated system having a plurality of CPU for properly and dynamically distributing tasks to those respective CPU, and for quickly processing the tasks whose priority is high. <P>SOLUTION: This integrated system A having a plurality of CPU (B through B) and a storage device C is provided with a task execution right releasing means M for, while tasks F through F whose priority is lower than the priority of the task F to be executed are under execution, releasing the task execution rights of all the tasks F through F under execution, and for temporarily putting all the CPU (B through B) in a task non-execution status and a task assigning means O for successively assigning the tasks F through F related with task information storage region information J through J stored in ready queues D through D whose priority is high among the tasks F through F related with the task management information storage region information J through J stored in the plurality of ready queues D through D to the respective CPU (B through B) which has been put in the task non-execution status by the task execution right releasing means M from the leading side of the ready queues D through D. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a control program for an embedded computer having a plurality of CPUs, a recording medium storing the program, and an embedded system, and belongs to the technical field of dynamic distribution of tasks.

  Conventionally, as a device embedded control system (embedded system) that is incorporated in home appliances, industrial equipment, etc. and controls these operations, a computer having a single CPU, memory (storage device), etc., for example, TRON specification, etc. Those controlled by a real-time operating system (control program) are widely known.

  This real-time operating system is configured to specify a task to be executed among a plurality of tasks (units of parallel execution of programs) stored in a memory (storage device) as a predetermined one of a plurality of ready queues having different priorities. When the priority of the connected task is higher than the priority of the task being executed, the connected task is assigned to the CPU, and the priority of the connected task is executed. When the priority of the task currently being executed is finished, the task connected to the head of the ready queue with the highest priority among the ready queues to which the task is connected is sent to the CPU. It is configured to be assigned, thereby enabling real-time processing of high priority tasks.

  By the way, in recent years, in the embedded system field, the amount of data to be processed has increased with the advancement of functions such as the above-mentioned home appliances and industrial equipment, and in order to cope with this, it is necessary to improve the processing capacity of embedded systems. It has come to be.

  As a measure for improving the processing capability of the embedded system, it is conceivable to use a plurality of CPUs as already adopted in fields other than the embedded system (see Patent Document 1).

Japanese Patent Laid-Open No. 11-53327

  However, in the system described in Patent Document 1, only one queue for connecting tasks to be executed is provided for each CPU, and a real-time operating system having a plurality of queues with different priorities. The system assumes a very different configuration and cannot be used as a reference.

  In particular, even if a plurality of CPUs are used in this manner, if the load is not properly distributed to each CPU, for example, there are many tasks to be executed, but no tasks are assigned to a certain CPU. A state arises, and the effect of improving the processing capability by using multiple CPUs cannot be fully exhibited. Further, when using a plurality of CPUs, there is a problem of how quickly a task with a high priority is assigned to the CPUs.

  Therefore, the present invention provides a system, a program, and the like that can appropriately dynamically distribute tasks to each CPU and can quickly process high priority tasks in an embedded system having a plurality of CPUs. The task is to do.

  In order to solve the above-mentioned problems, the present invention is configured as follows.

  First, the invention according to claim 1 of the present application (hereinafter referred to as the first invention) controls an embedded computer having a plurality of CPUs and first, second, and third storage devices shared by the plurality of CPUs. A ready queue creating means for creating a plurality of ready queues which are shared by the CPUs and set different priorities on the first storage device, and the second storage device Task priority setting means for setting a priority of at least a task to be executed among a plurality of stored tasks, and task management of at least a task to be executed among the plurality of tasks on the third storage device Task management information creating means for creating information, information on the storage area on the third storage device of the task management information of the task to be executed created by the task management information creating means Management information storage area information stored at the tail of the ready queue having the same priority as the priority set by the task priority setting means among the plurality of ready queues created by the ready queue creation means Task management information for deleting, from the ready queue, task management information storage area information related to a task for which execution has been completed when execution of any of the tasks being executed by the storage means and the plurality of CPUs is completed When the task information storage area information related to the task to be executed by the storage area information deletion means and the task information storage area information storage means is stored at the end of the ready queue corresponding to the priority of the task, the execution is executed. If a task whose priority is lower than the priority of the task to be executed is being executed, the task execution right of all the tasks being executed is released and all tasks are Task execution right release means for setting the PU in a temporary task non-execution state, and when the task execution right of all tasks is released by the task execution right release means, the state of each released task is set as the task management of each task. The task execution right release state recording means to record in the information, the task management information storage area information stored in the plurality of ready queues is stored in each of the CPUs in the task non-execution state by the task execution right release means. Task allocation means for allocating tasks related to the task information storage area information stored in the ready queue having a high priority in order from the head side of the ready queue, and the task assigned to the CPU to which the task is allocated by the task allocation means As a task execution means for executing the task based on the task management information storage area information of the task. The

  The invention according to claim 2 of the present application (hereinafter referred to as the second invention) should be executed by the task information storage area information storage means when the computer functions as the task execution right releasing means in the first invention. When task information storage area information related to a task is stored at the end of the ready queue corresponding to the priority of the task, a task having a lower priority than the priority of the task to be executed is being executed Or when the task management information storage area information related to the task whose execution has been completed is deleted from the ready queue by the task management information storage area information deletion means, the task execution right of all the tasks being executed is released and all CPUs are released. The temporary task is not executed.

  In the invention according to claim 3 of the present application (hereinafter referred to as the third invention), in the first invention or the second invention, a specific CPU having a specific function is provided among a plurality of CPUs. When the computer functions as a ready queue creation unit, the function is performed so as to create a specific ready queue associated with the specific CPU, and the specific function is performed when the computer functions as a task management information storage area information storage unit. The task management information storage area information of the specific task to be used is functioned to be stored in the specific ready queue, and when functioning as task assigning means, the specific task connected to the specific ready queue is assigned to the specific CPU. It is made to function so that it may be assigned to.

  The invention according to claim 4 of the present application (hereinafter referred to as the fourth invention) includes a plurality of CPUs and first, second, and third storage devices in any of the first to third inventions. In addition, in an embedded computer provided with a dedicated CPU having an external interrupt processing function and fourth, fifth, and sixth storage devices, the first CPU including the plurality of CPUs and the first, second, and third storage devices in the computer A second control unit including a dedicated control unit, a fourth CPU, a fourth storage unit, and a sixth storage unit; and a second control unit configured to function as each unit according to any one of claims 1 to 3. A second control unit that functions as a means for controlling a second plurality of tasks that perform requests related to execution control of a plurality of tasks to the first control unit, and the second control unit includes: The second part of the computer is connected to the fourth part Second ready queue creating means for creating a second plurality of ready queues that are shared by the dedicated CPU and set with different priorities on the storage device; the first plurality of queues stored in the fifth storage device Second task priority setting means for setting the priority of at least the task to be executed among the second plurality of tasks for controlling execution of the second task, and the second storage task on the sixth storage device. Second task management information creating means for creating task management information of at least a task to be executed, task management information of a task to be executed created by the second task management information creating means on the sixth storage device The storage area information has the same priority as the priority set by the second task priority setting means among the plurality of second ready queues created by the second ready queue creation means. The second task management information storage area information storage means stored at the end of the dequeue, and when the execution of the task being executed by the dedicated CPU is completed, the task management information storage area information relating to the task that has been executed is ready The second task management information storage area information deletion means to be deleted from the queue, the task information storage area information relating to the task to be executed by the second task information storage area information storage means is the last of the ready queue corresponding to the priority of the task. In the case where the task is stored in the tail and the task whose priority is lower than the priority of the task to be executed is being executed, the task execution right of the task being executed is released and the CPU is in a temporary task non-execution state. Second task execution right releasing means, and when the task execution right is released by the second task execution right releasing means, The second task execution right release state recording means for recording the state in the task management information of the task, the CPU in the task non-execution state by the second task execution right release means, and the second plurality of ready queues Of the tasks related to the stored task management information storage area information, the second task allocation means for allocating the task related to the task information storage area information stored at the head of the ready queue having a high priority, the second task allocation means The CPU to which the task is assigned is made to function as a second task execution unit that causes the task to be executed based on the task management information storage area information of the task.

  The invention according to claim 5 of the present application (hereinafter referred to as the fifth invention) relates to a computer-readable recording medium recording the embedded system control program according to any of the first to fourth inventions. .

  Next, an invention according to claim 6 of the present application (hereinafter referred to as a sixth invention) includes a plurality of CPUs, first, second, and third storage devices shared by the plurality of CPUs, and the first memory. A ready queue creating means for creating a plurality of ready queues shared by the CPUs and set with different priorities on the device, and at least execution of a plurality of tasks stored in the second storage device Task priority setting means for setting the priority of a task to be performed; task management information creating means for creating task management information for at least a task to be executed among the plurality of tasks on the third storage device; The information of the storage area on the third storage device of the task management information of the task to be executed created by the task management information creation means is stored in the plurality of ready queues created by the ready queue creation means. The task management information storage area information storage means for storing at the tail of the ready queue having the same priority as the priority set by the task priority setting means, and any of the tasks being executed by the plurality of CPUs The task management information storage area information deletion means for deleting the task management information storage area information related to the task for which execution has been completed from the ready queue and the task information storage area information storage means When task information storage area information related to a task to be stored is stored at the end of the ready queue corresponding to the priority of the task, a task having a lower priority than the priority of the task to be executed is being executed. When there is, task execution right releasing means for releasing the execution right of all the tasks being executed and setting all the CPUs to the temporary task non-execution state, and the task When the execution right for all tasks is released by the right release means, the task execution right release state recording means for recording the state of each released task in the task management information of each task, and the task execution right The task information storage area stored in the ready queue having a high priority among the tasks related to the task management information storage area information stored in the plurality of ready queues in each CPU that has been set to the task non-execution state by the release means Task allocation means for assigning tasks related to information in order from the head of the ready queue, and the CPU to which the tasks are assigned by the task assignment means, execute the tasks based on the task management information storage area information of the tasks And a task execution means.

  In the invention according to claim 7 of the present application (hereinafter referred to as the seventh invention), in the sixth invention, the task execution right releasing means stores task information related to a task to be executed by the task information storage area information storage means. When the area information is stored at the tail of the ready queue corresponding to the priority of the task, when a task having a lower priority than the priority of the task to be executed is being executed, or the execution has been completed When the task management information storage area information related to the task is deleted from the ready queue by the task management information storage area information deletion means, the task execution right of all the tasks being executed is released and all the CPUs are set to the temporary task non-execution state. It is characterized by making it.

  In the invention according to claim 8 of the present application (hereinafter referred to as the eighth invention), in the sixth invention or the seventh invention, a specific CPU having a specific function is provided among a plurality of CPUs. The ready queue creation means creates a specific ready queue associated with the specific CPU, and the task management information storage area information storage means includes the task management information storage area information of the specific task that uses the specific function. The task assigning means stores a specific task connected to the specific ready queue, and stores the specific task in the specific ready queue.

  The invention according to claim 9 of the present application (hereinafter referred to as the ninth invention), in any of the sixth invention to the eighth invention, in addition to the plurality of CPUs and the first, second, and third storage devices, A first control unit including a dedicated CPU having an external interrupt processing function and fourth, fifth, and sixth storage devices, and including each unit according to any one of claims 6 to 8. The first portion including the plurality of CPUs and the first, second and third storage devices is controlled, and the second portion including the dedicated CPU and the fourth, fifth and sixth storage devices is controlled as the first portion. The second control unit that functions as a means for controlling the second plurality of tasks that requests the first control unit to execute requests related to the execution control of the plurality of tasks is shared by the dedicated CPU on the fourth storage device. To create a second plurality of ready queues with different priorities A second task for setting a priority of at least a task to be executed among a plurality of second tasks stored in the fifth storage device and controlled to execute the first plurality of tasks. Priority setting means; second task management information creating means for creating task management information of at least a task to be executed out of the second plurality of tasks on the sixth storage device; and the second task management. The information of the storage area on the sixth storage device of the task management information of the task to be executed created by the information creating means is stored in the second plurality of ready queues created by the second ready queue creating means. The second task management information storage area information storage means for storing at the tail of the ready queue having the same priority as the priority set by the second task priority setting means, and the dedicated CPU Task second management information storage area information deletion means for deleting task management information storage area information relating to the task for which execution has ended from the ready queue when the execution of the current task is completed, and the second task information storage area When task information storage area information related to a task to be executed by the information storage means is stored at the tail of the ready queue corresponding to the priority of the task, the priority is lower than the priority of the task to be executed When the task is being executed, the second task execution right releasing means for releasing the task execution right of the task being executed and causing the CPU to be in a temporary task non-execution state, and the second task execution right releasing means Second task execution right release state recording means for recording the state of the released task in the task management information of the task when the task execution right is released; The CPU in the task non-execution state by the second task execution right releasing means has a higher priority among the tasks related to the task management information storage area information stored in the second plurality of ready queues. A second task assigning means for assigning a task related to task information storage area information stored at the head of the queue, and a task management information storage area for the task to the CPU assigned the task by the second task assignment means And a second task execution means that is executed based on the information.

  Next, the effect of the present invention will be described.

  First, according to the first invention, in a built-in computer having a plurality of CPUs as task processing means for processing tasks, a plurality of ready queues that are shared by the CPUs and set with different priorities are created. The priority of at least a task to be executed among the plurality of tasks stored in the second storage device is set, and task management information of at least the task to be executed among the plurality of tasks is stored in the third storage device. Created.

  The information of the storage area on the third storage device of the task management information of the task to be executed is the same priority as the priority set by the task priority setting means in the plurality of ready queues. Stored at the end of the ready queue. Further, when the execution of any of the tasks being executed by the plurality of CPUs is completed, the task management information storage area information relating to the task for which the execution has been completed is deleted from the ready queue.

  When task information storage area information relating to a task to be executed is stored at the tail of the ready queue corresponding to the priority of the task, a task having a lower priority than the priority of the task to be executed When the task is being executed, the task execution right of all the tasks being executed is released and all CPUs are set to the temporary task non-execution state. The task status is recorded in the task management information of each task.

  The task information storage area stored in the ready queue having a high priority among the tasks related to the task management information storage area information stored in the plurality of ready queues in each CPU in the task non-execution state Tasks related to information are assigned in order from the head of the ready queue, and the task is executed by the CPU to which the task is assigned based on the task management information storage area information of the task.

  According to this, when a task having a lower priority than the priority of the task to be executed is being executed, the task is immediately assigned to any one of a plurality of CPUs and executed. Thus, even in an embedded computer having a plurality of CPUs, real-time processing of tasks with high priority is ensured.

  Further, when execution of any of a plurality of tasks being executed by a plurality of CPUs is completed, the task is immediately assigned to the CPU that has completed the execution of the task and executed, and the CPU that has completed the task processing. There is no case where a task is not assigned indefinitely.

  That is, tasks are appropriately dynamically distributed to a plurality of CPUs, variation in the load of each CPU is reduced, and prompt processing of tasks with high priority is ensured.

  Further, since tasks are reassigned to all CPUs, these CPUs are surely assigned in order from the task having the highest processing priority.

  Note that the first storage device, the second storage device, and the third storage device may share one storage device.

  Next, according to the second invention, even when the execution of any of the tasks being executed by a plurality of CPUs is completed, the task is immediately assigned to the CPU that has completed the execution of the task and executed. As a result, there is no case where a task is not assigned to a CPU for which task execution has been completed.

  According to the third invention, when a specific CPU having a specific function is provided among a plurality of CPUs, a specific ready queue associated with the specific CPU is created and the specific function is used. The specific task to be connected is connected to a specific ready queue among the plurality of ready queues, and the specific task connected to the specific ready queue is assigned to a specific CPU.

  According to this, for example, when a specific task can be processed only by a specific CPU, the specific task is not assigned to a CPU that cannot process the task. Further, the specific task can be processed by a CPU other than the specific CPU, but if the specific CPU can improve the task processing speed, the specific task is processed by the specific CPU suitable for executing the task. As a result, the processing speed of the specific task can be improved.

  If a task exists in a ready queue having a higher priority than the specific ready queue, the task of the ready queue having a higher priority may be assigned to the specific CPU, or the task existing in the specific ready queue may be You may make it allocate to a specific CPU in priority to the task which exists in the ready queue with a high priority. Further, only a specific task may be connected to the specific ready queue, or a task other than the specific task may be connected.

  Further, according to the fourth invention, the embedded computer control program includes a first part including a plurality of CPUs and first, second, and third storage devices in the computer according to any one of claims 1 to 3. In addition to the first control unit functioning as each described unit, the second part including the dedicated CPU having the external interrupt processing function and the fourth, fifth, and sixth storage devices is provided for the first plurality of tasks. Since the second control unit that functions as a means for controlling the second plurality of tasks for executing the execution control request to the first control unit is provided, the external interrupt processing is processed by the dedicated CPU. In this case, external interrupt processing may not be performed by a plurality of other CPUs, thereby eliminating the load of external interrupt processing of the other CPUs. Further, the second control unit can control the first control unit according to the situation. In addition, since the first control unit and the second control unit have substantially the same configuration, it is possible to easily construct a mechanism for performing external interrupt processing with the dedicated CPU, and the first control unit and the second control unit. The control unit can be optimized for each function.

  According to the fifth aspect of the invention, there is provided a computer-readable recording medium on which the embedded system control program according to any of the first to fourth aspects of the invention is recorded.

  Next, the sixth invention to the ninth invention are inventions of embedded systems corresponding to the programs of the first invention to the fourth invention, and according to this, the functions and effects described in the first invention to the fourth invention are achieved. Achieved with embedded systems.

  Hereinafter, embodiments of the present invention will be described.

  First, the embedded system A according to the present invention will be described with reference to FIG. 1. The embedded system A includes a plurality of CPUB ... B, a storage device C shared by the plurality of CPUB ... B, and the storage device C. , A ready queue creation means E for creating a plurality of ready queues D... D that are shared by the CPUs B and set with different priorities, and a plurality of tasks F... F stored in the storage device C. Task priority setting means G for setting the priority of at least the task F... F to be executed, and at least the tasks F... F to be executed among the plurality of tasks F. Task management information creation means I for creating task management information H ... H, and task management information H ... H of the task F ... F to be executed created by the task management information creation means I on the storage device C The storage area information J... J is used as a ready queue having the same priority as the priority set by the task priority setting means G among the plurality of ready queues D... D created by the ready queue creation means E. When the execution of any one of the task management information storage area information storage means K stored at the end of D and the tasks F... F being executed by the CPUs B. Task management information storage area information deletion means L for deleting the task management information storage area information J related to the finished task F from the ready queue D, and task information related to the task F to be executed by the task information storage area information storage means K When the storage area information J is stored at the end of the ready queue D corresponding to the priority of the task F, a task having a lower priority than the priority of the task F to be executed When F... F is being executed, task execution right releasing means M for releasing the task execution right of all currently executing tasks F... F and making all CPU B. When the right release means M releases the right to execute all the tasks F ... F, the task execution records the state of each released task F ... F in the task management information H ... H of each task F ... F. The task management information storage area information J stored in the plurality of ready queues D... D is stored in each of the CPU B... B that is in a task non-execution state by the right release state recording means N and the task execution right release means M. Among the tasks F... F related to J, the task F storage F related to the task information storage area information J... J stored in the ready queue D. Task assignment means O assigned in order The task execution means P for causing the CPUs B ... B to which the tasks F ... F are assigned by the task assignment means O to execute the tasks F ... F based on the task management information storage area information J ... J of the tasks F ... F. And have. Hereinafter, the embedded system A will be described in detail through the first to third embodiments. In this embedded system A, the first, second and third storage devices according to claims 1 to 3 of the claims are shared.

  First, the first embodiment will be described.

  As shown in FIG. 2, the embedded computer 1 constituting the embedded system of the first embodiment includes a plurality of CPUs 11-1 to 11-n (hereinafter referred to as CPU1, CPU2, CPU3,. Shared memory 12 (corresponding to the storage device C in FIG. 1) and a shared bus 13 for connecting them.

  The shared memory 12 includes a ROM and a RAM. In the shared memory 12, a real-time operating system 21 (hereinafter referred to as an OS 21) that configures the embedded computer control program according to claims 1 and 2 to cause the embedded computer 1 to function as each means described in FIG. And a plurality of tasks 22... 22 (corresponding to tasks F... F in FIG. 1) and OS data 23 including various parameters and temporary data related to the OS 21 are stored.

  The OS 21 is read from the shared memory 12 and executed on each of the CPUs 1 to CPUn. In other words, although there is one OS 21 stored on the shared memory 12, the task 21 on each CPU is executed by the OS 21 that is executed in parallel on each CPU1 to CPUn and executed on each CPU. Execution is controlled. Details of the function of the OS 21 will be described later.

  The OS data 23 includes OS shared data 23a shared by the OS 21 executed on the plurality of CPUs, and non-shared data 23b unique to each OS 21 executed on the plurality of CPUs. The OS shared data 23a includes a ready queue table (see FIG. 4) for managing the states of a plurality of ready queues (corresponding to the ready queues D to D in FIG. 1, see FIG. 3). Details thereof will be described later.

  The OS 21 determines the CPU execution state when the CPUs 1 to CPUn are executing the tasks 22... 22, and the CPU idle state (the task non-execution state described in the claims) when the tasks 22. ).

  The task 22 is controlled by the OS 21 to one of an execution state, an executable state, a waiting state, and a hibernation state. Here, the execution state means a state in which the task 22 is assigned to any one of the CPUs 1 to CPUn by the OS 21 and is being executed, and the executable state is ready for execution of the task 22. However, since the task 22 having a higher priority than the task 22 is being executed, it means that the task 22 cannot be executed, and the waiting state is executed because the execution condition of the task 22 is not established although it has been started. This means a state where the task 22 cannot be performed, and the dormant state means a state where the task 22 is not activated.

  Task management information (equivalent to the task management information H... H in FIG. 1) of the tasks 22... 22 including information such as the execution status and the priority of the tasks 22. Are created for all of the tasks 22... 22 and stored as a part of the OS shared data 23 a on the memory 12.

  Also, the priority of execution of the tasks 22... 22 is set by the OS 21 for each task 22... 22 when the OS 21 is started, based on task importance, urgency, size, and the like. Information is stored on the memory 12 as information. This priority may be changed after the task 22... 22 requests the OS 21 or by the OS 21 after activation.

  FIG. 3 is an explanatory diagram showing an example of a ready queue provided for each priority, and FIG. 4 shows a configuration of a ready queue table for managing the status of the ready queue for each priority. The ready queue table includes, for each ready queue, start address information on the memory 12 in an area storing task information of a task connected next to a task connected to the ready queue of the priority, It stores task management information storage area information consisting of the start address information of the area storing the task information of the task connected immediately before, and the OS shared data 23a on the shared memory 12 when the OS 21 is activated. Created as part of In other words, when the OS 21 is activated, a plurality of ready queues having different priorities are created.

  FIG. 3 shows a state in which seven pieces of task management information storage area information are stored, but no task management information storage area information is stored when the OS 21 is started, and for example, the execution condition of the task 22 is satisfied. Is stored at the tail of the ready queue having the same priority as that of the task 22 among the plurality of ready queues, and the execution is terminated when the execution of the task 22 is completed. The task management information storage area information related to the task 22 is deleted from the ready queue.

  Here, the OS 21 according to the present embodiment employs an event-driven task priority order scheduling method as a scheduling method. Note that scheduling refers to searching the ready queue table to determine a task to be executed next (referring to assigning a task to a CPU).

  Specifically, the OS 21 running on each of the CPUs 1 to CPUn (1) requests (system calls) for activation of the task 22 or interrupt processing of the execution state (transition from the sleep state to the executable state) from the other task 22. Etc.) (2) When there is a request to stop another task 22 from the execution state task 22 or interrupt processing (transition from the execution state to the dormant state), (3) from the execution state task 22 When the invoking task 22 transitions to the wait state, there is a request for (4) canceling the wait state of the other task 22 (transition from the wait state to the executable state) from the task 22 or interrupt processing in the execution state. (5) When the invoking task 22 declares the end of its own task, (6) a task with a higher priority than the task priority of the executing task is given to the executing task. When any priority is set (system call or the like), one of the conditions is satisfied, and task information is stored in the ready queue (at the tail) having a higher priority than the priority of the task 22 in the execution state. When area information is stored (when a task having a lower priority than the priority of the task F to be connected is in an execution state), or when an execution state task 22 is disconnected from the ready queue (hereinafter, “predetermined” When the scheduling condition is satisfied ”), as exclusive control, the execution right of all the tasks 22... 22 being executed by the plurality of CPUs 1 to CPUn is released, and all of the CPU1 to CPUn are temporarily in the CPU idle state (tasks). In the non-execution state), the released state of each task 22 ... 22 is recorded in the task information of each task 22 ... 22. In addition, the task information stored in the ready queue having a high priority among the tasks 22... 22 related to the task management information storage area information stored in the plurality of ready queues in the CPU idle CPUs 1 to CPUn. The tasks 22... 22 relating to the storage area information are assigned in order from the head of the ready queue. Then, the CPUs 1 to CPUn to which the tasks 22... 22 are assigned execute the tasks 22... 22 based on the task management information storage area information of the tasks 22.

  Hereinafter, for convenience of explanation, it is said that task management information storage area information is stored in the ready queue, that tasks T1 to T7 are connected to the ready queue, and task management information storage area information is stored in the ready queue. Deleting is called disconnecting the task from the ready queue.

  Next, the scheduling by the real-time OS 21 performed when the predetermined scheduling condition is satisfied will be described with reference to the flowchart of FIG.

First, in step S1, 1 is set as the number c of the allocation target CPU.
The CPU number means the subscripts 1 to n of the CPUs 1 to CPUn. Next, in step S2, 0 is set as the priority k of the ready queue to be scheduled, and in step S3, 1 is added to k. Then, in step S4, it is determined whether k is a predetermined value m or less. When the determination is YES, that is, when k is equal to or smaller than the predetermined value m, it is further determined in step S5 whether or not the task is connected to the ready queue having the priority k.

  If the determination in step S5 is NO, that is, if a task is connected to the ready queue having the priority k, the process returns to step S3 and the subsequent processing is repeated. Here, the predetermined value m in step S4 is the maximum priority set by the OS 21. That is, when k becomes larger than the predetermined value m, the search for all ready queues is completed, and the scheduling is terminated.

  On the other hand, when the determination in step S5 is YES, that is, when a task exists in the ready queue having the priority k, 1 is set as the task order p in step S6. Here, the task order p is a value indicating the position of the target task from the top task on the ready queue having the priority k. Next, in step S7, the p-th task from the top in the ready queue with the priority k is assigned to the CPU with the CPU number c.

  Next, in step S8, 1 is added to the CPU number c, and in step S9, it is determined whether or not the CPU number c exceeds the number of CPUs n. If NO, that is, if it exceeds, step S10. In step S11, it is determined whether or not the task order p is larger than the number of tasks connected to the ready queue having the priority k. When the determination in step S11 is YES, that is, the task rank p is larger than the number of tasks connected to the ready queue with the priority k, and there is no task with the task rank p in the ready queue with the priority k. If so, the process returns to step S3 and the subsequent processes are repeated. If NO, the process returns to step S7 and the subsequent processes are repeated.

  On the other hand, when the determination in step S9 is YES, that is, when the CPU number c exceeds the CPU number n, the task is assigned to all the CPUs and the scheduling is terminated.

  Next, an example of scheduling by the OS 21 performed when the predetermined scheduling condition is satisfied will be described with reference to FIGS. In this description, the embedded computer 1 is assumed to have three CPUs 1, CPU2, and CPU3 when n = 3 in FIG. It is assumed that there are five ready queues with priorities 1 to 5.

  First, when the predetermined scheduling condition is satisfied, all task execution rights of the tasks being executed by the CPUs 1, 2, and 3 are released, and the state at the time of task execution right release of each task being executed is set for each task. Recorded in each task information. At this time, it is assumed that seven secondary tasks 22... 22 (hereinafter referred to as T1 to T7) are in an executable state. Specifically, as shown in FIG. 3, task T1 is in the ready queue with priority 1, task T2 is in the ready queue with priority 3, and task T3 is task T4 in task 5 with priority 5. , And task T6, task T7 is connected to a ready queue of priority 6 respectively. It is assumed that no task is connected to the ready queue with priority 3. As a result of releasing all task execution rights of the tasks, all of the CPUs 1, 2, and 3 are in the CPU idle state.

  First, the OS 21 searches the ready queue table in order from the ready queue having the highest priority in order to assign a task to the CPU 1 among the CPUs 1, CPU2, and CPU3 in the CPU idle state. As a result of this search, as shown in FIG. 6, since the task T1 is connected to the priority 1 ready queue, the OS 21 assigns the task T1 at the head of the priority 1 ready queue to the CPU 1. That is, the task T1 is executed by the CPU1.

  Next, in order to assign a task to the CPU 2, the OS 21 searches whether the task is connected second from the top of the ready queue with priority 1, but since the task is not connected, Search for a ready queue. As a result of this search, since the task is connected to the ready queue with the priority 2, the OS 21 assigns the top task T 2 of the ready queue with the priority 2 to the CPU 2. That is, the task T2 is executed by the CPU2.

  Next, since the OS 21 assigns a task to the CPU 3, when it is searched whether the task is connected second from the head of the ready queue with priority 2, the task T3 is connected. The second task T3 from the top of the ready queue is assigned to the CPU 3. That is, the task T3 is executed by the CPU 3.

  As a result, the task is assigned to all of the CPUs 1, 2, and 3 and the execution state is entered, so the OS 21 ends the scheduling.

  Note that a task whose task execution right has been released is resumed from the state when it was released.

  Here, for example, task T1, which is allocated as described above and is currently being executed, requests activation of task T8 stored in memory 12 by OS 21, and task T8 is connected to the ready queue of priority 1 by OS 21. When a predetermined scheduling condition is satisfied, the task execution right of the currently executing tasks T1, T2, and T3 is released, and the task execution right release state of the currently executing tasks T1, T2, and T3 is Each task T1, T2, T3 is recorded in each task information, and the CPUs 1, 2, 3 are all in the CPU idle state, and scheduling is executed. In this case, the ready queue table is searched in the same manner as described above, and as shown in FIG. 7, first, task T1 is assigned to CPU1, then task T8 is assigned to CPU2, and then task 3 is assigned to CPU3. T2 will be allocated. In this case, the tasks T1 and T2 are resumed from the execution state when the task execution right is released.

  Then, for example, the execution of task T1, which is allocated as described above and is currently being executed, is terminated, task T1 declares the task execution end to OS 21, and task OS T1 is deleted from the ready queue by OS 21. Sometimes, a predetermined scheduling condition is satisfied, the task execution right of the currently executing tasks T2 and T3 is released, and the task execution right release state of the currently executing tasks T2 and T3 is the respective tasks T2 and T3. Every time, it is recorded in each task information, and scheduling is executed. In this case, the ready queue table is searched in the same manner as described above, and as shown in FIG. 8, first, task T8 is assigned to CPU1, then task T2 is assigned to CPU2, and then task 3 is assigned to CPU3. T3 will be assigned. In this case, the tasks T2 and T3 are resumed from the execution state when the task execution right is released.

  As described above, according to the embedded system according to the first embodiment, when a task having a lower priority than the priority of the task to be executed is being executed, the task to be executed is immediately executed by the CPU 1. Therefore, even in an embedded computer having a plurality of CPUs 1, 2, and 3, real-time processing of a task with high priority is reliably ensured.

  Further, when the execution of any of the plurality of tasks being executed by the plurality of CPUs 1, 2, and 3 is completed, the task is immediately assigned to the CPU that has completed the execution of the task, and is executed. There is no case where a task is not assigned to the CPU for which the process has been completed.

  In other words, the tasks are appropriately dynamically distributed to the plurality of CPUs 1, 2, 3 to reduce the variation in the load on each CPU and to ensure quick processing of tasks with high priority.

  In addition, since tasks are reassigned to all the CPUs 1, 2, 3, the CPUs 1, 2, 3 are surely assigned in order from the task having the highest processing priority.

  Next, a second embodiment of the present invention will be described.

  In the embedded system according to the second embodiment, in the embedded system according to the first embodiment, a CPU that processes a task connected to the ready queue having the priority is associated with the ready queue for each priority. This will be described below with reference to FIGS.

  As shown in FIG. 9, the embedded computer 31 constituting the embedded system of the second embodiment includes a plurality of CPUs 41-1, CPU 41-2, CPU 41-3,..., CPU 41-n (CPUB. (Hereinafter referred to as “CPU1, CPU2, CPU3,... CPUn”), a single shared memory 42 (corresponding to the storage device C in FIG. 1), and a shared bus 43 for connecting them.

  The CPU 1 and CPU 2 have specific functions suitable for drawing signal processing, audio processing, and the like in addition to the functions of other CPUs (these processes are examples).

  The shared memory 42 includes a ROM and a RAM. In the shared memory 42, a real-time operating system 51 (hereinafter referred to as OS 51) that configures the embedded computer control program according to claims 1 to 3 and causes the embedded computer 1 to function as each means described in FIG. And a plurality of tasks 52... 52 (corresponding to tasks F... F in FIG. 1) and OS data 53 including various parameters and temporary data related to the OS 51 are stored.

  The OS 51 is read from the shared memory 42 and executed on the CPU 1 to CPU n. In other words, there is one OS 51 stored on the shared memory 42, but the task 52 on each CPU is executed by the OS 51 that is executed in parallel on each CPU 1 to CPUn and executed on each CPU. Execution is controlled. Details of the function of the OS 51 will be described later.

  The OS data 53 includes OS shared data 53a shared by the OS 51 executed by the plurality of CPUs, and non-shared data 53b unique to each OS 51 executed on the plurality of CPUs. The OS shared data 53a includes a ready queue table (see FIG. 11) for managing a plurality of ready queues (corresponding to the ready queues D to D in FIG. 1, see FIG. 10). Details thereof will be described later.

  The OS 51 determines the CPU execution state when the CPUs 1 to CPUn are executing the tasks 52... 52, and the CPU idle state (the task non-execution state described in the claims) when the tasks 52. ).

  The task 52 is controlled by the OS 51 to one of an execution state, an executable state, a wait state, and a hibernation state. Here, the execution state means a state in which the task 52 is assigned to one of the CPUs 1 to CPUn by the OS 51 and is being executed, and the executable state is ready for execution of the task 52. However, the task 52 having a higher priority than the task 52 is being executed, and means that the task 52 cannot be executed. The wait state is executed because the execution condition of the task 52 is not established although it has been activated. This means a state where the task cannot be performed, and the hibernation state refers to a state where the task 52 is not activated.

  Task management information (equivalent to the task management information H... H in FIG. 1) of the tasks 52. Created for all tasks 52... 52 and stored as a part of the OS shared data 53 a on the memory 42.

  Further, the priority of execution of the tasks 52... 52 is set by the OS 51 for each task 52... 52 when the OS 51 is started, based on task importance, urgency, size, and the like. Information is stored on the memory 42 as information. This priority may be changed after the task 52... 52 requests the OS 51 or by the OS 51 after activation.

  FIG. 10 is an explanatory diagram showing an example of a ready queue provided for each priority, and FIG. 11 shows a configuration of a ready queue table that manages the status of the ready queue for each priority. This ready queue table stores task information (corresponding to task management information H... H, corresponding to task management block) of a task connected next to the task connected to the ready queue of the priority for each ready queue. Task management information storage area information consisting of the start address information of the storage area on the memory 42 and the start address information of the area storing the task information of the task connected immediately before, and its priority Attribute information of a CPU that can execute a task at a time, and is created as part of the OS shared data 43a on the shared memory 42 when the OS 51 is activated. In other words, when the OS 21 is activated, a plurality of ready queues having different priorities are created. Further, each ready queue is associated with an attribute indicating which of the plurality of CPUs 1 to CPUn should execute a task existing in the ready queue of the priority.

  FIG. 10 shows a state in which seven pieces of task management information storage area information are stored, but no task management information storage area information is stored when the OS 51 is started, and for example, the execution condition of the task 52 is satisfied. Is stored at the tail of the ready queue having the same priority as that of the task 52 among the plurality of ready queues, and the execution ends when the execution of the task 52 is completed. The task management information storage area information related to the task 52 is deleted from the ready queue.

  The area for storing the CPU attribute information of the ready queue according to the second embodiment is composed of a 32-bit bit field as shown in FIG. Each bit on the bit field has a unique meaning. For example, setting any bit from the first bit to the 31st bit to 1 means designation of the CPU corresponding to that bit, and setting the 32nd bit to 1 means no CPU designation, that is, any CPU Can also be assigned. In addition, regarding the bits from the first bit to the 31st bit, a plurality of bits can be set to 1 (logical sum designation). In other words, a plurality of CPUs can be specified.

  Here, the OS 51 according to the present embodiment employs an event-driven task priority order scheduling system with a CPU attribute as a scheduling system. As shown in FIG. 10 described above, the event-driven task priority order scheduling method with a CPU attribute is a task connected to the corresponding ready queue in the ready queue for each priority of the event-driven task priority order scheduling method. By assigning the attribute of the CPU that executes the process, the specific CPU can process a specific task. Since event-driven task priority order scheduling and basic control are common except that control based on CPU attributes is added, the predetermined scheduling condition described in the first embodiment is the following. Scheduling by the real-time OS 51 performed when established will be specifically described with reference to the flowchart of FIG.

  First, in step S21, 1 is set as the CPU number c of the target CPU.

  The CPU number means the subscripts 1 to n of the CPUs 1 to CPUn. Next, in step S22, 0 is set as the priority k of the ready queue to be scheduled, and in step S23, 1 is added to k. Then, in step S24, it is determined whether or not k is a predetermined value m or less. When the determination is YES, that is, when k is equal to or less than the predetermined value m, in step S25, whether the CPU attribute of the ready queue with the priority k matches the CPU to which the task is to be assigned, Alternatively, it is determined whether or not the CPU attribute is CPU designation. If the determination in step S25 is YES, it is further determined in step S26 whether or not a task is connected to the ready queue having the priority k.

  When the determination in step S25 is NO, that is, when the CPU attribute of the ready queue having the priority k does not match the CPU to which the task is to be assigned and the CPU attribute is not CPU designation, or When the determination in S26 is NO, that is, when no task is connected to the ready queue having the priority k, the process returns to step S23 and the subsequent processing is repeated. Here, the predetermined value m in step S24 is the maximum priority set by the OS 51. That is, when k becomes larger than the predetermined value m, the search for all ready queues is completed, and the scheduling is terminated.

  On the other hand, when the determination in step S26 is YES, that is, when a task is connected to the ready queue having the priority k, 1 is set as the task order p in step S27. Here, the task order p is a value indicating the position of the target task from the top task on the ready queue having the priority k. Next, at step 28, it is determined whether or not the p-th task from the top has been assigned to any CPU.

  When the determination in step S28 is YES, that is, when the p-th task has been assigned, 1 is added to the value of the task order p in step S29, and the task order p is given priority in step S30. It is determined whether or not it is larger than the number of tasks connected to the ready queue of degree k. When the determination in step S30 is YES, that is, the task rank p is larger than the number of tasks connected to the ready queue having the priority k, and the task rank p is connected to the ready queue having the priority k. If not, the process returns to step S23 and the subsequent processes are repeated. If NO, the process returns to step S28 and the subsequent processes are repeated.

  On the other hand, when the determination in step S28 is NO, that is, when the task with the task rank p has not been assigned, in step S31, the p-th task from the head in the ready queue with priority k is assigned to the CPU with CPU number c. Assign to.

  Next, in step S32, 1 is added to the CPU number c, and in step S33, it is determined whether or not the CPU number c has exceeded the CPU number n. If NO, that is, if it has not exceeded, this CPU number. In order to assign a task to the CPU of c, the processing after step S22 is repeated. On the other hand, when the determination in step S33 is YES, that is, when the CPU number c exceeds the CPU number n, the task is assigned to all the CPUs, and the scheduling ends.

  Next, an example of scheduling by the OS 51 performed when the predetermined scheduling condition is satisfied will be described with reference to FIGS. In this description, it is assumed that the embedded computer 31 in FIG. 9 has n = 3, that is, three CPUs 1, CPU 2, and CPU 3, and CPU 1 and CPU 2 have different specific functions. It is assumed that there are five ready queues with priorities 1 to 5. In addition, the CPU attributes of the ready queues with the priority 1 and the priority 5 are all CPUs (no CPU designation), the CPU attributes of the ready queue with the priority 2 are the CPU 1 designation, the priority 3 and the priority 4 It is assumed that the CPU attribute of the ready queue is designated as CPU2.

  First, when the predetermined scheduling condition is satisfied, all task execution rights of the tasks being executed by the CPUs 1, 2, and 3 are released, and the state at the time of task execution right release of each task being executed is set for each task. Recorded in each task information. At this time, it is assumed that seven secondary tasks 52... 52 (hereinafter referred to as tasks T1 to T7) are in an executable state. Specifically, as shown in FIG. 14, task T1 is in the ready queue with priority 1, task T2 is in the ready queue with priority 2, and task T3 is task T4 in task 4 with priority 4. , And task T6, task T7 is connected to a ready queue of priority 5. It is assumed that no task is connected to the ready queue with priority 3. Further, as a result of releasing all task execution rights, all of the CPUs 1, 2, and 3 are in the CPU idle state.

  Next, the OS 51 searches the ready queue table in order from the ready queue with the highest priority in order to assign a task to the CPU 1 among the CPUs 1, CPU2, and CPU3 in the CPU idle state. As a result of this search, as shown in FIG. 14, the ready queue with priority 1 has the CPU attribute of all CPUs (no CPU designation), and the task T1 is connected to the ready queue. The first task T1 in the ready queue of degree 1 is assigned to CPU1. That is, the task T1 is executed by the CPU1. Here, the CPU attribute of the ready queue with priority 1 is set to all CPUs for the purpose of enabling immediate processing of various tasks requiring urgency.

  Next, the OS 51 searches the ready queue table in order from the ready queue with the highest priority in order to assign tasks to the CPU 2. As a result of this search, the priority 1 ready queue has the CPU attribute of all CPUs (no CPU designation), but since the task T1 connected to the priority 1 ready queue is assigned to the CPU 1, other tasks to be assigned. The priority 2 ready queue has the CPU attribute specified by CPU1 and the CPU attribute does not match, and the priority 3 ready queue has the CPU attribute specified by CPU2 and the CPU attribute matches but the task does not exist. Since the ready queue of priority 4 has the CPU attribute specified by CPU 2 and the CPU attributes match, and tasks T4, T5, and T6 are connected, the OS 51 transfers the task T4 at the head of the ready queue of priority 4 to the CPU 2. assign. That is, the task T4 is executed by the CPU2.

  Next, in order to assign a task to the CPU 3, the OS 51 searches the ready queue table in order from the ready queue with the highest priority. As a result, the ready queue with priority 1 has the CPU attribute of all CPUs (no CPU designation), but task T1 connected to the ready queue with priority 1 has been assigned to CPU 1, so there are other tasks to be assigned. The priority 2 ready queue has the CPU attribute specified by CPU 1 and the CPU attribute does not match. The priority 3 ready queue has the CPU attribute specified by CPU 2 and the CPU attribute does not match. Since the CPU attribute is specified by CPU2 and the CPU attribute does not match, and the ready queue with priority 5 is the CPU attribute of all CPUs and task T7 exists, the OS 51 assigns the task T7 at the head of the ready queue with priority 5 to CPU3. Assign to. That is, the task T7 is executed by the CPU 3.

  As a result, the task is assigned to all of the CPUs 1, 2, and 3 and the execution state is reached, so the secondary OS 51 ends the scheduling.

  Note that a task whose task execution right has been released is resumed from the state when it was released.

  Here, for example, task T1, which is allocated as described above and is currently being executed, requests activation of task T8 stored in memory 42 by OS 51, and task T8 is connected to the ready queue of priority 1 by OS 51. When a predetermined scheduling condition is satisfied, the task execution right of the currently executing tasks T1, T4, T7 is released, and the task execution right release state of the currently executing tasks T1, T4, T7 is Each task T1, T4, and T7 is recorded in each task information, and the CPUs 1, 2, and 3 are all in the CPU idle state, and scheduling is executed. In this case, the ready queue table is searched in the same manner as described above. As shown in FIG. 15, first, task T1 is assigned to CPU1, then task T8 is assigned to CPU2, and then task 3 is assigned to CPU3. T7 will be assigned. In this case, the tasks T1 and T3 are resumed from the state when the task execution right is released.

  Then, for example, the execution of task T1, for example, that is allocated and executed as described above is completed, task T1 declares the task execution end to OS 51, and task 51 is deleted from the ready queue by OS 51. Sometimes, a predetermined scheduling condition is satisfied, the task execution right of the currently executing tasks T8 and T7 is released, and the task execution right release state of the currently executing tasks T8 and T7 is the respective tasks T8 and T7. Every time, it is recorded in each task information, and scheduling is executed. In this case, the ready queue table is searched in the same manner as described above, and as shown in FIG. 16, first, task T8 is assigned to CPU1, then task T4 is assigned to CPU2, and then task 3 is assigned to CPU3. T7 will be assigned. In this case, the tasks T4 and T7 are resumed from the state when the task execution right is released.

  Here, a task connected to the ready queue with priority 2 is processed using a task (specific task) that cannot be processed without using a specific function that only CPU 1 has, or a specific function that only CPU 1 has. This is a task (specific task) that can speed up the process rather than being processed by another CPU. For this reason, the specific task that uses the specific function of the CPU 1 is not connected to the ready queue without the CPU designation, and is connected to the ready queue (specific ready queue) with the CPU attribute of the priority 2 specified above. Yes. Note that even if a specific task uses the specific function of the CPU 1, for example, when there are many tasks in the specific ready queue with the priority 2 and other CPUs can process the task, the priority of the task is changed. Then, it may be connected to a ready queue of another priority.

  In addition, tasks connected to the ready queues with priority levels 3 and 4 can be processed only by using a specific function that only the CPU 2 has, or can be processed by using a specific function that only the CPU 2 has. This is a task that can speed up the processing rather than the processing by the CPU. Therefore, the specific task using the specific function of the CPU 2 is not connected to the ready queue without the CPU designation, and the CPU attribute is the ready queue with the priority 3 designated by the CPU 2 (specific ready queue) or the ready queue with the priority 4. Connect to a queue (specific ready queue). Note that even if a specific task uses a specific function of the CPU 2, for example, when there are many tasks in the ready queues with the priorities 3 and 4, and other CPUs can process them, the task priority is set. It may be changed and connected to a ready queue of another priority.

  As described above, according to the embedded system according to the second embodiment, in addition to the operations and effects described in the first embodiment, the specific task can be processed only when the specific CPU can process the specific task. Is not assigned to a CPU that cannot process the task. Further, the specific task can be processed by a CPU other than the specific CPU, but if the specific CPU can improve the task processing speed, the specific task is processed by the specific CPU suitable for executing the task. As a result, the processing speed of the specific task can be improved.

  When a task exists in a ready queue having a higher priority than the specific ready queue and an idle state of the specific CPU is detected, the task of the ready queue having the higher priority may be assigned to the specific CPU. Alternatively, a task existing in a specific ready queue may be assigned to a specific CPU in preference to a task existing in a ready queue having a high priority. Further, only a specific task may be connected to the specific ready queue, or a task other than the specific task may be connected.

  Next, a third embodiment of the present invention will be described.

  In the embedded system according to the third embodiment, in the embedded system according to the second embodiment, a dedicated CPU for processing an external interrupt or the like is newly provided, and a plurality of CPUs according to the second embodiment are provided. In addition to the real-time operating system executed above, a real-time operating system executed on a dedicated CPU is provided, and will be described below with reference to FIGS.

  As shown in FIG. 17, this embedded computer 61 includes one primary CPU 70 (hereinafter referred to as M-CPU) and a plurality of secondary CPUs 71-1, 71-2, 71-3 to 71-n (hereinafter referred to as S-CPU1). , S-CPU2, S-CPU3 to S-CPUn), a single shared memory 72, and a shared bus 73 for connecting them.

  Each of the S-CPU 1 and S-CPU 2 has specific functions suitable for drawing signal processing, audio processing, and the like in addition to the functions of other S-CPUs (these processes are examples). Further, the M-CPU has a specific function related to external signal processing that the S-CPU does not have (for example, a signal processing function such as a function of receiving an interrupt signal from an external device of the embedded computer 61). That is, signal processing related to the external device is performed by the M-CPU instead of the S-CPU.

  The shared memory 72 includes a ROM and a RAM. In the shared memory 72, a real-time operating system 81 (hereinafter referred to as an OS 81) that configures the embedded computer control program according to claims 1 to 4 and causes the embedded computer 61 to function as each means shown in FIG. ), A plurality of tasks 82a... 82a, 82b... 82b, and OS data 83 including various parameters and temporary data related to the OS 81.

  The OS 81 includes a primary OS 81a and a secondary OS 81b. The primary OS 81a is read from the shared memory 72 and executed on the M-CPU, and the secondary OS 81b is read from the shared memory 72 and executed on the S-CPU1 to S-CPUn. In other words, although there is one secondary OS 81b stored on the shared memory 72, the secondary OS is executed in parallel on each of the S-CPU1 to S-CPUn. The primary OS 81a has the same ready queue configuration and scheduling method as the OS 21 according to the first embodiment, and the secondary OS 81b has the ready queue configuration and scheduling method according to the second embodiment. It is the same as OS51. Therefore, hereinafter, in describing the OSs 81a and 81b, the control between the OSs 81a and 81b will be mainly described.

  The OS data 83 includes primary OS data 83a unique to the primary OS 81a, secondary OS shared data 83b shared by the secondary OS 81b executed on the plurality of S-CPUs, and secondary executed on the plurality of S-CPUs. It consists of secondary OS non-shared data 83c unique to each OS 81b. The master OS data 83a includes a ready queue table (similar to FIG. 4 described above) for managing a plurality of ready queues (similar to FIG. 3 described above). Further, the slave OS shared data 83a includes a ready queue table (similar to FIG. 11 described above) for managing a plurality of ready queues (similar to FIG. 10 described above). As described above, the configuration of the ready queue and the ready queue table for the primary OS 81a is the same as that of the ready queue according to the first embodiment, and the ready queue for the secondary OS 81b is related to the second embodiment. The configuration is the same as the ready queue and the ready queue table, and a detailed description thereof is omitted. Note that the CPU attribute of the ready queue for the secondary OS 81b may be read as S-CPU in FIGS.

  The plurality of primary tasks 82a ... 82a are tasks processed by the primary OS 81a, and the plurality of secondary tasks 82b ... 82b are tasks processed by the secondary OS 81b. The primary task 82a is a task for making various requests for execution control of the secondary task 82b to the secondary OS 81b, and is executed only on the primary OS 81a. The secondary task 82b is other tasks and is executed only on the secondary OS 81b.

  The primary OS 81a manages and grasps the processing of external interrupts from keys, switches, etc., and the state (execution state or idle state) of the secondary OS 81b on each S-CPU. Based on this, execution control of the secondary task 82b is performed. Specifically, a registration and execution request for the initial secondary task 82b for the secondary OS 81b on each S-CPU and a request for starting and stopping the secondary task 82b are made to the secondary OS 81b. The primary OS 81a makes these requests to the secondary OS 81b via the primary task 82a. The secondary OS 81b executes the secondary task 82b in response to the various requests from the primary OS 81a.

  Each of the OSs 81a and 81b determines that the CPU is in a CPU execution state when the CPU is executing a task, and determines that the CPU is in an idle state (a task non-execution state described in claims) when the task is not being executed.

  The primary task 82a and the secondary task 82b are controlled by the OSs 81a and 81b to any one of an execution state, an executable state, a waiting state, and a hibernation state.

  The secondary OS 81b being executed on the S-CPU can start, stop, or release the waiting state from the primary task 82a being executed on the M-CPU or the interrupt processing being executed on the M-CPU. When the request is received, scheduling is performed by releasing all task execution rights of the tasks being executed on the S-CPU1 to S-CPUn.

  Further, the secondary OS 81b being executed on the S-CPU may start, stop, or stop another secondary task 82b from the secondary task 82b being executed on a certain S-CPU or the interrupt processing being executed on the S-CPU. When a request for releasing the waiting state is received and when the secondary task 82b being executed enters a waiting state, all task execution rights of the tasks being executed on the S-CPU1 to S-CPUn are released, Perform scheduling.

  As described above, the scheduling method and the ready queue configuration of the primary OS 81a are the same as those of the OS 21 according to the first embodiment, and the scheduling method and the ready queue configuration of the secondary OS 81b are the same as those in the second embodiment. Since it is the same as the OS 51 according to the embodiment, the flowchart of FIG. 5 may be referred to for the scheduling of the primary OS 81a, and the flowchart of FIG. 13 may be referred to for the scheduling of the secondary OS 81b. Note that only the M-CPU is scheduled by the primary OS 81a. When the CPU number c is 1, the scheduling ends. Moreover, what is scheduled by the secondary OS 81b is S-CPU1 to S-CPUn, and the CPU in FIG. 13 may be read as S-CPU.

  In order to prevent the primary task 82a from issuing a state change request for the secondary task 82b during the scheduling, the secondary OS 81b temporarily suspends the task being executed on the M-CPU and interrupt processing to the primary OS 81a. Make a request.

  When operating shared data of each OS such as a ready queue from each OS 81a, 82a for scheduling, etc., as the exclusive control between the OS 81a, 81b, the stop control of the secondary OS 81b by the primary OS 81a and the primary by the secondary OS 81b Stop control of the OS 81a and the other secondary OS 81b is performed. The stop control of the secondary OS 81b by the primary OS 81a has higher execution priority than the stop control of the primary OS 81a and the other secondary OS 81b by the secondary OS 81b.

  For this exclusive control, the real-time OS 81 stores a flag for exclusive control request in the secondary OS shared data 83b that can be referenced from the primary OS 81a and each secondary OS 81b. Specifically, primary OS secondary stop request flags for the number of S-CPUs (for the number of secondary OS 81b) and the same number of secondary OS secondary stop response flags are stored, and the primary OS 81a sets these flags. And stop control of the task being executed on the secondary OS 81b. In addition, for each S-CPU (for each secondary OS 81b on the S-CPU), secondary OS secondary stop request flags for the number of S-CPUs (for the number of secondary OSs 81b) and the secondary stop for secondary OSs of the same number. The secondary OS 81b performs stop control of the primary OS 81a and the other secondary OS 81b using these flags.

  Next, a specific example of control by the OS 81 will be described. In this description, it is assumed that the embedded computer 61 has n = 3 in FIG. 17, that is, one M-CPU and three S-CPUs, S-CPU2 and S-CPU3.

  First, with reference to FIG. 18, the activation of each of the OSs 81a and 81b and the task processing after the built-in computer 61 is turned on will be described.

  When the power of the embedded computer 61 is turned on, the M-CPU, S-CPU1, S-CPU2, and S-CPU3 first read the reset vector instruction and data in the shared memory 72. As a result, the primary OS 81a is simultaneously started on the M-CPU, and the secondary OS 81b is simultaneously started on the S-CPU1, S-CPU2, and S-CPU3.

  At the time of activation, the primary OS 81a statically generates a primary task 82b as an initial activation task, connects to the ready queue for the primary OS 81a, and performs scheduling. As a result of this scheduling, this primary task 82b is assigned to the M-CPU by the primary OS 81a, and the primary task 82b as the initial activation task is executed on the M-CPU. Here, as this initial activation task, secondary tasks 82b... 82b (described as tasks A, B, and C in FIG. 18) as initial activation tasks to be executed on the S-CPU1, S-CPU2, and S-CPU3. The activation request of the generated secondary tasks 82b... 82b (tasks A, B, and C) is output to the secondary OS 81b executed on each S-CPU1, S-CPU2, and S-CPU3.

  On the other hand, the secondary OS 81b on each S-CPU shifts to an idle state immediately after startup. Then, the secondary task 82b (tasks A, B, C) waits for the activation request from the primary task 82a, and when the activation request is received, the secondary tasks 82b ... 82b (tasks A, B, C) are activated sequentially. To do. The secondary OS 81b performs scheduling to determine which S-CPU executes which secondary task 82b ... 82b (tasks A, B, C) at the time of activation.

  Note that the scheduling operation performed by the real-time OS 81 performed when the predetermined scheduling condition is satisfied is basically the same as that of the OS 21 according to the first embodiment in the case of the primary OS 81a. Since there is one CPU, the task connected to the head of the ready queue with the highest priority among the ready queues to which the task is connected is executed. In other words, when execution of the first task ends, the task connected second from the top or the task connected to the head of the ready queue with the highest priority among lower priority is executed. It becomes. For example, assuming that a task is connected to the ready queue as shown in FIG. 3, the task T1 is executed first, and when the execution of the task T1 is completed, the task T2 is executed next, and the execution of the task T2 is executed. When the process is completed, the task T3 is executed next, so that it is sequentially executed by one M-CPU.

  On the other hand, since the operation of the secondary OS 81b is the same as that of the second embodiment, the description thereof is omitted.

  In this case, according to the third embodiment, for example, when the M-CPU receives an interrupt signal from the outside, if the interrupt signal relates to the activation of the secondary task 82b, for example, The interrupt handler is activated, and the activation request of the primary task 82a for making the activation request of the secondary task 82b to the primary OS 81a is made from the interrupt handler. Then, the primary task 82a activated by the primary OS 81a and in the execution state makes a request for starting the secondary task 82b to the secondary OS 81b. As a result, the secondary task 82b is activated and executed by the secondary OS 82b. Become.

  In other words, processing involving an external interrupt is quickly executed by the M-CPU secured exclusively, and processing related to the entire embedded system, such as secondary task execution control, is also quickly executed by the M-CPU secured exclusively. As a result, task processing of the entire embedded system is performed quickly. Further, it is not necessary to provide a function for processing a task associated with an external interrupt in the S-CPU.

  As described above, according to the embedded system according to the third embodiment, in addition to the operations and effects described in the first and second embodiments, the real-time OS 81 includes a plurality of S-CPUs 1 and 2. , 3 and a memory 72 having an external interrupt processing function in addition to the secondary OS 81b (first control unit) that allows the first part including the memory 72 to function as each unit according to any one of claims 1 to 3. -The second part including the CPU (dedicated CPU) and the memory 72 is divided into a plurality of primary tasks 82a (second plurality of tasks) that request the secondary OS 81b to start and stop a plurality of secondary tasks 82b (first plurality of tasks). Since the primary OS 81a (second control unit) that functions as a means for controlling the task is controlled, an external interrupt process is processed by the M-CPU. Becomes, the external interrupt processing load of the other plurality of S-CPU1,2,3 is eliminated. Further, the secondary OS 81b can be controlled by the primary OS 81a according to the situation. Further, since the primary OS 81a has almost the same configuration as the secondary OS 81b, it is possible to easily construct a mechanism for performing external interrupt processing by the M-CPU, and the primary OS 81a optimizes the secondary OS 81b according to each function. can do.

  The present invention can be widely applied to embedded systems having a plurality of CPUs.

1 is a block diagram of an embedded system according to an embodiment of the present invention. It is a hardware block diagram of the embedded system which concerns on the 1st Embodiment of this invention. It is explanatory drawing of the ready queue of the real-time operating system which functions the same embedded system. It is a block diagram of the ready queue table of the same operating system. It is an example of the flowchart of the task scheduling by the operating system. It is explanatory drawing of the effect | action of the task scheduling by the operating system (the 1). It is explanatory drawing of the effect | action of the task scheduling by the operating system (the 2). It is explanatory drawing of the effect | action of the task scheduling by the operating system (the 3). It is a hardware block diagram of the embedded system which concerns on the 2nd Embodiment of this invention. It is explanatory drawing of the ready queue of the real-time operating system which functions the same embedded system. It is a block diagram of the ready queue table of the same operating system. It is explanatory drawing of CPU attribute designation | designated of the ready queue table of the same operating system. It is an example of the flowchart of the task scheduling by the operating system. It is explanatory drawing of the effect | action of the task scheduling by the operating system (the 1). It is explanatory drawing of the effect | action of the task scheduling by the operating system (the 2). It is explanatory drawing of the effect | action of the task scheduling by the operating system (the 3). It is a hardware block diagram of the embedded system which concerns on the 3rd Embodiment of this invention. It is explanatory drawing of the effect | action at the time of starting of the embedded system to which the same operating system was applied.

Explanation of symbols

1, 31, 61 Embedded computers 11-1 to 11-n, 41-1 to 41-n, 70, 71-1 to 71-n CPU
12, 42, 72 Shared memory (first storage device, second storage device, third storage device, fourth storage device, fifth storage device, sixth storage device)
21, 51, 81 Real-time operating system (control program)
22, 52, 82 Task 70 Primary CPU
71-1 to 71-n Secondary CPU
81a Primary OS (second control unit)
81b Secondary OS (first control unit)

Claims (9)

A program for controlling an embedded computer having a plurality of CPUs and first, second, and third storage devices shared by the plurality of CPUs, the computer being connected to each of the CPUs on the first storage device A ready queue creating means for creating a plurality of ready queues that are shared and set with different priorities, and sets a priority of at least a task to be executed among a plurality of tasks stored in the second storage device Task priority setting means, task management information creating means for creating task management information of at least a task to be executed among the plurality of tasks on the third storage device, execution created by the task management information creating means A plurality of ready queues created by the ready queue creating means are used to store storage area information on the third storage device for task management information of tasks to be processed. One of the task management information storage area information storage means stored at the tail of the ready queue having the same priority as the priority set by the task priority setting means, and the tasks being executed by the plurality of CPUs. When the execution of the task is completed, the task management information storage area information deletion means for deleting the task management information storage area information related to the task for which execution has been completed from the ready queue, executed by the task information storage area information storage means When task information storage area information related to a task to be stored is stored at the end of the ready queue corresponding to the priority of the task, a task having a lower priority than the priority of the task to be executed is being executed. When there is, task execution right releasing means for releasing the task execution right of all the tasks being executed and causing all CPUs to be in a temporary task non-execution state, When the task execution right of all tasks is released by the task execution right releasing means, the task execution right release state recording means for recording the state of each released task in the task management information of each task, the task execution The task information stored in the ready queue having the highest priority among the tasks related to the task management information storage area information stored in the plurality of ready queues is stored in each CPU that has been set to the task non-execution state by the authority release means. Task allocation means for allocating tasks related to area information in order from the head of the ready queue, and causing the CPU to which tasks are allocated by the task allocation means to execute the task based on the task management information storage area information of the task An embedded computer control program which functions as a task execution means. When the computer functions as the task execution right releasing means, task information storage area information relating to a task to be executed by the task information storage area information storage means is stored at the tail of the ready queue corresponding to the priority of the task. In some cases, when a task having a lower priority than the priority of the task to be executed is being executed, or task management information storage area information related to the task that has been executed is read by the task management information storage area information deletion means. The embedded computer control program according to claim 1, wherein when the task is deleted from the queue, the task execution right of all the tasks being executed is released to make all the CPUs non-executable. In the case where a specific CPU having a specific function is provided among a plurality of CPUs, when the computer functions as a ready queue creating means, it functions to create a specific ready queue associated with the specific CPU. When functioning as task management information storage area information storage means, the task management information storage area information of a specific task that uses the specific function is functioned to be stored in the specific ready queue, 3. The embedded computer control program according to claim 1, wherein when the program is caused to function, the program is caused to function so that a specific task connected to a specific ready queue is assigned to the specific CPU. In a built-in computer provided with a dedicated CPU having an external interrupt processing function and fourth, fifth and sixth storage devices in addition to a plurality of CPUs and first, second and third storage devices, the plurality of CPUs in the computer And a first control unit that causes the first part including the first, second, and third storage devices to function as each unit according to any one of claims 1 to 3, a dedicated CPU, and a fourth, 5. The second part including the sixth storage device functions as means for controlling the second plurality of tasks for making a request for execution control of the first plurality of tasks to the first control unit. The second control unit includes a second plurality of ready units in which different priority levels are set by sharing the second part of the computer with the dedicated CPU on the fourth storage device. Second ready curriculum that creates a queue A second task priority setting for setting a priority of at least a task to be executed among a plurality of second tasks for controlling execution of the first plurality of tasks stored in the fifth storage device; Means for creating task management information of at least a task to be executed out of the second plurality of tasks on the sixth storage device, created by the second task management information creating means The information on the storage area of the sixth storage device for the task management information of the task to be executed is used as the second task of the second plurality of ready queues created by the second ready queue creating means. The second task management information storage area information storage means for storing at the tail of the ready queue having the same priority as the priority set by the priority setting means, the task being executed by the dedicated CPU being executed The second task management information storage area information deletion means for deleting the task management information storage area information relating to the task whose execution has been completed from the ready queue, and the second task information storage area information storage means. When task information storage area information related to a task is stored at the end of the ready queue corresponding to the priority of the task, a task having a lower priority than the priority of the task to be executed is being executed Is a second task execution right releasing means for releasing the task execution right of the task being executed to put the CPU into a temporary task non-execution state, and when the task execution right is released by the second task execution right releasing means The second task execution right release state recording means for recording the state of the released task in the task management information of the task, and the second task execution right release means The task information stored in the head of the ready queue with high priority among the tasks related to the task management information storage area information stored in the second plurality of ready queues in the task non-executed state Second task assigning means for assigning a task related to area information, and second task executing means for causing the CPU assigned the task by the second task assigning means to execute the task based on the task management information storage area information of the task The embedded computer control program according to any one of claims 1 to 3, wherein the embedded computer control program is functioned as: A computer-readable recording medium on which the embedded computer control program according to any one of claims 1 to 4 is recorded. A plurality of CPUs, first, second, and third storage devices shared by the plurality of CPUs, and a plurality of readys that are shared by the CPUs and have different priorities set on the first storage device A ready queue creating means for creating a queue, a task priority setting means for setting the priority of at least a task to be executed among the plurality of tasks stored in the second storage device, and the third storage device In addition, task management information creation means for creating task management information of at least a task to be executed among the plurality of tasks, and the third of the task management information of the task to be executed created by the task management information creation means. The storage area information on the storage device has the same priority as the priority set by the task priority setting means among the plurality of ready queues created by the ready queue creation means. Task management information storage area information storage means stored at the tail end of the ready queue and a task related to the task that has been executed when execution of any of the tasks being executed by the plurality of CPUs is completed Task management information storage area information deletion means for deleting management information storage area information from the ready queue, and task information storage area information relating to a task to be executed by the task information storage area information storage means corresponds to the priority of the task. When the task is stored at the end of the ready queue and a task having a lower priority than the priority of the task to be executed is being executed, the right to execute all the tasks being executed is released and all CPUs are released. The task execution right release means for setting the temporary task non-execution state, and when the right to execute all tasks is released by the task execution right release means, the release is performed. The task execution right release state recording means for recording the state of each task to be recorded in the task management information of each task, and the CPUs in the task non-execution state by the task execution right release means, in the plurality of ready queues Task assignment means for sequentially assigning tasks related to task information storage area information stored in a ready queue having a high priority, among tasks related to stored task management information storage area information, from the head side of the ready queue; An embedded system, comprising: a task execution unit that causes a CPU to which a task is allocated by the task allocation unit to execute the task based on task management information storage area information of the task. The task execution right releasing means executes the task information storage area information when the task information storage area information relating to the task to be executed by the task information storage area information storage means is stored at the tail of the ready queue corresponding to the priority of the task. When a task whose priority is lower than the priority of the task to be executed is being executed, or the task management information storage area information related to the task that has been executed is deleted from the ready queue by the task management information storage area information deletion means 7. The embedded system according to claim 6, wherein the task execution right of all the tasks being executed is released, and all the CPUs are set in a temporary task non-execution state. When a specific CPU having a specific function is provided among the plurality of CPUs, the ready queue creation means creates a specific ready queue associated with the specific CPU, and the task management information storage area information storage means The task management information storage area information of the specific task that uses the specific function is stored in the specific ready queue, and the task assigning unit allocates the specific task connected to the specific ready queue to the specific CPU. The embedded system according to claim 6 or 7, characterized in that In addition to a plurality of CPUs and first, second, and third storage devices, a dedicated CPU having an external interrupt processing function and fourth, fifth, and sixth storage devices are provided, and claims 6 to 6. A first control unit including each means according to any one of 8 controls the first part including the plurality of CPUs and the first, second, and third storage devices, and the dedicated CPU and the fourth, A second part that includes the fifth and sixth storage devices and functions as means for controlling a second plurality of tasks that requests the first control unit to execute a request for execution control of the first plurality of tasks. The control unit includes a second ready queue creating means for creating a second plurality of ready queues that are shared by the dedicated CPU and set with different priorities on the fourth storage device, and the fifth storage device. And a second plurality of execution controls of the first plurality of tasks Second task priority setting means for setting the priority of at least a task to be executed among the tasks, and task management of at least the task to be executed among the plurality of second tasks on the sixth storage device Second task management information creating means for creating information, and storage area information on the sixth storage device for the task management information of the task to be executed created by the second task management information creating means. The second task management stored at the tail of the ready queue having the same priority as the priority set by the second task priority setting means among the second plurality of ready queues created by the ready queue creation means When the execution of the task being executed by the information storage area information storage means and the dedicated CPU is completed, the task management information storage area information relating to the task for which the execution has been completed is readied. The task second management information storage area information deletion means to be deleted from the task, and the task information storage area information relating to the task to be executed by the second task information storage area information storage means, the ready queue corresponding to the priority of the task When stored at the end, if a task with a lower priority than the priority of the task to be executed is being executed, the task execution right of the task being executed is released and the CPU is not executed temporarily When the task execution right of the task is released by the second task execution right releasing means to be released and the second task execution right releasing means is released, the state of the released task is recorded in the task management information of the task Stored in the second plurality of ready queues in the second task execution right release state recording means and the CPU that has been in the task non-execution state by the second task execution right release means. Second task allocating means for allocating a task related to task information storage area information stored at the head of the ready queue having a higher priority among the tasks related to the task management information storage area information, and the second task allocating means 9. The second task execution means for causing the CPU to which the task is assigned to execute the task based on the task management information storage area information of the task, according to any one of claims 6 to 8. The described embedded system.

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