JP2005352658A - Serial communication control method between microcomputer and semiconductor memory card - Google Patents

Abstract

A high-speed serial communication between a microcomputer and a semiconductor memory card is made possible without adding a communication interface LSI to the microcomputer.
A microcomputer includes a synchronous serial communication interface and a general-purpose input / output port. The microcomputer 10 and the semiconductor memory card 12 are connected via a clock line 14 and a data line 16. The clock output source is switched between the clock output from the clock input / output terminal 24 of the synchronous serial communication interface 20 and the clock output from the terminal 28 of the general-purpose input / output port 22.
[Selection] Figure 1

Description

  The present invention relates to a serial communication control method between a microcomputer and a semiconductor memory card.

Various types of semiconductor memory cards have been commercialized, but since each employs a unique communication method, data communication protocols vary depending on the product and are not standardized. For this reason, microcomputers often do not have a dedicated communication interface for transferring data to and from a semiconductor memory card, and a dedicated communication interface LSI is externally attached to the microcomputer. The semiconductor memory card is connected to the microcomputer via the LSI.
Microcomputers with a built-in dedicated communication interface for transferring data to and from a semiconductor memory card are generally expensive, and that cost is also required when a dedicated communication interface LSI is externally attached. Therefore, it is very difficult at present to deal with semiconductor memory cards with devices with severe cost restrictions.
As a document disclosing a serial communication interface that can be used for data transfer between a microcomputer and a semiconductor memory card, there is, for example, JP-A-7-129484.
JP 7-129484 A

  The present invention has been made to solve the above problems, and the object of the present invention is to use only functions provided in many existing general-purpose microcomputers without adding a dedicated communication interface LSI. It is to enable high-speed serial communication between the microcomputer and the semiconductor memory card.

  In order to achieve the above object, a serial communication control method according to the present invention comprises a central processing unit (CPU), a clock input / output terminal and a data input / output terminal, and is triggered by the CPU to set a predetermined number of bits by hardware flow control. A microcomputer having a synchronous serial communication interface for performing high-speed serial communication as a unit, a general-purpose input / output port having a plurality of terminals and capable of input / output control bit by bit by the CPU, a clock input terminal, and a serial In a serial communication control method for controlling data communication with a semiconductor memory card having a data input / output terminal by a serial communication method, a clock line and a data line for connecting the microcomputer and the semiconductor memory card Prepare the synchronous serial communication interface The clock input / output terminal of the interface is connected to the clock line, the data input / output terminal of the synchronous serial communication interface is connected to the data line, and the first of the plurality of terminals of the general-purpose input / output port A terminal is connected to the clock line, the clock input terminal of the semiconductor memory card is connected to the clock line, the serial data input / output terminal of the semiconductor memory card is connected to the data line, and the CPU executes A communication switching unit configured by a computer program outputs a clock between a clock output from the clock input / output terminal of the synchronous serial communication interface and a clock output from the first terminal of the general-purpose input / output port. It is characterized in that original switching is performed.

  According to the present invention, between a microcomputer and a semiconductor memory card, a clock output source is switched using a synchronous serial communication interface and a general-purpose input / output port built in many existing microcomputers. Therefore, it is not necessary to add a dedicated communication interface LSI, and the serial communication can be performed at high speed.

  Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic diagram showing a first specific example of a connection form in which a microcomputer performing serial communication and a semiconductor memory card are connected using the serial communication control method according to the present invention, and FIG. It is the schematic diagram which showed the specific example. The microcomputer 10 is a component of the electronic device 11 that is provided in an electronic device (for example, a portable audio player) 11 that uses the semiconductor memory card 12. The semiconductor memory card 12 stores data (for example, audio data) that is read and / or written by the microcomputer 10. When the electronic device 11 is an audio player and audio data is stored in the semiconductor memory card 12, the microcomputer 10 processes the audio data read from the semiconductor memory card 12 to reproduce sound. The semiconductor memory card 12 is detachably connected to the electronic device 11. For this purpose, the electronic device 11 is equipped with a connector 13 for inserting the semiconductor memory card 12. In the present invention, first, a clock line 14 and a data line 16 for connecting the microcomputer 10 and the semiconductor memory card 12 are prepared. In the specific examples of FIGS. 1 and 2, the clock line 14 and the data line 16 are provided. Further, the microcomputer 10 and the connector 13 are connected.

  The microcomputer 10 includes a central processing unit (CPU) 18 and also includes a synchronous serial communication interface 20 and a general-purpose input / output port 22 controlled by the CPU 18. The synchronous serial communication interface 20 is a communication interface that is triggered by the CPU 18 and performs high-speed serial communication in units of a predetermined number of bits by hardware flow control. Many microcomputers in use today have a built-in standard synchronous serial communication interface, which is mainly used by microcomputers (EEPROM (electrically erasable programmable ROM)) and ADC (analog / digital / analog). It is used for high-speed serial communication with external devices such as converters. The present invention can be implemented using such a standard synchronous serial communication interface. The predetermined number of bits as a communication unit is often 8 bits or 16 bits, but any number of the predetermined number of bits may be used in implementing the present invention. The general-purpose input / output port 22 is a port that can perform input / output control for each bit by the CPU 18 according to a computer program, and is provided in almost all existing microcomputers.

  In the first specific example shown in FIG. 1, the synchronous serial communication interface 20 includes a clock input / output terminal 24 and a data input / output terminal 26. The clock input / output terminal 24 is connected to the clock line 14, and the data The input / output terminal 26 is connected to the data line 16. The data input / output terminal 26 is capable of dynamically controlling the input / output direction of the signal. In the second specific example shown in FIG. 2, the synchronous serial communication interface 20 includes a clock input / output terminal 24, a data input terminal 26 a, and a data output terminal 26 b, and the clock input / output terminal 24 is connected to the clock line 14. The data input / output terminals 26 a and 26 b are both connected to the data line 16. The only difference between the first specific example and the second specific example is whether the data input / output terminal of the synchronous serial communication interface 20 is a common terminal or an individual terminal. By connecting both the output terminals 26a and 26b to the data line 16, with respect to the function of data communication between the microcomputer 10 and the semiconductor memory card 12, the specific example of FIG. 1 and the specific example of FIG. It is the same thing. Therefore, in the following description, description will be made in accordance with the first specific example of FIG.

  The general-purpose input / output port 22 includes a large number of input / output terminals. However, terminals that are not directly related to the serial communication control method according to the present invention are not shown, and the description thereof is also omitted. The general-purpose input / output port 22 includes a first terminal 28 and a second terminal 30. The first terminal 28 is connected to the clock line 14, and the second terminal 30 is connected to the data line 16. The output sent from the first terminal 28 under the control of the CPU 18 is used as a clock, and the output sent out from the second terminal 30 under the control of the CPU 18 constitutes a part of serially communicated data. These clock output and data output will be described in more detail later.

  The semiconductor memory card 12 includes a clock input terminal 32 and a serial data input / output terminal 34. When the semiconductor memory card 12 is inserted into the connector 13, the clock input terminal 32 is connected to the clock line 14 and the serial data input / output terminal 34 is connected to the data line 16. The semiconductor memory card 12 includes a control terminal connected to an appropriate terminal of the microcomputer 10 in addition to the clock input terminal 32 and the serial data input / output terminal 34. The control terminal is a method according to the present invention. Since it does not have a direct relationship with the above, it is not shown and its description is omitted. The semiconductor memory card 12 has a function of receiving or transmitting data bits serially via the serial data input / output terminal 34 in synchronization with a clock received via the clock input terminal 32. Such a serial communication function Are provided in almost all existing semiconductor memory cards.

  Each of the clock line 14 and the data line 16 is pulled up via a pull-up resistor. However, depending on the communication protocol of the semiconductor memory card to be used, one or both of the clock line 14 and the data line 16 may be pulled down instead of pulled up. Will be described later.

  A serial communication control method according to the present invention for controlling data communication by the serial communication method between the microcomputer 10 and the semiconductor memory card 12 connected as described above will now be described. An important point of the serial communication control method according to the present invention is that, among the data that the microcomputer 10 continuously transfers to and from the semiconductor memory card 12 by the serial communication method, the data can be transferred continuously in a synchronous manner. The data is transferred via the serial communication interface 20, and the other part is transferred via the general-purpose input / output port 22. Furthermore, the serial communication control method described below can perform switching between data transfer via the synchronous serial communication interface 20 and data transfer via the general-purpose input / output port 22 without disturbing the data waveform. Is.

  First, continuous data transfer with the semiconductor memory card 12 executed by the microcomputer 10 via the synchronous serial communication interface 20 will be described. FIG. 3 is a waveform diagram showing a specific example of a data waveform transferred via the synchronous serial communication interface 20, wherein the upper stage in the figure is a clock waveform (waveform on the clock line 14), and the lower stage is a data waveform ( Waveform on the data line 16). In the specific example shown in FIG. 3, the data transfer unit is 8 bits, the transmission bit order is MSB first, data switching is performed at the falling edge of the clock waveform, and data capture is performed at the rising edge of the clock waveform. This is an example. However, many existing microcomputers are configured so that the clock edge and transmission bit order settings can be changed by register settings of the microcomputer, so that they match the communication protocol of the target semiconductor memory card. You can set them. For the sake of simplicity, in the following description, the description will be made on the assumption that the above conditions are satisfied except for the data transfer unit of the synchronous serial communication interface 20, and the data transfer unit is generally N bits. To do. As described above, the data transfer through the synchronous serial communication interface 20 is flow-controlled by hardware, so the CPU 18 does not intervene every time 1-bit data is transferred, and high-speed serial communication is performed. Is possible.

  Next, data transfer with the semiconductor memory card 12 executed by the microcomputer 10 via the general-purpose input / output port 22 will be described. When transmitting data from the microcomputer 10 to the semiconductor memory card 12, the microcomputer 10 drives the first terminal 28 of the general-purpose input / output port 22 to output “0” on the clock line 14, The second terminal 30 is driven to output a 1-bit data bit on the data line 16. Note that the order of driving the first terminal 28 and driving the second terminal 30 may be determined so as to match the communication protocol employed in the semiconductor memory card 12. Thereafter, the microcomputer 10 drives the first terminal 28 of the general-purpose input / output port 22 and outputs “1” on the clock line 14. As a result, the data bit on the data line 16 is taken into the semiconductor memory card 12.

  On the other hand, when the microcomputer 10 receives data from the semiconductor memory card 12, the microcomputer 10 drives the first terminal 28 of the general-purpose input / output port 22 and outputs “0” on the clock line 14. . Then, the semiconductor memory card 12 drives the data line 16 and outputs 1-bit data. Thereafter, the microcomputer 10 reads the data bit on the data line 16 via the second terminal 30 of the general-purpose input / output port 22, and drives the first terminal 28 to output “1” on the clock line 14. To do. The order of reading the data bits via the second terminal 30 and outputting “1” from the first terminal 28 to the clock line 14 is determined so as to match the communication protocol employed in the semiconductor memory card 12. Just do it.

  As described above, the data transfer via the general-purpose input / output port 22 requires the CPU 18 to intervene a plurality of times each time 1-bit data is transferred. Compared to data transfer via the communication interface 20, the speed is significantly reduced. Note that the data transfer method via the synchronous serial communication interface 20 described above and the data transfer method via the general-purpose input / output port 22 are both conventional methods.

  As described above, the serial communication control method according to the present invention is characterized by switching between data transfer via the synchronous serial communication interface 20 and data transfer via the general-purpose input / output port 22. The switching is performed by communication switching means configured by a computer program executed by the CPU 18 of the microcomputer 10. The switching will be described below. Here, as a specific example, a case where the microcomputer 10 performs X-bit continuous data transfer with the semiconductor memory card 12 will be described. FIG. 4 is a waveform diagram showing data waveforms transferred by the X-bit continuous data transfer. In the figure, the upper stage is a clock waveform (waveform on the clock line 14), and the lower stage is a data waveform (on the data line 16). Waveform).

The advantage of using the method according to the present invention is when X and N satisfy the following equation.
X = A × N + B (A and B are both positive integers, and 0 <B <N)
Here, it is assumed that X and N satisfy the above equation. The communication switching means of the microcomputer 10 performs N-bit unit data transfer using the synchronous serial communication interface A times in the first A × N-bit transfer section of X bits transferred continuously at a time. Let it repeat. For example, when data is transmitted from the microcomputer 10 to the semiconductor memory card 12, the CPU 18 of the microcomputer 10 reads transmission data from a RAM (not shown) and transmits a transmission data storage register (not shown) of the synchronous serial communication interface 20. This is set to (shown) and a transmission start command is issued to the synchronous serial communication interface 20 (that is, the synchronous serial communication interface 20 is triggered). Then, the synchronous serial communication interface 20 does not require the intervention of the CPU 18 and controls the clock input / output terminal 24 and the data input / output terminal 26 by hardware flow control to transmit N-bit data. Is performed automatically. During the transmission of the N-bit data, the CPU 18 can execute a task other than the data transfer. When the CPU 18 confirms the end of the transmission of the N-bit data, the CPU 18 proceeds to the next operation related to the data transfer.

  On the other hand, when the microcomputer 10 receives data from the semiconductor memory card 12, the CPU 18 of the microcomputer 10 issues a reception start command to the synchronous serial communication interface 20 (that is, triggers the synchronous serial communication interface 20). ). Then, the synchronous serial communication interface 20 receives the N-bit data by controlling the clock input / output terminal 24 and the data input / output terminal 26 by hardware flow control without requiring the intervention of the CPU 18 thereafter. Is performed automatically. While the N-bit data is being received, the CPU 18 can execute a task other than the data transfer. If the CPU 18 confirms that the N-bit data has been received, the received data of the synchronous serial communication interface 20 is received. Data is read from a storage register (not shown) and stored in RAM.

  If the above transmission operation or reception operation in units of N bits is repeated A times, the communication switching means transfers the data from the data transfer via the synchronous serial communication interface 20 to the data transfer via the general-purpose input / output port 22. Switch to. Then, transfer of the remaining B bits of the X bits to be continuously transmitted is executed using the general-purpose input / output port 22 as described above. As an alternative method, B-bit transfer is first performed using the general-purpose input / output port 22, and then the data transfer using the synchronous serial communication interface 20 is switched to transfer the remaining N × A bits. May be performed.

  The communication switching means transmits, for example, X-bit data in order to determine the timing for switching between data transfer via the synchronous serial communication interface 20 and data transfer via the general-purpose input / output port 22. Prior to starting, division by dividing X by N may be performed to calculate and store the values of A and B shown in the above formula. The switching timing can be determined based on the values of A to B.

  In the case of transmitting data from the microcomputer 10 to the semiconductor memory card 12, the hardware of the synchronous serial communication interface 20 constantly monitors the transmission data set in the transmission data storage register and is set there. When the data bit of the transmitted data becomes less than N bits, this may be notified to the communication switching means. In response to this, the communication switching means switches from data transfer via the synchronous serial communication interface 20 to data transfer via the general-purpose input / output port 22, and the remaining data bits less than N bits are input to the general-purpose input. What is necessary is just to make it output from the output port 22. FIG.

  In the serial communication control method described above, communication switching means configured by a computer program executed by the CPU 18 of the microcomputer 10 communicates one communication message between the microcomputer 10 and the semiconductor memory card 12. Sometimes, switching is performed between data transfer in units of a predetermined number of bits (N bits) by the synchronous serial communication interface 20 and data transfer by the general-purpose input / output port 22. As a result, a data bit string consisting of a number of bits (N × A bits) that is an integral multiple of a predetermined number of bits transferred via the synchronous serial communication interface 20 and data transferred via the general-purpose input / output port 22 One communication message is composed of a bit string or a single data bit. The general-purpose input / output port 22 transfers the data bit string when B ≧ 2, and the single data bit is transferred when B = 1.

  As described above, when data transfer is performed using the general-purpose input / output port 22, the data transfer speed is considerably lower than that when the synchronous serial communication interface 20 is used. This is because the CPU 18 of the microcomputer 10 must execute all the control related to the transfer. For example, even if the output of one terminal of the general-purpose input / output port 22 is changed only once, a plurality of instructions are required, so that it takes time corresponding to several system clock cycles of the microcomputer 10. Furthermore, since processing such as loop determination for each bit is added, the total transfer time becomes considerably long. On the other hand, when the synchronous serial communication interface 20 is used, N-bit transfer, which is a data transfer unit, is automatically performed by hardware, so that the clock frequency used for transfer is the system clock of the microcomputer. Can be raised to the same level. For this reason, very high-speed transfer is possible, and during the N-bit transfer, the CPU 18 of the microcomputer 10 can perform another process, so that the throughput of the entire system can be increased. it can. In communication with the semiconductor memory card 12, the portion where the continuous data transfer is simply performed occupies most of the communication, and therefore the synchronous serial communication interface 20 is used for this portion. The effect of speeding up data transfer is very large.

  In the serial communication control method described above, when the communication switching unit switches between data transfer by the synchronous serial communication interface 20 and data transfer by the general-purpose input / output port 22, (1) the synchronous serial communication interface 20 The clock output source is switched between the clock output from the clock input / output terminal 24 and the clock output from the first terminal 28 of the general-purpose input / output port 22, and at the same time, (2) the synchronous serial communication interface 20 The data terminal is switched between the data input / output terminal 26 and the second terminal 30 of the general-purpose input / output port 22 to switch the terminal used for data transfer with the semiconductor memory card 12. Therefore, the communication switching unit obtains the above-mentioned advantage by performing both of these switching operations. However, as another embodiment of the present invention, the communication switching unit performs only the clock output source switching in (1). It is possible to adopt a form in which the data terminal switching in (2) is not performed, and such an embodiment will be described later with reference to FIGS.

  Regarding the switching between the synchronous serial communication interface 20 and the general-purpose input / output port 22, it is important that the waveform disturbance on the communication line (clock line 14 and data line 16) does not occur during the switching. Otherwise, a communication error may occur. In the specific examples shown in FIGS. 1 and 2, the clock line 14 and the data line 16 are pulled up as a means for preventing waveform disturbance. This will be described below with reference to FIGS. 5A to 5C and FIG.

  5A to 5C show the reception buffer 42 and output buffer 44 of the synchronous serial communication interface 20, the reception buffer 46 and output buffer 48 of the general-purpose input / output port 22, and the reception of the data input / output circuit 50 of the semiconductor memory card 12. A buffer 52 and an output buffer 54 are shown, both of which are the respective terminals described above (not shown in FIGS. 5A-5C) and connectors (also omitted in FIGS. 5A-5C). Is connected to the data line 16. These figures schematically show how the state of each output buffer connected to the data line 16 changes when switching from the synchronous serial communication interface 20 to the general-purpose input / output port 22. It is shown in. An output buffer indicated by a solid line in the drawing is a buffer in a valid state (a state in which an output is being transmitted on the data line 16). The output buffer indicated by a dotted line in the figure is in a high impedance state (state separated from the data line 16), and a terminal to which the output buffer in the high impedance state is connected is in an input state (its output). The reception buffer corresponding to the buffer is ready to receive data.

  FIG. 5A shows a state where the synchronous serial communication interface 20 is transmitting data to the semiconductor memory card 12. In this state, only the output buffer 44 of the synchronous serial communication interface 20 is valid (terminal is in the output state), and the other output buffers are in high impedance (terminal is in the input state). In any case, two or more of the output buffers 44, 48, 54 connected to the data line 16 must not be enabled at the same time, since multiple output buffers can be simultaneously active. This is because, when it becomes effective, the power source and the ground are short-circuited and an excessive current flows, so that the element may be destroyed.

  When switching from the state in which data is transferred by the synchronous serial communication interface 20 to the data transfer by the general-purpose input / output port 22, to reliably prevent the output buffers 44 and 48 from being enabled at the same time. As shown in FIG. 5B, all the output buffers 44, 48, and 54 are once set in a high impedance state. Thereafter, by enabling the output buffer 48 of the general-purpose input / output port 22, the state shown in FIG. 5C is obtained, and transmission by the general-purpose input / output port 22 becomes possible. However, in the state shown in FIG. 5B, since there is no buffer driving the data line 16, the data line 16 is in a floating state. For this reason, if the data line 16 is not pulled up or pulled down, the potential of the data line 16 is determined only by the stray capacitance at this time, so that the behavior becomes very unstable. The pull-up of the data line 16 serves to prevent such a situation.

  Next, the pull-up of the clock line 14 will be described with reference to FIG. FIG. 6 shows an enlarged view of the switching portion from the synchronous serial communication interface 20 to the general-purpose input / output port 22 in the waveform diagram of FIG. 4, and the upper portion pulls up the clock line 14 as a comparative example. It is the wave form diagram which showed the case where neither pulls down. As is apparent from FIG. 6, when the pull-up is performed, the potential of the clock line 14 is kept high during switching, whereas when the pull-up and pull-down are not performed, the clock The potential of the line 14 is unstable. When the clock waveform changes on the clock line 14 as shown in the upper part of FIG. 6, the semiconductor memory card 12 erroneously recognizes the rising edge LE generated by the unstable potential as the clock edge. There is a fear. When such misrecognition becomes a problem in the communication protocol of the semiconductor memory card 12, pull-up or pull-down is essential. Whether pull-up or pull-down should be performed depends on the communication protocol of the semiconductor memory card that is actually used. If the state of the clock line 14 before switching is “1”, the pull-up is performed. And it is sufficient. Note that the above pull-up / pull-down only holds the potential of the clock line 14 and the data line 16 and does not charge or discharge them, so the resistance value of the pull-up / pull-down resistor may be large.

  If a control line other than the above is required as a communication protocol for a semiconductor memory card, increase the number of input / output terminals used in the general-purpose input / output port, assign it to the control line, and It may be controlled by the method. In general, since the section in which the control line is controlled is only a part of the entire communication, there is almost no decrease in the data transfer rate due to the control of this part. One specific example is shown in FIGS. This specific example is also a specific example of the embodiment described above in which the communication switching means performs only clock output source switching and does not perform data terminal switching.

  FIG. 7 shows a concrete example of the connection form between the microcomputer 10 and the semiconductor memory card 12 called “Memory Stick” (“Memory Stick” is a trademark of Sony Corporation). FIG. 8 is a schematic diagram showing an example, and FIG. 8 is a timing chart showing a part of the control method. The microcomputer 10 is mounted on a portable audio player 11, and audio data read by the microcomputer 10 is stored in the memory stick 12. The microcomputer 10 processes the audio data read from the memory stick 12 to reproduce sound. The memory stick 12 is detachably connected to the portable audio player 11, and for this purpose, the portable audio player 11 is equipped with a connector 13 for inserting the memory stick 12. The memory stick 12 includes a clock input terminal (SCLK) 32, a serial data input / output terminal (SDIO) 34, and a control terminal (BS) 56. In this specific example, the microcomputer 10 and the memory stick 12 are connected. A clock line 14, a data line 16, and a control line 58 are prepared. In the specific example of FIG. 7, these lines are connected between the microcomputer 10 and the memory stick connector 13. When the memory stick 12 is inserted into the connector 13, the clock input terminal (SCLK) 32 is connected to the clock line 14. The serial data input / output terminal (SDIO) 34 is connected to the data line 16, and the control terminal (BS) 56 is connected to the control line 58.

  As in the specific examples of FIGS. 1 and 2, in the specific example of FIG. 7, the microcomputer 10 includes a central processing unit (CPU) 18, a synchronous serial communication interface 20 controlled by the CPU 18, and general-purpose input / output. Port 22. Since the memory stick 12 always performs data transfer in units of 8 bits as its communication protocol, the synchronous serial communication interface 20 has a transmission unit of 8 bits. The data line 16 is connected only to the data input / output terminal 26 of the synchronous serial communication interface 20 and is not connected to the general-purpose input / output port 22. The synchronous serial communication interface 20 includes a clock input / output terminal (Serial_SCK) 24 and a data input / output terminal (Serial_SDO) 26. The clock input / output terminal 24 is connected to the clock line 14, and the data input / output terminal 26 is connected to data. Connected to line 16. The data input / output terminal 26 is capable of dynamically controlling the input / output direction of the signal.

  The general-purpose input / output port 22 includes a large number of input / output terminals. FIG. 2 shows an input / output A terminal 60, an input / output B terminal (PIO_SCK) 62, and an input / output C terminal (PIO_BS) 64. Only three terminals are shown. Of these, the input / output A terminal 60 is not used. The input / output B terminal (PIO_SCK) 62 is used as a clock output terminal and is connected to the clock line 14. The input / output C terminal (PIO_BS) 64 is used as a control signal output terminal and is connected to the control line 58. In the specific example of FIG. 8, since data bits are not transmitted / received via the general-purpose input / output port 22, the general-purpose input / output port 22 is not connected to the data line 16. Each of the clock line 14 and the data line 16 is pulled up via a pull-up resistor, and this pull-up is not in the state of each line as in the specific examples of FIGS. It is for preventing it becoming stable.

  The communication protocol of the memory stick 12 reads the control output on the control line 58 when the memory stick 12 is in the standby state, reads the control output on the control line 58 at that time, and further synchronizes with the eight clocks received thereafter, It is determined that eight data bits are read from the data line 16 and a combination of these control outputs and eight data bits is recognized as one communication command. For example, if the input / output A terminal 60 of the general-purpose input / output port 22 is connected to the data line 16 and data bits are transmitted from the input / output A terminal 60, eight data of the communication command are transmitted. Although bit transfer can be performed via the general-purpose input / output port 22, doing so takes a relatively long time and the load on the CPU 18 is also relatively large. Therefore, by applying the serial communication control method according to the present invention to transmission of communication commands, it becomes possible to perform command transmission at a higher speed and with a lower load.

  When transmitting the communication command according to the serial communication control method according to the present invention, when applied to the transmission of the communication command, the communication switching means configured by a computer program executed by the CPU 18 of the microcomputer 10 includes: The clock output source is switched between the clock output from the clock input / output terminal (Serial_SCK) 24 of the synchronous serial communication interface 20 and the clock output from the input / output B terminal (PIO_SCK) 62 of the general-purpose input / output port 22. .

  More specifically, when the communication switching means causes the memory stick 12 to read the control output output from the input / output C terminal (PIO_BS) 64 of the general-purpose input / output port 22 onto the control line 58, the communication switching means A clock output is sent from the output B terminal (PIO_SCK) 62, while data transfer between the data input / output terminal (Serial_SDO) 26 of the synchronous serial communication interface 20 and the serial data input / output terminal (SDIO) 34 of the memory stick 12 is performed. Is performed, the clock output is sent from the clock input / output terminal (Serial_SCK) 24 of the synchronous serial communication interface 22. As described above, the communication protocol of the Memory Stick 12 is a combination of a control output received via the control terminal (BS) 56 and a plurality of consecutive data bits received via the serial data input / output terminal (SDIO) 34. Therefore, the communication switching unit can cause the memory stick 12 to read the command by switching the clock output as described above.

  FIG. 8 is a waveform diagram showing waveforms on the clock line 14, the data line 16, and the control line 58 when performing the above serial communication control in the connection form of FIG. In FIG. 8, the upper part is a waveform on the data line 16, and MS indicates a period in which the serial data input / output terminal (SDIO) 34 of the memory stick 12 is in a valid state, and Serial_SDO indicates a microcomputer. 10 is a period in which the data input / output terminal (Serial_SDO) 26 of the synchronous serial communication interface 20 is in a valid state, and a hatched line indicates a period in which the data line 16 is maintained in a high state by being pulled up. It is. The middle stage is the waveform on the clock line 14, and Serial_SCK indicates the period when the clock input / output terminal (Serial_SCK) 24 of the synchronous serial communication interface 22 is in the valid state, and PIO_SCK indicates the general-purpose input / output. A period during which the input / output B terminal (PIO_SCK) 62 of the port 22 is in a valid state, and a hatched line indicates a period during which the clock line 14 is maintained in a high state by being pulled up. The lower part is a waveform on the control line 58, and the notation PIO_BS indicates that the input / output C terminal (PIO_BS) 64 of the general-purpose input / output port 22 is in the valid state.

  According to the serial communication control method described above, serial data can be transferred between the microcomputer 10 and the memory stick 12 without using a dedicated communication interface LSI, and the communication is performed at a relatively high speed. be able to.

It is the schematic diagram which showed the 1st specific example of the connection form which connects the microcomputer which performs serial communication using the serial communication control method which concerns on this invention, and a semiconductor memory card. It is the schematic diagram which showed the 2nd specific example of the connection form which connects the microcomputer which performs serial communication using the serial communication control method which concerns on this invention, and a semiconductor memory card. It is the wave form diagram which showed the specific example of the data waveform transferred via a synchronous serial communication interface. It is a wave form diagram which showed the data waveform transferred by X bit continuous data transfer. It is the schematic diagram which showed how the state of each output buffer connected to a data line changes, when switching from a synchronous serial communication interface to a general purpose input / output port. It is the schematic diagram which showed how the state of each output buffer connected to a data line changes, when switching from a synchronous serial communication interface to a general purpose input / output port. It is the schematic diagram which showed how the state of each output buffer connected to a data line changes, when switching from a synchronous serial communication interface to a general purpose input / output port. In the waveform diagram of FIG. 4, the lower part shows an enlarged part of switching from the synchronous serial communication interface to the general-purpose input / output port. The upper part shows a case where the clock line is not pulled up or pulled down as a comparative example. It is the shown waveform diagram. Schematic diagram showing a specific example of the connection between the two when a microcomputer performs data communication with a semiconductor memory card called a Memory Stick ("Memory Stick" is a trademark of Sony Corporation) It is. FIG. 8 is a waveform diagram showing waveforms on a clock line, a data line, and a control line when performing serial communication control in the connection form of FIG. 7.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Microcomputer, 12 ... Semiconductor memory card, 14 ... Clock line, 16 ... Data line, 18 ... Central processing part (CPU), 20 ... Synchronous serial communication interface, 22 ... General-purpose input / output Port 24, clock input / output terminal 26, data input / output terminal 26 a, data input terminal 26 b, data output terminal 32, clock input terminal 34, serial data input / output terminal 42,. ... Reception buffer, 44 ... Output buffer, 46 ... Reception buffer, 48 ... Output buffer, 50 ... Data input / output circuit, 52 ... Output buffer, 54 ... Reception buffer, 56 ... Control terminal, 58 ... ... control line.

Claims (12)

A central processing unit (CPU), a synchronous serial communication interface that has a clock input / output terminal and a data input / output terminal, is triggered by the CPU, and performs high-speed serial communication in units of a predetermined number of bits by hardware flow control; Serial communication between a microcomputer having a general-purpose input / output port having a terminal and capable of input / output control bit by bit by the CPU, and a semiconductor memory card having a clock input terminal and a serial data input / output terminal In a serial communication control method for controlling data communication by a method,
Preparing a clock line and a data line for connecting the microcomputer and the semiconductor memory card;
Connecting the clock input / output terminal of the synchronous serial communication interface to the clock line; connecting the data input / output terminal of the synchronous serial communication interface to the data line;
Connecting a first terminal of the plurality of terminals of the general-purpose input / output port to the clock line;
Connecting the clock input terminal of the semiconductor memory card to the clock line; connecting the serial data input / output terminal of the semiconductor memory card to the data line;
A communication switching unit configured by a computer program executed by the CPU includes a clock output from the clock input / output terminal of the synchronous serial communication interface and a clock output from the first terminal of the general-purpose input / output port. Switch the clock output source between
And a serial communication control method. Pull up or pull down the clock line,
When the communication switching means switches the clock output source, the clock output from the clock input / output terminal of the synchronous serial communication interface and the clock output from the first terminal of the general-purpose input / output port are simultaneously enabled. And when the two clock outputs are both in an invalid state, the clock line is in a pulled up or pulled down state.
The serial communication control method according to claim 1. A second terminal of the plurality of terminals of the general-purpose input / output port is connected to the data line;
The communication switching means, when switching the clock source output, between the data input / output terminal of the synchronous serial communication interface and the second terminal of the general-purpose input / output port, between the semiconductor memory card Switch the terminal used for data transfer, switch the data terminal,
The serial communication control method according to claim 1. Pull up or pull down the data line,
When the communication switching means switches the data terminal, the data bit output from the data input / output terminal of the synchronous serial communication interface and the data bit output from the second terminal of the general-purpose input / output port are simultaneously effective. The data line is in a pulled up or pulled down state when both of these two data bit outputs are in an invalid state.
The serial communication control method according to claim 3.   The communication switching means performs the clock output source switching and the data terminal switching when a communication message composed of a plurality of continuous data bits is communicated between the microcomputer and the semiconductor memory card. The data transfer in units of the predetermined number of bits controlled by the clock output in units of the predetermined number of bits output from the clock input / output terminal of the synchronous serial communication interface to the clock line, and the general purpose 4. The serial communication control according to claim 3, wherein data transfer switching is performed between data transfer controlled by a clock output output from the first terminal of the input / output port onto the clock line. Method. The semiconductor memory card has a control terminal;
Prepare a control line for connecting the microcomputer and the semiconductor memory card,
A second terminal of the plurality of terminals of the general-purpose input / output port is connected to the control line;
Connecting the control terminal of the semiconductor memory card to the control line;
When the communication switching means causes the semiconductor memory card to read a control output output from the second terminal of the general-purpose input / output port onto the control line, a clock output is transmitted from the first terminal of the general-purpose input / output port. When the data transfer between the data input / output terminal of the synchronous serial communication interface and the data input / output terminal of the semiconductor memory card is performed, the clock output from the clock input / output terminal of the synchronous serial communication interface To send
The serial communication control method according to claim 1. The communication protocol of the semiconductor memory card uses a command composed of a combination of a control output received via the control terminal and a plurality of consecutive data bits received via the data input / output terminal. ,
The communication switching means causes the semiconductor memory card to read the command by performing the clock output switching.
The serial communication control method according to claim 6. The microcomputer is equipped in an audio player,
Audio data is stored in the semiconductor memory card,
The microcomputer performs processing on the audio data read from the semiconductor memory card to reproduce sound,
The serial communication control method according to claim 1. A central processing unit (CPU), a synchronous serial communication interface that has a clock input / output terminal and a data input / output terminal, is triggered by the CPU, and performs high-speed serial communication in units of a predetermined number of bits by hardware flow control; Serial communication between a microcomputer having a general-purpose input / output port having a terminal and capable of input / output control bit by bit by the CPU, and a semiconductor memory card having a clock input terminal and a serial data input / output terminal In a serial communication control method for controlling data communication by a method,
Preparing a clock line and a data line for connecting the microcomputer and the semiconductor memory card;
Connecting the clock input / output terminal of the synchronous serial communication interface to the clock line; connecting the data input / output terminal of the synchronous serial communication interface to the data line;
A first terminal of the plurality of terminals of the general-purpose input / output port is connected to the clock line; a second terminal of the plurality of terminals of the general-purpose input / output port is connected to the data line;
Connecting the clock input terminal of the semiconductor memory card to the clock line; connecting the serial data input / output terminal of the semiconductor memory card to the data line;
When the communication switching means configured by a computer program executed by the CPU is communicating one communication message between the microcomputer and the semiconductor memory card, the predetermined bit by the synchronous serial communication interface Switching between data transfer in units of numbers and data transfer by the general-purpose input / output port, whereby the number of bits that is an integral multiple of the predetermined number of bits transferred via the synchronous serial communication interface A single communication message is composed of a data bit string comprising: a data bit string or a single data bit transferred via the general-purpose input / output port;
And a serial communication control method. Pull up or pull down the clock line,
When the communication switching means performs the switching, the clock output from the clock input / output terminal of the synchronous serial communication interface and the clock output from the first terminal of the general-purpose input / output port do not become valid simultaneously. And when the two clock outputs are both in an invalid state, the clock line is in a pulled up or pulled down state.
The serial communication control method according to claim 9. Pull up or pull down the data line,
When the communication switching means switches, the data bit output from the data input / output terminal of the synchronous serial communication interface and the data bit output from the second terminal of the general-purpose input / output port are simultaneously enabled at the time of switching. And when the two data bit outputs are both in an invalid state, the data line is in a pulled up or pulled down state.
The serial communication control method according to claim 9. The microcomputer is equipped in an audio player,
Audio data is stored in the semiconductor memory card,
The microcomputer performs processing on the audio data read from the semiconductor memory card to reproduce sound.
The serial communication control method according to claim 9.

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