JP2005348197A - Radio electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a radio electronic device having a high-performance antenna while a mounting cost is reduced. <P>SOLUTION: A first conductor and a second conductor connected to each electrode formed on the front face and a rear face of an IC chip for receiving and transmitting data on radio and constituting an antenna for receiving and transmitting the data on radio are provided. A cut part is formed at the first conductor and one electrode of the front face or the rear face of the IC chip is connected to the one side of the cut part. The one end of the second conductor is connected to the other electrode of the front face or the rear face of the IC chip. The other end of the second conductor is connected to the other side of the cut part of the first conductor, and one or more opened parts, which pass through in the thickness direction, are provided at an overlapped part with the first conductor. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a wireless electronic device, and more particularly to a technology effective when used for antenna technology such as a wireless IC tag and an IC card mounted with an IC chip.

Japanese Laid-Open Patent Publication No. 2002-135029 is a responder of a mobile unit identification apparatus having an antenna that can easily achieve matching optimization and impedance matching. In this publication, an L-shaped notch is provided at the center in the longitudinal direction of a single thin plate-like conductor formed in a strip shape, and an IC chip is mounted on this and used as an antenna. is there.
JP 2002-135029 A

  In the technique of Patent Document 1, a plurality of electrodes must be placed on the same surface (front surface) of the wireless IC chip. Therefore, as the chip size is reduced, the size of the electrodes is reduced, resulting in a reduction in connection area. As a result, the connection resistance increases and the operation of the wireless IC chip becomes unstable. As described above, when the wireless IC chip is reduced, the size and interval of the plurality of electrodes are reduced, and advanced technology is required for alignment with a conductor such as a metal pattern on the substrate side. It becomes impossible to manufacture a recognition transponder or the like. When a gap is generated between the wireless IC chip and the substrate and stress is applied to the wireless IC chip, chip breakage is likely to occur. As a countermeasure, if a filling resin called “underfill” is embedded in the gap, the material and the number of man-hours are increased, and the wireless IC tag and the wireless recognition transponder cannot be manufactured economically. When the wireless IC chip is further reduced, it is difficult to align the top surfaces of the IC chips in the manufacturing process, and there is a problem that it is impossible to manufacture a wireless IC tag and a wireless recognition transponder economically.

  The inventors of the present application have previously developed a wireless IC tag as shown in FIG. A structure is adopted in which the antenna is sandwiched between a lower conductor 18b and an upper conductor 14b (12b) constituting the antenna of the wireless IC chip 16 indicated by a dotted line having an upper electrode and a lower electrode. The wireless IC chip 16 is supplied with energy wirelessly from an antenna constituted by the conductors 14b and 18b, and transmits and receives data wirelessly. When connecting to the antenna terminal, it is sufficient to have two terminals from the wireless IC chip. If the terminal is extended from the front and back surfaces of the wireless IC chip, a large contact is achieved even if the size of the wireless IC chip 16 is reduced. An electrode having an area can be formed on the front and back surfaces, and an antenna can be connected with a simple structure. Compared with Patent Document 1, since no gap portion is generated between the wireless IC chip and the substrate, the stress concentration on the wireless IC chip is relaxed, and the mechanical strength can be improved. The conductor 18b is provided with a slit 22b in a rectangle.

  However, when the conductor 18b having a slit as shown in FIG. 13 is used, a parasitic capacitance is formed in an overlapping portion between the two conductors 18b and 14b, and the slit length margin is reduced, resulting in poor antenna performance. Occurs. Further, if the conductor 14b has a minimum size necessary for connection with the electrode of the wireless IC in order to reduce the parasitic capacitance, the wireless IC and the conductor 14b need to be aligned with high accuracy. As in the case of, a problem arises that it is difficult to assemble the wireless IC tag at a low cost.

  An object of the present invention is to provide a wireless electronic device equipped with a high-performance antenna while reducing the mounting cost. The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  The outline of a typical invention among the inventions disclosed in the present application will be briefly described as follows. That is, the first and second conductors, which are connected to electrodes provided on the front and back surfaces of the IC chip for transmitting and receiving wireless data and constitute an antenna for wireless data transmission and reception, are provided. A notch is provided in the conductor, one electrode on the front surface or the back surface of the IC chip is connected to one of the notch portions, and the second conductor has one end on the other side of the front or back surface of the IC chip. The other end is connected to the other first conductor sandwiching the notch, and one or more openings penetrating in the thickness direction are provided in a portion overlapping the first conductor.

  A high-performance antenna can be realized while reducing the mounting cost.

  FIG. 1 shows a plan view of an embodiment of a wireless IC tag according to the present invention, and FIG. 2 shows a cross-sectional view taken along line B-B ′ of FIG. 1. 1 and 2, the first conductor 20 is formed on the lower substrate 10. An L-shaped slit 30 is formed in the first conductor 20. The anisotropic conductive film 110 is temporarily bonded to the position where the wireless IC chip 70 of the first conductor 20 is connected, and the lower electrode 90 of the wireless IC chip 70 is temporarily bonded on the anisotropic conductive film 110.

  Next, in order to connect the second conductor 60 formed on the upper substrate 50, the wireless IC chip 70, and the first conductor 20, the anisotropic conductive film 110 is disposed at the connection position of the second conductor 60 across the slit 30. Is temporarily crimped. A second conductor 60 on the upper substrate 50 is temporarily bonded to the anisotropic conductive film 110. In order to electrically connect the upper electrode 80 and the lower electrode 90 formed on the wireless IC chip 70 to the first conductor 20 and the second conductor 60, and the first conductor 20 and the second conductor 60, the wireless IC chip 70 and The position of the conductor connection part 100 is heat-pressed. For thermocompression bonding, connect at the same time or with a time difference.

  In this embodiment, the size of the second conductor 60 is not reduced. In other words, the first conductor 20 and the second conductor 60 are formed while being sufficiently large with respect to the wireless IC chip 70. In order to reduce the parasitic capacitance between the second conductor 60 and the second conductor 60, which has a mesh-like electrode shape, the mesh hole shape, that is, the opening shape may be any shape other than, for example, a circle. May be.

  Since the second conductor 60 has a mesh shape, the parasitic capacitance formed with the first conductor 20 is reduced, and the relationship between the slit length margin of FIG. 3 and the area of the second conductor 60 is shown. As shown in the figure, the mesh structure allows the effective area of the second conductor 60 to be reduced, and a slit length margin of three times or more can be obtained. In the figure, the standard is the case where no opening is provided in the second conductor, and the mounting margin can be increased by using the mesh structure while maintaining the same alignment accuracy. Therefore, a low-cost wireless IC tag with low cost and stable communication characteristics can be realized.

  In other words, in order to obtain a high assembly yield, it is necessary to use the second conductor 14b having a width that is sufficiently larger than the width of the wireless IC chip 70. However, as shown in the characteristic diagram of FIG. 3, a sufficient slit length margin cannot be obtained with the area of the standard second conductor. Therefore, under the area of the standard second conductor shown in FIG. 3, the communication characteristics of the slit vary when the slit length changes due to variations in alignment of the second conductor 14b. In this embodiment, the effective area of the second conductor 14b is provided by providing the second conductor 14b with a plurality of openings such as a mesh shape, two cross shapes at the center, and vertical stripes or horizontal stripes. By reducing the parasitic capacitance between the second conductor 14b and the first conductor 18b, the alignment accuracy between the wireless IC chip and the second conductor 14b can be improved without changing the communication characteristics. As it is, the cost can be reduced.

  In this embodiment, in a wireless IC chip that transmits and receives data by wireless, electrodes are provided on the front and back surfaces of the wireless IC chip. In addition, since the second conductor is sandwiched, the positioning accuracy is not required. Without changing the area of the second conductor, the alignment margin of the slit length formed in the first conductor can be improved by three times or more with respect to the area of the standard second conductor. According to the above, since it is not necessary to increase the accuracy of the mounting apparatus, it is possible to reduce the mounting cost and realize a low-cost wireless IC tag.

  FIG. 4 shows a plan view of another embodiment of the wireless IC tag according to the present invention, and FIG. 5 shows a cross-sectional view taken along the line C-C 'of FIG. 4 and 5, the first conductor 20 is formed on the lower substrate 10. An L-shaped slit 30 is formed in the first conductor 20. The anisotropic conductive film 110 is temporarily bonded to the position where the wireless IC chip 70 of the first conductor 20 is connected, and the lower electrode 90 of the wireless IC chip 70 is temporarily bonded on the anisotropic conductive film 110.

  Next, in order to connect the second conductor 60 formed on the upper substrate 50, the wireless IC chip 70, and the first conductor 20, the anisotropic conductive film 110 is disposed at the connection position of the second conductor 60 across the slit cut 40. Is temporarily crimped. A second conductor 60 on the upper substrate 50 is temporarily bonded to the anisotropic conductive film 110. In order to electrically connect the upper electrode 80 and the lower electrode 90 formed on the wireless IC chip 70 to the first conductor 20 and the second conductor 60, and the first conductor 20 and the second conductor 60, the wireless IC chip 70 and The position of the conductor connection part 100 is heat-pressed. For thermocompression bonding, connect at the same time or with a time difference. The second conductor 60 forms a conductor that is crossed at the center. By using this shape, electrical connection with the upper electrode of the wireless IC chip can be made at any position.

  The second conductor 60 forms a crossed conductor at the center, in other words, by providing triangular openings at the four corners, the parasitic capacitance formed by the first conductor 20 is As the characteristic diagram shown in FIG. 3 is reduced, the area of the second conductor 60 can be reduced by the cross conductor structure from the standard, and a slit length margin of three times or more can be obtained. As described above, it is possible to increase the mounting margin while maintaining the same alignment accuracy as in the past, and it is possible to realize a low-cost wireless IC tag that is inexpensive and has stable communication characteristics.

  FIG. 6 shows a plan view of another embodiment of the wireless IC tag according to the present invention, and FIG. 7 shows a sectional view taken along line D-D ′ of FIG. 4. 6 and 7, a first conductor 20 is formed on the lower substrate 10, and a T-shaped slit 30 is formed in the first conductor 20. The anisotropic conductive film 110 is temporarily bonded to the position where the wireless IC chip 70 of the first conductor 20 is connected, and the lower electrode 90 of the wireless IC chip 70 is temporarily bonded on the anisotropic conductive film 110. Next, in order to connect the second conductor 60 formed on the upper substrate 50, the wireless IC chip 70, and the first conductor 20, the anisotropic conductive film is disposed at the connection position of the second conductor 60 so as to straddle the slit cut 40. 110 is temporarily pressure-bonded. A second conductor 60 on the upper substrate 50 is temporarily bonded to the anisotropic conductive film 110.

  In order to electrically connect the upper electrode 80 and the lower electrode 90, the first conductor 20 and the second conductor 60, and the first conductor 20 and the second conductor 60 formed on the wireless IC chip 70, the wireless IC chip 70 is provided. And the position of the conductor connection part 100 is heat-pressed. The thermocompression bonding is performed simultaneously or with a time difference. The second conductor 60 is formed with a stripe shape, that is, an elongated opening in the long side direction. By using this shape, electrical connection with the upper electrode of the wireless IC chip can be made at any position. Since the second conductor 60 is formed with stripes in the long side direction, the parasitic capacitance formed by the first conductor 20 is reduced, and as shown in the graph shown in FIG. In the embodiment, the area of the second conductor 60 can be reduced, and a slit length margin of three times or more can be obtained. As described above, it is possible to increase the mounting margin while maintaining the same alignment accuracy as in the past, and it is possible to realize a low-cost wireless IC tag that is inexpensive and has stable communication characteristics.

  FIG. 8 shows a plan view of another embodiment of the wireless IC tag according to the present invention, and FIG. 9 shows a cross-sectional view of FIG. In FIG. 8, the upper side shows a state where the second conductor 60 (50) is opened, and the lower side shows a state where the second conductor 60 (50) is bent. In FIG. 8 as described above, the first conductor 20 is formed on the lower substrate 10. An L-shaped slit 30 is formed in the first conductor 20. The first conductor 20 and the second conductor 60 on the upper substrate 50 are integrally formed at the upper substrate folded portion 120. The anisotropic conductive film 110 is temporarily bonded to the position where the wireless IC chip 70 of the first conductor 20 is connected, and the lower electrode 90 of the wireless IC chip 70 is temporarily bonded on the anisotropic conductive film 110. Next, in order to connect the second conductor 60 formed on the upper substrate 50 and the wireless IC chip 70, the anisotropic conductive film 110 is temporarily pressure-bonded at the connection position of the second conductor 60 across the slit cut 40. .

  The upper substrate 50 and the second conductor 60 are folded by the upper substrate folded portion 120 and temporarily bonded by the anisotropic conductive film 110. In order to electrically connect the upper electrode 80 and the lower electrode 90 formed on the wireless IC chip 70 to the first conductor 20 and the second conductor 60, the position of the wireless IC chip 70 is heat-pressed. The thermocompression bonding is performed simultaneously or with a time difference. The second conductor 60 forms a striped conductor in the short side direction. By using this shape, the second conductor 60 and the upper electrode of the wireless IC chip can be electrically connected regardless of the position at which the position is aligned. Since the second conductor 60 is formed with a stripe in the short side direction, the parasitic capacitance formed by the first conductor 20 is reduced, and as shown in the characteristic diagram shown in FIG. By doing so, the area of the second conductor 60 can be reduced, and a slit length margin of three times or more can be obtained. As described above, it is possible to increase the mounting margin while maintaining the same alignment accuracy as the conventional one, and it is possible to realize an inexpensive and low-cost IC tag with stable communication characteristics.

  FIG. 10 is a block diagram showing an embodiment of the wireless IC tag according to the present invention. The wireless IC tag of this embodiment includes an antenna 151, a rectifier circuit 153, a capacitor 154, a clock circuit 155, a power-on reset circuit 157, a memory circuit 156, and the like. The antenna 151 exists in a pair with the ground point 152. The electromagnetic wave input from the antenna is rectified in the rectifier circuit 153 to generate a DC voltage. This voltage accumulates charge in the capacitor 154. The clock circuit 155 extracts a clock from a signal that has been carried on an electromagnetic wave. The power-on reset circuit 157 receives the clock signal and sets the initial value of the memory circuit 156. The memory circuit 156 includes a counter, a decoder, a memory cell having memory information, a write circuit, and the like.

  These digital circuits operate in synchronization with the clock signal. The clock signal is generated by demodulating the electromagnetic wave-modulated signal. The modulation system includes an ASK system that modulates by amplitude, an FSK system that modulates by frequency, and a PSK system that modulates by phase. A combination of these is also possible. The rectifier circuit 153 includes a capacitor and a diode, and the AC waveform is rectified into a DC waveform.

  FIG. 11 is a cross-sectional view of the device structure of one embodiment of the wireless IC chip of FIG. The input portion of the voltage doubler rectifier circuit of FIG. 10 provided in the wireless IC chip of this embodiment forms, for example, a capacitor, and includes an upper electrode 13, polysilicon 172, oxide film 173, capacitor diffusion portion 174, It consists of the lower electrode 17 and the like. The polysilicon 172 is connected to the upper electrode 13. The wireless IC chip 16 and the upper electrode 13 are insulated by an oxide film. The capacitor diffusion portion 174 can be used as an electrode for constituting a capacitor via an oxide film. Since this capacitor is formed on a silicon substrate, the silicon substrate 16 can be used as a ground terminal. In the voltage doubler rectifier circuit, it is not necessary to assemble the circuit similarly, and the substrate potential can be fixed to the ground. Therefore, it can be taken out from the back surface of the silicon substrate as an antenna terminal.

  Of course, it is possible to take out from the device surface, but as the chip size becomes 0.5 mm square, 0.3 mm square, 0.15 mm square, 0.1 mm square, 0.05 mm square, 0.01 mm square, The place to take out two electrodes from the same surface becomes small. When a plurality of terminals are taken out from a narrow place, not only the electrode size is reduced, but also the space between the electrodes is reduced, so that connection with the antenna terminal becomes extremely difficult.

  The wireless IC chip is characterized by supplying energy to the wireless IC chip and transmitting / receiving data because the wireless IC chip operates with electromagnetic waves. For this reason, the wireless IC chip includes a circuit for processing electromagnetic waves, a memory circuit, and a circuit for controlling these circuits. In a circuit that processes electromagnetic waves, since the electromagnetic waves have an alternating waveform, a rectifier circuit that converts the alternating waveform into a direct current waveform is used.

  Generally, there are two types of rectifier circuits, a full-wave rectifier circuit and a voltage doubler rectifier circuit. In the full-wave rectifier circuit, the substrate potential is different from the input of the wireless IC chip. On the other hand, in the voltage doubler rectifier circuit, the substrate potential can be shared with the input of the wireless IC chip. Therefore, the back surface of the wireless IC chip having the same potential as the substrate can be used as an electrode. The substrate of the wireless IC chip is divided into a P-type and an N-type, but a voltage doubler rectifier circuit can be formed with any substrate.

  In an SOI (Silicon On Insulator) wafer, the back surface potential is floating, but by removing the silicon and oxide film on the back surface, it is possible to expose and connect the active surface.

  A circuit that changes the input impedance of the wireless IC chip is incorporated in the rectifier circuit. When the input impedance changes, an unmatch occurs between the antenna impedance and the semiconductor device impedance, resulting in a change in reflectance. The change in reflectance can be read by the reader, and information can be received on the reader side.

  A memory circuit that operates with low power is required. In order to reduce the area, the memory element is formed by one element per memory. Then, the memory address counter is decoded to select the target memory. By using a circuit that charges and discharges the entire memory, it is possible to perform a memory operation without constantly flowing current, and a significant reduction in power can be achieved. In writing information in the memory circuit, a control circuit described below is also possible. However, in order to reduce the memory size, it is possible to minimize the memory circuit scale by using ROM (Read Only Memory) and writing information with an electron beam drawing apparatus. In addition, the numbering can be performed with high reliability and eliminating any number duplication.

  The control circuit will be described. The control circuit has functions of controlling memory output, extracting clock information from electromagnetic waves, suppressing power supply voltage to suppress maximum voltage, and setting an initial state by a power-on reset circuit. The clock circuit demodulates a clock signal modulated by electromagnetic waves. Then, the demodulated clock signal is sent to the memory circuit. The memory address counter operates by the clock signal, and the memory output is controlled.

  The power-on reset circuit is a circuit that sends a reset signal while the power supply voltage is rising. Used to prevent the counter from becoming unstable when the power supply voltage rises from 0 volts. The power supply voltage limiter is a protection circuit that prevents excessive voltage from being applied to the circuits in the wireless IC chip when the wireless IC chip is near the reader and gains too much energy. is there. If the substrate potential is made common with the terminal input of the wireless IC chip by the above circuit, the back surface of the wireless IC chip can be used as an electrode.

  FIG. 12 is a characteristic diagram for explaining the relationship between the communication distance and the slit length of the wireless IC tag according to the present invention. In FIG. 12, the horizontal axis indicates the length of the slit in the antenna, and the vertical axis indicates the communication distance with the reader. From FIG. 12, it can be seen that there is a condition that the communication distance is most extended depending on the length of the slit. This indicates that the matching between the input impedance of the wireless IC chip and the impedance of the antenna can be adjusted by the length of the slit.

  In this embodiment, there are electrodes on both sides of the wireless IC chip, and the phenomenon in which the optimum point of the communication distance is obtained depending on the length of the slit is a phenomenon unique to microwaves, and is different when the frequency is different. The phenomenon appears. For example, when the frequency is 13.56 MHz, the communication distance varies depending on the value of the external capacitor. These indicate that the external shape of the wireless IC chip can be matched with the impedance of the wireless IC chip, which brings about the effect of extending the effective range of the present invention.

  FIG. 14 is an equivalent circuit diagram showing the operating principle of an antenna having a slit used in the present invention. The slit constitutes a distributed constant circuit, an inductance L exists along the slit length, and a capacitance C exists in inverse proportion to the slit width. The characteristic impedance of the distributed constant circuit is expressed as the square root of the inductance L divided by the capacitance C. Therefore, the slit length is approximately proportional to the inductance L, and the inductance L increases as the slit length increases. The slit width is approximately inversely proportional to the capacitance C, and the capacitance C decreases as the slit width increases.

  When matching is performed with the same impedance at the ends of the distributed constant circuit, energy can be transmitted without reflection. Now, when the slit width is increased, the capacitance C decreases. Therefore, in order not to change the characteristic impedance, it is necessary to reduce the inductance L, and it is necessary to shorten the slit length electrically. As described above, even when the input impedance of the wireless IC tag chip is changed, impedance matching can be achieved by freely adjusting the matching according to the slit length and the slit width. In addition, if the slit length is short, a small antenna can be easily realized, and if the slit width is large, it is possible to create a low-cost antenna that does not require much manufacturing accuracy (for example, by punching aluminum). Since the parasitic capacitance between the first conductor and the second conductor is inserted in parallel with the capacitor C, it is significant to reduce the parasitic capacitance.

  Although the invention made by the present inventors has been specifically described based on the above embodiment, the present invention is not limited to the above embodiment, and various modifications can be made without departing from the scope of the invention. For example, although the example of the combination of the first conductor 20 and the second conductor 60 has been described in the above embodiment, any combination may be used. In each of the above embodiments, an example using an anisotropic conductive film is shown. However, the connection between the IC chip and the first conductor and the second conductor is made of an anisotropic conductive film, silver paste, solder, alloy, adhesive, or the like. It may be used. The present invention can be widely used as wireless electronic devices such as wireless IC tags and IC cards.

It is a top view which shows one Example of the radio | wireless IC tag which concerns on this invention. It is sectional drawing in the B-B 'line | wire of FIG. FIG. 6 is a characteristic diagram showing a relationship between a slit length margin and an area of a second conductor 60 for explaining the present invention. It is a top view which shows another Example of the radio | wireless IC tag which concerns on this invention. It is sectional drawing in the C-C 'line | wire of FIG. It is a top view which shows another Example of the radio | wireless IC tag which concerns on this invention. FIG. 7 is a cross-sectional view taken along line D-D ′ in FIG. 6. It is a top view which shows another Example of the radio | wireless IC tag which concerns on this invention. It is sectional drawing in the E-E 'line | wire of FIG. It is a block diagram which shows one Example of the radio | wireless IC tag which concerns on this invention. It is sectional drawing of the device structure which shows one Example of the radio | wireless IC chip of FIG. It is a characteristic view for demonstrating the relationship between the communication distance of the radio | wireless IC tag which concerns on this invention, and slit length. FIG. 3 is a plan view of a wireless IC tag developed previously by the inventors of the present application. It is an equivalent circuit diagram which shows the principle of operation of the antenna with a slit used for this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Lower substrate, 20 ... 1st conductor, 3040 ... Slit, 40 ... Slit notch, 50 ... Upper substrate, 60 ... 2nd conductor, 70 ... Wireless IC chip, 80 ... Upper electrode, 90 ... Lower electrode, 100 ... Conductor Connection part, 110 ... anisotropic conductive film, 120 ... folded part,
151 ... Antenna, 152 ... Ground point, 153 ... Rectifier circuit, 154 ... Capacitor, 155 ... Clock circuit, 156 ... Memory circuit, 157 ... Power-on reset circuit, 173 ... Oxide film, 174 ... Diffusion part for capacitor,
12b ... Upper substrate, 14b ... First conductor, 16 ... Wireless IC chip, 18b ... Second conductor, 19b ... Lower substrate, 20b ... Conductor connection part,
DESCRIPTION OF SYMBOLS 13 ... Upper electrode, 16 ... Board | substrate, 17 ... Lower electrode, 103 ... Wireless IC tag chip 104 ... 1st bump, 105 ... 2nd bump

Claims (5)

An IC chip that transmits and receives wireless data and has electrodes on the front and back surfaces;
A first conductor and a second conductor that are connected to the front and back electrodes of the IC chip, respectively, and constitute an antenna for wireless data transmission and reception;
The first conductor has a notch, and is connected to one of the electrodes on the front or back surface of the IC chip on one side of the notch,
The second conductor has one end connected to the other electrode on the front or back surface of the IC chip, the other end connected to the other first conductor across the notch, and overlaps the first conductor. A wireless electronic device comprising one or more openings penetrating in a thickness direction. In claim 1,
The wireless electronic device according to claim 1, wherein the notch is L-shaped or T-shaped. In claim 2,
The wireless electronic device according to claim 1, wherein at least one end side of the second conductor including a connection portion with the IC chip is formed larger than the size of the IC chip. In claim 3,
The wireless electronic device according to claim 1, wherein the plurality of openings provided in the second conductor form a slit shape or a mesh shape. In claim 4,
The wireless electronic device according to claim 1, wherein any one of an anisotropic conductive film, a silver paste, solder, an alloy, or a conductive adhesive is used to connect the electrode of the IC chip to the first conductor and the second conductor.

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