JP2005209749A - Bumped semiconductor device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device with bumps in which an electrical characteristic abnormality does not occur even when mechanical stress is applied at the time of assembly in a post process.
A buffer material film 11 serving as an interlayer film is provided between a semiconductor electrode 3 and a bump 6 on a semiconductor chip 1, and the semiconductor electrode 3 and the bump 6 are electrically connected through the buffer material film 11. It is set as the structure which has the column-shaped connection part 12 to connect. The mechanical stress in the assembly process can be absorbed and dispersed by the buffer material film 11 to reduce damage to the semiconductor element and the like under the semiconductor electrode 3.
[Selection] Figure 1

Description

  The present invention relates to a bumped semiconductor device and a method for manufacturing the same.

  In a conventional semiconductor device with bumps, for example, as shown in FIG. 3A, a semiconductor element 2 is formed on a semiconductor chip 1, a semiconductor electrode 3 is formed on the semiconductor element 2, and the semiconductor chip 1 is formed from the peripheral edge of the semiconductor electrode 3. A surface protective film 4 is formed over the surface, and a bump 6 is formed on the central portion of the semiconductor electrode 3 not covered with the surface protective film 4 via a barrier metal 5.

In the case of COG (Chip On Class) mounting, this semiconductor device with bumps is connected in a form of being stacked on a glass substrate 8 on which a glass electrode 7 is formed as shown in FIG. In the case of packaging, the bumps 6 are connected to the tape leads 9 by thermocompression bonding as shown in FIG.
JP-A-8-330313

  However, when the bumped semiconductor device is COG-mounted as described above, the bump 6 is pressed by the glass substrate 8 or the glass electrode 7, so that the mechanical stress 10 is generated on the bump 6, and the bump 6 A mechanical stress 10 is applied to the underlying semiconductor electrode 3 and the semiconductor element 2 through the barrier metal 5 and the surface protective film 4, which may cause an electrical characteristic abnormality in the semiconductor element 2 and the like.

  Similarly, when TCP is mounted, mechanical stress 10 is generated on the bump 9 pressed by the tape lead 9, and mechanical stress 12 is applied to the semiconductor electrode 3 and the semiconductor element 2 under the bump 6. As a result, an electrical characteristic abnormality may occur in the semiconductor element 2 or the like.

  In view of the above problems, an object of the present invention is to provide a semiconductor device with bumps and a method for manufacturing the same, in which an electrical characteristic abnormality does not occur even when mechanical stress is applied during assembly in a post-process. .

  In order to solve the above problems, a semiconductor device with bumps according to the present invention has an interlayer film between an electrode and a bump on a semiconductor chip, and electrically connects the electrode and the bump through the interlayer film. It has the column-shaped connection part to connect. It may be a semiconductor device with a bump having a semiconductor element under the electrode.

The connecting portion is preferably cylindrical. Moreover, it is preferable that a connection part is formed with Cu.
The interlayer film can be formed of a material whose hardness is smaller than that of the bump. The interlayer film can be formed of a non-conductive material. Further, the interlayer film can be formed with a film thickness sufficient to absorb and disperse stress applied during assembly and processing, that is, stress transmitted to the electrode and the semiconductor element via the bump. A preferred material for the interlayer film is polyimide.

  According to the method for manufacturing a semiconductor device with bumps of the present invention, a film made of a non-conductive material having a hardness smaller than that of a bump material is formed on a semiconductor wafer having electrodes formed in a chip region with a predetermined film thickness. A columnar through hole reaching the electrode is formed, the inside of the through hole is filled with a conductive material to form a columnar connection portion, and then the semiconductor wafer is divided into individual semiconductor chips, and the film of each semiconductor chip Bumps connected to the electrodes via the columnar connection portions are formed on the top.

  The semiconductor device with bumps and the method for manufacturing the same according to the present invention have a configuration in which an interlayer film and a columnar connection portion penetrating the electrodes are provided between the electrodes and the bumps. Stress can be absorbed and dispersed by the interlayer film to prevent mechanical stress from being applied to the internal circuits and semiconductor elements existing under the electrodes, and to avoid electrical characteristic abnormalities. This electrical contact can be reliably made by the connection.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a cross-sectional view showing a semiconductor device with bumps and a mounting state thereof according to an embodiment of the present invention.

  In the semiconductor device with bumps shown in FIG. 1A, a semiconductor element 2 is formed on a semiconductor chip 1, a semiconductor electrode 3 is formed on the semiconductor element 2, and a surface protective film 4 extends from the periphery of the semiconductor electrode 3 to the surface of the semiconductor chip 1. And a bump 6 is formed on the central portion of the semiconductor electrode 3 not covered with the surface protective film 4 via a barrier metal 5.

  Also, a buffer material film 11 is formed as an interlayer film between the semiconductor electrode 3 and the surrounding surface protective film 4 and the bump 6, and reaches the center surface of the semiconductor electrode 3 through the buffer material film 11. A plurality of columnar connecting portions 12 made of Cu are formed. The bumps 6 (and the barrier metal 5) are formed on the buffer material film 11 in the connection portion 12 formation region, and electrical contact with the semiconductor electrode 3 is secured by the plurality of connection portions 12.

  When the semiconductor device with bumps is mounted by COG (Chip On Class), as shown in FIG. 1B, the connection is performed by stacking the semiconductor chip 1 on the glass substrate 8 on which the glass electrode 7 is formed. At that time, a mechanical stress 10 is generated in the bump 6 pressed by the glass 8 or the glass electrode 7, and the generated mechanical stress 10 is absorbed and dispersed by the buffer film 11 under the bump 6. Therefore, the semiconductor electrode 3, the semiconductor element 2, and the internal circuit under the buffer material film 11 are not affected. Therefore, an electrical characteristic abnormality of the semiconductor element 2 and the like due to the mechanical stress 10 can be avoided.

  When the semiconductor device with bumps is mounted by TCP (Tape Carrier Package), the tape leads 9 and the bumps 6 are connected by thermocompression bonding as shown in FIG. At that time, a mechanical stress 10 is generated in the bump 9 pressed by the tape lead 13, and the generated mechanical stress 10 is absorbed and dispersed by the buffer film 11 under the bump 6 in the same manner as described above. Therefore, the semiconductor electrode 3, the semiconductor element 2, and the internal circuit under the buffer material film 11 are not affected. Therefore, an electrical characteristic abnormality of the semiconductor element 2 and the like due to the mechanical stress 10 can be avoided.

A method for manufacturing the semiconductor device with bumps will be described with reference to FIG.
First, as shown in FIG. 2A, in a diffusion process, an internal circuit (not shown) and a semiconductor element 2 are formed in the semiconductor chip 1 region of the semiconductor wafer, and the semiconductor chip 1 on the semiconductor element 2 or the like. A semiconductor electrode 3 as an external connection electrode pad is formed on the surface of the region. A technique for forming the semiconductor element 2 and the semiconductor electrode 3 on top of each other is well known, whereby the integration rate of the semiconductor chip 1 is improved, and in addition, it is possible to improve the yield and reduce the cost. The semiconductor electrode 3 is usually formed of aluminum, but Cu or the like may be mixed for migration countermeasures.

  Then, a surface protective film 4 such as Pl-SiN is formed on the semiconductor wafer including the semiconductor chip 1 region (hereinafter simply referred to as the semiconductor chip 1 region) so as to cover the entire semiconductor electrode 3, and the semiconductor electrode is formed by etching or the like. An opening 4a that exposes the central portion of 3 is formed.

  Thereafter, as shown in FIG. 2B, a buffer material film 11 as an interlayer film is formed on the semiconductor chip 1 region. This buffer material film 11 uses a material whose hardness is smaller than that of the bump 6, and has a buffer function for absorbing and dispersing the stress applied to the bump 6 during direct assembly and processing in a later process so that the stress is not directly transmitted downward. It is formed with a film thickness sufficient to achieve this. A non-conductive material is used in order to ensure electrical separation between adjacent semiconductor electrodes 3. A suitable buffer material film 11 material is polyimide. After polyimide is liquefied, it may be applied onto the semiconductor chip 1 region and baked with a hot plate or the like to be solidified.

  Next, as shown in FIG. 2C, a hole 11a is formed through the buffer material film 11 in a dark room process. When photosensitive polyimide is used as the material of the buffer material film 11, the hole portion is exposed using a mask and then developed and opened. The holes 11a may be formed using a resist instead of photosensitive polyimide. The holes 11a are preferably opened as small as possible if they can be filled with Cu in the next step, and it is necessary to form as many holes as possible so as to obtain the minimum resistance. The hole 11a is preferably formed in a cylindrical shape. This is because if the shape is square, such as a quadrangular prism, stress concentrates on the corners and the holes 11a are destroyed, and there is a risk that a short circuit or the like may occur between the Cus.

  Next, as shown in FIG. 2D, the hole 11a is filled with Cu. A damascene method is used as a Cu forming method. For this purpose, first, a barrier metal for Cu wiring to be a plating electrode is formed in the hole 11a or on the buffer material film 11 by sputtering or vapor deposition. When sputtering is used, it is necessary to use collimated sputtering so that the barrier metal for Cu wiring enters the hole 11a. Then, the Cu wiring 13 is formed on the formed Cu wiring barrier metal by the Cu plating method. Since the Cu plating method uses Cu (plating solution), the hole filling property is better than other materials. However, since it is a wet process, it is necessary to pay attention to air bubbles.

  Next, as shown in FIG. 2E, an unnecessary Cu wiring 13 portion is removed. At that time, the unnecessary Cu wiring 13 portion is deleted and the surface of the semiconductor wafer is planarized by using the CMP method.

  Next, as shown in FIG. 2F, a barrier metal 5 is formed on the entire surface of the semiconductor chip 1 region by sputtering or the like. The barrier metal 5 is generally selected according to the material of the bump 6, and when the material of the bump 6 is Au, Pd, Cu, or Au which is a metal close to Au is used.

  Next, as shown in FIG. 2G, in the masking process, a bump resist 14 is applied to the entire surface of the semiconductor chip 1 region, and openings 14a are formed in the bump forming portions. The film thickness of the bump resist 14 is, for example, about 15 μm thicker than the bump height when the bump height is 10 μm. For this purpose, a resist material having a viscosity higher than that of a resist generally used is used.

  Next, as shown in FIG. 2H, bumps 6 are formed in the gold plating process. In this gold plating step, electrolytic gold plating is usually performed. As the gold plating solution, a cyan gold plating solution or a non-cyan gold plating solution can be used.

  Then, after removing the unnecessary bump resist 14 as shown in FIG. 2 (i), the unnecessary barrier metal 5 around the bump 6 is removed by etching as shown in FIG. Is added to complete the bumped semiconductor device.

  The present invention is particularly useful for manufacturing a semiconductor device having a structure in which a semiconductor element is also provided under an electrode for forming a bump.

Sectional drawing which shows the semiconductor device with bump in one Embodiment of this invention, and its mounting state Process sectional drawing which shows the manufacturing method of the semiconductor device with a bump of FIG. Sectional drawing which shows the conventional semiconductor device with bumps and its mounting state

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Semiconductor element 3 Semiconductor electrode 4 Surface protective film 6 Bump
11 Buffer material film (interlayer film)
12 Connection

Claims (9)

  A bumped semiconductor device having an interlayer film between an electrode and a bump on a semiconductor chip, and having a columnar connection portion that penetrates the interlayer film and electrically connects the electrode and the bump.   The bumped semiconductor device according to claim 1, further comprising a semiconductor element under the electrode.   The bumped semiconductor device according to claim 1, wherein the connecting portion has a cylindrical shape.   4. The semiconductor device with bumps according to claim 1, wherein the connecting portion is made of Cu.   The semiconductor device with bumps according to claim 1, wherein the interlayer film is made of a material having a hardness lower than that of the bumps.   6. The bumped semiconductor device according to claim 1, wherein the interlayer film is formed of a non-conductive material.   7. The semiconductor device with bumps according to claim 1, wherein the interlayer film is formed with a film thickness sufficient to absorb and disperse stress applied during assembly and processing.   The semiconductor device with bumps according to claim 1, wherein the interlayer film is formed of polyimide.   A method of manufacturing a semiconductor device with bumps, wherein a film made of a non-conductive material having a hardness smaller than that of a bump material is formed on a semiconductor wafer having electrodes formed in a chip region with a predetermined film thickness, A columnar through hole reaching the electrode is formed, the inside of the through hole is filled with a conductive material to form a columnar connection portion, and then the semiconductor wafer is divided into individual semiconductor chips, on the film of each semiconductor chip A method for manufacturing a semiconductor device with bumps, wherein bumps connected to the electrodes through the columnar connection portions are formed.

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