JP2005287009A - Differential voltage controlled oscillator with high frequency switch circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a differential voltage controlling oscillator which has good phase noise characteristics and can change an oscillation frequency in a wide frequency range. <P>SOLUTION: The differential voltage controlling oscillator 100 is provided with a parallel resonance circuit 100a and a negative resistance circuit 130 connected in parallel to the parallel resonance circuit 100a. A high-frequency switching circuit 140 includes a first high-frequency signal reducing portion connected between a control voltage terminal 147 and a first switching element 143 and a second high-frequency signal reducing portion connected between the control voltage terminal 147 and a second switching element 144. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a differential voltage controlled oscillator including a high frequency switch circuit, and more particularly to a differential voltage controlled oscillator including a high frequency switch circuit suitable for a wireless communication device such as a mobile phone device.

  The present invention also relates to a matching circuit including a high-frequency switch circuit.

  Furthermore, the present invention relates to a PLL (Phase Locked Loop) circuit including a differential voltage controlled oscillator and a wireless communication device.

  A differential voltage controlled oscillator is widely used as a means for generating a local signal in a wireless communication device such as a mobile phone device. When the differential voltage controlled oscillator is manufactured as a high frequency IC, it is necessary to widen the oscillation frequency range due to variations in components in the semiconductor manufacturing process. In recent years, in order to cope with communication systems using different frequency bands, it has become necessary to make the oscillation frequency of the differential voltage controlled oscillator variable in a wide frequency range.

  In order to make the oscillation frequency variable in a wide range, a differential voltage controlled oscillator having a plurality of high-frequency switch circuits is known (Non-patent Document 1, FIG. 11). FIG. 17 is a circuit diagram showing a conventional differential voltage controlled oscillator 600.

  A differential voltage controlled oscillator 600 shown in FIG. 17 includes a parallel resonant circuit 100a and a negative resistance circuit 130.

  The parallel resonant circuit 100a includes an inductor circuit 110, a variable capacitance circuit 120, a first high-frequency switch circuit 640, a second high-frequency switch circuit 650, a third high-frequency switch circuit 660, and a fourth high-frequency switch circuit. 670. Inductor circuit 110, variable capacitance circuit 120, negative resistance circuit 130, first high-frequency switch circuit 640, second high-frequency switch circuit 650, third high-frequency switch circuit 660, and fourth high-frequency switch The circuit 670 is connected to each other in parallel.

  Inductor circuit 110 includes an inductor pair including inductor 111 and inductor 112 connected in series to inductor 111. A power supply terminal 101 for supplying a voltage Vdd to the differential voltage controlled oscillator 600 is connected between the inductor 111 and the inductor 112.

  Variable capacitance circuit 120 includes a varactor pair including varactor 121 and varactor 122 connected in series to varactor 121. A control voltage terminal 102 for supplying a control voltage Vt for controlling the variable capacitance circuit 120 is connected between the varactor 121 and the varactor 122.

  Negative resistance circuit 130 includes a transistor pair including transistor 131 and transistor 132. The gate of the transistor 131 is connected to the drain of the transistor 132. The gate of the transistor 132 is connected to the drain of the transistor 131. That is, the transistor 131 and the transistor 132 are cross-coupled with each other.

  The source of the transistor 131 is connected to one terminal of the current source 103. The source of the transistor 132 is connected to one terminal of the current source 103. The other terminal of the current source 103 is connected to the ground.

  The first high-frequency switch circuit 640 includes a series circuit pair of a series circuit composed of the capacitive element 141 and the switching element 143 and a series circuit composed of the capacitive element 142 and the switching element 144. The capacitive element 141 and the capacitive element 142 are MIM (Metal-Insulator-Metal) capacitive elements.

  The switching element 143 and the switching element 144 are field effect transistors (FET: FIELD EFFECT TRANSISTOR).

  One end of the capacitive element 141 is connected to the drain d (conduction terminal) of the switching element 143. One end of the capacitive element 142 is connected to the drain d (conduction terminal) of the switching element 144. The other end of the capacitive element 141 is connected to one connection point of the inductor circuit 110, the variable capacitance circuit 120, and the negative resistance circuit 130. The other end of the capacitive element 142 is connected to the other connection point of the inductor circuit 110, the variable capacitance circuit 120, and the negative resistance circuit 130.

  The gate terminal (switching control terminal) of the switching element 143 is connected to the gate terminal (switching control terminal) of the switching element 144. The sources of the switching element 143 and the switching element 144 are both connected to the ground.

  By connecting the gate terminal (switching control terminal) of the switching element 143 and the gate terminal (switching control terminal) of the switching element 144, two series circuit pairs are connected.

  The control voltage terminal 147 is connected to a connection point between the gate terminal of the switching element 143 and the gate terminal of the switching element 144. The control voltage terminal 147 supplies the control voltage Vctrl1 to the switching element 143 and the switching element 144.

  The second high-frequency switch circuit 650, the third high-frequency switch circuit 660, and the fourth high-frequency switch circuit 670 all have the same internal element connection relationship as the first high-frequency switch circuit 640. In addition, control voltages Vctrl1 to Vctrl1 to 4 which can be independently controlled are input from control voltage terminals 147, 157, 167 and 177 to the first to fourth high frequency switch circuits.

  The parallel resonance circuit 100a resonates at a frequency determined by the inductance of the inductor circuit 110 and the capacitances of the variable capacitance circuit 120 and the first to fourth high-frequency switch circuits 640, 650, 660, and 670. Further, the negative resistance circuit 130 compensates for a loss generated in the parallel resonant circuit 100a when the voltage Vdd is applied. As a result, the differential voltage controlled oscillator 600 oscillates near the resonant frequency of the parallel resonant circuit 100a.

  The capacitance of the variable capacitance circuit 120 varies depending on the voltage applied to both ends of the varactor 121 and the varactor 122. The varactor 121 and the varactor 122 are applied with a voltage Vdd and a control voltage Vt at both ends. Among these, since the control voltage Vt is variable, the voltage applied to the varactor 121 and the varactor 122 can be changed by changing the control voltage Vt. When the voltage applied to the varactor 121 and the varactor 122 changes, the capacitance of the variable capacitance circuit 120 changes, so that the resonance frequency in the parallel resonance circuit 100a changes.

  The first high-frequency switch circuit 640 is switched on or off by the control voltage Vctrl1. When the first high-frequency switch circuit 640 is turned on, the drain and source of the switching element 143 and the switching element 144 become active and conductive, and the capacitance of the parallel resonant circuit 100a increases as compared to the case of the off state. As a result, the resonance frequency in the parallel resonance circuit 100a is lowered.

  Thus, when the first high-frequency switch circuit 640 is turned on and off, the oscillation frequency can be shifted.

  The differential voltage controlled oscillator 600 includes first to fourth high-frequency switch circuits 640, 650, 660, and 670 to which control voltages Vctrl1 to Vctrl1 to 4 that can be independently controlled are supplied.

  For example, the capacitive element and switching element of the first high-frequency switch circuit 640 are used as a reference, the capacitance of the capacitive element of the second high-frequency switch circuit 650 and the gate width of the switching element are doubled, and the third high-frequency switch The capacity of the capacitive element of the circuit 660 and the gate width of the switching element are four times that of the circuit 660, and the capacity of the capacitive element of the fourth high-frequency switch circuit 670 and the gate width of the switching element are eight times thereof.

  In the above circuit, the control voltage Vctrl1 to 4 is controlled to selectively turn on and off the first to fourth high-frequency switch circuits 640, 650, 660, and 670, so that the oscillation can be controlled by the control voltage Vt. The frequency range can be shifted to 16 ways (2 × 2 × 2 × 2 ways). Thus, a wide frequency variable range can be obtained by using a plurality of high-frequency switch circuits.

  FIG. 18 is a graph showing the oscillation frequency characteristics of a conventional differential voltage controlled oscillator 600. In FIG. 18, the horizontal axis of the graph represents the control voltage Vt, and the vertical axis of the graph represents the oscillation frequency. In the graph, the solid line on the side with the highest oscillation frequency represents the case where the first to fourth high-frequency switch circuits 640, 650, 660, and 670 are all off. In the graph, the solid line with the lowest oscillation frequency represents the case where all of the first to fourth high-frequency switch circuits 640, 650, 660, and 670 are on.

  The 16 solid lines including the side with the highest oscillation frequency and the side with the lowest oscillation frequency indicate the respective states in which the first to fourth high-frequency switch circuits 640, 650, 660, 670 are turned on and off. Correspond.

  FIG. 18 shows that the oscillation frequency decreases as the control voltage Vt is increased. Further, it can be seen that the oscillation frequency range is shifted by combining ON and OFF of the first to fourth high-frequency switch circuits 640, 650, 660, and 670.

  As described above, the conventional differential voltage controlled oscillator 600 including a plurality of high frequency switch circuits can vary the oscillation frequency in a wide range.

A matching circuit including a similar high-frequency switch circuit is also known. The matching circuit including the high-frequency switch circuit can change the load impedance by switching the switching element of the high-frequency switch circuit, and can achieve matching over a wide frequency range.
Emad Hegazi et al., “Transmitter and Frequency Synthesizer 900-MHz GSM Int 3”・ Journal of Solid State Circuits (IEEE JOURNAL OF SOLID-STATE CIRCUITS), USA, VOL. 38, no. 5, May 2003, p782-792

  However, the conventional differential voltage controlled oscillator has a problem that phase noise deteriorates when the oscillation frequency is changed in a wide range. In particular, the phase noise characteristics in the off state of the high frequency switch circuit were not good.

  FIG. 19 is a graph showing the phase noise characteristics of a conventional differential voltage controlled oscillator 600. In FIG. 19, the horizontal axis of the graph represents the control voltage Vt, and the vertical axis of the graph represents the phase noise.

  In the graph, the solid line on the side with the best phase noise (the lower side in the graph) represents the case where all of the first to fourth high-frequency switch circuits 640, 650, 660, and 670 are on. In the graph, the solid line on the side with the least favorable phase noise (upper side in the graph) represents the case where the first to fourth high-frequency switch circuits 640, 650, 660, and 670 are all off. Furthermore, all the 16 solid lines correspond to the combined states of the first to fourth high-frequency switch circuits 640, 650, 660, and 670, respectively.

  It can be seen from FIG. 19 that the curve indicating the phase noise characteristic is shifted by combining ON and OFF of the first to fourth high-frequency switch circuits 640, 650, 660, and 670. In particular, there is a difference of about 5 dB between when the first to fourth high-frequency switch circuits 640, 650, 660, and 670 are all on and when they are all off.

  Next, in order to analyze the phase noise characteristics of the differential voltage controlled oscillator 600, the Q value is introduced as an evaluation parameter. Here, the Q value is an index representing the loss of the element, and the higher the Q value, the smaller the loss in the circuit.

  FIG. 20 is a graph showing a Q value for a high frequency signal of the conventional high frequency switch circuit 640. In FIG. 20, the horizontal axis of the graph represents the physical gate width of the switching element 143, and the vertical axis of the graph represents the Q value expressed on a logarithmic scale. Since the operation of the switching element 144 is the same as the operation of the switching element 143, the graph of FIG. 19 will be described only for the switching element 143, and the description for the switching element 144 will be omitted.

  In FIG. 20, the solid line in the graph indicates the Q value of the first high-frequency switch circuit 640 in which the switching element 143 is on. In the graph, the broken line indicates the Q value of the first high-frequency switch circuit 640 in which the switching element 143 is off.

  FIG. 21 is a circuit diagram of a conventional high frequency switch circuit 640. A high-frequency switch circuit 640 in FIG. 21 is a first high-frequency switch circuit 640 provided in the conventional differential voltage controlled oscillator 600. In FIG. 21, the same reference numerals as those in FIG. Here, the terminal 148 is a terminal on the side not connected to the switching element 143 of the capacitive element 141.

  In FIG. 21, dotted lines correspond to parasitic capacitance and gate resistance. The parasitic capacitance 143a corresponds to the gate-drain capacitance of the switching element 143. The parasitic capacitance 143 c corresponds to the gate-source capacitance of the switching element 143. The resistor 143b corresponds to the gate resistance of the switching element 143.

  In FIG. 20, when the switching element 143 is in an ON state (in the case of a solid line), the Q value increases as the gate width Wg of the switching element 143 increases.

  When the switching element 143 is in the ON state, the switching element 143 becomes active and becomes conductive, so that most of the high-frequency signal flows from the drain d to the ground through the source s. A part of the high-frequency signal leaks from the drain d to the gate g through the parasitic capacitance 143a. However, the number of high-frequency signals leaking to the gate g is smaller than that of high-frequency signals flowing to the ground.

  Therefore, the Q value of the high frequency switching circuit is substantially determined by the on-resistance of the switching element 143. The on-resistance of the switching element 143 can be reduced by increasing the gate width of the switching element 143. That is, the on-state Q value of the high-frequency switch circuit can be increased by increasing the gate width of the switching element 143 and decreasing the on-resistance.

  On the other hand, in FIG. 20, when the switching element 143 is in an off state (in the case of a dotted line), when the gate width is increased, the Q value of the high frequency switch circuit is lower than that in the on state.

  When the switching element 143 is in the OFF state, the switch is cut off, so that the high-frequency signal basically does not flow. However, a part of the high-frequency signal flows from the drain d to the gate g through the parasitic capacitance 143a. These high-frequency signals are divided into a component that flows from the source s to the ground through the parasitic capacitance 143c and a component that flows to the control voltage terminal 147 through the gate resistor 143b.

  Since the high-frequency signal flowing to the ground is only passed through the parasitic capacitance 143c, there is almost no loss. However, the high-frequency signal that flows to the control voltage terminal 147 through the gate resistor 143b is lost by the gate resistor 143b. As a result, the Q value of the high frequency switch circuit 640 is degraded.

  As described above, the high-frequency switch circuit used in the conventional differential voltage controlled oscillator has a problem that the Q value deteriorates in the OFF state of the switching element as compared with the ON state.

  Further, since the Q value of the high frequency switch circuit is proportional to the phase noise of the differential voltage controlled oscillator, the higher the Q value of the high frequency switch circuit, the better the phase noise characteristic of the differential voltage controlled oscillator. Therefore, the differential voltage controlled oscillator provided with the conventional high-frequency switch circuit has a problem that it cannot obtain good phase noise characteristics particularly in the off state of the switching element of the high-frequency switch circuit.

  Similar problems occur when the high-frequency switch circuit is part of the matching circuit. That is, also in the matching circuit, the high-frequency switch circuit has a problem that the Q value is deteriorated in the off state of the switching element as compared with the on state. Therefore, the matching circuit including the conventional high-frequency switch circuit has a problem that the loss in the matching circuit is large, particularly in the off state of the switching element of the high-frequency switch circuit.

  Accordingly, an object of the present invention is to provide a high-frequency switch circuit having a high Q value. Another object of the present invention is to provide a differential voltage controlled oscillator having good phase noise characteristics and capable of changing the oscillation frequency in a wide frequency range. Furthermore, another object of the present invention is to provide a matching circuit capable of changing the load impedance with low loss. In addition, an object of the present invention is to provide a PLL circuit and a wireless communication device including such a differential voltage oscillator.

In order to solve the above problems, the present invention has the following features.
The present invention is a differential voltage controlled oscillator for oscillating a high-frequency signal, and includes a parallel resonant circuit formed by connecting an inductor circuit, a variable capacitance circuit, and a high-frequency switch circuit in parallel, and a parallel resonant circuit in parallel. A high-frequency switch circuit connected to the first switching element, and the high-frequency switch circuit is connected to the first switching element that is switched according to a control voltage input to the first switching control terminal. A first capacitive element, a second switching element that is switched according to a control voltage input to the second switching control terminal, and a second capacitive element that is connected to the second switching element Connected to a virtual ground point of a differential signal generated in the parallel resonance circuit, and a control for supplying a common control voltage to the first and second switching control terminals. A first high-frequency signal that is connected between the voltage terminal, the control voltage terminal, and the first switching element, and that reduces a high-frequency signal flowing from the conduction terminal of the first switching element to the first switching control terminal. The second signal reduction unit is connected between the control voltage terminal and the second switching element, and is a second for reducing the high-frequency signal flowing from the conduction terminal of the second switching element to the second switching control terminal. And a high-frequency signal reduction unit.

  According to the present invention, the differential voltage controlled oscillator according to the present invention is provided with the first and second high-frequency signal reducing units, so that it becomes a differential voltage controlled oscillator having a high Q value. Therefore, the differential voltage controlled oscillator of the present invention has good phase noise characteristics when the high frequency switch circuit is in the OFF state. In addition, the differential voltage controlled oscillator of the present invention has the same phase noise characteristic as that of the conventional one of the present invention even when the high frequency switch circuit is in the ON state. Furthermore, the differential voltage controlled oscillator according to the present invention can improve the phase noise characteristics with a small current consumption as compared with the prior art.

  Preferably, the first high-frequency signal reduction unit is a first impedance element having a desired impedance with respect to the high-frequency signal flowing from the conduction electrode of the first switching element to the first switching control terminal, The high-frequency signal reducing unit may be a second impedance element having a desired impedance with respect to the high-frequency signal flowing from the conduction electrode of the second switching element to the second switching control terminal.

  In this way, by configuring the high-frequency signal reducing unit with an impedance element, a differential voltage controlled oscillator with good phase noise characteristics can be easily realized.

  Preferably, the high frequency switch circuit is connected between the virtual ground point and the control voltage terminal, and receives a high frequency signal flowing from the conduction terminal of the first and second switching elements to the first and second switching control terminals. It is preferable to further include a third high-frequency signal reducing unit for reducing the frequency.

  As a result, it is possible to prevent a high-frequency signal from flowing to the control voltage terminal when a location that is assumed to be a virtual grounding point is not a complete virtual grounding point due to a shift in the degree of balance. As a result, a differential voltage controlled oscillator having good phase noise characteristics can be provided.

  The high-frequency switch circuit may include a fourth high-frequency signal reducing unit connected between the control voltage terminal and the virtual ground point, instead of the second high-frequency signal reducing unit.

  Preferably, the first and second impedance elements have the same Q value when the first and second switching elements are off and the Q value when the first and second switching elements are on. It is good to have the impedance to make.

  As a result, a differential voltage controlled oscillator with good phase noise characteristics is provided.

  For example, at least one of the first and second impedance elements is a resistive element. For example, at least one of the first and second impedance elements is an inductor. For example, the inductor is a wiring.

  Preferably, the third high-frequency signal reducing unit is a third impedance element.

  For example, the third impedance element is a resistive element or an inductor.

  Preferably, at least one other high-frequency switch circuit connected in parallel with the parallel resonant circuit and the negative resistance circuit and having the connection relationship between the internal elements equal to that of the high-frequency switch circuit is preferably provided.

  As described above, when a plurality of high-frequency switch circuits are provided, the capacitance value of the entire variable capacitance circuit can be shifted by turning on and off the switches. Therefore, a differential voltage controlled oscillator capable of changing the oscillation frequency in a wide frequency range is provided.

  Preferably, the element value of the first capacitive element and the element value of the second capacitive element in any one high-frequency switch circuit are the same, and the first capacitive element in any one high-frequency switch circuit is the same. The element values of the first and second capacitive elements may be different from the element values of the first and second capacitive elements in different high-frequency switch circuits.

  Thereby, the number of shifts of the oscillation frequency can be maximized.

  For example, the first switching element and the second switching element are field effect transistors.

  Preferably, the field effect transistor has a ring structure in which the gate electrode surrounds the drain electrode.

  As a result, the parasitic capacitance between the drain and the substrate can be reduced, and as a result, a differential voltage controlled oscillator having good phase noise characteristics is provided.

  Preferably, the first switching element and the second switching element are field effect transistors that are alternately laid out in a comb shape on the IC.

  As a result, the resistance component between the substrates of the high-frequency switch circuit pair can be reduced, and as a result, a differential voltage controlled oscillator with good phase noise characteristics is provided.

  Preferably, the lead-out line from the gate of the field effect transistor is arranged in the uppermost layer of the IC.

  As a result, loss generated in the substrate can be reduced, and as a result, a differential voltage controlled oscillator with good phase noise characteristics is provided.

  Preferably, the first and second high-frequency signal reducing sections are arranged in the vicinity of the lead line from the gate of the field effect transistor.

  Thereby, the parasitic capacitance between the lead line and the substrate can be made as small as possible, and the loss generated in the substrate can be reduced. As a result, a differential voltage controlled oscillator having good phase noise characteristics is provided.

  For example, the first and second capacitive elements are MIM (Metal-Insulator-Metal) capacitive elements. In addition, for example, the first and second capacitive elements are MOS (Metal-Oxide-Semiconductor) capacitive elements.

  The present invention also relates to a matching circuit that is connected to a differential high-frequency circuit and performs matching between the differential high-frequency circuit and another circuit to be connected to the differential high-frequency circuit. A high-frequency switch circuit connected in parallel with the first circuit, and the high-frequency switch circuit is a circuit that varies a load impedance for a high-frequency signal flowing between the differential high-frequency circuit and another circuit. The first switching element that is switched in accordance with the control voltage input to the switching control terminal, the first capacitive element that is connected to the first switching element, and the second switching control terminal A second switching element that is switched according to the control voltage, a second capacitive element that is connected to the second switching element, and a virtual ground point of the differential signal in the matching circuit A control voltage terminal for supplying a common control voltage to the first and second switching control terminals, and is connected between the control voltage terminal and the first switching element, A first high-frequency signal reducing unit for reducing a high-frequency signal flowing from the conduction terminal of the first switching element to the first switching control terminal, and being connected between the control voltage terminal and the second switching element; A second high-frequency signal reducing unit for reducing a high-frequency signal flowing from the conduction terminal of the second switching element to the second switching control terminal.

In the matching circuit, preferably, the first high-frequency signal reducing unit has a first impedance element having a desired impedance with respect to the high-frequency signal flowing from the conduction electrode of the first switching element to the first switching control terminal. And
The second high-frequency signal reducing unit may be a second impedance element having a desired impedance for the high-frequency signal flowing from the conduction electrode of the second switching element to the second switching control terminal.

  In the above matching circuit, the high-frequency switch circuit preferably further includes a third impedance element connected between the virtual ground point and the control voltage terminal.

  The high-frequency switch circuit may include a fourth high-frequency signal reducing unit connected between the control voltage terminal and the virtual ground point, instead of the second high-frequency signal reducing unit.

  In the matching circuit, preferably, the first and second impedance elements include a Q value when the first and second switching elements are off and a Q value when the first and second switching elements are on. It is good to have an impedance that makes the

  In the matching circuit, for example, at least one of the first and second impedance elements may be a resistive element.

  In the matching circuit, for example, at least one of the first and second impedance elements may be an inductor.

  In the matching circuit, for example, the inductor may be a wiring.

  In the matching circuit, for example, the third impedance element may be a resistive element.

  In the matching circuit, for example, the third impedance element may be an inductor.

  The matching circuit preferably further includes at least one other high-frequency switch circuit that is connected in parallel with the parallel resonant circuit and the negative resistance circuit and in which the connection relationship of the internal elements is equal to that of the high-frequency switch circuit.

In the matching circuit, preferably, the element value of the first capacitive element and the element value of the second capacitive element in any one high-frequency switch circuit are the same,
The element values of the first and second capacitive elements in any one high-frequency switch circuit are different from the element values of the first and second capacitive elements in another high-frequency switch circuit. It is good to be.

  In the matching circuit, the first switching element and the second switching element are preferably field effect transistors.

  In the matching circuit, the field effect transistor preferably has a ring structure in which the gate electrode surrounds the drain electrode.

  In the above matching circuit, the first switching element and the second switching element are preferably field effect transistors that are alternately laid out in a comb shape on the IC.

  In the matching circuit, the lead line from the gate of the field effect transistor is preferably arranged in the uppermost layer of the IC.

  In the matching circuit, preferably, the first and second high-frequency signal reducing units are arranged in the vicinity of the lead line from the gate of the field effect transistor.

  In the matching circuit, for example, the first and second capacitive elements may be MIM (Metal-Insulator-Metal) capacitive elements.

  In the matching circuit, for example, the first and second capacitive elements may be MOS (Metal-Oxide-Semiconductor) capacitive elements.

In the matching circuit, preferably, a fourth impedance element connected to one input / output side of the differential high-frequency circuit;
A fifth impedance element connected to the other input / output side of the differential high-frequency circuit may be provided.

  In the matching circuit, for example, at least one of the fourth impedance element and the fifth impedance element may be an inductor.

  In the matching circuit, for example, at least one of the fourth impedance element and the fifth impedance element may be a capacitive element.

  The matching circuit preferably includes a sixth impedance element arranged on a circuit connected in parallel to the high-frequency switch circuit.

  In the matching circuit, for example, the sixth impedance element may be an inductor or a capacitive element.

  Further, the present invention is a PLL (Phase Locked Loop) circuit including a differential voltage controlled oscillator, and the differential voltage controlled oscillator has the same configuration as the above-described differential voltage controlled oscillator. .

  Further, the present invention is a wireless communication device including a differential voltage controlled oscillator, and the differential voltage controlled oscillator has the same configuration as the above-described differential voltage controlled oscillator.

  As described above, according to the present invention, it is possible to provide a differential voltage controlled oscillator that has favorable phase noise characteristics and can change the oscillation frequency in a wide frequency range. Furthermore, according to the present invention, it is possible to provide a matching circuit capable of changing the load impedance with low loss. In addition, a PLL circuit and a wireless communication terminal including the differential voltage controlled oscillator of the present invention are provided.

  These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.

(First embodiment)
FIG. 1 is a circuit diagram of a differential voltage controlled oscillator 100 including a high frequency switch circuit 140 according to the first embodiment of the present invention. The differential voltage controlled oscillator 100 is suitable for a frequency band of 800 MHz to 5 GHz used for a GSM (Global System for Mobile communications) system or a PDC (Personal Digital Cellular) system of a mobile phone device.

  The differential voltage controlled oscillator 100 shown in FIG. 1 includes a parallel resonant circuit 100a and a negative resistance circuit 130.

  The parallel resonant circuit 100a includes an inductor circuit 110, a variable capacitance circuit 120, and a high frequency switch circuit 140. The differential voltage controlled oscillator 100 is a circuit in which an inductor circuit 110, a variable capacitance circuit 120, a negative resistance circuit 130, and a high-frequency switch circuit 140 are all connected in parallel.

  Inductor circuit 110 includes a differential inductor pair having an inductor 111 and an inductor 112 connected in series to inductor 111. The element value of the inductor 111 and the element value of the inductor 112 are the same. A power supply terminal 101 for supplying a voltage Vdd to the differential voltage controlled oscillator 600 is connected to a virtual ground point of a differential signal generated in the parallel resonance circuit 100a between the inductor 111 and the inductor 112.

  Variable capacitance circuit 120 includes a differential varactor pair having varactor 121 and varactor 122 connected in series to varactor 121. The element value of the varactor 121 and the element value of the varactor 122 are the same. A control voltage terminal 102 for supplying a control voltage Vt for controlling the variable capacitance circuit 120 is connected to a virtual ground point of a differential signal generated in the parallel resonant circuit 100a between the varactor 121 and the varactor 122. .

  Negative resistance circuit 130 includes a differential transistor pair including transistor 131 and transistor 132. The element value of the transistor 131 and the element value of the transistor 132 are the same. The gate of the transistor 131 is connected to the drain of the transistor 132. The gate of the transistor 132 is connected to the drain of the transistor 131. That is, the transistor 131 and the transistor 132 are cross-coupled with each other.

  The source of the transistor 131 is connected to one terminal of the current source 103. The source of the transistor 132 is connected to one terminal of the current source 103. The other terminal of the current source 103 is connected to the ground. The current source 103 is connected to a virtual ground point of a differential signal generated in the parallel resonant circuit 100a.

  The high-frequency switch circuit 140 includes a series circuit having a capacitive element 141, a switching element 143, and a resistive element 145, and a series circuit having a capacitive element 142, a switching element 144, and a resistive element 146. A differential series circuit pair. The element value of the capacitive element 141 and the element value of the capacitive element 142 are the same. The element values of the switching element 143 and the switching element 144 are the same. The element value of the resistive element 145 and the element value of the resistive element 146 are the same.

  The capacitive element 141 and the capacitive element 142 are MIM (Metal-Insulator-Metal) capacitive elements. The switching element 143 and the switching element 144 are both field effect transistors. The switching element 143 and the switching element 144 include a drain d, a gate g, and a source s.

  One end of the capacitive element 141 is connected to the drain d (conduction terminal) of the switching element 143. One end of the capacitive element 142 is connected to the drain d (conduction terminal) of the switching element 144. The other end of the capacitive element 141 is connected to one connection point of the inductor circuit 110, the variable capacitance circuit 120, and the negative resistance circuit 130. The other end of the capacitive element 142 is connected to the other connection point of the inductor circuit 110, the variable capacitance circuit 120, and the negative resistance circuit 130.

  A gate terminal (switching control terminal) of the switching element 143 is connected to one end of the resistive element 145. A gate terminal (switching control terminal) of the switching element 144 is connected to one end of the resistive element 146. The sources s of the switching element 143 and the switching element 144 are both connected to the ground.

  The other end of resistive element 145 is connected to the other end of resistive element 146. By connecting the resistive element 145 and the resistive element 146, two series circuit pairs are connected.

  The control voltage terminal 147 is connected to a connection point between the resistive element 145 and the resistive element 146. A connection point between the resistive element 145 and the resistive element 146 is a virtual ground point of a differential signal generated in the parallel resonant circuit 100a. The control voltage terminal 147 supplies the control voltage Vctrl1 to the switching element 143 and the switching element 144.

  In the above configuration, the parallel resonance circuit 100a resonates at a frequency determined by the inductance of the inductor circuit 110 and the capacitances of the variable capacitance circuit 120 and the high frequency switch circuit 140. Further, the negative resistance circuit 130 compensates for a loss generated in the parallel resonant circuit 100a when the voltage Vdd is applied. As a result, the differential voltage controlled oscillator 100 oscillates near the resonant frequency of the parallel resonant circuit 100a.

  The capacitance of the variable capacitance circuit 120 varies depending on the voltage applied to both ends of the varactor 121 and the varactor 122. The varactor 121 and the varactor 122 are applied with a voltage Vdd and a control voltage Vt at both ends. Among these, since the control voltage Vt is variable, the voltage applied to the varactor 121 and the varactor 122 can be changed by changing the control voltage Vt. When the voltage applied to the varactor 121 and the varactor 122 changes, the capacitance of the variable capacitance circuit 120 changes, so that the resonance frequency in the parallel resonance circuit 100a changes.

  The high frequency switch circuit 140 is switched on or off by the control voltage Vctrl1. When the high-frequency switch circuit 140 is turned on, the drain and source of the switching element 143 and the switching element 144 become active and conductive, and the capacitance of the parallel resonant circuit 100a increases as compared to the off state. As a result, the resonance frequency in the parallel resonance circuit 100a is lowered.

  As described above, when the high-frequency switch circuit 140 is turned on and off, the oscillation frequency can be shifted. Further, the shift of the oscillation frequency will be schematically described with reference to FIG.

  FIG. 2 is a graph schematically showing the frequency characteristics of the differential voltage controlled oscillator 100 including the high frequency switch circuit 140 according to the first embodiment.

  In FIG. 2, the horizontal axis represents the control voltage Vt, and the vertical axis represents the oscillation frequency. In FIG. 2, the solid line indicates the oscillation frequency characteristics when the switching element 143 and the switching element 144 are in the on state, and the broken line indicates the oscillation frequency characteristic when the switching element 143 and the switching element 144 are in the off state.

  In a state where the control voltage Vctrl is controlled and the switching element 143 and the switching element 144 are turned off, the switching element 143 and the switching element 144 are cut off. Therefore, the capacitance of the parallel resonant circuit 100 a that determines the oscillation frequency is determined by the varactor 121 and the varactor 122 of the variable capacitance circuit 120. When the control voltage Vt is changed in this state, the capacities of the varactor 121 and the varactor 122 are changed. As a result, the oscillation frequency of the differential voltage controlled oscillator 100 varies with the control voltage Vt.

  On the other hand, in a state where the control voltage Vctrl is controlled and the switching element 143 and the switching element 144 are turned on, the switching element 143 and the switching element 144 become active and become conductive. Therefore, the capacitance of the parallel resonant circuit 100 a that determines the oscillation frequency is determined by the varactor 121 and the varactor 122 of the variable capacitance circuit 120, the capacitive element 141, and the capacitive element 142. Compared to the off state, the capacitance of the parallel resonant circuit 100a increases and the oscillation frequency decreases.

  In this way, the differential voltage controlled oscillator 100 can change the oscillation frequency by changing the control voltage Vt. Further, the differential voltage controlled oscillator 100 can shift the oscillation frequency by controlling the control voltage Vctrl to switch the states of the switching element 143 and the switching element 144.

  FIG. 3 is a circuit diagram of the high-frequency switch circuit 140 according to the first embodiment. In FIG. 3, the same components as those in FIG. 3, a terminal 148 indicates a terminal connected to one connection point of the inductor circuit 110 and the variable capacitance circuit 120 in FIG. A terminal 149 indicates a terminal connected to the other connection point of the inductor circuit 110 and the variable capacitance circuit 120 in FIG.

  The parasitic capacitance 144 a corresponds to the gate-drain capacitance of the switching element 144. The parasitic capacitance 144c corresponds to the gate-source capacitance of the switching element 144. The resistor 144b corresponds to the gate resistance of the switching element 144.

  FIG. 4 is a graph showing the Q value with respect to the gate width of the switching elements 143 and 144 of the high-frequency switch circuit 140 according to the first embodiment. In FIG. 4, the horizontal axis of the graph represents the physical gate width of the switching elements 143 and 144, and the vertical axis of the graph represents the Q value expressed on a logarithmic scale.

  In FIG. 4, the solid line in the graph indicates the Q value of the high-frequency switch circuit 140 in which the switching element 143 and the switching element 144 are on. In the graph, the broken line indicates the Q value of the high-frequency switch circuit 140 in which the switching element 143 and the switching element 144 are off. However, the resistive element 145 and the resistive element 146 have a resistance of 1 kΩ.

  In FIG. 4, when the switching element 143 and the switching element 144 are in an ON state (in the case of a solid line), the Q value of the switching element 143 and the switching element 144 increases as the gate width Wg increases.

  When the switching element 143 and the switching element 144 are in the ON state, the switching element 143 and the switching element 144 are activated and become conductive, so that most of the high-frequency signal flows from the drain d to the ground through the source s. A part of the high-frequency signal flows from the drain d to the gate g through the parasitic capacitance 143a and the parasitic capacitance 144a. However, the high-frequency signal flowing from the drain d to the gate g is less than the high-frequency signal flowing to the ground.

  Therefore, the Q value of the high-frequency switch circuit 140 is substantially determined by the ON resistances of the switching element 143 and the switching element 144. The on-resistances of the switching element 143 and the switching element 144 can be reduced by increasing the gate width of the switching element 143 and the switching element 144. That is, the on-state Q value of the high-frequency switch circuit 140 can be increased by increasing the gate widths of the switching elements 143 and 144 and decreasing the on-resistance.

  On the other hand, when the switching element 143 and the switching element 144 are in an off state (in the case of a dotted line), the high-frequency switch circuit 140 has a Q value that is substantially the same as that in the on state.

  This is because the resistive element 145 is connected between the switching element 143 and the control voltage terminal 147 and the resistive element 145 is connected between the switching element 144 and the control voltage terminal 147 in the high-frequency switch circuit 140 according to the first embodiment. The element 146 is connected, and with such a configuration, a high-frequency signal leaking from the drain d to the gate g and flowing to the control voltage terminal 147 is suppressed, and due to loss at the gate resistance 143b and the gate resistance 144b. This is because the deterioration of the Q value is prevented.

  That is, in the high frequency switch circuit 140 according to the first embodiment, since the resistive element 145 and the resistive element 146 are inserted inside the virtual ground point, the gate terminal (through the gate resistor 143b and the gate resistor 144b) The differential signal flowing from the switching control terminal) to the control voltage terminal 147 which is a virtual ground point decreases.

  Furthermore, the high frequency switch circuit 140 according to the first embodiment increases the resistance values of the resistive element 145 and the resistive element 146 to generate a high frequency signal that leaks from the drain d to the gate g and flows to the control voltage terminal 147. It is decreasing. When the resistance values of the resistive element 145 and the resistive element 146 are increased, when the control voltage terminal 147 is viewed from the gate terminal (switching control terminal), the impedance becomes higher with respect to the high-frequency signal. Accordingly, the high-frequency signal leaking from the drain d to the gate g via the parasitic capacitance 143a and the parasitic capacitance 144a and flowing to the control voltage terminal 147 is reduced, so that the deterioration of the Q value due to the loss in the gate resistance 143b and the gate resistance 144b is suppressed. The

  As described above, the resistive element 145 and the resistive element 146 prevent a high frequency signal from flowing from the gate terminal (switching control terminal) to the control voltage terminal 147. The fact that the high frequency signal leaking from the drain d (conduction terminal) to the gate g (switching control terminal) and flowing to the control voltage terminal 147 decreases means that the high frequency signal flowing from the drain d (conduction terminal) to the gate g (switching control terminal). Equivalent to a decrease in signal. That is, the resistive element 145 functions as a first high-frequency signal reducing unit for reducing a high-frequency signal flowing from the drain d (conduction terminal) of the switching element 143 to the gate g (switching control terminal) of the switching element 143. The resistive element 146 functions as a second high-frequency signal reducing unit for reducing a high-frequency signal flowing from the drain d (conduction terminal) of the switching element 144 to the gate g (switching control terminal) of the switching element 144.

  Since the high-frequency signal is configured not to flow from the gate terminal (switching control terminal) to the control voltage terminal 147 by inserting the resistive element 145 and the resistive element 146, the gates of the switching element 143 and the switching element 144 The g (switching control terminal) is substantially separated in the high-frequency signal.

  That is, the resistive element 145 and the resistive element 146 are connected between the gate terminals (switching control terminals) of the switching element 143 and the switching element 144, and the control voltage terminal 147 is connected to the connection point between the resistive element 145 and the resistive element 146. Is equivalent to separating the gate g of the switching element 143 and the switching element 144 in a high frequency manner so that a high frequency signal does not flow from the gate terminal (switching control terminal) to the control voltage terminal 147.

  FIG. 5 is a graph showing the Q value with respect to the resistance value of the resistive element of the high-frequency switch circuit 140 according to the first embodiment. The graph of FIG. 5 shows the Q value when the gate width Wg of the switching element 143 and the switching element 144 is 3100 μm and the resistance values of the resistive element 145 and the resistive element 146 are changed.

  In FIG. 5, the horizontal axis indicates the resistance value Rex of the resistive element 145 and the resistive element 146, and the vertical axis indicates the Q value. The solid line in the graph represents the Q value when the switching element 143 and the switching element 144 are in the on state, and the broken line represents the Q value when the switching element 143 and the switching element 144 are in the off state.

  In FIG. 5, when the switching element 143 and the switching element 144 are in the ON state, the Q value shows a constant value (solid line) regardless of the resistance values of the resistive element 145 and the resistive element 146.

  On the other hand, when the switching element 143 and the switching element 144 are in the off state, increasing the resistance values of the resistive element 145 and the resistive element 146 increases the Q value of the high-frequency switch circuit 140.

  Therefore, as the resistance value is increased, the Q value when the switching element 143 and the switching element 144 are in the OFF state is improved. As can be seen from FIG. 5, when the resistance value Rex of the resistive element 145 and the resistive element 146 is 100Ω to 10000Ω (10 kΩ), the Q value is about the same as when the switching element 143 and the switching element 144 are in the ON state. Can be obtained. Here, the similar Q value means a Q value that is 1/10 to 2 times the Q value in the on state. When the resistance value Rex was 100Ω to 10 kΩ, the amount of improvement in phase noise was 1 to 2.5 dB. Here, in the case of 10 kΩ, it does not mean that the highest improvement amount was obtained, but it means that the highest improvement amount was 2.5 dB among 100 Ω to 10 kΩ. ing.

  By inserting a resistive element having a resistance value in this range, a high frequency signal flowing from the drain d to the gate g through the parasitic capacitance 143a and the parasitic capacitance 144a can be reduced.

  As described above, the high-frequency switch circuit 140 according to the first embodiment is configured to reduce the high-frequency signal flowing from the drain terminal (conduction terminal) of the switching element 143 and the switching element 144 to the gate terminal (switching control terminal). Since the second high-frequency signal reducing unit is included, the Q value for the high-frequency signal when the switching element 143 and the switching element 144 are in the off state is high.

  FIG. 6 is a schematic diagram when the high-frequency switch circuit 140 according to the first embodiment is embodied on an IC. FIG. 6 is a layout in which a portion corresponding to the switching element 143 and the switching element 144 that are field effect transistors in the high-frequency switch circuit 140 is embodied on an IC.

  In FIG. 6, the gate electrode 201, the drain electrode 202, and the source electrode 203 are illustrated among the components of the switching element. The switching element has a ring structure in which the gate electrode 201 surrounds the periphery of the drain electrode 202 formed at the center on the ring. Such a structure is called a RingMOS transistor. When the switching element has a RingMOS transistor structure, the parasitic capacitance between the drain and the substrate can be reduced.

  Further, in the layout of FIG. 6, four gate electrodes 201 are connected to form one unit, and each unit is connected to the gate lead line 205a or 205b via the gate contact 204a or 204b. Although FIG. 6 illustrates four cases, a plurality of gate electrodes 201 may be connected. That is, a plurality of units each composed of a plurality of RingMOS transistors each having a plurality of gate electrodes 201 are connected to the gate lead-out lines 205a or 205b via the gate contacts 204a or 204b, respectively, thereby causing the first and second Switching elements are alternately laid out in a comb shape on the IC.

  Each unit is electrically connected every other unit. The leftmost unit in the figure and the third unit from the left are connected to the upper gate lead-out line 205 in the figure, and the rightmost unit. The third unit from the right has a comb-like structure connected to the lower gate lead-out line 205 in the drawing. Thus, by arranging the field effect transistors in a comb shape on the IC, the resistance component between the substrates of the high frequency switch circuit pair can be reduced.

  In the layout of FIG. 6, the entire structure connected by a common gate lead line corresponds to one switching element. In this example, a plurality of units connected to the upper gate lead line 205a correspond to the switching element 143, and a plurality of units connected to the lower gate lead line 205b correspond to the switching element 144.

  As shown in FIG. 6, a resistive element 145 is arranged at one end of the upper lead line. A resistive element 146 is disposed at one end of the lower lead line. Thus, by disposing the resistive element in the vicinity of the lead line, the parasitic capacitance between the lead line and the substrate can be made as small as possible, and the loss generated in the substrate can be reduced.

  The IC has a multilayer structure. Preferably, the lead line is arranged in the uppermost layer of the IC. As a result, the parasitic capacitance between the lead line and the substrate can be further reduced, and the loss generated in the substrate can be further reduced.

  The drain electrode 202 is drawn out by a lead line (not shown), and is connected to the capacitive element 141 and the capacitive element 142 formed in another part of the IC. The source electrode 203 is drawn out by a lead line (not shown) and connected to the ground.

  Thus, each unit includes a plurality of gate electrodes and is arranged in a comb shape, whereby each element can be arranged in a substantially square shape as a whole. By arranging in a square and a shape close to a square, the arrangement of IC-shaped elements can be facilitated.

  FIG. 7 is a circuit diagram of a differential voltage controlled oscillator including a plurality of high-frequency switch circuits 140 according to the first embodiment. In FIG. 7, the same components as those of the differential voltage controlled oscillator 100 referred to in FIG.

  The first high frequency switch circuit 140 is the same as the high frequency switch circuit 140 described above. In the first high-frequency switch circuit 140, the capacitance values of the capacitive element 141 and the capacitive element 142 are C1. The gate width Wg of the switching element 143 and the switching element 144 is Wg1.

  The second high-frequency switch circuit 150 includes the same internal element connection relationship as the first high-frequency switch circuit 140. However, the capacitive element 141 in the first high-frequency switch circuit 140 corresponds to the capacitive element 151, and the capacitive element 142 corresponds to the capacitive element 152. In the first high-frequency switch circuit 140, the switching element 143 corresponds to the switching element 153, and the switching element 144 corresponds to the switching element 154.

  In the first high-frequency switch circuit 140, the resistive element 145 corresponds to the resistive element 155, and the resistive element 146 corresponds to the resistive element 156. In the second high-frequency switch circuit 150, a control voltage terminal 157 is connected to a connection point between the resistive element 155 and the resistive element 156 (a virtual ground point of a differential signal generated in the parallel resonant circuit 100a). The control voltage terminal 157 supplies the control voltage Vctrl2 to the switching element 153 and the switching element 154.

  In the second high-frequency switch circuit 150, the capacitance values of the capacitive element 151 and the capacitive element 152 are 2 × C1 (twice C1). The capacitive element 151 and the capacitive element 152 have the same element value. The gate width Wg of the switching elements 153 and 154 is 2 × Wg1 (twice Wg1). The switching element 153 and the switching element 154 have the same element value.

  The third high-frequency switch circuit 160 includes the same internal element connection relationship as the first high-frequency switch circuit 140. However, the capacitive element 141 in the first high-frequency switch circuit 140 corresponds to the capacitive element 161, and the capacitive element 142 corresponds to the capacitive element 162. In the first high-frequency switch circuit 140, the switching element 143 corresponds to the switching element 163, and the switching element 144 corresponds to the switching element 164.

  In the first high-frequency switch circuit 140, the resistive element 145 corresponds to the resistive element 165, and the resistive element 146 corresponds to the resistive element 166. In the third high-frequency switch circuit 160, a control voltage terminal 167 is connected to a connection point between the resistive element 165 and the resistive element 166 (a virtual ground point of a differential signal generated in the parallel resonant circuit 100a). The control voltage terminal 167 supplies the control voltage Vctrl3 to the switching element 163 and the switching element 164.

  In the third high-frequency switch circuit 160, the capacitance values of the capacitive element 161 and the capacitive element 162 are 4 × C1 (4 times C1). The capacitive element 161 and the capacitive element 162 have the same element value. The gate width Wg of the switching elements 163 and 164 is 4 × Wg1 (4 times Wg1). The switching element 163 and the switching element 164 have the same element value.

  The fourth high-frequency switch circuit 170 includes the same internal element connection relationship as the first high-frequency switch circuit 140. However, the capacitive element 141 in the first high-frequency switch circuit 140 corresponds to the capacitive element 171, and the capacitive element 142 corresponds to the capacitive element 172. In the first high-frequency switch circuit 140, the switching element 143 corresponds to the switching element 173, and the switching element 144 corresponds to the switching element 174.

  In the first high-frequency switch circuit 140, the resistive element 145 corresponds to the resistive element 175, and the resistive element 146 corresponds to the resistive element 176. In the fourth high-frequency switch circuit 170, a control voltage terminal 177 is connected to a connection point between the resistive element 175 and the resistive element 176 (virtual ground point of a differential signal generated in the parallel resonant circuit 100a). The control voltage terminal 177 supplies the control voltage Vctrl4 to the switching element 173 and the switching element 174.

  In the fourth high-frequency switch circuit 170, the capacitance values of the capacitive element 171 and the capacitive element 172 are 8 × C1 (8 times C1). The capacitive element 171 and the capacitive element 172 have the same element value. In addition, the gate width Wg of the switching element 173 and the switching element 174 is 8 × Wg1 (8 times Wg1). The switching element 173 and the switching element 174 have the same element value.

  The differential voltage controlled oscillator 200 configured as described above operates in the same manner as the differential voltage controlled oscillator 100. However, in the differential voltage controlled oscillator 200, when determining the capacity of the parallel resonant circuit 100a, the variable range is further widened by the combination of the first to fourth high-frequency switch circuits 640, 650, 660, and 670 being turned on or off. Different points are set.

  That is, in the first to fourth high-frequency switch circuits 640, 650, 660, and 670, the capacitance of each capacitive element and the gate width of the switching element have different values. There are 16 combinations (2 × 2 × 2 × 2). As a result, the oscillation frequency can be switched for 16 different ranges. That is, among the first to fourth high-frequency switch circuits 640, 650, 660, 670, the capacitance value of any one high-frequency switch circuit is different from the capacitance value of another high-frequency switch circuit. Thus, the oscillation frequency can be shifted to the maximum.

  Therefore, the differential voltage controlled oscillator 200 has an oscillation frequency characteristic equal to that of the conventional differential voltage controlled oscillator 600 shown in FIG.

  Further, in any of the first to fourth high-frequency switch circuits 640, 650, 660, and 670, the differential voltage control oscillator 200 is configured such that each resistive element inserted inside the virtual ground point of the differential signal is a high-frequency signal. Since it functions as a reduction unit, the high-frequency signal flowing from the gate terminal (switching control terminal) to the control voltage terminal 147 can be reduced even when each switching element is in the OFF state.

  FIG. 8 is a graph showing the phase noise characteristics of the differential voltage controlled oscillator 200 including a plurality of high-frequency switch circuits according to the first embodiment. In FIG. 8, the horizontal axis represents the control voltage Vt, and the vertical axis represents the phase noise.

  In FIG. 8, the solid line in the graph shows the phase noise characteristics when all the switching elements of each high-frequency switch circuit are off. Also, the dotted line in the graph corresponds to the phase noise characteristic when all the switching elements of the circuit (the differential voltage controlled oscillator 600 described with reference to FIG. 17) from which all the resistive elements are removed are turned off for comparison.

  In FIG. 8, the phase noise characteristic of the differential voltage controlled oscillator 200 (solid line) is improved by about 2 dB compared to the case where there is no conventional resistive element (dotted line). This is because the Q values of the first to fourth high-frequency switch circuits 640, 650, 660, and 670 when the switching element is off are improved.

  FIG. 9 is a graph showing the phase noise characteristics of the differential voltage controlled oscillator 200 including a plurality of high-frequency switch circuits according to the first embodiment. In FIG. 9, the horizontal axis indicates the control voltage Vt, and the vertical axis indicates the phase noise.

  In FIG. 9, the solid line in the graph shows the phase noise characteristics when all the switching elements of each high-frequency switch circuit are in the ON state. In addition, the phase noise characteristics when all the switching elements of the circuit (the differential voltage control oscillator 600 described with reference to FIG. 17) from which all the resistive elements are removed are substantially the same as this graph.

  When the switching element is on, the phase noise characteristic does not change depending on the presence or absence of the resistive element. That is, by disposing the resistive element, the phase noise characteristic when the switching element is off is improved without affecting the phase noise characteristic when the switching element is on.

  As described above, the differential voltage controlled oscillator 200 including a plurality of the high frequency switch circuits according to the first embodiment has a phase noise characteristic when each high frequency switch circuit is in an OFF state, as compared with the conventional differential voltage controlled oscillator 600. It is good. On the other hand, the differential voltage controlled oscillator 200 has a phase noise characteristic equal to that of the conventional differential voltage controlled oscillator 600 even when each high frequency switch circuit is in an ON state.

  In the differential voltage controlled oscillator 200, each high-frequency switch circuit includes a high-frequency signal reduction unit, so that the phase noise characteristic is better than before and the oscillation frequency can be changed in the same wide frequency range as before. .

  In the above example, the capacities of the capacitive elements of the first to fourth high-frequency switch circuits 640, 650, 660, and 670 and the gate width of the switching elements are all changed, but the present invention is not limited to this.

  In the above example, the ratios of the capacitances of the capacitive elements of the first to fourth high-frequency switch circuits 640, 650, 660, and 670 and the gate width of the switching elements are set to 1: By setting 2: 4: 8, the oscillation frequency is switched to 16 different ranges.

  On the other hand, the ratio of the capacitances of the capacitive elements of the first to fourth high-frequency switch circuits 640, 650, 660, and 670 and the gate width of the switching elements is 1: By setting to 1: 1: 1, the oscillation frequency can be switched for five different ranges.

  Further, the ratio of the capacitances of the capacitive elements of the first to fourth high-frequency switch circuits 640, 650, 660, and 670 and the gate width of the switching elements is 1: 1: 2 with respect to the first high-frequency switch circuit 140. : By setting to 2, the oscillation frequency can be switched for seven different ranges.

  In the above example, four high-frequency switch circuits are configured, but the present invention is not limited to this. For example, if a wider frequency variable range is required, five or more high-frequency switch circuits may be configured. Alternatively, the frequency variable range may be narrowed by using three or less high-frequency switch circuits.

  FIG. 10 is a diagram showing phase noise characteristics when the current value of the current source 103 is changed when all the switches are turned off in the conventional differential voltage controlled oscillator shown in FIG. In FIG. 10, the current value of the current source 103 is changed by setting the control voltage Vt in the dotted line (without resistance) shown in FIG. 8 to 0V. In FIG. 10, the phase noise (−160.5 dBc / Hz) when the control voltage Vt in the solid line (with resistance) shown in FIG. 8 is 0 V is plotted with black circles. The current consumption in the black circle is 6 mA. In the conventional differential voltage controlled oscillator, when the current consumption is 6 mA, the phase noise is -158.5 dBc / Hz as indicated by the white circle plot. In the conventional differential voltage controlled oscillator, in order to obtain the same phase noise as that in the black circle, the current consumption must be increased to 8 mA as shown by the rhombus plot. From the above, it can be seen that the differential voltage controlled oscillator of the present invention improves the phase noise characteristics with less current consumption than the conventional one.

(Second Embodiment)
FIG. 11 is a circuit diagram of the high-frequency switch circuit 240 according to the second embodiment. In FIG. 11, the same components as those of the high-frequency switch circuit 140 according to the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.

  Compared with the high frequency switch circuit 140 of the first embodiment, the high frequency switch circuit 240 of the second embodiment has a resistance between the connection point of the resistive element 145 and the resistive element 146 and the control voltage terminal 147. The only difference is that the conductive element 241 is arranged, and the other configurations are all the same. As described above, in the high-frequency switch circuit 240 according to the second embodiment, the impedance element is inserted between the virtual ground point and the control voltage terminal 147.

  In the high-frequency switch circuit 240, the resistive element 145, the resistive element 146, and the resistive element 241 function as a high-frequency signal reducing unit. The resistive element 241 functions as a third high-frequency signal reducing unit to reduce high-frequency signals flowing from the drains (conduction terminals) of the switching elements 143 and 144 to the gates (switching control terminals) of the switching elements 143 and 144. When the balance of the differential circuit is shifted due to process variations and temperature characteristics, the connection points of the resistive elements 145, 146, and 241 may not be completely virtual ground points. In such a case, a high frequency signal flows to the control voltage terminal. However, in the second embodiment, since the resistive element 241 functions as a high frequency signal reducing unit, it is difficult for a high frequency signal to flow to the control voltage terminal. Therefore, even if the switching element 143 and the switching element 144 are in an off state, the Q value of the high-frequency switch circuit 240 can be improved.

  Further, when the high-frequency switch circuit 240 is applied to the differential voltage controlled oscillator 100 and the differential voltage controlled oscillator 200 described above instead of the high-frequency switch circuit 140 of the first embodiment, the control is performed from the switching element 143 and the switching element 144. The high frequency signal flowing to the voltage terminal 147 can be reduced. Therefore, even when the high-frequency switch circuit 240 is applied to the differential voltage controlled oscillator 100 and the differential voltage controlled oscillator 200, good phase noise characteristics of these differential voltage controlled oscillators can be obtained.

(Third embodiment)
FIG. 12 is a circuit diagram of the high-frequency switch circuit 340 according to the third embodiment. In FIG. 12, the same components as those of the high-frequency switch circuit 140 according to the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

  The high-frequency switch circuit 340 according to the third embodiment is different from the high-frequency switch circuit 140 according to the first embodiment in that there is no element corresponding to the resistive element 146, and that the resistive element 145 and the switching element 144 are The only difference is that the resistive element 241 is disposed between the connection point and the control voltage terminal 147, and the other configurations are all the same.

  In the high frequency switch circuit 340, the resistive element 145 and the resistive element 241 function as a high frequency signal reducing unit for the switching element 143. In the high-frequency switch circuit 340, the resistive element 241 is the fourth high-frequency signal reducing unit for the switching element 144, from the drain (conduction terminal) of the switching element 44 to the gate (switching control terminal) of the switching element 144. It works to reduce the flowing high frequency signal. Therefore, even if the switching element 143 and the switching element 144 are in an off state, the Q value of the high-frequency switch circuit 340 can be improved.

  Further, when the high-frequency switch circuit 340 is applied to the differential voltage controlled oscillator 100 and the differential voltage controlled oscillator 200 described above instead of the high-frequency switch circuit 140 of the first embodiment, control is performed from the switching element 143 and the switching element 144. The high frequency signal flowing to the voltage terminal 147 can be reduced. Therefore, even if the high-frequency switch circuit 340 is applied to the differential voltage controlled oscillator 100 and the differential voltage controlled oscillator 200, good phase noise characteristics of these differential voltage controlled oscillators can be obtained.

(Fourth embodiment)
In the 1st-3rd embodiment demonstrated above, the example which inserts a resistive element in the predetermined position in a circuit as a 1st-4th high frequency signal reduction part was shown. However, the first to fourth high-frequency signal reducing units may be impedance elements such as resistive elements and inductor elements.

  FIG. 13 is a circuit diagram of the high-frequency switch circuit 440 according to the fourth embodiment. The high frequency switch circuit 440 of the fourth embodiment is different from the high frequency switch circuit 140 of the first embodiment in that an inductor 441 is disposed at the position of the resistive element 145 and the position of the resistive element 146. The other components are the same except that the inductor 442 is disposed.

  Both the resistive element and the inductor are elements that exhibit high impedance with respect to the high-frequency signal by setting predetermined characteristic values. Therefore, the circuit performs the same operation even if both are replaced with respect to the high-frequency signal. . For example, when an inductor having an inductor value showing an impedance equal to a 1 kΩ resistor at a desired frequency is used, the same effect as when a 1 kΩ resistor is used can be obtained. Therefore, even if the switching element 143 and the switching element 144 are in an off state, the Q value of the high-frequency switch circuit 440 can be improved.

  Further, when the high-frequency switch circuit 440 is applied to the differential voltage controlled oscillator 100 and the differential voltage controlled oscillator 200 described above instead of the high-frequency switch circuit 140 of the first embodiment, control is performed from the switching element 143 and the switching element 144. The high frequency signal flowing to the voltage terminal 147 can be reduced. Therefore, even when the high-frequency switch circuit 440 is applied to the differential voltage controlled oscillator 100 and the differential voltage controlled oscillator 200, good phase noise characteristics of these differential voltage controlled oscillators can be obtained.

  Similarly, in the above-described second to third embodiments, the resistive element arranged as the high-frequency signal reducing unit is changed to an inductor having an impedance equivalent to that of the resistive element with respect to the high-frequency signal as in the fourth embodiment. May be replaced. In this case, the same operation as that of the resistive element is performed. Further, a resistive element and an inductor may be used in combination in the circuit.

(Fifth embodiment)
In the first to fourth embodiments described above, an element showing high impedance with respect to a high-frequency signal is inserted as a first to fourth high-frequency signal reducing unit at a predetermined position in the circuit. By changing, it is possible to perform an equivalent action.

  Specifically, in the specific layout of the IC described with reference to FIG. 6, the gate lead-out line 205 is thinned so as not to affect the control voltage Vctrl1 so as to have a high impedance with respect to the high-frequency signal. By thinning the gate lead line in this way, the gate lead line can function as an inductor, and there is no need to add a new element. Therefore, productivity and cost reduction when manufacturing an IC can be achieved. Also, IC layout is facilitated. The inductor may be configured by wiring other than the gate lead line.

(Sixth embodiment)
FIG. 14 is a circuit diagram of a matching circuit 700 including the high-frequency switch circuit 740 according to the sixth embodiment. The high frequency switch circuit 740 of the sixth embodiment is a part of a matching circuit connected to the output unit of the differential high frequency circuit 750.

  A matching circuit 700 shown in FIG. 14 is connected to the output side of the differential high-frequency circuit 750. The differential high frequency circuit 750 has two outputs, and each is connected to the matching circuit 700.

  The matching circuit 700 includes an output terminal 701, an output terminal 702, an inductor 703, an inductor 704, and a high frequency switch circuit 740. One output of the differential high-frequency circuit 750 is connected to one end of the inductor 703. The other end of the inductor 703 is connected to the output terminal 701. The other output of the differential high-frequency circuit 750 is connected to one end of the inductor 704. The other end of the inductor 704 is connected to the output terminal 702. The element value of the inductor 703 and the element value of the inductor 704 are the same.

  The high-frequency switch circuit 740 includes a differential series circuit composed of a capacitive element 741, a switching element 743, and a resistive element 745, a series composed of a capacitive element 742, a switching element 744, and a resistive element 746. Includes a differential series circuit pair with the circuit. The element value of the capacitive element 741 and the element value of the capacitive element 742 are the same. The element value of the switching element 743 and the element value of the switching element 744 are the same. The element value of the resistive element 745 and the element value of the resistive element 746 are the same.

  The switching element 743 and the switching element 744 are both field effect transistors. The switching element 743 and the switching element 744 include a drain d, a gate g, and a source s.

  The capacitive element 741 and the capacitive element 742 are MIM capacitive elements. One end of the capacitive element 741 is connected to the drain d (conduction terminal) of the switching element 743. One end of the capacitive element 742 is connected to the drain d (conduction terminal) of the switching element 744. The other end of the capacitive element 741 is connected between the inductor 703 and the output terminal 701. The other end of the capacitive element 742 is connected between the inductor 704 and the output terminal 702.

  A gate terminal g (switching control terminal) of the switching element 743 is connected to one end of the resistive element 745. A gate terminal (switching control terminal) of the switching element 744 is connected to one end of the resistive element 746. The sources s of the switching element 743 and the switching element 744 are both connected to the ground.

  The other end of resistive element 745 is connected to the other end of resistive element 746. By connecting the resistive element 745 and the resistive element 746, two series circuit pairs are connected.

  The control voltage terminal 747 is connected to a connection point between the resistive element 745 and the resistive element 746 that is a virtual ground point of the differential signal in the matching circuit 700. The control voltage terminal 747 supplies the control voltage Vctrl to the switching element 743 and the switching element 744.

  With the above configuration, the high frequency signal output from the differential high frequency circuit 750 is optimized by the load impedance of the matching circuit 700 and output from the output terminal 701 and the output terminal 702. As a result, matching can be achieved with other circuits connected to the output side.

  The load impedance of matching circuit 700 is determined by inductor 703 and inductor 704, and capacitive element 741 and capacitive element 742.

  When the high-frequency switch circuit 740 is in the on state, the switching element 743 and the switching element 744 are activated and become conductive. Therefore, the load impedance is determined by the inductor 703 and the capacitive element 741, and the inductor 704 and the capacitive element 742.

  When the high-frequency switch circuit 740 is in the off state, the switching element 743 and the switching element 744 are cut off. Therefore, the load impedance is determined by the inductor 703 and the inductor 704.

  As described above, since the matching circuit 700 makes the load impedance variable, matching can be achieved over a wide frequency range.

  Further, a resistive element 745 is connected between the control voltage terminal 747 and the gate terminal (switching control terminal) of the switching element 743, and between the control voltage terminal 747 and the gate terminal (switching control terminal) of the switching element 744. A resistive element 746 is connected. The resistive element 745 and the resistive element 746 are connected to the gate g of the switching element 743 and the gate g of the switching element 744. Therefore, when the control voltage terminal 747 is viewed from the respective gate terminals (switching control terminals) of the switching element 743 and the switching element 744, the impedance is high, so that a high-frequency signal is generated between each gate terminal (switching control terminal). Is almost separated.

  Therefore, when the switching element 743 and the switching element 744 are in the OFF state, the high-frequency signal from the output side of the differential high-frequency circuit 750 is the switching element 743 and the switching element as described in the example of the differential voltage control oscillator 100. Since it does not flow from the gate g of 744 to the control voltage terminal 747, it is not lost through the gate resistance. For this reason, the Q value of the high frequency switch circuit 740 in the off state does not deteriorate.

  As described above, even when the high-frequency switch circuit is applied to a part of the matching circuit, the resistive element 745, which is the first high-frequency signal reducing unit, between the switching element 743 and the control voltage terminal 747, the switching element 744, By providing a resistive element 746, which is a second high-frequency signal reducing unit, between the control voltage terminal 747 and the switching element is turned off, the Q value is maintained satisfactorily, thereby realizing a low-loss matching circuit. can do.

  In the sixth embodiment, an example of the matching circuit on the output side of the differential high-frequency circuit is shown, but a high-frequency switch circuit may be used for the matching circuit on the input side. In addition, the circuit configuration of the matching circuit may not be the configuration shown in the sixth embodiment. For example, a capacitive element may be used instead of the inductor, or a capacitive element or an inductor may be used in parallel with the high-frequency switch circuit 740.

  Furthermore, you may comprise a matching circuit using the high frequency switch circuit demonstrated in the 2nd-5th embodiment.

  In the first to sixth embodiments, the element values of the internal elements for configuring the differential pair are the same as each other. However, the present invention also includes a case where the element values are complete and not the same. Since the element values are not completely the same, even if the differential balance is deviated, by providing a high-frequency signal reduction unit, it is possible to reduce the high-frequency signal flowing from the conduction terminal of the switching element to the switching control terminal, As a result, phase noise characteristics can be improved.

(Other embodiments)
In the high-frequency switch circuit of each embodiment described above, the capacitive element is an MIM (METAL-INSULATOR-METAL) capacitive element, but is not limited thereto. For example, a MOS (METAL-OXIDE-SEMICONDUCTOR) capacitive element can be adopted as the capacitive element.

  In the above description, nMOS type transistors are used as the transistors 131 and 132 constituting the negative resistance circuit 130. However, pMOS type transistors may be used. In this case, for example, the power source terminal 101 is not connected to the inductor 111 and the inductor 112 but the ground is connected, and the other terminal not connected to the sources of the transistors 131 and 132 of the current source 103 is connected to the ground. Instead, the power supply terminal 101 may be connected.

  In the above description, MOS transistors are used as the transistors 131 and 132 constituting the negative resistance circuit 130, but bipolar transistors may be used.

  In the above description, the high-frequency switch circuit and the differential voltage controlled oscillator according to the first to fifth embodiments are applied to a frequency band of 800 MHz to 5 GHz used for the GSM system and the PDC system of the mobile phone device. An example is shown, but the present invention is not limited to this. Further, it can be applied to a high frequency in the millimeter wave region of 30 GHz or more.

  Moreover, although the high-frequency switch circuit and the differential voltage control oscillator of the first to fifth embodiments are applied to a frequency band of 800 MHz to 5 GHz used for the GSM method and the PDC method of the mobile phone device, The present invention can also be applied to a connection device used in a wireless LAN (Local Area Network) system in which substantially the same frequency band is used.

  In the above embodiment, the field effect transistor is used as the switching element. However, the switching element is not limited to this as long as the same effect as the field effect transistor can be obtained. In this case, the switching control terminal of the switching element refers to a terminal for controlling on / off of the switching element. The conduction terminal of the switching element refers to a terminal for inputting / outputting a signal flowing through the switching element.

  FIG. 15 is a block diagram showing a functional configuration of a PLL circuit 300 including the differential voltage controlled oscillator of the present invention. As shown in FIG. 15, the differential voltage controlled oscillator is mainly used in a PLL circuit. In FIG. 15, the PLL circuit 300 includes a phase comparator 301, a loop filter 302, a differential voltage control oscillator 303, and a frequency divider 304. The PLL circuit is a circuit that fixes (locks) the oscillation frequency to a desired frequency. The differential voltage controlled oscillator 303 is the same as the differential voltage controlled oscillator according to the first to sixth embodiments. The phase comparator 301 compares the phase of the input reference signal with the phase of the signal obtained by dividing the output signal of the differential voltage controlled oscillator 303 by the frequency divider 304. The output signal of the phase comparator 301 is input to the loop filter 302. The loop filter 302 converts the output signal of the phase comparator 301 into a direct current component and inputs it to the differential voltage controlled oscillator 303. A signal output from the loop filter 302 is input to the control voltage terminal 102 of the differential voltage controlled oscillator 303 as the control voltage Vt. As a result, a desired frequency is output from the differential voltage controlled oscillator 303. Therefore, a PLL circuit having good phase noise characteristics is provided.

  FIG. 16 is a block diagram illustrating a functional configuration of a wireless communication device 400 including the differential voltage controlled oscillator according to the present invention. In FIG. 16, the wireless communication device 400 includes an antenna 401, a power amplifier 402, a modulator 403, a switch 404, a low noise amplifier 405, a demodulator 406, and a PLL circuit 407. When transmitting a wireless signal in the wireless communication device 400, the modulator 403 modulates a desired high-frequency signal output from the PLL circuit 407 with a baseband modulation signal and outputs the modulated signal. The high frequency modulation signal output from the modulator 403 is amplified by the power amplifier 402 and radiated from the antenna 401 via the switch 404. When a radio signal is received, the high frequency modulation signal received from the antenna 401 is input to the low noise amplifier 405 via the switch 404 and amplified, and then input to the demodulator 406. The demodulator 406 demodulates the input high frequency modulation signal into a baseband modulation signal using the high frequency signal output from the PLL circuit 407. As shown in FIG. 15, the PLL circuit 407 includes the differential voltage controlled oscillator of the present invention. Therefore, a wireless communication device having good noise characteristics is provided.

  Although the present invention has been described in detail above, the above description is merely illustrative of the present invention in all respects and is not intended to limit the scope thereof. It goes without saying that various improvements and modifications can be made without departing from the scope of the present invention.

  According to the present invention, it is possible to improve the performance of a wireless communication device such as a mobile phone device or a wireless LAN device.

1 is a circuit diagram of a differential voltage controlled oscillator including a high-frequency switch circuit according to a first embodiment. The graph which modeled the frequency characteristic of the differential voltage control oscillator provided with the high frequency switch circuit which concerns on 1st Embodiment Circuit diagram of the high-frequency switch circuit according to the first embodiment The graph which shows Q value with respect to the gate width of the switching element of the high frequency switch circuit which concerns on 1st Embodiment The graph which shows Q value with respect to the resistance value of the resistive element of the high frequency switch circuit which concerns on 1st Embodiment Schematic diagram when the high-frequency switch circuit according to the first embodiment is embodied on an IC. 1 is a circuit diagram of a differential voltage controlled oscillator including a plurality of high-frequency switch circuits according to a first embodiment. The graph which shows the phase noise characteristic of the differential voltage control oscillator provided with the high frequency switch circuit which concerns on 1st Embodiment The graph which shows the phase noise characteristic of the differential voltage control oscillator provided with the high frequency switch circuit which concerns on 1st Embodiment FIG. 17 is a diagram showing phase noise characteristics when the current value of the current source 103 is changed when all the switches are turned off in the conventional differential voltage controlled oscillator shown in FIG. Circuit diagram of high-frequency switch circuit according to second embodiment Circuit diagram of high-frequency switch circuit according to third embodiment Circuit diagram of high-frequency switch circuit according to fourth embodiment The circuit diagram of the matching circuit provided with the high frequency switch circuit concerning a 6th embodiment The block diagram which shows the functional structure of the PLL circuit 300 which comprises the differential voltage control oscillator of this invention The block diagram which shows the functional structure of the radio | wireless communication apparatus 400 which comprises the differential voltage control oscillator of this invention. Circuit diagram showing a conventional differential voltage controlled oscillator Graph showing the oscillation frequency characteristics of a conventional differential voltage controlled oscillator Graph showing phase noise characteristics of a conventional differential voltage controlled oscillator Graph showing Q value of conventional high-frequency switch circuit Circuit diagram for explaining the operation of a conventional high-frequency switch circuit

Explanation of symbols

100, 200, 303 Differential voltage controlled oscillator 100a Parallel resonant circuit 110 Inductor circuit 120 Variable capacitance circuit 130 Negative resistance circuit 140, 150, 160, 170, 240, 340, 440, 740 High frequency switch circuits 141, 142, 151, 152, 161, 162, 171, 172, 741, 742 Capacitive elements 143, 144, 153, 154, 163, 164, 173, 174, 743, 744 Switching elements 147, 157, 167, 177, 747 Control voltage terminal 145 146, 155, 156, 165, 166, 175, 176, 241, 745, 746 Resistive element 441, 442 Inductor 700 Matching circuit 300, 407 PLL circuit 301 Phase comparator 302 Loop filter 304 Frequency divider 400 Wireless communication device 4 1 antenna 402 power amplifier 403 modulator 404 switches 405 low noise amplifier 406 demodulator

Claims (21)

A differential voltage controlled oscillator for oscillating a high frequency signal,
A parallel resonant circuit formed by connecting an inductor circuit, a variable capacitance circuit, and a high-frequency switch circuit in parallel;
A negative resistance circuit connected in parallel with the parallel resonant circuit,
The high-frequency switch circuit is
A first switching element that is switched according to a control voltage input to the first switching control terminal;
A first capacitive element connected to the first switching element;
A second switching element that is switched according to a control voltage input to the second switching control terminal;
A second capacitive element connected to the second switching element;
A control voltage terminal connected to a virtual ground point of a differential signal generated in the parallel resonant circuit, for supplying a common control voltage to the first and second switching control terminals;
A first high-frequency signal is connected between the control voltage terminal and the first switching element, and reduces a high-frequency signal flowing from the conduction terminal of the first switching element to the first switching control terminal. A signal reduction section;
A second high frequency signal is connected between the control voltage terminal and the second switching element, and reduces a high frequency signal flowing from the conduction terminal of the second switching element to the second switching control terminal. A differential voltage controlled oscillator including a signal reduction unit. The first high-frequency signal reducing unit is a first impedance element having a desired impedance with respect to a high-frequency signal flowing from the conduction terminal of the first switching element to the first switching control terminal,
The second high-frequency signal reducing unit is a second impedance element having a desired impedance with respect to a high-frequency signal flowing from a conduction terminal of the second switching element to the second switching control terminal. 2. The differential voltage controlled oscillator according to 1.   The high-frequency switch circuit is connected between the virtual ground point and the control voltage terminal, and flows from the conduction terminals of the first and second switching elements to the first and second switching control terminals. The differential voltage controlled oscillator according to claim 2, further comprising a third high-frequency signal reducing unit for reducing the signal.   The first and second impedance elements are impedances that make the Q value when the first and second switching elements are off and the Q value when the first and second switching elements are on the same level. The differential voltage controlled oscillator according to claim 2, comprising:   3. The differential voltage controlled oscillator according to claim 2, wherein at least one of the first and second impedance elements is a resistive element.   The differential voltage controlled oscillator according to claim 2, wherein at least one of the first and second impedance elements is an inductor.   The differential voltage controlled oscillator according to claim 6, wherein the inductor is a wiring.   The differential voltage controlled oscillator according to claim 3, wherein the third high-frequency signal reducing unit is a third impedance element.   The differential voltage controlled oscillator according to claim 8, wherein the third impedance element is a resistive element or an inductor.   2. The difference according to claim 1, further comprising at least one other high-frequency switch circuit connected in parallel with the parallel resonant circuit and the negative resistance circuit, wherein a connection relationship of internal elements is equal to the high-frequency switch circuit. Dynamic voltage controlled oscillator.   11. The differential voltage controlled oscillator according to claim 10, wherein a capacitance value of one arbitrary high-frequency switch circuit is different from a capacitance value of another whole high-frequency switch circuit.   The differential voltage controlled oscillator according to claim 1, wherein the first switching element and the second switching element are field effect transistors.   The differential voltage controlled oscillator according to claim 12, wherein the field effect transistor has a ring structure in which a gate electrode surrounds a drain electrode.   13. The differential voltage controlled oscillator according to claim 12, wherein the first switching element and the second switching element are field effect transistors alternately laid out in a comb shape on an IC.   The differential voltage controlled oscillator according to claim 14, wherein a lead-out line from the gate of the field effect transistor is arranged in the uppermost layer of the IC.   15. The differential voltage controlled oscillator according to claim 14, wherein the first and second high-frequency signal reducing units are arranged in the vicinity of a lead line from the gate of the field effect transistor.   2. The differential voltage controlled oscillator according to claim 1, wherein the first and second capacitive elements are MIM (Metal-Insulator-Metal) capacitive elements.   The differential voltage controlled oscillator according to claim 1, wherein the first and second capacitive elements are MOS (Metal-Oxide-Semiconductor) capacitive elements. A matching circuit that is connected to a differential high-frequency circuit and that performs matching between the differential high-frequency circuit and another circuit to be connected to the differential high-frequency circuit;
A high-frequency switch circuit connected in parallel between the differential high-frequency circuit and the other circuit,
The high-frequency switch circuit is a circuit that makes a load impedance for a high-frequency signal flowing between the differential high-frequency circuit and the other circuit variable,
A first switching element that is switched according to a control voltage input to the first switching control terminal;
A first capacitive element connected to the first switching element;
A second switching element that is switched according to a control voltage input to the second switching control terminal;
A second capacitive element connected to the second switching element;
A control voltage terminal connected to a virtual ground point of a differential signal in the matching circuit and for supplying a common control voltage to the first and second switching control terminals;
A first high-frequency signal is connected between the control voltage terminal and the first switching element, and reduces a high-frequency signal flowing from the conduction terminal of the first switching element to the first switching control terminal. A signal reduction section;
A second high-frequency signal that is connected between the control voltage terminal and the second switching element and reduces a high-frequency signal flowing from the conduction terminal of the second switching element to the second switching control terminal. A matching circuit including a reduction portion. A PLL (Phase Locked Loop) circuit including a differential voltage controlled oscillator,
The differential voltage controlled oscillator is:
A parallel resonant circuit formed by connecting an inductor circuit, a variable capacitance circuit, and a high-frequency switch circuit in parallel;
A negative resistance circuit connected in parallel with the parallel resonant circuit,
The high-frequency switch circuit is
A first switching element that is switched according to a control voltage input to the first switching control terminal;
A first capacitive element connected to the first switching element;
A second switching element that is switched according to a control voltage input to the second switching control terminal;
A second capacitive element connected to the second switching element;
A control voltage terminal connected to a virtual ground point of a differential signal generated in the parallel resonant circuit, for supplying a common control voltage to the first and second switching control terminals;
A first high-frequency signal is connected between the control voltage terminal and the first switching element, and reduces a high-frequency signal flowing from the conduction terminal of the first switching element to the first switching control terminal. A signal reduction section;
A second high frequency signal is connected between the control voltage terminal and the second switching element, and reduces a high frequency signal flowing from the conduction terminal of the second switching element to the second switching control terminal. A PLL circuit including a signal reduction unit. A wireless communication device comprising a differential voltage controlled oscillator,
The differential voltage controlled oscillator is:
A parallel resonant circuit formed by connecting an inductor circuit, a variable capacitance circuit, and a high-frequency switch circuit in parallel;
A negative resistance circuit connected in parallel with the parallel resonant circuit,
The high-frequency switch circuit is
A first switching element that is switched according to a control voltage input to the first switching control terminal;
A first capacitive element connected to the first switching element;
A second switching element that is switched according to a control voltage input to the second switching control terminal;
A second capacitive element connected to the second switching element;
A control voltage terminal connected to a virtual ground point of a differential signal generated in the parallel resonant circuit, for supplying a common control voltage to the first and second switching control terminals;
A first high-frequency signal is connected between the control voltage terminal and the first switching element, and reduces a high-frequency signal flowing from the conduction terminal of the first switching element to the first switching control terminal. A signal reduction section;
A second high frequency signal is connected between the control voltage terminal and the second switching element, and reduces a high frequency signal flowing from the conduction terminal of the second switching element to the second switching control terminal. A wireless communication device including a signal reduction unit.

Images