JP2005275730A - Network device system, hardware rewriting program used in the system, hardware rewriting method, host computer, and network device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a new network device system, hardware rewriting program and hardware rewriting method for efficiently implementing optimal hardware rewriting. <P>SOLUTION: A plurality of devices 300 which are respectively equipped with a rewritable hardware circuit 20 and a host computer 200 are connected through a network N, and the status information of the devices 300 is acquired, and the optimization information of each device 300 is generated based on the status information, and the hardware circuit 20 of each device 300 is rewritten based on the optimization information. Thus, it is possible to efficiently implement the optimal hardware rewriting even while a part of devices 300 is operating. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a network device system in which a plurality of devices such as printers and a host computer that manages these devices are connected so as to be capable of information communication, and in particular, a device having a rewritable hardware circuit as each device. , A hardware rewriting program used in the system, a hardware rewriting method, and a host computer and a network device constituting the system.

In recent years, a device having a hardware circuit that can be reconfigured (reconfigured or rewritten) in a state where it is incorporated in a device has appeared, and functions provided by software by hardware processing. High-speed processing can be realized by hardware.
For example, the following patent documents 1 to 3 disclose the details of the publicly known technology relating to the hardware processing of the software.

  In Patent Document 1, a combination of a circuit module and a program module required for realizing an applied image processing function is selected, and based on rewrite information including information on the selected circuit module, a semiconductor element A circuit module is formed by reconfiguring the rewritable hardware circuit, and the selected program module is executed in the semiconductor element in which the circuit module is formed.

Further, in Patent Document 2, a series of processing is speeded up by making it possible to acquire necessary information related to hardware earlier, and in Patent Document 3, a series of processing is performed by software. Which of the hardware processing is to be performed is determined based on the time required for circuit reconfiguration and module information acquisition.
Japanese Patent Laid-Open No. 2003-150947 JP-A-11-232309 Japanese Patent Application Laid-Open No. 11-238201

  By the way, in a so-called network device system environment in which a plurality of devices and a host computer are connected via a network such as a LAN (Local Area Network) or the Internet so that each device is managed by a single host computer. It is possible to improve the processing efficiency of the entire system by configuring a part of the device with a rewritable hardware circuit and implementing the above-described software processing as hardware.

However, in order to implement optimal hardware for a network device system in which a plurality of devices and a host computer are connected in this way, it is necessary to consider the balance of the entire network system.
In other words, even in an already operating network device system environment, the state of each device (busy, standby, etc.) and the capacity of the hardware circuit are often different. The balance of the entire network system and individual devices If the state of the system is not taken into consideration, there is a problem that optimal hardware cannot be realized and resources of the entire system cannot be effectively used.

  Therefore, the present invention has been made paying attention to such an unsolved problem of the conventional technology, and the main purpose thereof is the network device system environment that is already in operation. New network device system capable of efficiently implementing optimal hardware considering the balance of the entire system and the state of each device, etc., a hardware rewriting program used in the system, a hardware rewriting method, and It is an object of the present invention to provide a host computer and a network device that constitute the system.

[Invention 1] In order to solve the above-mentioned problems, a network device system of Invention 1 comprises:
A network device system in which a host computer and a plurality of devices each having a rewritable hardware circuit are connected so as to be able to communicate information, wherein the host computer acquires status information of each device. And optimization information generation means for generating optimization information including a module for rewriting the hardware circuit for each device based on the status information of each device acquired by the status information acquisition means, and the optimization information generation means A transmission destination device determination unit that determines a device that actually transmits the optimization information generated in step (b), and an optimization created for each device by the optimization information generation unit in the device determined by the transmission destination device determination unit Optimization information transmitting means for transmitting optimization information, and An optimization information transmitting means for determining the timing for transmitting the optimization information, and each device receives optimization information transmitted from the optimization information transmitting means. It is characterized by comprising information receiving means and hardware rewriting means for rewriting the hardware circuit based on the optimization information received by the optimization information receiving means.

In such a configuration, the host computer obtains status information of each device from each device on the network, and optimization information including a module for rewriting the hardware circuit for each device based on the status information. Then, the respective optimization information is transmitted to each device.
Then, after receiving the optimization information, each device rewrites the hardware circuit based on the optimization information.

As a result, the host computer can accurately generate optimization information from the status information of each device, so that accurate hardware implementation considering the balance of the entire network system can be realized efficiently in a short time. Can do.
In addition, as described in detail in Invention 6 below, the host computer also considers the timing of transmitting the generated optimization information to each device, so that the optimization information is temporarily transmitted. When any of the devices is in operation (busy state) and cannot be immediately implemented as hardware, the transmission of the optimization information can be performed at an appropriate timing. As a result, it is possible to realize the appropriate hardware as planned without impairing the balance of the entire network system.

[Invention 2] The network device system of Invention 2 is
In the network device system according to the first aspect, the status information includes at least information on a circuit scale of the hardware circuit, information on whether or not the hardware circuit is in a rewritable state, and the hardware circuit And information related to the time until it becomes rewritable when it is not in a rewritable state.

That is, by including information on the circuit scale of the hardware circuit of the device in the status information, the host computer can accurately select a module having a capacity that can be implemented by the hardware circuit.
Also, the status information should include information on whether or not the hardware circuit of the device is in a rewritable state and information on the time until the hardware circuit is rewritable when the hardware circuit is not in a rewritable state. Thus, the host computer can accurately determine the transmission timing of the optimization information transmitted to the device.

[Invention 3] The network device system of Invention 3 is
In the network device system according to the first or second aspect of the invention, the transmission destination device determination unit depends on a transmission time of a module to a device in which the hardware circuit is rewritable among the devices, and the transmitted module Total time with device hardware rewrite processing time
When the hardware circuit is longer than the waiting time until a device that is not in a rewritable state becomes rewritable,
A device in which the hardware circuit is not in a rewritable state is determined as a transmission destination of the optimization information.

  Thus, when the entire system is implemented as hardware, the processing time of the operating (busy) device, that is, the waiting time until the hardware circuit becomes rewritable, the transmission time of the module, and the hardware of the device by the module Considering three times such as the rewrite processing time of the hardware circuit, when the optimization processing time for the entire system ends earlier when the optimization information is sent as it is to the active device than when it is sent to another device Therefore, it is possible to realize the hardware processing of the entire system in a short time by sending the optimization information as it is to the operating device.

[Invention 4] The network device system of Invention 4
In the network device system according to the first or second aspect of the invention, the transmission destination device determination unit depends on a transmission time of a module to a device in which the hardware circuit is rewritable among the devices, and the transmitted module When the total time with the hardware rewrite processing time of the device is shorter than the waiting time until the device in which the hardware circuit is not in a rewritable state becomes rewritable, the device is sent to the device in which the hardware circuit is not in a rewritable state As a transmission destination of the optimization information to be transmitted, any one of the devices in which the hardware circuit is in a rewritable state is determined.

That is, in contrast to the third aspect of the present invention, when the hardware processing time of the entire system ends earlier when the optimization information is transferred to another device rather than sent directly to the active device. The optimization information is sent to another device instead of the active device.
As a result, in such a case, the hardware processing of the entire system can be realized in a short time.

[Invention 5] A network device system according to Invention 5 includes
In the network device system according to the first or second aspect of the invention, the transmission destination device determination unit depends on a transmission time of a module to a device in which the hardware circuit is rewritable among the devices, and the transmitted module Total time with device hardware rewrite processing time
When the device in which the hardware circuit is not in a rewritable state is shorter than the waiting time until the hardware circuit is in a rewritable state, Among the devices in which the hardware circuit is in a rewritable state, the device having the rewritable hardware circuit by the module and the earliest completion of the hardware circuit rewriting process is determined. It is characterized by being.

  As a result, as in the case of the invention 4, hardware processing of the entire system can be performed in a short time, and a device having a rewritable hardware circuit by a module included in the optimization information transmission destination device is determined. As a result, it is possible to avoid the inconvenience such as inability to rewrite due to lack of capacity and to realize the hardware of the module without fail.

[Invention 6] A network device system according to Invention 6 comprises:
In the network device system according to any one of the inventions 3 to 5, the transmission timing determination means includes the status information when the optimization information is transmitted to a device in which the hardware circuit is not in a rewritable state. Based on this, the optimization information is transmitted at the timing when the hardware circuit of the device becomes rewritable.

  As a result, when optimization information is sent, if any device is in operation and cannot be immediately implemented as hardware, it is sent as is, or the hardware circuit is in a rewritable state. Thus, the optimization information is not sent for a long time, and the optimization information can be transmitted at an appropriate timing according to the state of each device. As a result, it is possible to realize hardware as planned without impairing the balance of the entire network system.

[Invention 7] The network device system of Invention 7
A network device system in which a host computer and a plurality of devices each having a hardware circuit having a rewritable hardware circuit are connected so as to be capable of information communication, wherein the host computer obtains status information of each device Status information acquisition means, and optimization information generation means for generating optimization information including a module for rewriting the hardware circuit for each device based on the status information of each device acquired by the status information acquisition means, A destination device determining unit for determining a device that actually transmits the optimization information generated by the optimization information generating unit; and a device determined by the destination device determining unit for each device by the optimization information generating unit To send optimization information created to Optimization information transmission means, wherein each device receives optimization information received from the optimization information transmission means and optimization information received by the optimization information reception means. Hardware rewriting means for rewriting the hardware circuit based on the above and rewriting timing determining means for determining the rewriting timing of the hardware circuit by the hardware rewriting means.

That is, according to the present invention, in place of the transmission timing determining means on the host computer side provided in the network device system of the invention 1, the rewriting timing determination for determining the rewriting timing of the hardware circuit by the hardware rewriting means on each device side. Means are provided.
As a result, the host computer can send optimization information generated to each device at the same time regardless of the operating status of the device. This reduces and shortens the processing load and processing time of the host computer. it can. Further, since the amount of status information can be reduced, the processing load on the host computer can be further reduced, and network traffic can also be reduced.

  On the other hand, each device can accept the optimization information sent from the host computer as it is, and can determine the rewrite timing of the hardware circuit according to its own operating state. It becomes possible to achieve wear.

[Invention 8] A network device system according to Invention 8 comprises
In the network device system according to a seventh aspect, the status information includes at least information related to a circuit scale of the hardware circuit and information related to whether or not the hardware circuit is in a rewritable state. To do.

  This eliminates the need for information regarding whether or not the hardware circuit is in a rewritable state, a waiting time until the hardware circuit is in a rewritable state, and the like, as in the second aspect of the invention, thereby reducing the processing load on the host computer. At the same time, it becomes possible to reduce network traffic by acquiring the status information.

[Invention 9] A network device system according to Invention 9 comprises:
In the network device system according to the seventh or eighth aspect, when the optimization information is transmitted, if the hardware circuit of the device is not in a rewritable state, the rewrite timing determining means is the hardware circuit of the device. The hardware circuit rewriting timing is determined by the hardware rewriting means after waiting for the state to be rewritten.

  As a result, when the rewritable state is entered, the rewriting process is immediately executed based on the optimization information that has been sent, so it is not necessary between the rewritable state and the actual rewriting process being executed. Efficient blanking time is eliminated and efficient hardware implementation is achieved.

[Invention 10] A network device system according to Invention 10 includes:
The network device system according to any one of the inventions 1 to 9, wherein the hardware rewriting means of each device rejects the optimization information when the hardware circuit capacity of the device is insufficient. It further has a function of transmitting information to that effect to the host computer.

  As a result, if the status information, the determined transmission destination, and optimization information are erroneous and the optimization information cannot be stored in the hardware circuit of the device, the optimization information is rejected. By transmitting information to the host computer, it is possible to accurately notify the host computer that the processing has been incorrect.

[Invention 11] The network device system of Invention 11 is
In the network device system according to the tenth aspect, when the optimization information generating unit of the host computer receives the information indicating that the optimization information is rejected from any of the devices, the status information is again received from all the devices. It is characterized in that new optimization information is created based on the acquired status information.
As a result, new optimization information can be created immediately, so that the hardware implementation of the entire system, which is the initial objective, can be achieved in a short time.

  [Invention 12] A hardware rewriting program used in the network device system of Invention 12 connects a host computer and a plurality of devices each having a hardware circuit having a rewritable hardware circuit so that information can be communicated over the network. A hardware rewriting program used in the system, wherein the host computer has optimization information including status information acquisition means for acquiring status information of each device and a module for rewriting the hardware circuit for each device. Optimization information generation means that is generated based on the status information of each device acquired by the status information acquisition means, and a destination device that determines a device that actually transmits the optimization information generated by the optimization information generation means Decision And an optimization information transmission unit that transmits the optimization information created for each device by the optimization information generation unit to the device determined by the transmission destination device determination unit, and the optimization information transmission unit from the optimization information transmission unit Optimized information receiving means for causing the computer of each device to receive optimized information transmitted from the optimized information transmitting means while functioning as transmission timing determining means for determining the timing for transmitting optimized information And hardware rewriting means for rewriting the rewritable hardware circuit based on the optimization information received by the optimization information receiving means.

As a result, similarly to the first aspect, even in an already operating network device system environment, it is possible to implement an optimal hardware considering the balance of the entire network system, the state of each device, and the like.
In addition, each means can be realized more economically and easily than the case where it is realized by dedicated hardware, and functional improvements such as version upgrade of each means can be easily realized.

  Further, for example, a host computer constituting this system is a general-purpose computer system (information processing system, hereinafter the same) such as a PC, and each device is inherently provided to realize a function specific to the device. Therefore, the present invention can be realized more economically than the case where a separate new computer system is constructed.

[Invention 13] The hardware rewriting program used in the network device system of Invention 13 is
In the hardware rewriting program according to a twelfth aspect, the status information includes at least information relating to a circuit scale of the hardware circuit, information relating to whether or not the hardware circuit is in a rewritable state, and the hardware circuit. And information on the time until the rewritable state is available when the rewritable state is not in a rewritable state.

  As a result, similarly to the second aspect, the host computer can accurately select a module having a capacity that can be implemented by the hardware circuit, and can accurately determine the transmission timing of the optimization information to be transmitted to the device. Can be determined. Further, as in the twelfth aspect, each means can be realized by dedicated hardware, or can be realized economically and easily as compared with the case where a separate new computer system is constructed and implemented.

[Invention 14] The hardware rewriting program used in the network device system of Invention 14 is
In the hardware rewriting program according to the twelfth or thirteenth aspect, the transmission destination device determination means includes a transmission time of a module for a device in which the hardware circuit is rewritable among the devices, and the transmitted module. When the total time with the hardware rewrite processing time of the device is longer than the waiting time until the device in which the hardware circuit is not in the rewritable state becomes in the rewritable state, the device in which the hardware circuit is not in the rewritable state Is determined as a transmission destination of the optimization information.

  As a result, as in the case of the invention 3, when the optimization processing time of the entire system ends earlier when sending the optimization information as it is to the active device than when transferring it to another device, By sending the optimization information as it is to the inside device, it is possible to realize the hardware processing of the entire system in a short time. Further, as in the twelfth aspect, each means can be realized by dedicated hardware, or can be realized economically and easily as compared with the case where a separate new computer system is constructed and implemented.

[Invention 15] The hardware rewriting program used in the network device system of Invention 15 is
In the hardware rewriting program according to the twelfth or thirteenth aspect, the transmission destination device determination means includes a transmission time of a module for a device in which the hardware circuit is rewritable among the devices, and the transmitted module. When the total time with the hardware rewrite processing time of the device is shorter than the waiting time until the device in which the hardware circuit is not in the rewritable state becomes rewritable, the device in which the hardware circuit is not in the rewritable state One of the devices in which the hardware circuit is in a rewritable state is determined as a transmission destination of the optimization information transmitted to the device.

  As a result, in the case according to the fourth aspect, it is possible to realize the hardware processing of the entire system in a short time. Further, as in the twelfth aspect, each means can be realized by dedicated hardware, or can be realized economically and easily as compared with the case where a separate new computer system is constructed and implemented.

[Invention 16] The hardware rewriting program used in the network device system of Invention 16 is
In the hardware rewriting program according to the twelfth or thirteenth aspect, the transmission destination device determination means includes a transmission time of a module for a device in which the hardware circuit is rewritable among the devices, and the transmitted module. When the total time with the hardware rewrite processing time of the device is shorter than the waiting time until the device in which the hardware circuit is not in the rewritable state becomes rewritable, the device in which the hardware circuit is not in the rewritable state Among the devices in which the hardware circuit is in a rewritable state as a transmission destination of the module included in the optimization information transmitted to the hardware, the hardware circuit that can be rewritten by the module is included, and the hardware is the earliest Circuit rewriting process Ryosuru is characterized in that is adapted to determine the device.

  As a result, hardware processing of the entire system can be performed in a short time as in the case of the invention 5, and inconvenience such as inability to rewrite due to lack of capacity can be avoided and the hardware of the module can be surely realized. . Further, as in the twelfth aspect, each means can be realized by dedicated hardware, or can be realized economically and easily as compared with the case where a separate new computer system is constructed and implemented.

[Invention 17] The hardware rewriting program used in the network device system of Invention 17 is
The hardware rewriting program according to any one of the inventions 14 to 16, wherein the transmission timing determining means transmits the optimization information to a device in which the hardware circuit is not in a rewritable state. The optimization information is transmitted based on the timing at which the hardware circuit of the device becomes rewritable based on the above.

  As in invention 6, when transmitting optimization information, when any device is in operation (busy state) and cannot be immediately implemented as hardware, the hardware circuit Despite being in the rewritable state, the optimization information is not sent for a long time, and it is possible to send each optimization information at the correct timing according to the state of each device. it can. Further, as in the twelfth aspect, each means can be realized by dedicated hardware, or can be realized economically and easily as compared with the case where a separate new computer system is constructed and implemented.

[Invention 18] The hardware rewriting program used in the network device system of Invention 18 is
A hardware rewriting program used in a system in which a host computer and a plurality of devices each having a rewritable hardware circuit are connected to be able to communicate information over a network. The host computer obtains status information of each device. Status information acquisition means, and optimization information generation means for generating optimization information including a module for rewriting the hardware circuit for each device based on the status information of each device acquired by the status information acquisition means, A destination device determining unit for determining a device that actually transmits the optimization information generated by the optimization information generating unit; and a device determined by the destination device determining unit for each device by the optimization information generating unit To send optimization information created to And Information transmitting means and thereby to function,
The computer of each device includes an optimization information receiving unit that receives optimization information transmitted from the optimization information transmitting unit, and the hardware circuit based on the optimization information received by the optimization information receiving unit. The hardware rewriting means for rewriting and the rewriting timing determining means for determining the rewriting timing of the hardware circuit of the hardware circuit by the hardware rewriting means are functioned.

  As a result, similarly to the seventh aspect, the host computer can simultaneously transmit the optimization information generated to each device regardless of the operating state of the device, so that the processing load and processing time of the host computer can be reduced. Since the amount of status information can be reduced, the processing load on the host computer can be further reduced and network traffic can be reduced. In addition, each device can accept the optimization information sent from the host computer as it is, and can determine the hardware circuit rewrite timing of the hardware circuit according to its own operating state. It becomes possible to achieve hardware by using the information. Further, the present invention can be realized economically and easily as in the case of the twelfth aspect as compared with the case where each means is realized by dedicated hardware, or a separate new computer system is constructed and implemented.

[Invention 19] The hardware rewriting program used in the network device system of Invention 19 is
In the hardware rewriting program according to the eighteenth aspect, the status information includes at least information related to a circuit scale of the hardware circuit and information related to whether or not the hardware circuit of the hardware circuit is in a rewritable state. It is characterized by including.

  As a result, as in the case of the eighth aspect, information regarding whether or not the hardware circuit of the hardware circuit is in a rewritable state, a waiting time until the rewritable state is reached, and the like are not necessary, so that the processing of the host computer It is possible to reduce the load and reduce network traffic by acquiring the status information. Further, as in the twelfth aspect, each means can be realized by dedicated hardware, or can be realized economically and easily as compared with the case where a separate new computer system is constructed and implemented.

[Invention 20] The hardware rewriting program used in the network device system of Invention 20 is
In the hardware rewriting program according to the eighteenth or nineteenth aspect, when the optimization information is transmitted and the hardware circuit of the device is not in a rewritable state, the rewriting timing determining means The hardware circuit rewriting timing is determined by the hardware rewriting means after waiting for the circuit to be in a rewritable state.

  Thus, as in the ninth aspect, when the rewritable state is entered, the rewriting process is immediately executed based on the transmitted optimization information. Therefore, the rewritable state is actually executed after the rewritable state is entered. Efficient hardware implementation is achieved by eliminating unnecessary blank time. Further, as in the twelfth aspect, each means can be realized by dedicated hardware, or can be realized economically and easily as compared with the case where a separate new computer system is constructed and implemented.

[Invention 21] The hardware rewriting program used in the network device system of Invention 22 is
In the hardware rewriting program according to any one of the inventions 12 to 20, the hardware rewriting means of each device rejects the optimization information when the hardware circuit capacity of the device is insufficient. It further has a function of transmitting information to the effect to the host computer.

  As a result, similar to the tenth aspect, the status information, the determined transmission destination, and the optimization information are erroneously generated and the optimization information cannot be stored in the hardware circuit of the hardware circuit of the device. In this case, it is possible to accurately notify the host computer that the processing is wrong by transmitting information indicating that the optimization information is rejected to the host computer. Further, as in the twelfth aspect, each means can be realized by dedicated hardware, or can be realized economically and easily as compared with the case where a separate new computer system is constructed and implemented.

[Invention 22] The hardware rewriting program used in the network device system of Invention 22 is
In the hardware rewriting program according to the tenth aspect, when the optimization information generating unit of the host computer receives information indicating that the optimization information is rejected from any of the devices, the status information is again received from all the devices. And new optimization information is created based on the status information.

  As a result, similar to the eleventh aspect, since new optimization information can be created immediately, the hardware implementation of the entire system, which is the initial purpose, can be achieved in a short time. Further, as in the twelfth aspect, each means can be realized by dedicated hardware, or can be realized economically and easily as compared with the case where a separate new computer system is constructed and implemented.

[Invention 23] The hardware rewriting method used in the network device system of Invention 23 is
A module that connects a host computer and a plurality of devices each having a hardware circuit having a rewritable hardware circuit so that information communication is possible, and rewrites a hardware circuit for each device from the host computer to each device. A network device system hardware rewriting method for optimizing the entire network device system by transmitting optimization information including: the host computer acquires status information of each device, and the status The optimization information is generated based on the information, and after the device that actually transmits the optimization information is determined, the optimization information is transmitted to the devices at a predetermined timing. Sent from the host computer It is characterized in that it has to rewrite the hardware circuit self based on optimization information.

  As a result, similarly to the first aspect, even in an already operating network device system environment, it is possible to implement an optimal hardware considering the balance of the entire network system, the state of each device, and the like.

[Invention 24] The hardware rewriting method used in the network device system of the invention 24 includes:
In the hardware rewriting method according to a twenty-third aspect, the status information includes at least information relating to a circuit scale of the hardware circuit, information relating to whether or not the hardware circuit is in a rewritable state, and the hardware circuit. And information on the time until the rewritable state is available when the rewritable state is not in a rewritable state.

  As a result, similarly to the second aspect, the host computer can accurately select a module having a capacity that can be implemented by the hardware circuit, and can accurately determine the transmission timing of the optimization information to be transmitted to the device. Can be determined.

[Invention 25] The hardware rewriting method used in the network device system of Invention 25 is
In the hardware rewriting method according to the invention 23 or 24, the transmission time of a module to a device in which the hardware circuit is in a rewritable state among the devices, and the hardware rewriting processing time of the device by the transmitted module Is longer than a waiting time until a device in which the hardware circuit is not in a rewritable state becomes a rewritable state, a device in which the hardware circuit is not in a rewritable state is referred to as a transmission destination of the optimization information. This is characterized in that it is determined as follows.

  As a result, as in the case of the invention 3, when the optimization processing time of the entire system ends earlier when sending the optimization information as it is to the active device than when transferring it to another device, By sending the optimization information as it is to the inside device, it is possible to realize the hardware processing of the entire system in a short time.

[Invention 26] The hardware rewriting method used in the network device system of Invention 26 is
In the hardware rewriting method according to the invention 23 or 24, the transmission time of a module to a device in which the hardware circuit is in a rewritable state among the devices, and the hardware rewriting processing time of the device by the transmitted module Is shorter than the waiting time until a device in which the hardware circuit is not in a rewritable state becomes a rewritable state, the optimization information transmitted to the device in which the hardware circuit is not in a rewritable state As a transmission destination, one of the devices in which the hardware circuit is in a rewritable state is determined.
As a result, in the case according to the fourth aspect, it is possible to realize the hardware processing of the entire system in a short time.

[Invention 27] The hardware rewriting method used in the network device system of Invention 27 is
In the hardware rewriting method according to the invention 23 or 24, the transmission time of a module to a device in which the hardware circuit is in a rewritable state among the devices, and the hardware rewriting processing time of the device by the transmitted module Is shorter than the waiting time until a device in which the hardware circuit is not in a rewritable state becomes a rewritable state, the optimization information transmitted to the device in which the hardware circuit is not in a rewritable state Among the devices in which the hardware circuit is in a rewritable state as a transmission destination of the included module, a device that has a rewritable hardware circuit by the module and that finishes the hardware circuit rewriting process earliest To determine It is characterized in that the.

  As a result, hardware processing of the entire system can be performed in a short time as in the case of the invention 5, and inconvenience such as inability to rewrite due to lack of capacity can be avoided and the hardware of the module can be surely realized. .

[Invention 28] The hardware rewriting method used in the network device system of Invention 28 is
In the hardware rewriting method according to any one of the inventions 25 to 27, when optimization information is transmitted to a device in which the hardware circuit is not in a rewritable state, the hardware of the device is based on the status information. The optimization information is transmitted at the timing when the wear circuit becomes rewritable.

  As in invention 6, when transmitting optimization information, when any device is in operation (busy state) and cannot be immediately implemented as hardware, the hardware circuit Despite being in the rewritable state, the optimization information is not sent for a long time, and it is possible to send each optimization information at the correct timing according to the state of each device. it can.

[Invention 29] The hardware rewriting method used in the network device system of the invention 29 includes:
A module that connects a host computer and a plurality of devices each having a hardware circuit having a rewritable hardware circuit so that information communication is possible, and rewrites a hardware circuit for each device from the host computer to each device. A network device system hardware rewriting method for optimizing the entire network device system by transmitting optimization information including: the host computer,
Obtain status information of each device, generate the optimization information based on the status information, determine a device that actually transmits the optimization information, and then send the optimization information to each device And each device is
The hardware circuit is rewritten at a predetermined timing based on optimization information transmitted from the host computer.

  As a result, similarly to the seventh aspect, the host computer can simultaneously transmit the optimization information generated to each device regardless of the operating state of the device, so that the processing load and processing time of the host computer can be reduced. Since the amount of status information can be reduced, the processing load on the host computer can be further reduced and network traffic can be reduced. In addition, each device can accept the optimization information sent from the host computer as it is, and can determine the rewrite timing of the hardware circuit according to its own operating state. It becomes possible to achieve wear.

[Invention 30] A hardware rewriting method used in the network device system of the invention 30 includes:
In the hardware rewriting method according to a twenty-ninth aspect, the status information includes at least information relating to a circuit scale of the hardware circuit and information relating to whether or not the hardware circuit is in a rewritable state. It is what.

  As a result, similarly to the eighth aspect, information regarding whether or not the hardware circuit is in a rewritable state, a waiting time until the rewritable state is required, and the like are not necessary, and the processing load on the host computer can be reduced. At the same time, it becomes possible to reduce network traffic by acquiring the status information.

[Invention 31] The hardware rewriting method used in the network device system of Invention 31 is
In the hardware rewriting method described in the invention 29 or 30, if the hardware circuit of the device is not in a rewritable state when the optimization information is transmitted, the hardware circuit of the device is in a rewritable state. In this case, the hardware rewriting timing by the hardware rewriting means is determined.

  Thus, as in the ninth aspect, when the rewritable state is entered, the rewriting process is immediately executed based on the transmitted optimization information. Therefore, the rewritable state is actually executed after the rewritable state is entered. Efficient hardware implementation is achieved by eliminating unnecessary blank time.

[Invention 32] The hardware rewriting method used in the network device system of the invention 32 includes:
In the hardware rewriting method according to any one of the inventions 23 to 31, when the capacity of the hardware circuit of the device is insufficient, information indicating that the optimization information is rejected is transmitted to the host computer. It further has the function to perform.

  As a result, as in the case of the invention 10, if the status information, the determined transmission destination, and the optimization information are mistaken and the optimization information cannot be stored in the hardware circuit of the device, By transmitting information indicating that the optimization information is rejected to the host computer, it is possible to accurately notify the host computer that the processing is wrong.

[Invention 33] The hardware rewriting method used in the network device system of Invention 33 is:
In the hardware rewriting program according to the thirty-second aspect, when information indicating that the optimization information is rejected from any one of the devices is received, status information is obtained again from all the devices, and new information is obtained based on the status information. The present invention is characterized in that various optimization information is created.
As a result, similar to the eleventh aspect, since new optimization information can be created immediately, the hardware implementation of the entire system, which is the initial purpose, can be achieved in a short time.

[Invention 34] The host computer of Invention 34 is
A host computer connected to a plurality of devices including a hardware circuit having a rewritable hardware circuit so as to be able to communicate information, status information acquisition means for acquiring status information of each device, and for each device Optimization information generation means for generating optimization information including modules for rewriting the hardware circuit based on the status information of each device acquired by the status information acquisition means, and optimization information generated by the optimization information generation means Destination device determining means for determining a device that actually transmits the device, and optimization for transmitting the optimization information created for each device by the optimization information generating means to the device determined by the destination device determining means And an information transmission means.

  According to such a configuration, the host computer obtains status information of each device from each device on the network, and optimization information including a module for rewriting the hardware circuit for each device based on the status information Then, the respective optimization information is transmitted to each device. Then, after receiving the optimization information, each device rewrites the hardware circuit based on the optimization information.

  As a result, as in the first aspect, since the host computer can accurately generate optimization information from the status information of each device, it is possible to realize accurate hardware considering the balance of the entire network system. Can do.

[Invention 35] The host computer of Invention 35 is
34. The host computer according to claim 34, further comprising transmission timing determining means for determining timing for transmitting the optimization information from the optimization information transmitting means.

  According to such a configuration, since it is possible to consider the timing of transmitting the generated optimization information to each device, if any device is in operation when transmitting the optimization information, There is no such a situation that it is not transmitted immediately when it is in a state of being in hardware (busy state), and each optimization information can be transmitted at an appropriate timing. As a result, it is possible to realize the appropriate hardware as planned without impairing the balance of the entire network system.

[Invention 36] The host computer of Invention 36 is
In the host computer according to the thirty-fourth or thirty-fifth aspect, the status information includes at least information relating to a circuit scale of the hardware circuit of the device, information relating to whether or not the hardware circuit is in a rewritable state, and the hardware information. Information about the time until the wear circuit is not rewritable until it becomes rewritable.

As described above, the status information acquired from each device includes information related to the circuit scale of the hardware circuit of the device, so that the host computer can accurately determine a module having a capacity that can be realized by the hardware circuit. Can be selected.
Also, the status information should include information on whether or not the hardware circuit of the device is in a rewritable state and information on the time until the hardware circuit is rewritable when the hardware circuit is not in a rewritable state. Thus, the host computer can accurately determine the transmission timing of the optimization information transmitted to the device.

[Invention 37] The host computer of Invention 37 is
In the host computer according to any one of the inventions 34 to 36, the transmission destination device determining means transmits the transmission time of the module to the device in which the hardware circuit is in a rewritable state among the devices. In addition, when the total time with the hardware rewrite processing time of the device by the module is longer than the waiting time until the device in which the hardware circuit is not in a rewritable state becomes rewritable, the hardware circuit is in a rewritable state The non-device is determined as the transmission destination of the optimization information.

  Thus, when each device is implemented as hardware, it takes into account three times: the processing time of the operating (busy) device, the transmission time of the module, and the rewriting processing time of the hardware circuit of the device by the module. If the hardware processing time of the entire system ends earlier when the optimization information is sent to the (busy) device as it is than when it is transferred to another device and sent to the other device, it remains on the operating (busy) device. By sending the optimization information, the hardware processing of the entire system can be realized in a short time as in the third aspect.

[Invention 38] The host computer of Invention 38 provides
In the host computer according to any one of the inventions 34 to 37, the transmission destination device determining means transmits the transmission time of the module to the device in which the hardware circuit is rewritable among the devices. When the total time with the hardware rewrite processing time of the device by the module is shorter than the waiting time until the device in which the hardware circuit is not rewritable becomes rewritable, the hardware circuit is rewritable. As a transmission destination of optimization information transmitted to a non-device, any device is determined from among devices in which the hardware circuit is in a rewritable state.

  In other words, in the present invention, contrary to the invention 37, the hardware processing time of the entire system ends earlier when the optimization information is sent to another device rather than being sent to the operating (busy) device as it is. In this case, the optimization information is sent to another device in place of the busy device. As a result, in such a case, the hardware processing of the entire system can be realized in a short time.

[Invention 39] The host computer of Invention 39 is
In the host computer according to any one of the inventions 34 to 37, the transmission destination device determining means transmits the transmission time of the module to the device in which the hardware circuit is rewritable among the devices. When the total time with the hardware rewrite processing time of the device by the module is shorter than the waiting time until the device in which the hardware circuit is not rewritable becomes rewritable, the hardware circuit is rewritable. Among the devices in which the hardware circuit is in a rewritable state as a transmission destination of the module included in the optimization information transmitted to the non-device, the rewritable hardware circuit by the module is included, and the earliest Hardware circuit rewriting process Ryosuru is characterized in that is adapted to determine the device.

  As a result, as in the case of the invention 38, the hardware processing of the entire system can be performed in a short time, and a device having a rewritable hardware circuit by a module included in the optimization information transmission destination device is determined. As a result, it is possible to avoid the inconvenience such as inability to rewrite due to lack of capacity and to realize the hardware of the module without fail.

[Invention 40] The host computer of the invention 40 provides:
In the host computer according to the invention 35, when the transmission timing determining means transmits optimization information to a device in which the hardware circuit is not in a rewritable state, the hardware circuit of the device based on the status information The optimization information is transmitted in anticipation of the timing at which becomes a rewritable state.

  As a result, when sending optimization information, if any device is in operation (busy state) and cannot be immediately implemented as hardware, the hardware circuit is in a rewritable state. Nevertheless, the optimization information is not sent for a long time, and the optimization information can be transmitted at an appropriate timing according to the state of each device. As a result, it is possible to realize hardware as planned without impairing the balance of the entire network system.

[Invention 41] The host computer according to Invention 41 comprises
In the host computer according to any one of the inventions 34 to 40, when the optimization information generation means receives information indicating that reception of optimization information is rejected from any of the devices, It is characterized in that status information is acquired from the device and new optimization information is created based on the status information.
As a result, new optimization information can be created immediately, so that the hardware implementation of the entire system, which is the initial objective, can be achieved in a short time.

[Invention 42] The network device of Invention 42 comprises:
A status information transmitting means comprising a hardware circuit having a rewritable hardware circuit and connected to a host computer via a network so as to be able to communicate information with the host computer, and transmitting status information to the host computer And optimization information receiving means for receiving optimization information transmitted from the host computer, and hardware rewriting means for rewriting the hardware circuit based on the optimization information received by the optimization information receiving means. It is characterized by having.
As a result, the network device can rewrite its own hardware circuit based on the optimization information transmitted from the host computer, so that the hardware can be reliably achieved.

[Invention 43] A network device according to Invention 43 comprises:
The network device according to the invention is characterized in that the network device further comprises rewrite timing determining means for determining rewrite timing of the hardware circuit by the hardware rewriting means.

  As a result, even when the optimization information is transmitted from the host computer, the network device immediately implements hardware after waiting for the end of the processing even if other processing is in progress and the rewriting processing cannot be performed. can do. As a result, the rewriting process cannot be performed, and an unnecessary blank period does not occur until the rewriting process is started, so that efficient hardware can be achieved.

[Invention 44] A network device according to Invention 44 comprises:
In the network device according to the invention 43, when the optimization information is transmitted, the rewrite timing determination means can rewrite the hardware circuit of the device when the hardware circuit of the device is not in a rewritable state. It is characterized in that the timing for rewriting the hardware circuit by the hardware rewriting means is determined after waiting for the state to be reached.

  As a result, when the rewritable state is entered, the rewriting process is immediately executed based on the optimization information that has been sent, so it is not necessary between the rewritable state and the actual rewriting process being executed. Efficient blanking time is eliminated and efficient hardware implementation is achieved.

[Invention 45] A network device according to Invention 45 comprises:
In the network device according to any one of the inventions 42 to 44, when the hardware circuit capacity of the device is insufficient, the hardware rewriting means outputs information indicating that the optimization information is rejected. It further has a function of transmitting to the host computer.

  As a result, as in the tenth aspect, the network device has a problem that the status information, the determined transmission destination, and the optimization information are erroneously stored in the hardware circuit of the device. In this case, it is possible to accurately notify the host computer that the processing is wrong by transmitting information indicating that the optimization information is rejected to the host computer.

[Invention 46] A network device according to Invention 46 comprises:
In the network device according to invention 13,
A network device, further comprising: a printing unit that executes printing based on a printing instruction from the host computer.
As a result, a printer having a printing unit that executes printing based on a printing instruction from the host computer can rewrite its own hardware circuit based on optimization information transmitted from the host computer. Hardware implementation can be achieved.

Hereinafter, a first embodiment of the present invention will be described with reference to the drawings.
1 to 13 show a network device system 100 according to the present invention, a hardware rewriting program used in the system 100, a hardware rewriting method, and a first example of a host computer 200 and a network device 300 constituting the system. It is a figure which shows embodiment.

First, an outline of functions of a network device system 100 to which the present invention is applied will be described with reference to FIG.
FIG. 1 is a functional block diagram showing an outline of functions of a network device system 100 to which the present invention is applied.
As shown in the figure, the network device system 100 is configured by connecting a host computer 200 and a plurality of devices 300 via a network N so that bidirectional information communication is possible. In the following description, as each of these devices 300, a printer having a printing function as a main function will be described as an example.

  The host computer 200 is composed of, for example, a personal computer (PC) or a workstation on which application software such as word processing software is started. In addition to various information creation functions realized by the application software, the host computer 200 will be described below. Such a status information acquisition unit 10, optimization information generation unit 12, transmission destination device determination unit 14, transmission timing determination unit 16, and optimization information transmission unit 18 are provided. Hereinafter, each of these means 10 to 18 will be described.

  First, the status information acquisition unit 10 provides a function of acquiring status information of each device 300. The “status information” includes at least information regarding the circuit scale of the rewritable hardware circuit of the device 300, information regarding whether or not the hardware circuit is in a rewritable state, and rewriting the hardware circuit. It includes at least information about the waiting time until it becomes possible to rewrite when it is not in a possible state.

  For example, if each of the devices 300 is a “printer”, the “status information” includes information on the circuit scale of a rewritable hardware circuit such as “100 KB” and the printer is currently printing (busy). Status) and the hardware circuit is not in a rewritable state, information on a waiting time until the hardware circuit is in a rewritable state after the printing process of the printer is completed, and the like.

  If each of the devices 300 is a “printer”, whether the printing method (inkjet method, laser method) or color printing, which is information unique to the printer, is possible in addition to the IP address and MAC address for identifying the printer. Or the current toner consumption [%] (CMYK), the remaining amount of toner [%] (CMYK), the number of prints since startup (A4, A3, B5, etc.), and the total number of prints since shipment (A4) , A3, B5, etc.), current paper remaining amount (A4, A3, B5, etc.), paper tray / cover status (open / closed), presence / absence of duplex unit, printer internal temperature, paper jam, etc. May be included in the “status information” as appropriate. Others: power ON / OFF status, time since printer startup, standard time (GMT (Greenwich Mean Time), Japan Standard Time, etc.), power consumption, date of manufacture, product serial number, network settings (IP address) , Subnet mask, default gateway, DNS (Domain Name System), WINWindows (registered trademark) Internet Name Service, NetBIOS (Network BIOS name, etc.), firmware version information, hardware memory size (used memory size, free memory size ( HDD size, used HDD size, free HDD size)) and the like.

Next, the optimization information generation unit 12 generates optimization information including a module for rewriting the hardware circuit for each device 300 based on the status information of each device 300 acquired by the status information acquisition unit 10. It comes to provide a function.
As the “module” for rewriting the hardware circuit, for example, when the device 300 is a printer as described above, as shown in FIG. 4, an intermediate language for color is received and color or monochrome RGB rendering data is received. "Color Intermediate Language Rendering Module" M1 for creating a monochrome intermediate language rendering module M2 for receiving monochrome intermediate language and monochrome RGB rendering data, RGB rendering data CMYK “RGB → CMYK color conversion module” M3 for color conversion to RGB, “RGB → Black color conversion module” M4 for color conversion of RGB rendering data to Black, “Black binarization module” for binarizing Black rendering data M5, PDF file Received the file in a raw form, it is a "PDF rendering module" M6 and the like to create an RGB rendering data.

  The data capacity of these modules, for example, as shown in FIG. 4, the data capacity of the “color intermediate language rendering module” M1 is “50 KB”, and the data capacity of the “PDF rendering module” M6 is “150 KB”. In consideration of the data capacity of each module and the circuit scale of the hardware circuit of each device 300 included in the status information, one or more of these modules M are selected and selected. “Optimization information” including at least the module itself and an instruction to rewrite the hardware circuit of the printer 300 with the module is created for each device 300.

  As other typical modules applicable when each device 300 is a printer in this way, an “XHTML rendering module” that receives XML data and creates RGB rendering data, directly receives BMP data, and receives RGB data. "BMP rendering module" that creates rendering data, "JPG rendering module" that directly receives JPG data and creates RGB rendering data, "GIF rendering module" that directly receives GIF data and creates RGB rendering data, TIFF data "TIFF rendering module" that directly receives and creates RGB rendering data, "Cyan binarization module" that binarizes Cyan rendering data, and Magenta rendering data Performing of "binarization Magenta module", and "Yellow binarization module" and the like to perform the binarization of Yellow rendering data.

  Next, the transmission destination device determination unit 14 provides a function of determining a device 300 that actually transmits the optimization information generated by the optimization information generation unit 12. For example, assuming that the circuit scale of a rewritable hardware circuit of a certain device (printer) 300 is “190 KB”, among all the modules M1 to M6,. The device 300 is selected and determined as the transmission destination of the optimization information to be included.

The optimization information transmission unit 16 provides a function of transmitting the optimization information created for each device 300 by the optimization information generation unit 12 to the device 300 determined by the transmission destination device determination unit 14. It is like that.
The transmission timing determination means 18 provides a function for determining the timing for transmitting the optimization information from the optimization information transmission means 16. That is, when the device 300 determined by the transmission destination device determination unit 14 is in a busy state, until the hardware circuit included in the status information is not in a rewritable state, it can be rewritten. Based on the information about the waiting time, the timing for transmitting the optimization information is determined in anticipation of when the hardware circuit of the device 300 is in a rewritable state. Therefore, the optimization information transmitting unit 16 transmits the optimization information according to the transmission timing determined for each device 300 by the transmission timing determining unit 18.

  Note that the status information acquisition unit 10, the optimization information generation unit 12, the transmission destination device determination unit 14, the transmission timing determination unit 16, the optimization information transmission unit 18 and the like of the host computer 200 are actually shown in FIG. As shown, it is realized by a computer system comprising hardware comprising a CPU, RAM, etc., and a dedicated computer program (software) that implements an algorithm as shown in FIG.

  That is, as shown in FIG. 2, the hardware for realizing the host computer 200 includes a central processing unit (CPU) 40 that is responsible for various controls and arithmetic processing, and a main storage device (Main Storage). RAM (Random Access Memory) 41, ROM (Read Only Memory) 42 which is a read-only storage device, an auxiliary storage device (Secondary Storage) 43 such as a hard disk drive (HDD) and a semiconductor memory, and the like Output device 44 comprising a monitor (LCD (liquid crystal display) or CRT (cathode ray tube)), image scanner, keyboard, mouse, CCD (Charge Coupled Device) or C Between the input device 45 including an imaging sensor such as an OS (Complementary Metal Oxide Semiconductor), a communication network N such as a LAN, WAN, and the Internet, and an input / output interface (I / F) 46 of the PCI ( The buses are connected by various internal and external buses 47 such as a processor bus, a memory bus, a system bus, and an input / output bus such as a Peripheral Component Interconnect (BUS) bus and an ISA (Industrial Standard Architecture) bus.

  Then, for example, various control programs and data supplied via a storage medium such as a CD-ROM, a DVD-ROM, a flexible disk (FD), or the communication network N are installed in the auxiliary storage device 43 and the program. And the data are loaded into the main storage device 41, and the CPU 40 performs predetermined control and arithmetic processing using various resources according to the program loaded in the main storage device 41, and the processing result (processing data) is sent to the bus 47. The data (print data, optimization information, etc.) is transmitted to each device 300 via the network N, or stored in the auxiliary storage device 43 as necessary. The storage (update) process is performed.

  On the other hand, the device 300 is rewritable hardware as shown in FIG. 1 in addition to functions unique to the device, that is, when the device 300 is a printer, functions such as a printing mechanism, a paper feed mechanism, and an operation panel. In addition to the circuit (more accurately, a circuit element having a rewritable hardware area) 20, an optimization information receiving unit 24 and a hardware rewriting unit 24 are provided.

  The optimization information receiving unit 24 provides a function of receiving optimization information transmitted from the host computer 200. The optimization information receiving unit 24 analyzes the received optimization information and notifies the hardware rewriting unit 24 of the analysis. It has become. The optimization information receiving unit 24 functions as a status information transmitting unit for transmitting the device 300 status information to the status information acquiring unit 10 of the host computer.

  The hardware rewriting means 22 provides a function for actually rewriting the hardware circuit 22 based on the optimization information received by the optimization information receiving means 24. For example, when a new version of a module and a rewrite command for the version are notified from the optimization information receiving means 24, the module is rewritten with the new version of the module instead of the old version of the module written in the hardware circuit 22. (Reconfigure).

  Note that the optimization information receiving unit 24 and the hardware rewriting unit 24 of the device 300 actually use hardware such as a CPU and a RAM as shown in FIG. 3 and an algorithm as shown in FIG. It is realized by a computer system comprising a dedicated computer program (software) realized. That is, when the device 300 is a printer, the hardware for realizing the device 300 is, as shown in FIG. 3, a CPU 40, a RAM 41, a ROM 42, a rewritable hardware circuit 20, and an auxiliary device. Between the storage device 43, the printing mechanism 49 as an output device, the operation panel 48 as an input device, a communication network N such as LAN, WAN, and the Internet, and these input / output interfaces (I / F) 46, etc. Are bus-connected by various internal and external buses 47 such as a processor bus, a memory bus, a system bus, and an input / output bus.

  Then, for example, various control programs and data supplied via a storage medium such as a CD-ROM, a DVD-ROM, a flexible disk (FD), or the communication network N are installed in the auxiliary storage device 43 and the program. Data is loaded into the RAM 41, and the CPU 40 performs predetermined control and arithmetic processing using various resources according to the program loaded in the RAM 41, and the processing result (processing data) is sent from the printing mechanism 49 via the bus 47. The data is output as a printed matter, data such as status information is transmitted to each device via the network N, and is appropriately stored and saved (updated) in the auxiliary storage device 43 as necessary.

In addition to this, the rewritable hardware circuit 20 is rewritten based on the optimization information sent from the host computer 200 via the network N.
The device 300 is not particularly limited as long as it has a hardware configuration for realizing the computer system as described above and can communicate with the host computer 200 via the network N. In addition to printers, digital home appliances such as scanners, copiers, facsimiles, projectors, digital cameras, PCs, audios, televisions, videos, refrigerators, microwave ovens, humidifiers, air conditioners, washing machines, electric fans, mobile phones, PDAs Examples of such devices include mobile terminals such as electronic paper, network cards, gateways (including home gateways), routers, bridges, and HUBs.

On the other hand, the host computer 200 is not particularly limited as long as it is a computer system having a hardware configuration and a predetermined control program as shown in FIG. It can be realized by a personal computer (PC) equipped with a high performance CPU or the like or an electronic computer called a workstation.
Further, the protocol used for communication between the host computer 200 and each device 300 is not particularly limited, and a standard TCP / IP protocol is used on the Internet as long as it passes through a network N such as the Internet. If the LAN is unified by a specific vendor, a specific protocol such as AppleTalk / EtherTalk (registered trademark), NetBEUI / NetBIOS (registered trademark), SPX / IPX (registered trademark), or the like can be used. For example, in the case of TCP / IP, TCP (Transmission Control Protocol) for establishing a connection between the host computer 200 and each device 300 to ensure reliable communication and connectionless to provide efficient communication. In addition to UDP (User Datagram Protocol), which is a type of protocol, and IP (Internet Protocol), which is a protocol for delivering packets to a predetermined destination from many routes, to remotely control the other terminal via a network Telnet (Telecommunication Network), a protocol for executing file transfer using Telnet, and File Transfer (FTP). r Protocol), NFS (Network File System) which is a protocol for providing a transparent file access function to other computers, and SNMP (Simple) which is a protocol for exchanging network management information such as failure information and traffic information. Network Management Protocol), ARP and RARP (Address Resolution Protocol, Reverse ARP), SLIP and PPP (Serial Line Protocol, Point to Point Protocol, RIP and OSPF in Rout and OSPF) source Reservation Protocol), IPsec (IP security Protocol), IGMP (Internet Group Management Protocol), it is considered that NTP (Network Time Protocol) or the like is often used.

The host computer 200 does not necessarily exist independently on the network N. For example, the host computer 200 may be integrated with one of the devices 300, or may exist in two or more.
Next, a specific example of the network device rewriting method by the network device system 100 of the present invention having such a configuration will be described with reference to flowcharts of FIGS. 6 to 8, schematic diagrams of FIGS.

  In the network device system 100 of the present invention, as shown in FIG. 9, one host computer 200 and four devices 300 (device A, device B, device C, device D) are mutually connected by the same network N. It is assumed that all four devices A to D are centrally managed by the single host computer 200 so that the hardware can be rewritten.

  Then, as shown in FIG. 6, when executing the hardware rewriting process, the host computer 200 (its status information acquisition means 10) acquires the status information of all the devices A to D in the first step S100. As described above, the status information includes at least information on whether or not the hardware circuit 20 of the device 300 is in a rewritable state, information on the circuit scale of the hardware circuit 20, and the hardware circuit 20 It includes information about the time until it becomes rewritable when it is not in a rewritable state. Note that this status information may not be acquired due to power off of the device 300, communication failure, or the like, but in this embodiment, it is assumed that status information unique to the device can be acquired from all the devices A to D.

Next, when the host computer 200 (optimization information generation means 12) acquires the status information of all the devices A to D in this way, the process proceeds to the next step S102 and the circuit scale of the status information. Based on the above, optimization information for each device A to D is generated.
Next, the host computer 200 (the transmission destination device determination means 14) proceeds to the next step S104 and is busy among all the devices A to D from the status information, that is, its own hardware circuit 20. Whether or not there is a device that cannot be immediately implemented as hardware is determined. In the example of FIG. 10, among the devices A to D, the devices A and D are executing the printing process. In this case, the rewriting process of the hardware circuit 20 for all the devices A to D is not immediately performed. Judge that it is possible.

  If it is determined in step S104 that there is no busy device 300 (No), the process jumps to step S118 as it is, but if it is determined that the busy device 300 exists, the process proceeds to the next step S106. Based on the status information, the remaining time (waiting time: T1) at which the process ends at the end of the busy device 300 is calculated based on the status information. In the case of FIG. 10, assuming that the device A ends first and the device D ends last among the devices A and D, the time when the device D ends is calculated as the remaining time (waiting time: T1). .

  Next, if the remaining time (waiting time: T1) at which the processing ends is calculated in this way, the process proceeds to the next step S108, and immediately after the transmission of the optimization information to the device that can be implemented as hardware is started. The time (end time: T2) until the hardware is completed is calculated by the transmitted optimization information. In the example of FIG. 10, of the busy devices A and D, the time from when the optimization information is generated until the end time of the device that finishes processing last is the waiting time (T1), and immediately The time from when the optimization information is transmitted to each of the devices B and C that can be implemented in hardware until the hardware implementation is completed by the optimization information is the end time (T2).

  Then, when the process proceeds to the next step S110 and the time (T1) is longer than (T2) (Yes), that is, in the example of FIG. 10, the busy devices A and D are connected to the hardware circuit 20. If it is determined that the hardware rewriting process of the other devices B and C is finished before the rewriting is possible, the process proceeds to the next step S112, and among the devices B and C that have already finished the hardware rewriting process, After calculating the circuit scale of the hardware circuit 20 of the device for which processing is initially completed, the process proceeds to the next determination step S114.

  In step S114, based on the circuit scale of the hardware circuit 20 of the device (BorC) whose processing ends first, the hardware circuit 20 of the device (BorC) whose processing ends first is busy for the device (AorD). It is determined whether the optimization information can be hardware-implemented. That is, it is determined whether the optimization information for the busy device (AorD) can be realized in hardware based on the remaining capacity of the hardware circuit 20 of the device (BorC) for which processing ends first.

  As a result, when it is determined that the optimization information for the busy device (AorD) can be hardwareized by the remaining capacity of the hardware circuit 20 of the device (BorC) for which processing ends first (Yes). Then, the process proceeds to the next step S116, and the host computer (the transmission destination device determination means 14) 200 determines the device (BorC) for which processing ends first as the transmission destination of the optimization information for the busy device. After that, the process proceeds to step S118, the optimization information of each device is transmitted, and the process ends.

  On the other hand, in step S114, depending on the remaining capacity of the hardware circuit 20 of the device (BorC) for which the hardware rewrite processing is completed first, optimization information for the busy device (AorD) cannot be hardwareized. When it is determined that the hardware circuit 20 is determined, the process proceeds to step S122 shown in FIG. 7, and the circuit scale of the hardware circuit 20 of the device (BorC) for which the hardware rewriting process is completed is calculated, and then the process proceeds to step S124.

In step S124, as in step S114, based on the circuit scale of the hardware circuit 20 of the device (BorC) to be processed next, the hardware circuit 20 of the device (BorC) optimizes the device (AorD) busy. It is determined whether or not hardware information can be realized in hardware.
As a result, when it is determined that the hardware information of the busy state device (AorD) can be hardwareized by the hardware circuit 20 of the device (BorC) to be processed next (Yes), The process proceeds to step S126, and the device (BorC) is determined as the transmission destination of the optimization information for the busy device. Then, the process proceeds to step S118 and the optimization information of each device 300 is transmitted, and the process ends. However, when it is determined that hardware is impossible (Yes), the process proceeds to the next determination step S128.

  In step S128, it is detected whether there is any other device that can be hardware-optimized optimization information for busy devices. If it is determined to be “Yes” (Yes), the process returns to step S122 and the same. If it is determined that there is no (No), the original busy device is determined as the transmission destination of the optimization information for the busy device, and the process proceeds to step S118. Then, the optimization information of each device is transmitted, and the process ends.

  That is, when it is determined that the rewriting process of the hardware circuit 20 of the other device 300 is finished before the rewriting process of the hardware circuit 20 of the busy device 300 is enabled, the device whose rewriting process is finished first. When the remaining capacity of the hardware circuit 20 of 300 is calculated and the optimization information of the busy device 300 can be rewritten, the hardware circuit 20 of the device 300 that finishes the rewriting process before that is busy. The optimization information of the device 300 is rewritten, and if impossible, the optimization information for the device 300 is transmitted to the busy device 300 in principle. As a result, the rewriting process of the hardware circuit of the entire network system 100 can be completed in a short time. In addition, since the optimization information can be transmitted at an appropriate timing, it is possible to avoid inconveniences such as the fact that some devices 300 are not implemented as hardware, and the appropriate hardware with a good balance of the entire network system 100. Can be realized. Moreover, even if any device 300 in the system 100 is in operation (busy), an accurate hardware process can be performed.

  Then, as shown in FIG. 8, each device (optimization information receiving means 24) 300, when the original processing of the device 300 such as printing processing is completed, is optimized from the host computer 200 in the first step S132. When it is determined that the optimization information has been received in the next step S134 (Yes), the hardware rewriting means 22 rewrites the rewritable hardware circuit 20 according to the optimization information. It will be.

In FIG. 11, since it is determined that the printing processing of the busy devices A and D is finished before the hardware implementation of the devices B and C is finished (T1 <T2), each device is as originally planned. A state in which optimization information including modules a, b, c, and d is transmitted to A to D, respectively.
FIG. 12 shows that only the device D is busy, the hardware implementation of the device A is completed before the processing is completed, and there is a sufficient remaining capacity of the hardware circuit 20. The module d included in the optimization information of D is shown in a hardware state in the hardware circuit 20 of the device A. FIG. 13 also shows that there are also five devices A to E, only the device E is busy, and the hardware implementation of the device D is completed before the processing is completed. The modules c and d included in the optimization information of the device E are converted into hardware in the hardware circuit 20 of the device D.

Next, FIGS. 14 to 19 show the second and third embodiments of the present invention.
FIG. 15 is a block diagram showing a second embodiment of the network device system 100 according to the present invention.
As shown in the figure, in this embodiment, a rewrite timing determining means 26 is newly provided on the device 300 side in place of the transmission timing determining means 16 employed in the host computer 200 in the first embodiment.

FIGS. 16 and 17 are flowcharts showing an example of the flow of processing when the rewrite timing determining means 26 is newly added to the device 300 side as described above.
First, as shown in FIG. 16, in this embodiment, the processing on the host computer 200 side is almost the same as in the first embodiment, and it is determined in step S110 that T1> T2 is not satisfied (No ), The process of determining the transmission timing of the optimization information for each device 300 is omitted as in step S120 of the first embodiment, and the process jumps directly to step S118.

  That is, in the present embodiment, when it is determined that the hardware circuit 20 of the busy device 300 is rewritable before the hardware of the device 300 that has been previously hardwareized is finished, Without waiting for the hardware circuit 20 of the busy device 300 to be rewritable, the optimization information for the device 300 is immediately sent to the busy device 300.

  Then, as shown in FIG. 17, each device (optimization information receiving means 24) 300 is in a waiting state for receiving optimization information from the host computer 200 in the first step S132, and in the next step S134. When it is determined that the optimization information has been received (Yes), the process proceeds to the next step S138, and whether or not it is in a busy state, that is, whether or not the process inherent to the device 300 such as the printing process is being executed. Judge whether or not.

  In this step S138, when it is determined that it is “not busy” (No), it jumps to step S142 as it is, but when it is determined that it is “busy” (Yes), the process proceeds to the next step S140, and The rewrite timing determining means 26 calculates the time when the original processing of the device 300 ends, that is, the time (T3) when the hardware circuit 20 of the device 300 can be rewritten, and determines the rewrite timing of the hardware circuit 20. To do.

Then, when the rewriting timing of the own hardware circuit 20 is determined in this way, the hardware rewriting means 22 rewrites the self-rewritable hardware circuit 20 according to the optimization information.
As a result, the host computer 200, as a rule, transmits optimization information to each device 300, so that hardware is performed at an appropriate timing on each device 300 side. The load required for the calculation for determining the information transmission timing is reduced, and the processing on the host computer 200 side can be performed more quickly.

Next, FIG. 18 and FIG. 19 are flowcharts showing the third embodiment of the present invention, giving each device 300 a right to refuse hardware, and from each device 300 rejecting hardware. An example of the flow of processing of the host computer 200 at that time is shown.
18 shows the flow of processing on the host computer 200 side, and FIG. 19 shows the flow of processing on the device 300 side.

  First, as shown in FIG. 18, in the host computer 200, when rewriting the hardware circuit 20 of the device 300, the status information of all the devices 300 is acquired in the first step S200, and then the next processing is performed. In step S202, optimization information for each device 300 is created from the circuit scales of all devices 300. At this time, the host computer 200 creates optimization information including an appropriate module for each device 300 without considering the circuit scale of the hardware circuit 20 of each device 300.

Next, the process proceeds to step S204, and the optimization information created for each device 300 is determined as the transmission destination device for each device 300, and then the process proceeds to step S206 to transfer the optimization information to each device 300. Send.
On the other hand, as shown in FIG. 19, when each device 300 is in a waiting state for receiving optimization information from the host computer 200 in the first step S132, it is determined that the optimization information has been received in the next step S134. In (Yes), the process proceeds to the next determination step S144, and it is determined whether or not the hardware circuit 20 of the own hardware circuit can be realized by the optimization information.

  That is, when it is determined that the capacity of its own hardware circuit 20 is sufficient compared to the capacity of the module sent together with the optimization information, and hardware processing according to the optimization information is possible (Yes ) Goes to the next step S146 to execute the hardware processing, but on the contrary, the hardware circuit 20 of its own is compared with the capacity of the module sent together with the optimization information. When it is determined that the hardware processing according to the optimization information is not possible due to a lack of capacity (No), the process proceeds to step S148 and the hardware processing based on the optimization information is performed at all. Instead, the processing is terminated after notifying the host computer 200 of hardware rejection.

  Then, the host computer 200 monitors whether there is a hardware rejection notification from each device 300 in step S208 of FIG. 18, and when it is determined that there is no hardware rejection notification (No). However, if it is determined that the notification of hardware denial has been received, the process proceeds to the next step S210, and among the other devices 300 that have not received the hardware denial notification, After calculating the device 300 that is determined to be hardware-completed, the process proceeds to the next step S212, and the optimization information sent to the device 300 that has been notified of the hardware-ization rejection is transmitted to the device 300. To do.

  In the next step S214, it is monitored whether or not there is a hardware rejection notification from the device 300. When it is determined that there is no rejection notification (No), the device 300 rejects the hardware rejection. When it is determined that the hardware can be realized by the optimization information for the device 300 that has been notified and the processing is terminated as it is, when it is determined again that the device 300 has notified that the hardware is rejected (Yes) After moving to the next step S216 and calculating the device 300 that is determined to be the next hardware out of the other devices 300 that have not been notified of the hardware denial as in step S210, The process proceeds to the next step S218, and the device 3 in which the device 300 has been notified of the rejection of hardware implementation To send the optimization information sent to 0.

  Thereafter, the process proceeds to step S220, where it is monitored whether there is a hardware rejection notification from the device 300 as in step S214. When it is determined that there is no rejection notification (No), the device 300 Then, it is determined that the hardware can be realized based on the optimization information for the device 300 that has been notified of the hardware rejection, and the processing is terminated as it is. However, the device 300 is notified of the hardware rejection again. If it is determined (Yes), the process returns to step S216 to calculate the next device 300 for which hardware implementation is completed and transmit the optimization information to the device 300. When the hardware is rejected one after another in this way and the device 300 that can be hardware is not found, the optimization information is discarded and the host computer 200 is notified of that and processing is performed. Will end.

  As described above, in the present embodiment, appropriate optimization information is transmitted to the appropriate device 300 for the time being without considering the circuit scale of the hardware circuit 20, and only the optimization information for which hardware implementation has been rejected is transmitted. Since transmission to another device 300 is performed again, it is not necessary to calculate the circuit scale for each device 300 and create optimization information corresponding to the circuit scale, and the entire network device system 100 can be efficiently processed. Hardware rewrite processing can be achieved.

In particular, the present embodiment can exert a remarkable effect when the number of devices 300 to be hardware-implemented is large or the capacity of the hardware circuit 20 is sufficient as in the latest device. it can.
In FIG. 14, optimization information including modules a, b, c, and d is created for devices A, B, C, and D, respectively. As a result of transmission, as for devices A, B, and C, Although the hardware implementation by the modules a, b, and c was not rejected, the device D shows a state in which the hardware implementation by the module d is rejected. In this case, the host computer 200 selects the device whose hardware is completed the earliest among the devices A, B, and C, and transmits the optimization information including the module d to the device.

It is a figure which shows one Embodiment of a network device system. It is a figure which shows the hardware constitutions of a host computer. It is a figure which shows the hardware constitutions of a device. It is a figure which shows the example of the module applied to a device (printer). It is a figure which shows the relationship between the module applied to a device (printer), and hardware circuit capacity | capacitance. It is a figure which shows the flow of a process of the host computer which concerns on 1st Embodiment. It is a figure which shows the flow of a process of the host computer which concerns on 1st Embodiment. It is a figure which shows the flow of a process of the device which concerns on 1st Embodiment. It is a figure which shows an example of a structure of a network device system. It is a figure which shows the state in which some devices of a network device system are a busy state. It is a figure which shows the state which hardware-ized each device of the network device system as planned. It is a figure which shows the state which made the module for the one part device of a network device system into the hardware of another device. It is a figure which shows the state which made the module for the one part device of a network device system into the hardware of another device. It is a figure which shows the state in which some devices of a network device system cannot be hardware-ized. It is a figure which shows 2nd Embodiment of a network device system. It is a figure which shows the flow of a process of the host computer which concerns on 2nd Embodiment. It is a figure which shows the flow of a process of the device which concerns on 2nd Embodiment. It is a figure which shows the flow of a process of the host computer which concerns on 3rd Embodiment. It is a figure which shows the flow of a process of the device which concerns on 3rd Embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 100 ... Network device system, 200 ... Host computer, 300 (AD) ... Device, 10 ... Status information acquisition means, 12 ... Optimization information generation means, 14 ... Transmission destination device determination means, 16 ... Transmission timing determination means, 18 ... optimization information transmitting means, 20 ... rewritable hardware circuit, 22 ... hardware circuit rewriting means, 24 ... optimization information receiving means (status information transmitting means), 26 ... rewrite timing means, 40 ... CPU, 41 ... RAM, 42 ... ROM, 43 ... storage device, 44 ... output device, 45 ... input device, 46 ... interface, 47 ... bus, 48 ... operation panel, 49 ... printing mechanism, M1 to M6 (a, b, c, d) Module, N ... Network.

Claims (17)

A network device system in which a host computer and a plurality of devices each having a rewritable hardware circuit are connected so as to be able to communicate information,
The host computer
Based on the status information of each device obtained by the status information obtaining means, the status information obtaining means for obtaining the status information of each device, and the optimization information including the module for rewriting the rewritable hardware circuit for each device. Optimization information generating means to be generated, a destination device determining means for determining a device that actually transmits the optimization information generated by the optimization information generating means, and a device determined by the destination device determining means Optimization information transmitting means for transmitting optimization information created for each device by the optimization information generating means, and transmission timing determining means for determining timing for transmitting the optimization information from the optimization information transmitting means And having
Each device is
Optimization information receiving means for receiving optimization information transmitted from the optimization information transmitting means, and hardware rewriting for rewriting the rewritable hardware circuit based on the optimization information received by the optimization information receiving means And a network device system. A network device system in which a host computer and a plurality of devices each having a rewritable hardware circuit are connected so as to be able to communicate information,
The host computer
Based on the status information of each device obtained by the status information obtaining means, the status information obtaining means for obtaining the status information of each device, and the optimization information including the module for rewriting the rewritable hardware circuit for each device. Optimization information generating means to be generated, a destination device determining means for determining a device that actually transmits the optimization information generated by the optimization information generating means, and a device determined by the destination device determining means Optimization information transmitting means for transmitting optimization information created for each device by the optimization information generating means,
Each device is
Optimization information receiving means for receiving optimization information transmitted from the optimization information transmitting means, and hardware rewriting for rewriting the rewritable hardware circuit based on the optimization information received by the optimization information receiving means And a rewrite timing determining means for determining a rewrite timing of the hardware circuit by the hardware rewriting means. A hardware rewriting program used in a system in which a host computer and a plurality of devices having a rewritable hardware circuit are connected to be able to communicate information over a network,
The host computer,
Based on the status information of each device obtained by the status information obtaining means, the status information obtaining means for obtaining the status information of each device, and the optimization information including the module for rewriting the rewritable hardware circuit for each device. Optimization information generating means to be generated, a destination device determining means for determining a device that actually transmits the optimization information generated by the optimization information generating means, and a device determined by the destination device determining means Optimization information transmitting means for transmitting optimization information created for each device by the optimization information generating means, and transmission timing determining means for determining timing for transmitting the optimization information from the optimization information transmitting means And make it work,
A computer for each device;
Optimization information receiving means for receiving optimization information transmitted from the optimization information transmitting means, and hardware rewriting for rewriting the rewritable hardware circuit based on the optimization information received by the optimization information receiving means And a hardware rewriting program that functions as a means. A module that connects a host computer and a plurality of devices each having a rewritable hardware circuit so as to be capable of information communication, and includes a module that rewrites the rewritable hardware circuit for each device from the host computer to each device. A hardware rewriting method for a network device system that transmits optimization information to optimize the entire network device system,
The host computer
Obtain status information of each device, generate the optimization information based on the status information, determine a device that actually transmits the optimization information, and then send the optimization information to each device And
Each device is
A hardware rewriting method for a network device system, wherein a self-rewritable hardware circuit is rewritten based on optimization information transmitted from the host computer. A host computer connected to a plurality of devices having rewritable hardware circuits so as to be able to communicate information,
Based on the status information of each device obtained by the status information obtaining means, the status information obtaining means for obtaining the status information of each device, and the optimization information including the module for rewriting the rewritable hardware circuit for each device. Optimization information generating means to be generated, a destination device determining means for determining a device that actually transmits the optimization information generated by the optimization information generating means, and a device determined by the destination device determining means The host computer further comprises optimization information transmitting means for transmitting optimization information created for each of the devices by the optimization information generating means. A host computer according to claim 5,
A host computer further comprising transmission timing determining means for determining a timing for transmitting the optimization information from the optimization information transmitting means. The host computer according to claim 5 or 6,
The status information is
At least information on the circuit scale of the rewritable hardware circuit of the device, information on whether or not the hardware circuit is in a rewritable state, and rewritable when the hardware circuit is not in a rewritable state And a host computer characterized in that it includes information about the time until. The host computer according to any one of claims 5 to 7,
The transmission destination device determination means includes
Of each of the devices, the total time of the module transmission time for the device in which the hardware circuit is in a rewritable state and the hardware rewrite processing time of the device by the transmitted module,
When the hardware circuit is longer than the waiting time until a device that is not in a rewritable state becomes rewritable,
A host computer characterized in that a device in which the hardware circuit is not in a rewritable state is determined as a transmission destination of the optimization information. The host computer according to any one of claims 5 to 7,
The transmission destination device determination means includes
Of each of the devices, the total time of the module transmission time for the device in which the rewritable hardware circuit is in a rewritable state and the hardware rewrite processing time of the device by the transmitted module,
When the hardware circuit is shorter than the wait time until a device that is not in a rewritable state becomes rewritable,
As a transmission destination of optimization information transmitted to a device in which the hardware circuit is not in a rewritable state, one of the devices in which the hardware circuit is in a rewritable state is determined. A featured host computer. The host computer according to any one of claims 5 to 7,
The transmission destination device determination means includes
Of each of the devices, the total time of the module transmission time for the device in which the hardware circuit is in a rewritable state and the hardware rewrite processing time of the device by the transmitted module,
When the hardware circuit is shorter than the wait time until a device that is not in a rewritable state becomes rewritable,
As a transmission destination of a module included in optimization information transmitted to a device in which the hardware circuit is not in a rewritable state, a rewritable hardware circuit by the module from among devices in which the hardware circuit is in a rewritable state And a host computer that determines the device for which the hardware circuit rewriting process is completed earliest. The host computer according to claim 6.
The transmission timing determining means includes
When the optimization information is transmitted to a device in which the hardware circuit is not in a rewritable state, the optimization information is transmitted in accordance with the timing at which the hardware circuit of the device is in a rewritable state based on the status information. A host computer characterized by The host computer according to any one of claims 5 to 11,
The optimization information generating means includes
When information indicating that the optimization information is rejected from any of the devices is received, status information is again obtained from all devices, and new optimization information is created based on the status information. A host computer characterized by A network device having a rewritable hardware circuit and connected to a host computer through a network so as to be able to communicate information,
Status information transmitting means for transmitting own status information to the host computer, optimization information receiving means for receiving optimization information transmitted from the host computer, and optimization information received by the optimization information receiving means Hardware rewriting means for rewriting the hardware circuit based on the network device. The network device according to claim 13.
A network device, further comprising: a rewriting timing determining unit that determines a rewriting timing of the rewritable hardware circuit by the hardware rewriting unit. The network device according to claim 14, wherein
The rewrite timing determining means includes
If the hardware circuit of the device is not in a rewritable state when the optimization information is transmitted, the hardware circuit by the hardware rewriting means waits for the hardware circuit of the device to be in a rewritable state. A network device characterized in that it determines the rewriting timing. The network device according to any one of claims 13 to 15,
The hardware rewriting means is:
A network device characterized by further having a function of transmitting information indicating that the optimization information is rejected to the host computer when the capacity of the hardware circuit of the device is insufficient. The network device according to claim 13.
A network device, further comprising: a printing unit that executes printing based on a printing instruction from the host computer.

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