JP2005260076A - Solid-state imaging device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a step of a polysilicon film constituting a transfer gate electrode and a transfer gate wiring, and to disconnect or connect a silicide film formed on an insulating protective film and a silicide film formed on a transfer gate electrode. Suppressing high resistance due to defects.
A solid-state imaging device includes a semiconductor substrate 1 having a photoelectric conversion region 11, a detection capacitor region 31, and an element isolation region 41, an insulating film 3 formed on the semiconductor substrate 1, and a transfer gate electrode 4a. And an insulating protection part 2, a transfer gate wiring formed on the insulating protection part 2, and a transfer gate silicide film 5a, with the upper surface of the semiconductor substrate 1 below the insulating protection part 2 as a reference surface. The height from the upper surface of the transfer gate electrode 4a to the upper surface of the transfer gate electrode 4a is higher than the height from the reference surface to the upper surface of the insulation protection part 2, and the step between the upper surface of the transfer gate electrode 4a and the upper surface of the transfer gate wiring is It is set as the structure smaller than the level | step difference of the lower surface of and the upper surface of the insulation protection part 2.
[Selection] Figure 1

Description

  The present invention relates to a solid-state imaging device. The present invention also relates to a camera equipped with a solid-state imaging device and a camera system equipped with the solid-state imaging device.

  Conventionally, a semiconductor device such as a solid-state imaging device has an element isolation structure that prevents electrical interference between a plurality of functional elements constituting the semiconductor device. In general, an element isolation structure (also referred to as an element isolation portion) of a semiconductor device is formed using an element isolation technique such as an STI (Shallow Trench Isolation) technique or a LOCOS (Local Oxidation of Silicon) technique.

  However, when the LOCOS technique or the STI technique is used, stress is generated between the semiconductor substrate (for example, Si substrate) and the element isolation region, and a defect is generated by the stress. In particular, in a MOS type solid-state imaging device, a dark current is generated due to the defect, and the dark current leaks into the photodiode, thereby increasing a noise component with respect to accumulated charges in the photodiode (S / N ratio is deteriorated). (For example, refer nonpatent literature 1). As a result, the image quality of the MOS type solid-state imaging device has deteriorated.

  Therefore, in recent years, element isolation by ion implantation has been proposed as a low defect element isolation technique. In this low-defective element isolation technique, in order to protect the element isolation region from ion implantation in a later process, it is necessary to form an insulating protection portion having a film thickness (about 100 to 300 nm) on the element isolation region. It was.

  Here, a conventional typical solid-state imaging device will be described with reference to FIGS. FIG. 11 is a schematic cross-sectional view showing a configuration of a conventional typical solid-state imaging device. 12A and 12B show the configuration of a portion (near the boundary between the element separating portion and the light detecting portion) different from the portion shown in FIG. 11 in a typical conventional solid-state imaging device. It is a typical sectional view showing. 12A and 12B are cross-sectional views along a direction perpendicular to the paper surface of FIG. 12A shows the solid-state imaging device shown in FIG. 11 (when the thickness of the polysilicon film 104 is smaller than the thickness of the element isolation portion 102), and FIG. 12B shows the transfer. The gate electrode, the gate electrode, the transfer gate electrode, and the polysilicon film constituting the gate electrode are different from those in FIGS. 11 and 12A in which the thickness of the polysilicon film is smaller than that of the insulating protective film.

  The solid-state imaging device illustrated in FIG. 11 includes a semiconductor substrate 101, a light detection unit 107, a transistor unit 108, and an element isolation unit 109 that electrically isolates the light detection unit 107 and the transistor unit 108.

  The light detection unit 107 includes a photodiode having a photoelectric conversion region 111 formed in the semiconductor substrate 101 and a surface layer 121 having a different conductivity type, a detection capacitance region 131 formed in the semiconductor substrate 101, The transfer gate electrode 104a made of polysilicon (a part of the polysilicon film 104) for transferring the charge generated by the photodiode to the detection capacitor region 131 and the silicide film 105a (silicide) formed on the transfer gate electrode 104a Part of the film 105).

  The transistor unit 108 is provided on the semiconductor substrate 101 between the source region 151 formed inside the semiconductor substrate 101, the drain region 161 formed inside the semiconductor substrate 101, and the source region 151 and the drain region 161. The polysilicon gate electrode 104b (a part of the polysilicon film 104) and a silicide film 105b (a part of the silicide film 105) formed on the gate electrode 104b are formed.

  The element isolation unit 109 includes an element isolation region 141 formed inside the semiconductor substrate 101 and an insulating protection unit 102 provided on the semiconductor substrate 101 and disposed above the element isolation region 141. In the element isolation region 141, ions for forming the element isolation region 141 are implanted around the implantation position (a broken line inside the element isolation region 141 in FIG. 11). Here, the implantation position means the depth position of the maximum concentration in the concentration distribution of implanted ions.

  The solid-state imaging device shown in FIG. 11 further includes a gate insulating film 103 for electrically insulating the transfer gate electrode 104a of the light detection unit 107 and the gate electrode 104b of the transistor unit 108 from the semiconductor substrate 101. Yes.

  Further, as shown in FIGS. 12A and 12B, on the element separation unit 102, in order to distribute a signal across the element separation unit 109 to the transfer gate electrode 104 a of the light detection unit 107, A transfer gate wiring 104c (a part of the polysilicon film 104) and a silicide film 105a on the transfer gate wiring are formed, and a signal is distributed to the gate electrode 104b of the transistor section 108 beyond the element isolation section 109. A gate wiring (not shown) (a part of the polysilicon film 104) is formed.

In the solid-state imaging device shown in FIGS. 11 and 12A and 12B, the transfer gate electrode 104a and the polysilicon film 104 on the element isolation region are formed to have the same film thickness. The film 105 was formed on the surface of the polysilicon film 104 by performing heat treatment after depositing a metal such as titanium, cobalt, or nickel on the entire surface of the semiconductor substrate 101 on the polysilicon film 104.
IEEE Transactions on Electron Device 1999, vol.43, 1989-1993

  However, in the conventional typical solid-state imaging device described above, a silicide film is formed because there is a step in the polysilicon film at the boundary between the element isolation part and the other region part (for example, the light detection part or the transistor part). The metal for forming becomes difficult to deposit on the step part (inclined part). Therefore, it is difficult to form the silicide film 105 at the stepped portion, resulting in disconnection and high resistance. In particular, the configuration shown in FIG. 12A further increases the possibility of disconnection.

  Therefore, in the present invention, the level difference of the polysilicon film constituting the transfer gate electrode and the transfer gate wiring at the boundary between the element isolation part and the photodetection part is reduced, and disconnection and high resistance of the silicide film are suppressed.

  In order to solve the above problems, a solid-state imaging device according to the present invention generates a charge by receiving external light and accumulates the charge, and is formed separately from the photoelectric conversion area. A semiconductor substrate having a detection capacitor region, a photoelectric conversion region and an element isolation region formed in a region different from the detection capacitor region, an insulating film formed on the semiconductor substrate, and between the photoelectric conversion region and the detection capacitor region A polysilicon transfer gate electrode that controls the transfer of charge from the photoelectric conversion region to the detection capacitor region and an element isolation region are formed on the element isolation region through an insulating film to protect the element isolation region. An insulation protection portion to be formed, a transfer gate wiring made of polysilicon electrically connected to the transfer gate electrode, formed on the insulation protection portion, and formed on the transfer gate electrode and the transfer gate wiring. And a transfer gate silicide film in contact with the surface of the transfer electrode and the surface of the transfer gate wiring, wherein the upper surface of the semiconductor substrate under the insulation protection portion is used as a reference surface and from the reference surface to the upper surface of the transfer gate electrode Is higher than the height from the reference surface to the upper surface of the insulation protection portion, and the step between the upper surface of the transfer gate electrode and the upper surface of the transfer gate wiring is a step between the lower surface of the transfer gate electrode and the upper surface of the insulation protection portion. It is characterized by being smaller.

  In order to solve the above problems, a camera according to the present invention includes an imaging unit that converts external light into electric charges to generate an imaging signal, a light control unit that controls external light incident on the imaging unit, and an imaging unit. An imaging signal processing unit that converts an imaging signal from a video signal into a video signal and a video information holding unit that holds video information based on the video signal from the imaging signal processing unit. The solid-state image sensor concerning this is provided, It is characterized by the above-mentioned.

  In order to solve the above problems, a camera system according to the present invention includes an imaging unit that converts external light into electric charges to generate an imaging signal, a light control unit that controls the incidence of external light on the imaging unit, An imaging signal processing unit that converts an imaging signal from the imaging unit into a video signal, a video information holding unit that holds video information based on the video signal from the imaging signal processing unit, and a video that is held in the video information holding unit A camera system comprising: a video signal processing unit that converts information into a video signal; and a display unit that displays video based on a video signal from at least one of the imaging signal processing unit and the video signal processing unit. The unit includes the solid-state imaging device according to the present invention.

  In order to solve the above problems, a method of manufacturing a solid-state imaging device according to the present invention includes a step of forming an insulating protection part on a semiconductor substrate and a step of forming an insulating film on an exposed surface of the semiconductor substrate. A step of forming an element isolation region by ion implantation inside the semiconductor substrate under the insulation protection portion; a step of forming a photoelectric conversion region by ion implantation inside the semiconductor substrate; and a step above the insulating film and the insulation protection portion. In addition, a polysilicon film forming step for forming a polysilicon film, a patterning step for patterning the polysilicon film to form a transfer gate electrode and a transfer gate wiring, and a detection capacitance region by ion implantation inside the semiconductor substrate. A step of forming, a step of forming a metal film on the transfer gate electrode and the transfer gate wiring, and a heat treatment of the transfer gate electrode, the transfer gate wiring and the metal film. Forming a silicide film by combining a substance constituting the transfer gate electrode and the transfer gate wiring and a substance constituting the metal film, and a method for manufacturing a solid-state imaging device, comprising: The method further includes a step of planarizing the upper surface of the polysilicon film between the patterning step, and the polysilicon film forming step includes forming the polysilicon film thicker than the step from the upper surface of the insulating film to the upper surface of the insulating protection portion. Features. Hereinafter, this manufacturing method is also referred to as manufacturing method A.

  In order to solve the above problems, a method of manufacturing a solid-state imaging device according to the present invention includes a step of forming an insulating protection part on a semiconductor substrate and a step of forming an insulating film on an exposed surface of the semiconductor substrate. A step of forming an element isolation region by ion implantation inside the semiconductor substrate under the insulation protection portion, a step of forming a photoelectric conversion region by ion implantation inside the semiconductor substrate, and a step on the insulating film and the insulating protection film. In addition, a polysilicon forming process for forming a polysilicon film, a metal film forming process for forming a metal film on the polysilicon film, and a material and a metal constituting the polysilicon film by heat-treating the polysilicon film and the metal film. A silicide film forming step of combining a substance constituting the film to form a silicide film, and patterning the polysilicon film and the silicide film to transfer the transfer gate electrode and the transfer gate; A method for manufacturing a solid-state imaging device, comprising: a step of forming a silicide film for wiring and transfer gates; and a step of forming a detection capacitance region by ion implantation inside a semiconductor substrate. The method further includes a step of planarizing the upper surface of the polysilicon film between the film forming step, and in the polysilicon film forming step, the polysilicon film is formed thicker than the step from the upper surface of the insulating film to the upper surface of the insulating protection portion. It is characterized by. Hereinafter, this manufacturing method is also referred to as manufacturing method B.

  In order to solve the above-described problems, a method for manufacturing a solid-state imaging device according to the present invention includes a step of forming an insulating film on a semiconductor substrate, a step of forming an insulating protection portion on the insulating film, and an insulating protection. A step of forming an element isolation region by ion implantation inside the semiconductor substrate under the film, a step of forming a photoelectric conversion region by ion implantation inside the semiconductor substrate, and a polycrystal on the insulating film and the insulating protective film. A polysilicon film forming step for forming a silicon film, a patterning step for patterning the polysilicon film to form a transfer gate electrode and a transfer gate wiring, and a step for forming a detection capacitance region in the semiconductor substrate by ion implantation A step of forming a metal film on the transfer gate electrode and the transfer gate wiring, and heat-treating the transfer gate electrode, the transfer gate wiring and the metal film by heat treatment. A process for forming a silicide film by combining a substance constituting a gate wiring and a substance constituting a metal film, and a method for manufacturing a solid-state imaging device between the polysilicon film forming process and the patterning process. The method further includes a step of planarizing the upper surface of the polysilicon film, and the polysilicon film forming step is characterized in that the polysilicon film is formed thicker than the insulating protection portion. In the following, this manufacturing method is also referred to as manufacturing method C.

  In order to solve the above-described problems, a method for manufacturing a solid-state imaging device according to the present invention includes a step of forming an insulating film on a semiconductor substrate, a step of forming an insulating protection portion on the insulating film, and an insulating protection. A step of forming an element isolation region by ion implantation inside the semiconductor substrate under the film, a step of forming a photoelectric conversion region by ion implantation inside the semiconductor substrate, and a polycrystal on the insulating film and the insulating protective film. A polysilicon film forming step for forming a silicon film, a metal film forming step for forming a metal film on the polysilicon film, and a material and a metal film constituting the polysilicon film by heat-treating the polysilicon film and the metal film. Combining the constituent materials to form a silicide film, patterning the polysilicon film and the silicide film, and forming a transfer gate electrode, transfer gate wiring, and transfer gate silicide film And a step of forming a detection capacitance region by ion implantation inside the semiconductor substrate, the method of manufacturing a solid-state imaging device, wherein the polysilicon is formed between the polysilicon film forming step and the metal film forming step. The method further includes a step of planarizing the upper surface of the film, and the polysilicon film forming step is characterized in that the polysilicon film is formed thicker than the insulating protection portion. In the following, this manufacturing method is also referred to as manufacturing method D.

  In the solid-state imaging device according to the present invention, the step between the transfer gate electrode and the transfer gate wiring can be reduced, so that the disconnection between the silicide film formed on the insulating protective film and the silicide film formed on the transfer gate electrode is achieved. Further, it is possible to suppress an increase in resistance due to poor connection.

  Further, according to the method for manufacturing a solid-state imaging device according to the present invention, the yield of the silicide film can be prevented and the yield can be improved, and the mass productivity can be improved.

  Also, with the camera and camera system according to the present invention, the image quality can be improved by being able to extract signals uniformly regardless of the pixel position in the built-in solid-state imaging device of the present invention.

  As described above, the solid-state imaging device according to the present invention includes a semiconductor substrate having a photoelectric conversion region, a detection capacitor region, and an element isolation region formed therein, an insulating film, a transfer gate electrode made of polysilicon, and insulation protection. And a transfer gate wiring made of polysilicon and a transfer gate silicide film. In the solid-state imaging device, the height from the reference surface to the upper surface of the transfer gate electrode is higher than the height from the reference surface to the upper surface of the insulation protection unit, and the upper surface of the transfer gate electrode and the upper surface of the transfer gate wiring This step is smaller than the step between the lower surface of the transfer gate electrode and the upper surface of the insulation protection portion.

  In the solid-state imaging device according to the present invention, the insulating film is a substantially uniform flat film having a thickness that further covers the photoelectric conversion region, the detection capacitor region, and the element isolation region, and the insulating protection portion is interposed through the insulating film. The transfer gate electrode formed on the semiconductor substrate can be thicker than the insulation protection portion. With this configuration, the stress between the insulating film and the semiconductor substrate can be reduced as compared with the case where the insulating film is partially formed (when the STI technique or the LOCOS technique is used). That is, it is possible to reduce generation of dark current that degrades image quality. Here, the substantially uniform flat film means a film manufactured without intentionally changing the film thickness, and implies a film having non-uniformity of an error level in manufacturing.

  In the solid-state imaging device according to the present invention, the height from the reference surface to the upper surface of the transfer gate line is higher than the height from the reference surface to the upper surface of the transfer gate electrode, and the upper surface of the transfer gate line and the upper surface of the transfer gate electrode A configuration in which the difference in height is within a range of 50 nm or less is preferable. This is because if the height difference between the upper surface of the transfer gate wiring and the upper surface of the transfer gate electrode is within a range of 50 nm or less, disconnection of the silicide film can be satisfactorily suppressed. Note that the smaller the difference in height between the upper surface of the transfer gate wiring and the upper surface of the transfer gate electrode, the better the silicide film can be formed at the step portion at the junction.

  In the solid-state imaging device according to the present invention, it is more preferable that the height from the reference surface to the upper surface of the transfer gate wiring is substantially the same as the height from the reference surface to the upper surface of the transfer gate electrode. This is because a step does not substantially occur between the upper surface of the transfer gate wiring and the upper surface of the transfer gate electrode, so that a transfer gate silicide film can be formed on those surfaces very well. Here, “the heights are substantially the same” means that the heights are not intentionally different, and it means that there may be a height difference of a manufacturing error.

  In the solid-state imaging device according to the present invention, it is preferable that the material constituting the transfer gate electrode and the material constituting the transfer gate wiring are the same. The transfer gate electrode and the transfer gate wiring can also be formed collectively. When these are formed in a lump, the occurrence of disconnection or the like due to the patterning error between the transfer gate electrode and the transfer gate wiring can be suppressed when patterning is performed, compared with the case where they are formed individually.

  In the solid-state imaging device according to the present invention, the semiconductor substrate further includes a source region and a drain region which are formed in regions different from the photoelectric conversion region, the detection capacitor region, and the element isolation region, and are separated from each other. A gate electrode formed through an insulating film on a region between the gate electrode, a gate wiring formed on the insulation protection portion and electrically connected to the gate electrode, and formed on the gate electrode and the gate wiring. And a gate silicide film in contact with the surface of the gate electrode and the surface of the gate wiring.

  In the solid-state imaging device according to the present invention, it is preferable that each of the gate electrode and the gate wiring is a polysilicon film. With this configuration, a silicide film can be easily formed on the surfaces of the gate electrode and the gate wiring by performing a heat treatment after depositing a predetermined metal on the gate electrode and the gate wiring.

  In the solid-state imaging device according to the present invention, it is preferable that the material constituting the transfer gate electrode, the material constituting the transfer gate wiring, the material constituting the gate electrode, and the material constituting the gate wiring are the same. This is because the transfer gate electrode, the transfer gate wiring, the gate electrode, and the gate wiring can be formed together.

  In the solid-state imaging device according to the present invention, the thickness of the gate electrode is substantially the same as the thickness of the transfer gate electrode, and the thickness of the gate wiring is substantially the same as the thickness of the transfer gate wiring. can do. With this configuration, similarly to the transfer gate silicide film, disconnection and high resistance of the gate silicide film at the connection portion between the gate electrode and the gate wiring can be reduced.

  In the solid-state imaging device according to the present invention, the height from the reference surface to the upper surface of the transfer gate electrode, the height from the reference surface to the upper surface of the transfer gate wiring, the height from the reference surface to the upper surface of the gate electrode, and from the reference surface A configuration in which the height to the upper surface of the gate wiring is substantially the same is preferable. Since there is substantially no step between the upper surface of the transfer gate wiring and the upper surface of the transfer gate electrode and between the upper surface of the gate wiring and the upper surface of the gate electrode, the transfer gate silicide film and This is because a gate silicide film can be formed.

  Here, the camera and camera system according to the present invention will be described. The camera and camera system of the present invention may have any known configuration except that it includes the solid-state imaging device of the present invention. Specifically, as described above, the camera of the present invention is configured to include an imaging unit having the solid-state imaging device of the present invention, a light control unit, an imaging signal processing unit, and a video information holding unit. Further, as described above, the camera system of the present invention includes a solid-state imaging device of the present invention as an imaging unit, a light control unit, an imaging signal processing unit, a video information holding unit, a video signal processing unit, and a display. Part.

  The light control unit controls external light incident on the solid-state imaging device. Examples of the control in the light control unit include control of focal length (focus), intensity (exposure), and imaging allowable angle.

  The imaging signal processing unit converts the analog signal from the solid-state imaging device into a video signal that can be recorded in the video information holding unit. Therefore, the video signal is converted into a video signal suitable for the type of the video information holding unit. For example, conversion from an analog signal to a digital signal can be mentioned. Furthermore, you may have a signal amplifier which amplifies an analog signal before converting into a digital signal.

  The video information holding unit holds video information. Examples of the video information holding unit include a semiconductor memory, a magnetic recording medium, and an optical recording medium. In order to reduce the size of the camera, it is preferable to use a semiconductor memory. This is because a magnetic recording medium or an optical recording medium requires a device for controlling magnetism or light. The video information holding unit may be fixed to the camera and the camera system, or may be detachable. Furthermore, the video information holding unit preferably holds the video information in a format that can be read by a computer.

  The video signal processing unit converts the video signal that can be reproduced by the display unit, that is, the video signal suitable for the type of the display unit. In the video signal processing unit, the video signal may be generated based on the imaging signal from the solid-state imaging device, may be generated based on the video signal from the imaging signal processing unit, or from the video information holding unit. It may be generated based on video information. As the conversion in the video signal processing unit, for example, if the display unit is a digital device, it is converted into a digital signal of a specific format according to the display unit, and if the display unit is an analog device, an analog signal of the digital signal (video signal) ) Conversion. Furthermore, the video signal processing unit may have a function of performing color interpolation, color correction, contour correction, and the like.

  The display unit displays a video based on the video signal. Examples of the display unit include a CRT, a liquid crystal display device, and a plasma display device.

  In the camera and camera system of the present invention, the imaging unit and the imaging signal processing unit may be formed on the same substrate, or may be formed on different substrates. Furthermore, in the camera system, the video signal processing unit may be formed on the same substrate as the substrate on which the imaging unit and the imaging signal processing unit are formed. In addition, as long as the display unit is formed on the substrate, the display unit and the video signal processing unit may be formed on the same substrate, or may be formed on different substrates. Furthermore, in the camera system, the imaging signal processing unit may be formed on the same substrate as the substrate on which the display unit and the video signal processing unit are formed.

  In the manufacturing method A and C of the solid-state imaging device according to the present invention, a part of the insulating film is removed between the step of forming the detection capacitor region and the step of forming the metal film, and the semiconductor on the detection capacitor region The method further includes an exposing step of exposing the surface of the substrate. In the step of forming the metal film, the transfer gate electrode, the transfer gate wiring, and the exposed surface of the exposed semiconductor substrate are formed. In the step of forming the silicide film, the semiconductor substrate is formed. It is possible to apply a method in which the constituent substance and the constituent substance of the metal film are combined to further form a silicide film on the surface of the semiconductor substrate on the detection capacitor region. With this configuration, since the detection capacitor region and the silicide film form a capacitor element, the capacity that can be held can be increased.

  In the solid-state imaging device manufacturing methods A to D according to the present invention, a step of forming an insulating film for protecting the photoelectric conversion region on the photoelectric conversion region of the semiconductor substrate may be further performed. If it is this structure, it can suppress that the damage by another process reaches a photoelectric conversion area | region. Therefore, the photoelectric conversion characteristics in the photoelectric conversion region can be improved.

(Embodiment 1)
In the first embodiment, an embodiment of a solid-state imaging device according to the present invention will be described with reference to FIGS. FIG. 1 is a schematic cross-sectional view illustrating a configuration of a solid-state imaging device. FIG. 2 is a schematic cross-sectional view showing the vicinity of the junction between the transfer gate electrode and the transfer gate wiring in the solid-state imaging device. Note that the cross section shown in FIG. 2 is a cross section in a direction perpendicular to the paper surface of FIG. 1 of a portion different from the portion shown in FIG. 1 (near the junction between the transfer gate electrode and the transfer gate wiring). . 3A to 3D are schematic cross-sectional views for each process for explaining the former stage of the method for manufacturing the solid-state imaging device. 4A to 4E are schematic cross-sectional views for each process for explaining the latter stage of the method for manufacturing the solid-state imaging device.

  As shown in FIGS. 1 and 2, the solid-state imaging device according to the first embodiment includes a photoelectric conversion region 11, a surface layer 21, a detection capacitor region 31, an element isolation region 41, a source region 51, and a drain region 61. The semiconductor substrate 1 formed therein, the insulating protection portion 2, the insulating film 3, the transfer gate electrode 4a made of polysilicon, the transfer gate wiring 4c made of polysilicon, the silicide film 5a for transfer gate, A silicon gate electrode 4a, a polysilicon gate wiring (not shown), a gate silicide film 5b, a silicide film 5 formed on the detection capacitor region 31, the source region 51 and the drain region 61; And the insulating film 6 formed on the surface layer 21. The transfer gate electrode 4a made of polysilicon and the gate electrode 4b made of polysilicon have the same film thickness and are thicker than the film thickness of the insulation protection part 2. Further, the transfer gate wiring 4c made of polysilicon and the gate wiring made of polysilicon have the same film thickness, and the upper surfaces thereof are the same as the upper surfaces of the transfer gate electrode 4a made of polysilicon and the gate electrode 4b made of polysilicon. Of height.

  As shown in FIG. 2, in the solid-state imaging device according to the first embodiment, the transfer gate electrode made of polysilicon is formed at the junction between the transfer gate electrode 4a made of polysilicon and the transfer gate wiring 4c made of polysilicon. Since there is no step between the upper surface of 4a and the upper surface of the transfer gate wiring 4c made of polysilicon, the transfer gate silicide film 5a having a uniform thickness covering the junction is formed. Similarly, there is no step between the upper surface of the polysilicon gate electrode 4a and the upper surface of the polysilicon gate wiring at the junction between the polysilicon gate electrode 4b and the polysilicon gate wiring. A gate silicide film 5b having a uniform thickness covering the junction is formed.

  Here, a method for manufacturing the solid-state imaging device according to the first embodiment will be described. The manufacturing method in the first embodiment corresponds to the manufacturing method A described above.

  First, as shown in FIG. 3A, the insulating protection part 2 is formed on the semiconductor substrate 1 by using the lithography technique and the etching technique. Subsequently, an insulating film 3 is formed on the surface of the semiconductor substrate 1 exposed without forming the insulating protection portion 2. The insulating film 3 may be formed by depositing an insulating material on the entire surface and then patterning the deposited insulating material with the aid of lithography technology and etching technology, or by thermal oxidation, anodic oxidation, or the like. Good. Examples of the insulation protection unit 2 include a silicon oxide film, a silicon oxynitride film, and a silicon nitride film. Examples of the insulating film 3 include a silicon oxide film, a silicon oxynitride film, and a silicon nitride film.

  Next, as shown in FIG. 3B, an element isolation region 41 is formed by ion implantation in part of the semiconductor substrate 1 below the insulation protection portion 2. Subsequently, as shown in FIG. 3B, the photoelectric conversion region 11 is formed in a part of the inside of the semiconductor substrate 1 by ion implantation. In the photoelectric conversion region 11, ions are implanted after forming a patterned hard mask, and ions are implanted only into a region under the opening of the hard mask in the semiconductor substrate 1. Note that the element isolation region 41 and the photoelectric conversion region 11 may be formed in the reverse order.

  Next, as illustrated in FIG. 3C, a polysilicon film 4 is formed so as to cover the insulating protection portion 2 and the insulating film 3. The upper surface of the formed polysilicon film 4 is an uneven surface that substantially corresponds to the unevenness of the underlying layer.

  Next, as shown in FIG. 3D, the upper surface of the polysilicon film 4 is planarized. For the planarization of the polysilicon film 4, for example, a dry etching technique or a CMP planarization technique can be used.

  Next, as shown in FIG. 4A, the polysilicon film 4 is patterned using the lithography technique and the etching technique. Thereby, the transfer gate electrode 4a, the gate electrode 4b, the transfer gate wiring (not shown) and the gate wiring (not shown) are formed. It is preferable to use a dry etching technique for etching the polysilicon film 4. This is because when the dry etching is performed, the insulating film 3 functions as an etching stopper, so that the surface of the semiconductor substrate 1 can be prevented from being damaged by the etching.

  Next, as shown in FIG. 4B, the surface layer 21, the detection capacitor region 31, the source region 51, and the drain region 61 are formed in the semiconductor substrate 1 by ion implantation. Subsequently, the semiconductor substrate 1 is activated and annealed to recover damage to the semiconductor substrate 1 caused by ion implantation and to activate the implanted ions. The formation of the surface layer 21, the formation of the detection capacitor region 31, and the formation of the source region and the drain region may be performed collectively or individually. When performed individually, a hard mask having an opening is formed in advance on a region where ions are to be implanted, and then ion implantation is performed. After the ion implantation, the hard mask is removed.

  Next, as illustrated in FIG. 4C, the insulating film 6 that covers the surface of the semiconductor substrate 1 on the surface layer 21 is formed using the lithography technique and the etching technique. A part of the insulating film 6 also remains on the side surfaces of the transfer gate electrode 4a, the gate electrode 4b, the insulating protection portion 2, and the like to form a sidewall. Examples of the insulating film 6 include a silicon oxide film, a silicon oxynitride film, and a silicon nitride film. Further, as shown in FIG. 4C, the insulating film 3 formed on the surfaces of the detection capacitor region 31, the source region 51, and the drain region 61 is removed using the lithography technique and the etching technique. The formation of the insulating film 6 and the removal of part of the insulating film 3 may be performed in reverse order. The patterning of the insulating film 6 and the removal of a part of the insulating film 3 may be performed by continuous etching.

  Next, as shown in FIG. 4D, a metal material is deposited on the entire surface of the semiconductor substrate 1 to form a metal film 15. Here, the metal material is a material capable of forming a silicide by combining with polysilicon, for example, titanium, cobalt, and nickel.

  Next, after forming the metal film 15, heat treatment is performed to combine the patterned polysilicon film 4 and silicon constituting the semiconductor substrate 1 with the metal material constituting the metal film 15. A silicide film made of silicon and a metal material grows from the interface between the polysilicon film 4 and the metal film 15. Subsequently, the unreacted metal material (metal film 15) on the surface layer remaining without combining is removed. Thereby, as shown in FIG. 4E, the silicide film 5 (including the transfer gate silicide film 5a and the gate silicide film 5b) is formed. Here, examples of the heat treatment for combining silicon and a metal material include RTP (Rapid Thermal Processing), annealing by a heating furnace, and annealing by laser irradiation. Note that when the metal material is completely combined, it is not necessary to remove the unreacted metal material.

  Through the above process, the solid-state imaging device shown in FIGS. 1 and 2 can be manufactured.

(Embodiment 2)
In the second embodiment, one embodiment of the solid-state imaging device according to the present invention will be described with reference to FIGS. FIG. 5 is a schematic cross-sectional view illustrating the configuration of the solid-state imaging device. 6A to 6D are schematic cross-sectional views for each process for explaining a characteristic part of the method for manufacturing the solid-state imaging device.

  The solid-state imaging device according to the second embodiment is the same as that of the first embodiment except that the silicide film is formed only on the surface of the polysilicon film and the insulating film is not formed on the surface layer. Since the configurations are generally the same, the same components are denoted by the same reference numerals, and only different portions will be described.

  As shown in FIG. 5, the silicide film 5 is formed on the surface of the polysilicon film 4 (including the transfer gate electrode 4a, the gate electrode 4b, the transfer gate wiring (not shown) and the gate wiring (not shown)). Only formed. Note that, unlike the solid-state imaging device according to the first embodiment shown in FIG. 1, the solid-state imaging device according to the second embodiment has a detection capacitance region, a source region, and a drain region, Silicide film 5 is not formed. Further, the insulating film 6 shown in FIG. 1 is not formed.

  Here, a manufacturing method of the solid-state imaging device according to the second embodiment will be described. The manufacturing method in the first embodiment corresponds to the manufacturing method B described above.

  In the same manner as in the first embodiment, the process up to flattening the upper surface of the polysilicon film 4 is performed (see FIGS. 3A to 3D).

  Next, as shown in FIG. 6A, a metal material is deposited on the entire surface of the polysilicon film 4 to form a metal film 15 on the surface of the polysilicon film 4.

  Next, as shown in FIG. 6B, after the metal film 15 is formed, heat treatment is performed, and after the silicon constituting the polysilicon film 4 and the metal material constituting the metal film 15 are combined, The silicide film 5 is formed by removing the unreacted metal material (metal film 15) remaining on the surface layer without combining.

  Next, as shown in FIG. 6C, the polysilicon film 4 and the silicide film 5 are patterned using the lithography technique and the etching technique. Thereby, the transfer gate electrode 4a, the gate electrode 4b, the transfer gate wiring (not shown) and the gate wiring (not shown) are formed. It is preferable to use a dry etching technique for etching the polysilicon film 4 and the silicide film 5.

  Next, as shown in FIG. 6D, the surface layer 21, the detection capacitor region 31, the source region 51, and the drain region 61 are formed by ion implantation. Subsequently, the semiconductor substrate 1 is activated and annealed to recover damage to the semiconductor substrate 1 caused by ion implantation and to activate the implanted ions.

  Through the above process, the solid-state imaging device shown in FIG. 5 can be manufactured.

(Embodiment 3)
In the third embodiment, one embodiment of a solid-state imaging device according to the present invention will be described with reference to FIGS. FIG. 7 is a schematic cross-sectional view illustrating the configuration of the solid-state imaging device. FIG. 8 is a schematic cross-sectional view showing the vicinity of the junction between the transfer gate electrode and the transfer gate wiring in the solid-state imaging device. The cross section shown in FIG. 8 is a cross section in a direction perpendicular to the paper surface of FIG. 7 in a portion different from the portion shown in FIG. 7 (near the junction between the transfer gate electrode and the transfer gate wiring). . FIGS. 9A to 9D are schematic cross-sectional views for each process for explaining the first stage of the method for manufacturing the solid-state imaging device. 10A to 10D are schematic cross-sectional views for each process for explaining the latter stage of the method for manufacturing the solid-state imaging device.

  The solid-state imaging device according to the third embodiment has the same configuration as that of the above-described second embodiment except that the insulating protection part is formed on the insulating film. Only different parts will be described with reference numerals.

  As shown in FIGS. 7 and 8, the insulating film 13 is formed on the entire surface of the semiconductor substrate 1, and the insulating protection portion 2 is formed on the insulating film 13.

  Here, a method for manufacturing the solid-state imaging device according to the third embodiment will be described. The manufacturing method according to the third embodiment corresponds to the manufacturing method D described above.

  First, as shown in FIG. 9A, an insulating film is formed on the entire surface of the semiconductor substrate 1. Subsequently, the insulating protection part 2 is formed on the semiconductor substrate 1 by using the lithography technique and the etching technique.

  Next, as illustrated in FIG. 9B, an element isolation region 41 is formed by ion implantation in part of the semiconductor substrate 1 below the insulation protection unit 2. Subsequently, as shown in FIG. 3B, the photoelectric conversion region 11 is formed in a part of the inside of the semiconductor substrate 1 by ion implantation. Note that the element isolation region 41 and the photoelectric conversion region 11 may be formed in the reverse order.

  Next, as shown in FIG. 9C, a polysilicon film 4 is formed so as to cover the insulating protection portion 2 and the insulating film 3. The upper surface of the formed polysilicon film 4 is an uneven surface that substantially corresponds to the unevenness of the underlying layer.

  Next, as shown in FIG. 9D, the upper surface of the polysilicon film 4 is planarized. For the planarization of the polysilicon film 4, for example, a dry etching technique and a CMP planarization technique can be used.

  Next, as shown in FIG. 10A, a metal material is deposited on the entire surface of the polysilicon film 4 to form a metal film 15 on the surface of the polysilicon film 4.

  Next, as shown in FIG. 10B, after the metal film 15 is formed, heat treatment is performed, and after the silicon constituting the polysilicon film 4 and the metal substance constituting the metal film 15 are combined, The silicide film 5 is formed by removing the unreacted metal material (metal film 15) on the surface layer remaining without combining.

  Next, as shown in FIG. 10C, the polysilicon film 4 and the silicide film 5 are patterned using the lithography technique and the etching technique. Thereby, the transfer gate electrode 4a, the gate electrode 4b, the transfer gate wiring (not shown) and the gate wiring (not shown) are formed. It is preferable to use a dry etching technique for etching the polysilicon film 4 and the silicide film 5.

  Next, as shown in FIG. 10D, the surface layer 21, the detection capacitor region 31, the source region 51, and the drain region 61 are formed by ion implantation. Subsequently, the semiconductor substrate 1 is activated and annealed to recover damage to the semiconductor substrate 1 caused by ion implantation and to activate the implanted ions.

  Through the above process, the solid-state imaging device shown in FIGS. 7 and 8 can be manufactured.

  In the above, the case where the configuration of the insulating film 13 is different from that of the solid-state imaging device according to the second embodiment has been described. However, the insulating film 3 in the solid-state imaging device according to the first embodiment (see FIG. 1). ) May be changed to the insulating film 13 formed on the entire surface of the semiconductor substrate 1. In this case, the solid-state imaging device is manufactured according to the manufacturing method C described above. Specifically, the process up to flattening the polysilicon film 4 is performed according to the manufacturing method D described above, and then the process up to the step of forming the silicide film 5 according to the manufacturing method A according to the first embodiment described above. Do.

  In the first to third embodiments, when the polysilicon film is planarized, the upper surfaces of the transfer gate electrode, the transfer gate wiring, the gate electrode, and the gate wiring have the same height with respect to the reference plane. Although the polysilicon film is shaved, the polysilicon film does not have to be shaved until it becomes completely flat. Even in this case, the step between the upper surface of the transfer gate electrode and the upper surface of the transfer gate wiring is smaller than the step between the lower surface of the transfer gate electrode and the upper surface of the insulating protection portion, and the effects of the present invention are achieved. Note that in the case where the surface is not cut until completely flat, the polysilicon film is cut so that the difference in height between the upper surface of the transfer gate wiring and the gate wiring and the upper surface of the transfer gate electrode and the gate electrode is within 50 nm or less. It is preferable.

  In the first to third embodiments, the transfer gate electrode, the transfer gate wiring, the gate electrode, and the gate wiring are all formed of the same material, but any one of them is individually formed of a different material. You may form in. In this case, a film is formed for each different material by using a lithography technique and an etching technique.

  The present invention can be used to suppress an increase in resistance of a silicide film formed on a polysilicon film that forms a transfer gate electrode, a transfer gate wiring, and the like. In addition, the present invention can be used to improve yield and mass productivity in manufacturing a solid-state imaging device. The present invention can also be used to improve the image quality of cameras and camera systems.

FIG. 1 is a schematic cross-sectional view illustrating the configuration of the solid-state imaging device according to the first embodiment. FIG. 2 is a schematic cross-sectional view showing the vicinity of the junction between the transfer gate electrode and the transfer gate wiring in the solid-state imaging device according to the first embodiment. FIGS. 3A to 3D are schematic cross-sectional views for each process for explaining the former stage of the method for manufacturing the solid-state imaging device according to the first embodiment. 4A to 4E are schematic cross-sectional views for each process for explaining a subsequent stage of the method for manufacturing the solid-state imaging device according to the first embodiment. FIG. 5 is a schematic cross-sectional view illustrating the configuration of the solid-state imaging device according to the second embodiment. 6A to 6D are schematic cross-sectional views for each process for explaining a characteristic part of the method for manufacturing the solid-state imaging device according to the second embodiment. FIG. 7 is a schematic cross-sectional view illustrating the configuration of the solid-state imaging device according to the first embodiment. FIG. 8 is a schematic cross-sectional view showing the vicinity of the junction between the transfer gate electrode and the transfer gate wiring in the solid-state imaging device. FIGS. 9A to 9D are schematic cross-sectional views for each process for explaining the first stage of the method for manufacturing the solid-state imaging device. 10A to 10D are schematic cross-sectional views for each process for explaining the latter stage of the method for manufacturing the solid-state imaging device. FIG. 11 is a schematic cross-sectional view showing a configuration of a conventional typical solid-state imaging device. 12A and 12B are schematic cross-sectional views showing the vicinity of the boundary between the element separation unit and the light detection unit in a conventional typical solid-state imaging device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,101 Semiconductor substrate 11,111 Photoelectric conversion area 21,121 Surface layer 31,131 Detection capacity area 41,141 Element isolation area 51,151 Source area 61,161 Drain area 2,102 Insulation protection part 3,103 Insulation film 4 , 104 Polysilicon film 4a, 104a Transfer gate electrode 4b, 104b Gate electrode 4c, 104c Transfer gate wiring 5, 105 Silicide film 5a, 105a Transfer gate silicide film 5b, 105b Gate silicide film 107 Photodetection section 108 Transistor section 109 Element isolation part

Claims (16)

A photoelectric conversion region for generating charge by receiving external light and storing the charge; a detection capacitor region formed separately from the photoelectric conversion region for storing the charge; the photoelectric conversion region and the detection capacitor region; A semiconductor substrate having element isolation regions formed in different regions;
An insulating film formed on the semiconductor substrate;
A transfer gate electrode made of polysilicon, which is formed on the region between the photoelectric conversion region and the detection capacitor region via the insulating film and controls transfer of the charge from the photoelectric conversion region to the detection capacitor region When,
An insulating protection part formed on the element isolation region and protecting the element isolation region;
A transfer gate wiring made of polysilicon and electrically connected to the transfer gate electrode formed on the insulation protection portion;
A solid-state imaging device including a transfer gate silicide film formed on the transfer gate electrode and the transfer gate wiring and in contact with the surface of the transfer gate electrode and the surface of the transfer gate wiring;
With the upper surface of the semiconductor substrate under the insulation protection portion as a reference surface, the height from the reference surface to the upper surface of the transfer gate electrode is higher than the height from the reference surface to the upper surface of the insulation protection portion,
A solid-state imaging device, wherein a step between the upper surface of the transfer gate electrode and the upper surface of the transfer gate wiring is smaller than a step between the lower surface of the transfer gate electrode and the upper surface of the insulation protection portion. The insulating film is a substantially uniform flat film having a thickness that further covers the photoelectric conversion region, the detection capacitance region, and the element isolation region;
The insulating protection part is formed on the semiconductor substrate via the insulating film;
The solid-state imaging device according to claim 1, wherein a thickness of the transfer gate electrode is larger than a thickness of the insulation protection part.   The height from the reference plane to the upper surface of the transfer gate wiring is higher than the height from the reference plane to the upper surface of the transfer gate electrode, and the height between the upper surface of the transfer gate wiring and the upper surface of the transfer gate electrode The solid-state imaging device according to claim 1, wherein the difference is within a range of 50 nm or less.   3. The solid-state imaging device according to claim 2, wherein the height from the reference plane to the upper surface of the transfer gate wiring is substantially the same as the height from the reference plane to the upper surface of the transfer gate electrode.   The solid-state imaging device according to claim 2, wherein a material constituting the transfer gate electrode and a material constituting the transfer gate wiring are the same. The semiconductor substrate further includes a source region and a drain region that are formed in regions different from the photoelectric conversion region, the detection capacitance region, and the element isolation region, and are separated from each other,
A gate electrode formed on the region between the source region and the drain region via the insulating film; a gate wiring formed on the insulation protection portion and electrically connected to the gate electrode; 2. The solid-state imaging device according to claim 1, further comprising a gate silicide film formed on the gate electrode and the gate wiring and in contact with the surface of the gate electrode and the surface of the gate wiring.   The solid-state imaging device according to claim 6, wherein each of the gate electrode and the gate wiring is a polysilicon film.   The solid-state imaging device according to claim 7, wherein a material constituting the transfer gate electrode, a material constituting the transfer gate wiring, a material constituting the gate electrode, and a material constituting the gate wiring are the same. . The thickness of the gate electrode is substantially the same as the thickness of the transfer gate electrode;
The solid-state imaging device according to claim 7, wherein a thickness of the gate wiring is substantially the same as a thickness of the transfer gate wiring.   The height from the reference plane to the upper surface of the transfer gate electrode, the height from the reference plane to the upper surface of the transfer gate wiring, the height from the reference plane to the upper surface of the gate electrode, and the gate from the reference plane The solid-state imaging device according to claim 7, wherein the height to the upper surface of the wiring is substantially the same. An imaging unit that converts external light into electric charges and generates an imaging signal;
A light control unit that controls the outside light incident on the imaging unit;
An imaging signal processing unit that converts the imaging signal from the imaging unit into a video signal;
A video information holding unit that holds video information based on the video signal from the imaging signal processing unit,
A camera comprising the solid-state imaging device according to claim 1 in the imaging unit. An imaging unit that converts external light into electric charges and generates an imaging signal;
A light control unit that controls incidence of the external light to the imaging unit;
An imaging signal processing unit that converts the imaging signal from the imaging unit into a video signal;
A video information holding unit for holding video information based on the video signal from the imaging signal processing unit;
A video signal processing unit that converts the video information held in the video information holding unit into the video signal;
A display unit for displaying a video based on the video signal from at least one of the imaging signal processing unit and the video signal processing unit,
The said imaging part is provided with the solid-state imaging device of Claim 1, The camera system characterized by the above-mentioned. Forming an insulation protection portion on the semiconductor substrate;
Forming an insulating film on the exposed surface of the semiconductor substrate;
Forming an element isolation region by ion implantation inside the semiconductor substrate under the insulating protection part;
Forming a photoelectric conversion region by ion implantation inside the semiconductor substrate;
A polysilicon film forming step of forming a polysilicon film on the insulating film and the insulating protection part;
Patterning the polysilicon film to form a transfer gate electrode and a transfer gate wiring; and
A detection capacitance region forming step of forming a detection capacitance region by ion implantation inside the semiconductor substrate;
Forming a metal film on the transfer gate electrode and the transfer gate wiring; and
A silicide film that heat-treats the transfer gate electrode, the transfer gate wiring, and the metal film, and forms a silicide film by combining the material that constitutes the transfer gate electrode and the transfer gate wiring with the material that constitutes the metal film A solid-state imaging device manufacturing method including a forming step,
A step of planarizing an upper surface of the polysilicon film between the polysilicon film forming step and the patterning step;
In the polysilicon film forming step, the polysilicon film is formed thicker than a step from the upper surface of the insulating film to the upper surface of the insulating protection portion. Forming an insulation protection portion on the semiconductor substrate;
Forming an insulating film on the exposed surface of the semiconductor substrate;
Forming an element isolation region by ion implantation inside the semiconductor substrate under the insulating protection part;
Forming a photoelectric conversion region by ion implantation inside the semiconductor substrate;
A polysilicon film forming step of forming a polysilicon film on the insulating film and the insulating protective film;
A metal film forming step of forming a metal film on the polysilicon film;
A step of combining the substance constituting the polysilicon film and the substance constituting the metal film by heat-treating the polysilicon film and the metal film to form a silicide film;
Patterning the polysilicon film and the silicide film to form a transfer gate electrode, a transfer gate wiring, and a transfer gate silicide film;
Forming a detection capacitance region by ion implantation inside the semiconductor substrate, and a manufacturing method of a solid-state imaging device,
A step of planarizing the upper surface of the polysilicon film between the polysilicon film forming step and the metal film forming step;
In the polysilicon film forming step, the polysilicon film is formed thicker than a step from the upper surface of the insulating film to the upper surface of the insulating protection portion. Forming an insulating film on the semiconductor substrate;
Forming an insulating protection part on the insulating film;
Forming an element isolation region by ion implantation inside the semiconductor substrate under the insulating protective film;
Forming a photoelectric conversion region by ion implantation inside the semiconductor substrate;
A polysilicon film forming step of forming a polysilicon film on the insulating film and the insulating protective film;
Patterning the polysilicon film to form a transfer gate electrode and a transfer gate wiring; and
A detection capacitor forming step of forming a detection capacitor region by ion implantation inside the semiconductor substrate;
Forming a metal film on the transfer gate electrode and the transfer gate wiring; and
A silicide film that forms a silicide film by heat-treating the transfer gate electrode, the transfer gate wiring, and the metal film to combine a material that constitutes the transfer gate electrode and the transfer gate wiring with a substance that constitutes the metal film A solid-state imaging device manufacturing method including a forming step,
A step of planarizing an upper surface of the polysilicon film between the polysilicon film forming step and the patterning step;
In the polysilicon film forming step, the polysilicon film is formed thicker than the insulation protection part. Forming an insulating film on the semiconductor substrate;
Forming an insulating protection part on the insulating film;
Forming an element isolation region by ion implantation inside the semiconductor substrate under the insulating protective film;
Forming a photoelectric conversion region by ion implantation inside the semiconductor substrate;
A polysilicon film forming step of forming a polysilicon film on the insulating film and the insulating protective film;
A metal film forming step of forming a metal film on the polysilicon film;
A step of combining the substance constituting the polysilicon film and the substance constituting the metal film by heat-treating the polysilicon film and the metal film to form a silicide film;
Patterning the polysilicon film and the silicide film to form a transfer gate electrode, a transfer gate wiring, and a transfer gate silicide film;
Forming a detection capacitance region by ion implantation inside the semiconductor substrate, and a manufacturing method of a solid-state imaging device,
A step of planarizing the upper surface of the polysilicon film between the polysilicon film forming step and the metal film forming step;
In the polysilicon film forming step, the polysilicon film is formed thicker than the insulation protection part.

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