JP2005191551A - Semiconductor chip manufacturing method and semiconductor chip - Google Patents

Abstract

PROBLEM TO BE SOLVED To improve the productivity by manufacturing a gallium nitride compound semiconductor chip with high yield and by increasing the number of chips that can be taken out from one wafer. To do.
A semiconductor chip manufacturing method according to the present invention is a method of manufacturing a gallium nitride compound semiconductor chip from a wafer in which gallium nitride compound semiconductors 2 and 3 are laminated on the main surface of a substrate 1, and the gallium nitride of the wafer is manufactured. A step of forming a first chip groove 11 in a desired chip shape in a linear shape on the side of the compound semiconductor layers 2 and 3, and a position not matching the center line of the first groove 11 on the substrate 1 side of the wafer And forming the second split groove 22 having a line width (W2) substantially equal to or thinner than the line width (W1) of the first split groove 11, and the first split groove and the second split groove. And a step of separating the wafer into chips along the groove.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor chip manufacturing method for manufacturing a gallium nitride-based compound semiconductor chip used in light emitting devices such as blue light emitting diodes and blue laser diodes, and a semiconductor chip obtained by the manufacturing method.

  Conventionally, a scriber or a dicer has been used to cut a chip for a light emitting device from a wafer on which semiconductor materials are laminated.

  By the way, when a semiconductor material is a nitride, the nitride semiconductor is generally laminated on a wafer made of a sapphire substrate. It was difficult to cut.

  Also, when cutting with dicer, both sapphire and nitride semiconductor are very hard materials, so cracks and chipping are likely to occur on the cut surface, and a lattice with a heteroepitaxial structure of sapphire substrate and nitride semiconductor Due to the large constant mismatch and the difference in thermal expansion coefficient, there is a problem that the nitride semiconductor layer is easily peeled off from the sapphire substrate when cut with a dicer.

In order to solve the above-described conventional technical problem, a technique described in Patent Document 1 below has been proposed as another technique for cutting out a nitride semiconductor chip for a light-emitting device from a wafer. In this method, as shown in FIG. 4, when a wafer formed by forming a gallium nitride compound semiconductor layer 200 on a sapphire substrate 100 is cut, a first split groove 110 is formed on the gallium nitride compound semiconductor layer 200 side. And a second split having a line width (W20) narrower than the line width (W10) of the first split groove 110 at a position matching the center line of the first split groove 110 on the sapphire substrate 100 side. By forming the groove 220, it can be cut into a desired shape and size.
Japanese Patent Publication No. 2780618

However, when the technique of the above-mentioned Patent Document 1 is actually implemented, the chip cross-section is less likely to break along the center line f of the first dividing groove 110 during chip division, and most of them are broken lines d and e. It breaks diagonally along. For this reason, it was found that the fracture surface enters the gallium nitride compound semiconductor layer 200 on the chip side and becomes a defective product, and the yield of the chip decreases.
In addition, since the cross section of the chip is slanted, it is difficult to reduce the chip size, the number of chips that can be taken out from one wafer is restricted, and the productivity deteriorates.

  The present invention has been proposed in view of the above, and when manufacturing a gallium nitride compound semiconductor chip, it can be cut accurately with an extremely high yield, and the number of chips that can be taken out from a single wafer is increased. An object of the present invention is to provide a semiconductor chip manufacturing method capable of improving the performance and a semiconductor chip obtained by the manufacturing method.

  1) In order to achieve the above object, a first invention provides a semiconductor chip manufacturing method for manufacturing a gallium nitride compound semiconductor chip from a wafer in which a gallium nitride compound semiconductor is laminated on a main surface of a substrate. Forming a first groove on the gallium nitride-based compound semiconductor layer side by etching in a desired chip shape in a line, and a position not matching the center line of the first groove on the substrate side of the wafer; Forming a second split groove having a line width (W2) substantially equal to or thinner than a line width (W1) of one split groove, along the first split groove and the second split groove; And a step of separating the wafer into chips.

  2) In the second invention, in addition to the configuration of the invention described in the above item 1), when the substrate is sapphire and the C surface of the sapphire substrate is a main surface, the first and second The split groove is formed along a first direction parallel to the orientation flat (11-20) and a second direction orthogonal to the first direction, along the first and second split grooves. It is characterized by separating the wafer.

  3) In the third aspect of the invention, in addition to the configuration of the invention described in the above item 1) or 2), the position that does not coincide with the line of the first dividing groove can be obtained when the substrate is viewed in plan view. It is characterized in that it is at a position that is 20 to 100% of the line width (W1) of the first split groove with respect to the center line of one split groove.

  4) In the fourth aspect of the invention, in addition to the configuration of the invention described in any one of items 1) to 3) above, in the step of forming the second split groove, the angle at which the chip is obliquely cracked is 60. The second split groove is formed so as to have a cut surface of ˜85 °.

  5) In the fifth aspect of the invention, in addition to the configuration of the invention described in any one of items 1) to 4), the substrate side is polished before forming the second split groove. The method includes a step of adjusting the thickness to 60 to 100 μm.

  6) A sixth invention is an electrode for forming an electrode of a gallium nitride-based compound semiconductor chip in the first groove, in addition to the configuration of the invention described in any one of 1) to 5) above It is characterized by having a formation surface.

  7) The seventh invention is selected from etching, dicing, pulsed laser, and scribe in addition to the configuration of the invention described in any one of 1) to 6) above. It is formed by at least one method.

  8) The eighth invention is characterized in that, in addition to the configuration of the invention described in any one of items 1) to 7), the substrate is made of hexagonal SiC.

  9) The ninth invention is characterized in that, in addition to the configuration of the invention described in any one of 1) to 7), the substrate is made of a hexagonal nitride semiconductor.

  10) A tenth aspect of the invention is characterized in that, in addition to the configuration of the invention according to any one of items 1) to 7), the substrate is made of hexagonal GaN.

  11) The eleventh invention is characterized in that it is a semiconductor chip obtained by the semiconductor chip manufacturing method described in any one of 1) to 10) above.

  In the present invention, the first split groove on the gallium nitride compound semiconductor layer side and the second split groove on the substrate side are formed at positions that do not match each other. For example, when the substrate is viewed in plan, the first split groove is formed. A second split groove is formed at a position separated by 20 to 100% of the line width (W1) of the first split groove with respect to the center line of the groove, and the wafer is formed along the first and second split grooves. Since the semiconductor chip is manufactured by utilizing the tendency that the cut surface is obliquely broken when cracked, even a wafer in which a non-cleavable gallium nitride compound semiconductor is laminated on a non-cleavable substrate, Since it can be cut accurately with a very high yield and can be separated into small chips, the number of chips that can be taken out from one wafer can be increased, and productivity can be improved.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  1 and 2 are schematic sectional views of a wafer for explaining the semiconductor chip manufacturing method of the present invention. Here, a wafer formed by laminating an n-type gallium nitride compound semiconductor layer (n-type layer) 2 and a p-type gallium nitride compound semiconductor layer (p-type layer) 3 on a sapphire substrate 1 is chip-shaped. A case of separation (division) will be described.

  In the manufacturing method of the present invention, first, the first dividing groove 11 is first formed in a desired chip shape by linear etching on the gallium nitride compound semiconductor layers 2 and 3 side. The first split groove 11 has a line width of W1, and is formed so that the p-type layer 3 is etched and the n-type layer 2 is exposed.

  Next, when the substrate 1 is viewed in plan on the substrate 1 side, the first dividing groove with respect to a position that does not coincide with the center line of the first dividing groove 11, for example, the center line of the first dividing groove 11. The second split groove 22 is formed at a position separated by 20 to 100%, preferably 20 to 80% of the line width (W1) of 11. The second split groove 22 is formed to have a line width (W2) substantially equal to or thinner than the line width (W1) of the first split groove 11. Which side the second split groove 22 is formed with respect to the center line of the first split groove 11 can be determined in advance by trial splitting.

  Then, the wafer is separated into chips along the first split groove 11 and the second split groove 22. At this time, the wafer is obliquely broken along the broken line b in FIG. 1 and the broken line c in FIG. 2, and the angle of the fracture surface (the angle at which the chip is obliquely broken) is 60 to 85 ° with respect to the surface of the substrate 1. I am doing. In the present invention, since the second dividing groove 22 is formed at a position away from the center line of the first dividing groove 11, the cutting is within the first dividing groove 11, and the cut surface is the same. There is no such thing as entering the chip side area.

  That is, in this invention, since the semiconductor chip is manufactured by utilizing the tendency that the cut surface is obliquely broken when the wafer is cracked along the first and second split grooves 11 and 22, there is no cleavage. Even a wafer in which gallium nitride compound semiconductors 2 and 3 having no cleavage are laminated on the substrate 1 can be accurately cut with a very high yield, and can be separated into small chips. The number of chips that can be taken out from the wafer can be increased, and the productivity can be improved.

  In the above semiconductor chip manufacturing method, the first dividing groove 11 is most preferably formed by using an etching method such as wet etching or dry etching. This is because etching hardly damages the nitride semiconductor surface and side surfaces. For dry etching, for example, reactive ion etching, ion milling, focused beam etching, ECR etching, or the like can be used. For wet etching, for example, a mixed acid of sulfuric acid and phosphoric acid can be used. However, it goes without saying that a predetermined mask is formed on the nitride semiconductor surface so as to have a desired chip shape before etching.

  Next, in order to form the second dividing groove 22 on the substrate 1 side, techniques such as etching, dicing, pulse laser, and scribe can be used. The second split groove 22 is formed on the substrate 1 side, and the cutting edge of a dicer, scriber, or the like is not directly in contact with the nitride semiconductor layers 2 and 3, so the method of forming the second split groove 22 in this step is Although there is no particular limitation, scribing is particularly preferable among them. This is because scribing can easily make the line width W2 of the second dividing groove 22 smaller than the line width W1 of the first dividing groove 11, and can form the dividing groove more quickly than etching. Furthermore, compared to dicing, the area for scraping the substrate 1 when cutting the wafer can be reduced, so that there is an advantage that many chips can be obtained from a single wafer.

  Further, it is preferable to polish and thin the substrate 1 side before forming the second split groove 22. The substrate thickness after polishing is preferably adjusted to 150 μm or less, more preferably 60 to 100 μm. This is because by suppressing the substrate thickness, the cutting distance can be shortened, thereby further ensuring that the cutting is within the first split groove 11.

  Next, the first embodiment will be described with reference to FIG.

  FIG. 3 is a diagram showing a first dividing groove formed on the nitride semiconductor layer side in the first embodiment. In the first embodiment, a wafer is prepared in which an n-type GaN layer 2a and a p-type GaN layer 3a are stacked in an order of 5 μm on a sapphire substrate having a thickness of 400 μm and a size of 2 inches φ. And the C surface of this sapphire substrate is the main surface, and the first and second slits are in a first direction parallel to the orientation flat (11-20) and a second direction orthogonal to the first direction. And form along. “Oriental flat” means an Oriental flat.

Next, a mask made of SiO ₂ is applied on the p-type GaN layer 2a by photolithography, and etching is performed to form the first split groove 11a in the shape shown in FIG. However, the depth of the first split groove 11a is approximately 2 μm, the line width W1 is 20 μm, and the pitch is 350 μm.

  In addition, the p-type GaN layer 3a is etched in a substantially semicircular shape at a position facing the first split groove 11a, and the n-type GaN layer 2a is exposed to form an electrode formation surface.

  After forming the first groove 11a as described above, the sapphire substrate side of the wafer is polished by a polishing machine, and the substrate is lapped and polished to a thickness of 80 μm. The substrate surface is mirror-polished by polishing so that the first split groove 11a can be easily confirmed from the sapphire substrate.

Next, an adhesive tape is attached to the p-type GaN layer side, a wafer is attached to the scriber table, and fixed with a vacuum chuck. The table can move in the X-axis (left and right) and Y-axis (front and back) directions and has a rotatable structure. After fixing, the sapphire substrate is scribed once with a scriber diamond needle at a pitch of 350 μm, a depth of 5 μm, and a line width of 5 μm in the X-axis direction. Rotate the table 90 ° and scribe in the same way in the Y-axis direction.
In this way, a scribe line is inserted to form a 350 μm square chip, and a second split groove is formed. However, the position where the second split groove is formed is a position that does not coincide with the center line 11b of the line of the first split groove 11a.

  After scribing, the vacuum chuck was released, the wafer was peeled off from the table, and was pressed and separated from the sapphire substrate side to obtain many 350 μm square chips from the 2 inch φ wafer. When a product having no external defect was taken out, the yield was 90% or more.

  (Comparative Example) In the first embodiment, in the step of forming the second split groove, the second split groove is formed on the substrate side at a position that matches the center line of the first split groove, and a 350 μm square is formed. When the chip was obtained, the yield was 60%.

  In the above description, the substrate 1 is formed of sapphire, but may be formed of a material other than sapphire, for example, hexagonal SiC, hexagonal nitride semiconductor, or hexagonal GaN. .

It is a schematic cross section of the wafer for demonstrating the semiconductor chip manufacturing method of this invention. It is a schematic cross section of the wafer for demonstrating the semiconductor chip manufacturing method of this invention. It is a figure which shows the 1st dividing groove formed in the nitride semiconductor layer side in 1st Example of this invention. It is a schematic cross section of the wafer for demonstrating the conventional method.

Explanation of symbols

1 Substrate 2 n-type layer 2a n-type GaN layer 3 p-type layer 3a p-type GaN layer 11 first dividing groove 11a first dividing groove 11b center line of first dividing groove 22 second dividing groove W1 first Line width of split groove W2 Line width of second split groove

Claims (11)

In a semiconductor chip manufacturing method for manufacturing a gallium nitride compound semiconductor chip from a wafer in which a gallium nitride compound semiconductor is laminated on a main surface of a substrate,
Forming a first groove on the gallium nitride-based compound semiconductor layer side of the wafer by etching in a desired chip shape in a line; and
A second split groove having a line width (W2) substantially equal to or thinner than the line width (W1) of the first split groove at a position not matching the center line of the first split groove on the substrate side of the wafer. Forming, and
Separating the wafer into chips along the first split groove and the second split groove;
A method of manufacturing a semiconductor chip, comprising:   When the substrate is sapphire and the C-plane of the sapphire substrate is the main surface, the first and second split grooves have a first direction parallel to the orientation flat (11-20), and the first The semiconductor chip manufacturing method according to claim 1, wherein the semiconductor chip is formed along a second direction orthogonal to the direction and the wafer is separated along the first and second dividing grooves.   The position that does not match the line of the first dividing groove is 20 to 100% of the line width (W1) of the first dividing groove with respect to the center line of the first dividing groove when the substrate is viewed in plan view. The method of manufacturing a semiconductor chip according to claim 1, wherein the semiconductor chip manufacturing method is at a position separated by a distance.   4. The method according to claim 1, wherein, in the step of forming the second split groove, the second split groove is formed so that the angle at which the chip obliquely cracks has a cut surface of 60 to 85 °. The semiconductor chip manufacturing method as described in any one of Claims 1-3.   5. The semiconductor chip manufacturing according to claim 1, further comprising a step of polishing the substrate side to adjust the thickness of the substrate to 60 to 100 μm before forming the second split groove. 6. Method.   6. The method of manufacturing a semiconductor chip according to claim 1, wherein an electrode forming surface on which an electrode of a gallium nitride compound semiconductor chip is formed faces the first split groove. 7.   The semiconductor chip manufacturing method according to claim 1, wherein the second dividing groove is formed by at least one method selected from etching, dicing, pulse laser, and scribe.   The semiconductor chip manufacturing method according to claim 1, wherein the substrate is made of hexagonal SiC.   The semiconductor chip manufacturing method according to claim 1, wherein the substrate is made of a hexagonal nitride semiconductor.   The semiconductor chip manufacturing method according to claim 1, wherein the substrate is made of hexagonal GaN.   A semiconductor chip obtained by the semiconductor chip manufacturing method according to claim 1.

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