JP2005191024A - Photovoltaic device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a photovoltaic power device which can suppress the decrease of output characteristics even when a collector electrode is formed of a high temperature sintered type conductive paste. <P>SOLUTION: This photovoltaic power device includes an n-type single crystal silicon substrate 1, a light incident side collector electrode 2 formed on the front surface of the n-type single crystal silicon substrate 1 at the light incident side and made of the high temperature sintered type conductive paste baked at 500°C or higher, and an i-type amorphous silicon layer 4 and a p-type amorphous silicon layer 5 formed on the front surface of the n-type single crystal silicon substrate 1 at the opposite side to the light incident side. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a photovoltaic device and a manufacturing method thereof, and more particularly to a photovoltaic device in which a non-single-crystal semiconductor layer is formed on the surface of a crystalline semiconductor layer and a manufacturing method thereof.

  Conventionally, a photovoltaic device in which a non-single-crystal semiconductor layer is formed on the surface of a crystalline semiconductor layer is known (see, for example, Patent Document 1).

  In the photovoltaic device disclosed in Patent Document 1, a non-single-crystal semiconductor layer (i-type amorphous silicon layer and p-type) is formed on the light incident side surface of an n-type single-crystal silicon substrate (crystalline semiconductor layer). Type amorphous silicon layer) and a transparent conductive film are laminated in this order.

  Conventionally, in the photovoltaic device having the structure disclosed in Patent Document 1, by forming a collector electrode on the surface of the transparent conductive film, current generated by the photovoltaic device is passed through the collector electrode. A structure that can be taken out is known. The collector electrode is formed by applying a conductive paste to a predetermined region on the surface of the transparent conductive film by a screen printing method or the like and then firing the applied conductive paste. As an example of a conductive paste for forming the collector electrode, a low-temperature fired conductive paste that is fired at a temperature of 300 ° C. or lower is known. When the collector electrode is formed by this low-temperature firing type conductive paste, there is a disadvantage that the resistance of the collector electrode becomes very large. In this case, if the width of the collector electrode is increased in order to reduce the resistance of the collector electrode, the area where incident light is shielded by the collector electrode increases, so the amount of light incident on the crystalline semiconductor layer where power generation is performed Has the disadvantage of decreasing.

On the other hand, as another example of the conductive paste for forming the collector electrode, a high-temperature sintered type conductive paste that is fired at a high temperature of 500 ° C. or higher is known. When the collector electrode is formed with this high-temperature sintered conductive paste, the resistance of the collector electrode is smaller than when the collector electrode is formed with a low-temperature fired conductive paste. The disadvantages caused by forming the collector electrode using the conductive paste can be eliminated.
Japanese Patent Publication No. 7-95603

  However, when the collector electrode is formed on the light incident side of the photovoltaic device using the above-described high-temperature sintered conductive paste, it is formed on the light incident side when firing the high-temperature sintered conductive paste. There is a disadvantage that the non-single-crystal semiconductor layer thus formed is heated to a temperature of 500 ° C. or higher. In this case, hydrogen that inactivates defects is desorbed from the non-single-crystal semiconductor layer by heating at a high temperature of 500 ° C. or higher, so that recombination of carriers due to defects in the non-single-crystal semiconductor layer increases. There is an inconvenience. As a result, there has been a problem that the output characteristics of the photovoltaic device are degraded.

  The present invention has been made to solve the above-described problems, and one object of the present invention is to reduce output characteristics even when a collector electrode is formed from a high-temperature sintered conductive paste. It is providing the photovoltaic apparatus which can suppress this.

Means for Solving the Problems and Effects of the Invention

  In order to achieve the above object, a photovoltaic device according to a first aspect of the present invention is formed on a first conductivity type crystalline semiconductor layer and a light incident side surface of the crystalline semiconductor layer, and is at 500 ° C. A first collector electrode made of a high-temperature sintered conductive paste fired at the above temperature; and a non-single-crystal semiconductor layer formed on the surface of the crystalline semiconductor layer opposite to the light incident side. . Note that the non-single crystal is a broad concept including not only amorphous but also microcrystal.

  In the photovoltaic device according to the first aspect, as described above, the first collector electrode made of a high-temperature sintered conductive paste fired at a temperature of 500 ° C. or higher is used as the light incident side surface of the crystalline semiconductor layer. And forming the non-single crystal semiconductor layer on the surface opposite to the light incident side of the crystalline semiconductor layer, thereby forming the non-single crystal semiconductor layer after forming the first collector electrode. It becomes possible. Thereby, since it can suppress that the temperature of 500 degreeC or more at the time of forming a 1st collector electrode is added to a non-single-crystal semiconductor layer, that a non-single-crystal semiconductor layer is heated to 500 degreeC or more. This can suppress desorption of hydrogen that deactivates defects from the non-single-crystal semiconductor layer. For this reason, since it can suppress that the defect density of a non-single-crystal semiconductor layer increases, it can suppress that the recombination of the carrier resulting from a defect increases. As a result, it is possible to prevent the output characteristics of the photovoltaic device from being deteriorated even when the first collector electrode is formed from a high-temperature sintered conductive paste. Also, when the non-single crystal semiconductor layer is formed on the light incident side surface of the crystalline semiconductor layer by forming the non-single crystal semiconductor layer on the surface of the crystalline semiconductor layer opposite to the light incident side. In comparison, light incident on the crystalline semiconductor layer through the non-single-crystal semiconductor layer is reduced. Thereby, even when the light absorption of the non-single-crystal semiconductor layer is large, the photoelectric conversion efficiency of the photovoltaic device is suppressed from decreasing, so that the non-single-crystal semiconductor layer is placed on the light incident side of the crystalline semiconductor layer. The light absorption of the non-single-crystal semiconductor layer can be increased as compared with the case where it is formed over the surface. That is, since the thickness and impurity concentration of the non-single-crystal semiconductor layer can be increased, if the non-single-crystal semiconductor layer is formed in the second conductivity type, the first-conductivity-type crystal semiconductor layer and the second-conductivity-type semiconductor layer are formed. A favorable pn junction can be obtained with the non-single-crystal semiconductor layer. As a result, the output characteristics of the photovoltaic device can be improved.

  In the photovoltaic device according to the first aspect, the impurity concentration is preferably higher than the impurity concentration of the first conductivity type of the crystalline semiconductor layer, which is formed on the surface of the crystalline semiconductor layer in contact with the first collector electrode. And a high impurity concentration region. With this configuration, a good ohmic contact with the first collector electrode can be obtained in the high impurity concentration region, so that the resistance between the crystalline semiconductor layer and the first collector electrode through the high impurity concentration region can be reduced. can do.

  The photovoltaic device according to the first aspect preferably further includes a layer that is formed on the surface on the light incident side of the crystalline semiconductor layer and inactivates defects near the surface of the crystalline semiconductor layer. . With this configuration, defects near the surface of the crystalline semiconductor layer are reduced, so that carriers can be prevented from being captured by the defects. As a result, the recombination of carriers near the surface of the crystalline semiconductor layer can be suppressed, so that the output characteristics of the photovoltaic device can be further improved.

  In the photovoltaic device according to the first aspect described above, preferably, a second collector electrode formed on the surface of the non-single-crystal semiconductor layer and made of a low-temperature fired conductive paste fired at a temperature of 300 ° C. or lower is further provided. I have. If comprised in this way, when forming a 2nd collector electrode, it can suppress that the temperature exceeding 300 degreeC is given to a non-single-crystal-semiconductor layer. Thus, desorption of hydrogen that deactivates defects from the non-single-crystal semiconductor layer due to the non-single-crystal semiconductor layer being heated to a temperature exceeding 300 ° C. can be suppressed. For this reason, since it can suppress that the defect density of a non-single-crystal semiconductor layer increases, it can suppress that the recombination of the carrier by a defect increases. As a result, it is possible to further suppress the output characteristics of the photovoltaic device from being deteriorated.

  In the photovoltaic device according to the first aspect, preferably, the non-single-crystal semiconductor layer is a substantially intrinsic first non-single crystal formed on the surface of the crystalline semiconductor layer opposite to the light incident side. A semiconductor layer; and a second conductivity type second non-single crystal semiconductor layer formed on the surface of the first non-single crystal semiconductor layer. If comprised in this way, a substantially intrinsic 1st non-single-crystal semiconductor layer and 2nd conductivity type 2nd non-single crystal on the surface on the opposite side to the light-incidence side of a 1st conductivity type crystalline semiconductor layer In the photovoltaic device in which the semiconductor layers are stacked in this order, the temperature of 500 ° C. or higher when forming the first collector electrode made of the high-temperature sintered conductive paste on the light incident side is the first and second non- Application to the single crystal semiconductor layer can be suppressed. As a result, the substantially intrinsic first non-single crystal semiconductor layer and the second conductivity type second non-single crystal semiconductor layer are formed on the surface opposite to the light incident side of the first conductivity type crystalline semiconductor layer. In the photovoltaic device laminated in this order, even when the first collector electrode made of a high-temperature sintered conductive paste is formed on the light incident side, the output characteristics of the photovoltaic device are prevented from deteriorating. be able to.

  In the photovoltaic device according to the first aspect, preferably, the second non-single crystal semiconductor layer contains not less than 0.3 atomic% and not more than 10 atomic% of the second conductivity type impurity, and not less than 3 nm and not more than 30 nm. Having a thickness of With this configuration, the resistance of the second non-single-crystal semiconductor layer can be easily reduced, so that the output characteristics of the photovoltaic device can be easily improved.

  In the method for manufacturing a photovoltaic device according to the second aspect of the present invention, a high temperature sintering type conductive paste is baked at a temperature of 500 ° C. or higher, so that the light incident side of the first conductive type crystalline semiconductor layer is formed. Forming a collector electrode on the surface; and forming a non-single-crystal semiconductor layer on the surface of the crystalline semiconductor layer opposite to the light incident side after the collector electrode is formed.

  In the method for manufacturing a photovoltaic device according to the second aspect, as described above, the high temperature sintering type conductive paste is baked at a temperature of 500 ° C. or higher so that the surface of the crystalline semiconductor layer on the light incident side is After forming the collector electrode, a non-single crystal semiconductor layer is formed on the surface of the crystalline semiconductor layer opposite to the light incident side, so that the temperature at the time of forming the collector electrode is 500 ° C. or higher. Since addition to the semiconductor layer can be suppressed, hydrogen that inactivates defects is desorbed from the non-single-crystal semiconductor layer due to the non-single-crystal semiconductor layer being heated to 500 ° C. or higher. Can be suppressed. For this reason, since it can suppress that the defect density of a non-single-crystal semiconductor layer increases, it can suppress that the recombination of the carrier resulting from a defect increases. As a result, even when the collector electrode is formed from a high-temperature sintered type conductive paste, it is possible to suppress a decrease in output characteristics of the photovoltaic device. Also, when the non-single crystal semiconductor layer is formed on the light incident side surface of the crystalline semiconductor layer by forming the non-single crystal semiconductor layer on the surface of the crystalline semiconductor layer opposite to the light incident side. In comparison, light incident on the crystalline semiconductor layer through the non-single-crystal semiconductor layer is reduced. Thereby, even when the light absorption of the non-single-crystal semiconductor layer is large, the photoelectric conversion efficiency of the photovoltaic device is suppressed from decreasing, so that the non-single-crystal semiconductor layer is placed on the light incident side of the crystalline semiconductor layer. The light absorption of the non-single-crystal semiconductor layer can be increased as compared with the case where it is formed over the surface. That is, since the thickness and impurity concentration of the non-single-crystal semiconductor layer can be increased, if the non-single-crystal semiconductor layer is formed in the second conductivity type, the first-conductivity-type crystal semiconductor layer and the second-conductivity-type semiconductor layer are formed. A favorable pn junction can be obtained with the non-single-crystal semiconductor layer. As a result, the output characteristics of the photovoltaic device can be improved.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a sectional view showing the structure of a photovoltaic device according to a first embodiment of the present invention. First, the structure of the photovoltaic device according to the first embodiment will be described with reference to FIG.

As shown in FIG. 1, the photovoltaic device according to the first embodiment includes an n-type single crystal silicon substrate 1 containing phosphorus as an n-type impurity. The n-type single crystal silicon substrate 1 is an example of the “crystalline semiconductor layer” in the present invention. The n-type single crystal silicon substrate 1 is a silicon substrate taken from a single crystal silicon ingot formed by the CZ method (czochralski method), and has an impurity concentration of about 2 × 10 ¹⁶ cm ⁻³ . Further, over the entire surface (upper surface) on the light incident side of the n-type single crystal silicon substrate 1, an impurity concentration (about 2 × 10 ¹⁶ cm ⁻³ ) higher than the impurity concentration (about 2 × 10 ¹⁶ cm ⁻³ ) of the n-type single crystal silicon substrate 1. An n-type high impurity concentration region 1 a having about 1 × 10 ¹⁸ cm ⁻³ to about 5 × 10 ¹⁸ cm ⁻³ ) is formed. The n-type high impurity concentration region 1a is an example of the “high impurity concentration region” in the present invention. The n-type high impurity concentration region 1 a is formed in a region having a depth of about 50 nm to about 100 nm from the upper surface of the n-type single crystal silicon substrate 1.

  In addition, a light incident side collector electrode 2 having a thickness of about 25 μm and a width of about 70 μm is formed in a predetermined region on the upper surface of the n-type high impurity concentration region 1a. The light incident side collector electrode 2 is an example of the “collector electrode” and “first collector electrode” of the present invention. The light incident side collector electrode 2 contains a binder made of carbon graphite and silver (Ag) particles, and is sintered at a temperature of about 500 ° C. or higher (about 600 ° C. in the first embodiment). It is formed by a conductive paste of a mold. Further, amorphous silicon nitride having a thickness of about 700 nm is formed on the light incident side collector electrode 2 and on the region on the upper surface of the n-type high impurity concentration region 1a where the light incident side collector electrode 2 is not formed. A passivation layer 3 made of a physical layer is formed. The passivation layer 3 has a function of inactivating defects such as dangling bonds in the vicinity of the upper surface of the n-type single crystal silicon substrate 1 (n-type high impurity concentration region 1a). The passivation layer 3 has a refractive index (about 2.0) lower than the refractive index (about 3.4) of the n-type single crystal silicon substrate 1 (n-type high impurity concentration region 1a). Thus, it has a function as an antireflection layer for suppressing light reflection on the upper surface of the n-type single crystal silicon substrate 1.

  A substantially intrinsic i-type amorphous silicon layer 4 having a thickness of about 15 nm is formed on the surface (lower surface) opposite to the light incident side of the n-type single crystal silicon substrate 1. This i-type amorphous silicon layer 4 is an example of the “non-single-crystal semiconductor layer” and “first non-single-crystal semiconductor layer” in the present invention. The thickness (about 15 nm) of the i-type amorphous silicon layer 4 is set to a thickness that does not substantially contribute to power generation. A p-type amorphous silicon layer 5 having a thickness of about 10 nm is formed on the surface (lower surface) of the i-type amorphous silicon layer 4. The p-type amorphous silicon layer 5 is an example of the “non-single crystal semiconductor layer” and the “second non-single crystal semiconductor layer” in the present invention. The p-type amorphous silicon layer 5 contains about 8 atomic% boron (B) as a p-type impurity. A transparent conductive film 6 made of an ITO (Indium Tin Oxide) layer having a thickness of about 70 nm is formed on the surface (lower surface) of the p-type amorphous silicon layer 5. Further, in a predetermined region on the lower surface of the transparent conductive film 6, a back side collector electrode 7 having a thickness of about 25 μm and a width of about 120 μm is formed. The back side collector electrode 7 is an example of the “second collector electrode” in the present invention. The back-side collector electrode 7 includes a binder made of an epoxy resin, a urethane resin, or the like and silver (Ag) particles, and is formed of a low-temperature firing type conductive paste that is fired at about 200 ° C.

  2-7 is sectional drawing for demonstrating the manufacturing process of the photovoltaic apparatus by 1st Embodiment of this invention. Next, with reference to FIGS. 1-7, the manufacturing process of the photovoltaic apparatus by 1st Embodiment is demonstrated.

First, as shown in FIG. 2, an n-type single crystal silicon substrate 1 containing phosphorus as an n-type impurity and having an impurity concentration of about 2 × 10 ¹⁶ cm ⁻³ is prepared. The n-type single crystal silicon substrate 1 is a silicon substrate taken from a single crystal silicon ingot formed by the CZ method. And after apply | coating a phosphorus glass solution to the whole surface (upper surface) of the light-incidence side of the n-type single crystal silicon substrate 1, the phosphorus glass layer 8 is formed by baking at about 200 degreeC for about 30 minutes. As the phosphorus glass solution, a silicon compound obtained by adding phosphorus as an n-type impurity _(P 2 _{O 5:} from about 6.0 wt%, SiO _2: about 1 g / 100 ml) The use of solutions in organic solvents. Thereafter, the phosphorous glass layer 8 is heated at about 900 ° C. to about 1100 ° C. for about 60 minutes in a nitrogen atmosphere, so that phosphorus is solid-phase diffused from the phosphorous glass layer 8 into the n-type single crystal silicon substrate 1 (thermal diffusion). ) As a result, as shown in FIG. 3, an impurity of about 1 × 10 ¹⁸ cm ⁻³ to about 5 × 10 ¹⁸ cm ⁻³ is formed in a region having a depth of about 50 nm to about 100 nm from the upper surface of the n-type single crystal silicon substrate 1. An n-type high impurity concentration region 1a having (phosphorus) concentration is formed.

  Next, as shown in FIG. 4, after the phosphorus glass layer 8 is removed, a binder made of carbon graphite and silver (Ag) particles are formed in a predetermined region on the upper surface of the n-type high impurity concentration region 1a by screen printing. And then baking at a temperature of about 500 ° C. or higher (about 600 ° C. in the first embodiment) to have a thickness of about 25 μm and a width of about 70 μm. The light incident side collector electrode 2 is formed. Thereafter, the n-type single crystal silicon substrate 1 on which the light incident side collector electrode 2 is formed is immersed in an aqueous solution of about 0.5% HF for about 20 seconds, thereby firing the n-type single crystal when the conductive paste is baked. The oxide film formed on the surface of the silicon substrate 1 is removed.

Next, as shown in FIG. 5, by plasma CVD, on the upper surface of the n-type high impurity concentration region 1 a on the light incident side collector electrode 2 and on the light incident side collector electrode 2. A passivation layer 3 made of an amorphous silicon nitride layer having a thickness of about 700 nm is formed. Specific formation conditions in this case are NH ₃ gas flow rate: about 60 sccm, SiH ₄ gas flow rate: about 15 sccm, pressure: about 50 Pa, and power: about 300 W.

Next, as shown in FIG. 6, substantially intrinsic i-type amorphous silicon having a thickness of about 15 nm on the surface opposite to the light incident side of the n-type single crystal silicon substrate 1 by plasma CVD. A layer 4 and a p-type amorphous silicon layer 5 having a thickness of about 10 nm are formed in this order. The p-type amorphous silicon layer 5 is formed so as to contain about 8 atomic% of boron (B) as a p-type impurity. The specific formation conditions of the i-type amorphous silicon layer 4 at this time are H ₂ gas flow rate: about 100 sccm, SiH ₄ gas flow rate: about 40 sccm, pressure: about 20 Pa, and power: about 150 W. The specific formation conditions of the p-type amorphous silicon layer 5 are as follows: H ₂ gas flow rate: about 40 sccm, SiH ₄ gas flow rate: about 40 sccm, B ₂ H ₆ (2%) gas flow rate: about 20 sccm, pressure: About 20 Pa, power: about 150 W.

Next, as shown in FIG. 7, a transparent conductive film 6 made of an ITO layer having a thickness of about 70 nm is formed on the lower surface of the p-type amorphous silicon layer 5 by sputtering. Specific formation conditions at this time are an Ar gas flow rate: about 10 sccm, an O ₂ gas flow rate: about 15 sccm, a pressure: about 10 Pa, and a power: about 500 W. Finally, after applying a low-temperature firing type conductive paste containing a binder made of epoxy resin or urethane resin and silver (Ag) particles to a predetermined region on the lower surface of the transparent conductive film 6 by a screen printing method, By baking at 200 ° C., the back-side collector electrode 7 having a thickness of about 25 μm and a width of about 120 μm is formed. In this way, the photovoltaic device according to the first embodiment shown in FIG. 1 is formed.

  In the first embodiment, as described above, the high temperature sintering type conductive paste is baked at a temperature of about 500 ° C. or higher, so that the light incident side collector is formed on the light incident side surface of the n-type single crystal silicon substrate 1. After the electrode 2 is formed, the i-type amorphous silicon layer 4 and the p-type amorphous silicon layer 5 are formed on the surface of the n-type single crystal silicon substrate 1 on the side opposite to the light incident side. Since it is possible to suppress the temperature of about 500 ° C. or more when the side collector electrode 2 is formed from being applied to the i-type amorphous silicon layer 4 and the p-type amorphous silicon layer 5, the i-type amorphous Defects are deactivated from i-type amorphous silicon layer 4 and p-type amorphous silicon layer 5 due to heating of silicon layer 4 and p-type amorphous silicon layer 5 to about 500 ° C. or higher. The desorption of hydrogen can be suppressed. For this reason, since it can suppress that the defect density of the i-type amorphous silicon layer 4 and the p-type amorphous silicon layer 5 increases, it suppresses that the recombination of the carrier resulting from a defect increases. be able to. As a result, even when the light incident side collector electrode 2 is formed of a high-temperature sintered type conductive paste, it is possible to suppress a decrease in output characteristics of the photovoltaic device. Further, n-type impurities (phosphorus) and p-type impurities (boron) are respectively emitted from the n-type single crystal silicon substrate 1 and the p-type amorphous silicon layer 5 due to heating to about 500 ° C. or higher, respectively. , Solid phase diffusion (thermal diffusion) into the i-type amorphous silicon layer 4 can be suppressed. This can inhibit the pin junction formed by the p-type amorphous silicon layer 5, the i-type amorphous silicon layer 4 and the n-type single crystal silicon substrate 1 from being inhibited, so that the photovoltaic power It can suppress more that the output characteristic of an apparatus falls.

  In the first embodiment, the i-type amorphous silicon layer 4 and the p-type amorphous silicon layer 5 are formed on the surface of the n-type single crystal silicon substrate 1 on the side opposite to the light incident side. Compared to the case where the n-type amorphous silicon layer 4 and the p-type amorphous silicon layer 5 are formed on the light incident side surface of the n-type single crystal silicon substrate 1, the i-type amorphous silicon layer 4 and the p-type amorphous silicon layer 4 are formed. Light incident on the n-type single crystal silicon substrate 1 through the amorphous silicon layer 5 is reduced. As a result, even when the light absorption of the i-type amorphous silicon layer 4 and the p-type amorphous silicon layer 5 is large, the photoelectric conversion efficiency of the photovoltaic device is suppressed from being lowered. Compared to the case where the crystalline silicon layer 4 and the p-type amorphous silicon layer 5 are formed on the light incident side surface of the n-type single crystal silicon substrate 1, the i-type amorphous silicon layer 4 and the p-type amorphous silicon layer are formed. The light absorption of the quality silicon layer 5 can be increased. That is, the thickness of the i-type amorphous silicon layer 4 and the p-type amorphous silicon layer 5 can be increased and the impurity concentration of the p-type amorphous silicon layer 5 can be increased. A better pin junction can be obtained by the silicon layer 5, the i-type amorphous silicon layer 4 and the n-type single crystal silicon substrate 1. As a result, the output characteristics of the photovoltaic device can be improved.

  In the first embodiment, by forming the n-type high impurity concentration region 1a on the surface of the n-type single crystal silicon substrate 1 that is in contact with the light incident side collector electrode 2, light is emitted from the n-type high impurity concentration region 1a. Since a good ohmic contact can be obtained with respect to the incident side collector electrode 2, the resistance between the n type single crystal silicon substrate 1 and the light incident side collector electrode 2 through the n type high impurity concentration region 1a can be reduced. it can.

  In the first embodiment, the passivation layer 3 that inactivates defects such as dangling bonds in the vicinity of the surface of the n-type single crystal silicon substrate 1 is provided on the surface of the n-type single crystal silicon substrate 1 on the light incident side. By forming, defects near the surface of the n-type single crystal silicon substrate 1 are reduced, so that carriers can be prevented from being captured by the defects. As a result, recombination of carriers near the surface on the light incident side of the n-type single crystal silicon substrate 1 can be suppressed, so that the output characteristics of the photovoltaic device can be further improved.

  Further, in the first embodiment, the low temperature firing type conductive paste is fired at a low temperature of about 200 ° C., on the lower surface of the transparent conductive film 6 formed on the side opposite to the light incident side of the n-type single crystal silicon substrate 1. By forming the back side collector electrode 7 on the surface, the i-type amorphous silicon layer 4 and the p-type amorphous silicon layer 5 are given a temperature exceeding about 200 ° C. when the back side collector electrode 7 is formed. Can be suppressed. As a result, the i-type amorphous silicon layer 4 and the p-type amorphous silicon layer 5 are heated to a temperature exceeding about 200 ° C. The desorption of hydrogen that inactivates defects from the silicon layer 5 can be suppressed. For this reason, since it can suppress that the defect density of the i-type amorphous silicon layer 4 and the p-type amorphous silicon layer 5 increases, it can suppress that the recombination of the carrier by a defect increases. it can. As a result, it is possible to further suppress the output characteristics of the photovoltaic device from being deteriorated. Further, n-type impurities (phosphorus) and p-type impurities (boron) are respectively emitted from n-type single crystal silicon substrate 1 and p-type amorphous silicon layer 5 due to heating to a temperature exceeding about 200 ° C. , Respectively, solid phase diffusion (thermal diffusion) to the i-type amorphous silicon layer 4 can be suppressed. This can inhibit the pin junction formed by the p-type amorphous silicon layer 5, the i-type amorphous silicon layer 4 and the n-type single crystal silicon substrate 1 from being inhibited, so that the photovoltaic power It can suppress more that the output characteristic of an apparatus falls.

(Second Embodiment)
FIG. 8 is a sectional view showing the structure of the photovoltaic device according to the second embodiment of the present invention. With reference to FIG. 8, the structure of the photovoltaic device according to the second embodiment will be described. In the photovoltaic device according to the second embodiment, unlike the above-described photovoltaic device according to the first embodiment, a region in contact with the light incident side collector electrode 2 on the light incident side surface of the n-type single crystal silicon substrate 11. The n-type high impurity concentration region 11a is formed only in the region in the vicinity of. That is, the n-type high impurity concentration region 11 a is not formed in a region other than the region near the light incident side collector electrode 2 on the light incident side surface of the n type single crystal silicon substrate 11. The remaining structure of the photovoltaic device according to the second embodiment is similar to the structure of the photovoltaic device according to the first embodiment described above.

  FIGS. 9-11 is sectional drawing for demonstrating the manufacturing process of the photovoltaic apparatus by 2nd Embodiment of this invention. Next, with reference to FIGS. 9-11, the manufacturing process of the photovoltaic apparatus by 2nd Embodiment is demonstrated.

As a manufacturing process of the photovoltaic device according to the second embodiment, as shown in FIG. 9, a phosphorus glass solution is applied to a predetermined region on the light incident side surface of the n-type single crystal silicon substrate 11 by screen printing. Thereafter, the phosphor glass layer 18 is formed by baking at about 200 ° C. for about 30 minutes. Then, phosphorus is solid-phase-diffused (thermal diffusion) from the phosphorus glass layer 18 into the n-type single crystal silicon substrate 11 by heating at about 900 ° C. to about 1100 ° C. for about 60 minutes in a nitrogen atmosphere. As a result, as shown in FIG. 10, an impurity (phosphorus) concentration of about 1 × 10 ¹⁸ cm ⁻³ to about 5 × 10 ¹⁸ cm ⁻³ in a predetermined region on the light incident side surface of the n-type single crystal silicon substrate 11. An n-type high impurity concentration region 11a having n is formed. The n-type high impurity concentration region 11a is formed in a region having a depth of about 50 nm to about 100 nm from the surface of the n-type single crystal silicon substrate 11.

  Next, as shown in FIG. 11, after removing the phosphor glass layer 18, a high-temperature sintered type conductive material is formed on the surface of the n-type single crystal silicon substrate 11 where the n-type high impurity concentration region 11 a is formed. The light incident side collector electrode 2 made of paste is formed. The manufacturing process of the photovoltaic device according to the second embodiment other than the above is the same as the manufacturing process of the photovoltaic device according to the first embodiment.

In the second embodiment, as described above, the n-type high impurity concentration region 11a is formed only in the region in the vicinity of the region in contact with the light incident side collector electrode 2 on the light incident side surface of the n type single crystal silicon substrate 11. By doing so, it is about 1 × 10 ¹⁸ cm ⁻³ to about 5 × 10 ¹⁸ cm ⁻³ as compared with the case where the n-type high impurity concentration region 11 a is formed over the entire surface of the n-type single crystal silicon substrate 11. By having the impurity concentration, the n-type high impurity concentration region 11a having many defects caused by impurities can be reduced. As a result, the number of carriers trapped by the defects in the n-type high impurity concentration region 11a can be reduced, so that recombination of carriers by being trapped by the defects can be suppressed. As a result, the output characteristics of the photovoltaic device can be further improved as compared with the first embodiment in which the n-type high impurity concentration region is provided over the entire surface on the light incident side of the n-type single crystal silicon substrate 11. it can.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and further includes all modifications within the meaning and scope equivalent to the scope of claims for patent.

  For example, in the above embodiment, a photovoltaic device having a structure in which an i-type amorphous silicon layer and a p-type amorphous silicon layer are stacked on the surface opposite to the light incident side of an n-type single crystal silicon substrate. Although described as an example, the present invention is not limited to this, and a collector electrode made of a high-temperature sintered conductive paste is formed on the surface of the light-incident side of the crystalline semiconductor layer, and the light incident on the crystalline semiconductor layer. The present invention can be widely applied to photovoltaic devices in which a non-single-crystal semiconductor layer is formed on the surface opposite to the side.

  In the above embodiment, an n-type high impurity concentration region is formed on the light incident side surface of the n-type single crystal silicon substrate. However, the present invention is not limited to this, and the light incident side of the n-type single crystal silicon substrate is not limited thereto. An n-type high impurity concentration region may not be formed on the surface. That is, the n-type single crystal silicon substrate may be brought into contact with the light incident side collector electrode without passing through the n-type high impurity concentration region.

  Moreover, in the said embodiment, although the back side collector electrode was formed using the low-temperature baking type electrically conductive paste baked at about 200 degreeC, this invention is not limited to this, and is baked at the temperature of about 300 degrees C or less. If the conductive paste is a low-temperature firing type, the back-side collector electrode may be formed using a low-temperature firing type conductive paste that is fired at a temperature other than about 200 ° C.

  In the above embodiment, the p-type amorphous silicon layer as the second non-single crystal semiconductor layer contains about 8 atomic% of boron as a p-type impurity. However, the present invention is not limited to this, and about 0.0. If it is 3 atomic percent or more and about 10 atomic percent or less, an amount of impurities other than about 8 atomic percent may be included in the second non-single-crystal semiconductor layer.

  Moreover, in the said embodiment, although the p-type amorphous silicon layer as a 2nd non-single-crystal semiconductor layer was formed in thickness of about 10 nm, this invention is not restricted to this, In thickness of about 3 nm or more and about 30 nm or less If present, the second non-single-crystal semiconductor layer may be formed in any thickness other than about 10 nm.

  In the above embodiment, the i-type amorphous silicon layer is formed with a thickness of about 15 nm. However, the present invention is not limited to this, and the i-type amorphous silicon layer has a thickness of about 10 nm to about 30 nm. The layer may be formed to any thickness other than about 15 nm. If the i-type amorphous silicon layer is formed to a thickness of about 10 nm to about 30 nm, the resistance in the thickness direction of the i-type amorphous silicon layer can be easily reduced by the thickness of the i-type amorphous silicon layer of the carrier. The resistance can be set to a level that does not substantially impede movement in the direction. The thickness of about 10 nm or more and about 30 nm or less is such a thickness that the i-type amorphous silicon layer does not substantially contribute to power generation.

  In the above embodiment, the passivation layer made of the amorphous silicon nitride layer is formed to a thickness of about 700 nm. However, the present invention is not limited to this, and the passivation layer made of the amorphous silicon nitride layer is about 800 nm. You may form in thickness of about 1000 nm. If it forms in such thickness, a passivation layer can be functioned more favorably as an antireflection layer.

  In the above embodiment, the passivation layer is formed of an amorphous silicon nitride layer. However, the present invention is not limited to this, and the passivation layer is formed of an amorphous silicon layer or an amorphous silicon oxide layer. Also good. Note that when the passivation layer is formed of an amorphous silicon nitride layer, light absorption loss due to the passivation layer can be reduced as compared with the case where the passivation layer is formed of an amorphous silicon layer.

  Moreover, in the said embodiment, although the back surface side collector electrode was formed only in the predetermined area | region on the lower surface of a transparent conductive film, this invention is not limited to this, The back surface side collector electrode is entirely on the lower surface of a transparent conductive film. It may be formed across.

  In the second embodiment, a phosphorous glass layer for diffusing impurities is formed by applying a phosphorous glass solution to a predetermined region on the light incident side surface of the n-type single crystal silicon substrate by screen printing. However, the present invention is not limited to this, and a layer for diffusing impurities may be formed in a predetermined region on the light incident side surface of the n-type single crystal silicon substrate using a predetermined mask process.

It is sectional drawing which showed the structure of the photovoltaic apparatus by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing process of the photovoltaic apparatus by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing process of the photovoltaic apparatus by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing process of the photovoltaic apparatus by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing process of the photovoltaic apparatus by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing process of the photovoltaic apparatus by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing process of the photovoltaic apparatus by 1st Embodiment of this invention. It is sectional drawing which showed the structure of the photovoltaic apparatus by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing process of the photovoltaic apparatus by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing process of the photovoltaic apparatus by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing process of the photovoltaic apparatus by 2nd Embodiment of this invention.

Explanation of symbols

1,11 n-type single crystal silicon substrate (crystalline semiconductor layer)
1a, 11a n-type high impurity concentration region 2 Light incident side collector electrode (first collector electrode, collector electrode)
3 Passivation layer 4 i-type amorphous silicon layer (first non-single crystal semiconductor layer, non-single crystal semiconductor layer)
5 p-type amorphous silicon layer (second non-single crystal semiconductor layer, non-single crystal semiconductor layer)
6 Transparent conductive film 7 Back side collector (second collector)
8, 18 Phosphorus glass layer

Claims (7)

A first conductive type crystalline semiconductor layer;
A first collector electrode made of a high-temperature sintered conductive paste formed on the surface of the crystalline semiconductor layer on the light incident side and fired at a temperature of 500 ° C. or higher;
A photovoltaic device comprising: a non-single crystal semiconductor layer formed on a surface of the crystalline semiconductor layer opposite to the light incident side.   And a high impurity concentration region formed on a surface of the crystalline semiconductor layer in contact with the first collector electrode and having an impurity concentration higher than the impurity concentration of the first conductivity type of the crystalline semiconductor layer. Item 2. The photovoltaic device according to item 1.   3. The photovoltaic device according to claim 1, further comprising a layer formed on the light incident side surface of the crystalline semiconductor layer and inactivating a defect in the vicinity of the surface of the crystalline semiconductor layer. 4. .   4. The method according to claim 1, further comprising a second collector electrode formed on a surface of the non-single-crystal semiconductor layer and made of a low-temperature firing type conductive paste that is fired at a temperature of 300 ° C. or lower. The photovoltaic device described.   The non-single crystal semiconductor layer includes a substantially intrinsic first non-single crystal semiconductor layer formed on a surface opposite to the light incident side of the crystalline semiconductor layer, and the first non-single crystal semiconductor layer. The photovoltaic device of any one of Claims 1-4 containing the 2nd non-single-crystal semiconductor layer of the 2nd conductivity type formed on the surface of this.   6. The photovoltaic device according to claim 5, wherein the second non-single-crystal semiconductor layer contains not less than 0.3 atom% and not more than 10 atom% of the second conductivity type impurity and has a thickness of not less than 3 nm and not more than 30 nm. Power equipment. Forming a collector electrode on the light incident side surface of the first conductive type crystalline semiconductor layer by firing a high temperature sintered type conductive paste at a temperature of 500 ° C. or higher;
Forming a non-single-crystal semiconductor layer on a surface of the crystalline semiconductor layer opposite to the light incident side after forming the collector electrode.

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