JP2005182290A - Data transfer control device and data transfer control method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To execute data transfer control by using an FIFO having a data capacity which is smaller than the maximum transfer length of a packet at the time of transmitting/receiving continuous data such as a packet. <P>SOLUTION: An FIFO 10 has a capacity which is smaller than the maximum transfer length of a packet. A transmission control circuit 11 is composed of a transmission writing pointer 11a and a transmission reading pointer 11c representing data write quantity and data reading quantity corresponding to FIFO blocks 10a and 10b and an FIFO block switching control part 11b for switching the FIFO blocks 10a and 10b according to storage data quantity represented by them. A transmission write control part 12 or a transmission reading control part 13 acquires data storage information from the transmission control circuit 11, and outputs a permission signal to a transmission transfer origin or transmission transfer destination when writing or reading is possible. Also, when reading is impossible, a transmission TERM control part outputs a transmission TERM signal to temporarily stop data transmission to the transmission transfer destination. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a data transfer control device and a data transfer control method in a data transfer system that uses a first-in first-out memory (FIFO) and requires processing for each unit such as a packet.

  In recent years, the interface of a PC peripheral device represented by a DVD has been developed from a parallel interface as represented by, for example, IEEE 1394 / USB 2.0 that performs processing in units of packets in the format shown in FIG. Transition to serial interface is progressing. As a method for processing such serial data, Patent Document 1 discloses a data transfer control device that can efficiently use a memory without delaying processing of a data transfer request. The data transfer control device will be described below with reference to FIGS.

  FIG. 10 shows a FIFO that allows one buffer memory to function virtually as two memories. The buffer controller 2 causes the buffer memory 2a to function as two FIFO first blocks and second blocks, and controls data writing and reading. The boundary controller 5 controls the boundary between the first block and the second block of the FIFO, and the data controller 4 calculates the remaining memory amount based on the boundary value controlled by the boundary controller 5 and the stored data. By comparing the remaining amount with the information on the packet sizes A and B of the data obtained from the write control units 3A and 3B, it is determined whether data writing transmitted from the transfer source is possible / impossible. Further, the data controller 4 determines whether or not data stored in the buffer memory 2a can be read, and transmits the result to the read control units 1A and 1B. In this way, the buffer memory functions as two FIFOs, and it is possible to prevent overflow by making a write / non-writable determination in advance for each FIFO. Furthermore, the boundary between two FIFO blocks can be changed dynamically.

  Serial ATA, which is a next-generation high-speed interface that is currently in practical use, is a serial interface that performs transfer in units of packets. A special pattern called HOLD can be inserted in the middle of continuous data in packet transfer. . However, a system for transferring packets in this way has not been established yet.

  FIG. 9A shows an example of normal transfer. The transmitting side transmits a file start signal SOF (Start Of Frame) and continuously transmits DATA. Next, immediately after the DATA transmission ends, a confirmation signal CRC (Cyclic Redundancy Check) is transmitted, and then a file end signal EOF (End Of Frame) is transmitted.

  FIG. 9B shows a transfer example when the transmission side uses HOLD. The transmission side outputs SOF at the beginning of the packet, and then transmits DATA. A special pattern called HOLD is inserted in the middle of data transmission, data transfer is suspended, the remaining data is transmitted after HOLD is canceled, CRC is transmitted immediately after the last data, and EOF is transmitted finally. To do. The reception side returns HOLDA to the transmission side in response to reception of the HOLD pattern.

FIG. 9C shows a case where the receiving side issues HOLD. The transmission side outputs SOF at the beginning of the packet, and then continuously transmits DATA. When HOLD is received in the middle of data transmission, the data transmission is temporarily stopped and a special pattern called HOLDA is inserted. Then, after the HOLD is released, the remaining data is transmitted, a CRC is transmitted immediately after the last data, and an EOF is transmitted finally.
Japanese Patent Laid-Open No. 11-161467 (page 2-7, FIG. 1)

  However, in the technique described in Patent Document 1, the maximum packet length is required even when the FIFO capacity is minimum. As a result, the circuit scale increases, and the free space during data writing and reading also increases, so the memory utilization efficiency decreases. In addition, as the capacity increases, the waiting time for the other operation during one operation of writing or reading increases, and the efficiency of data transfer also decreases. On the other hand, when the transmitted / received packet is shorter than the maximum packet length, a non-use area is generated in the memory, and in this case as well, there arises a problem that the use efficiency of the memory is lowered.

  Furthermore, if the transfer rate of the data transfer source and the transfer rate of the data transfer destination are different, the actual transfer rate must be matched to the transfer rate on the slow side, so continuous data like packets When a packet is transmitted, there is a problem that a long period during which packets are not transferred is included, resulting in inefficient transfer.

  The present invention solves the above-described conventional problems, and an object of the present invention is to provide a data transfer control device and a data transfer control method for efficiently transferring data while reducing the circuit scale.

  In order to solve the above problem, in the present invention, the above-described free space during writing and reading operations and the waiting time of the other operation during one of writing and reading operations are reduced as the capacity decreases. Focusing on this point, the transfer can be performed using a FIFO block having a smaller capacity than the continuous data to be handled. As a result, the circuit scale can be greatly reduced, and the above-described free space can be reduced to increase the memory utilization efficiency. At the same time, the above-described standby time can also be reduced to increase the transfer efficiency.

  In other words, the data transfer control device according to claim 1 is a data transfer control device for transferring continuous data having a predetermined length to a transfer destination, and has a plurality of FIFO blocks having a storage capacity smaller than the maximum size of the continuous data. A FIFO and a write control unit that detects the amount of data stored in the FIFO block, switches the FIFO block that has completed storing data to the FIFO block that can store data, and sequentially writes the FIFO block; In the case where there is the FIFO block in which the data storage is completed, the data from the FIFO block in which the data storage has been completed is stored even when the data writing to another FIFO block is controlled by the write control unit. And a read control unit for reading the data.

  According to a second aspect of the present invention, in the data transfer control device according to the first aspect, the transmission TERM control circuit for outputting a transmission TERM signal for temporarily stopping the data reading to the transfer destination when the data cannot be read. It is characterized by providing.

  According to a third aspect of the present invention, in the data transfer control device according to the first aspect, a reception TERM control circuit for outputting a reception TERM signal for temporarily stopping data writing to a transfer source when data writing is impossible. It is characterized by providing.

  The data transfer control device according to claim 4 is a data transfer control device for transferring continuous data having a predetermined length to a transfer destination, a FIFO having a FIFO block having a storage capacity smaller than the maximum size of the continuous data; The remaining amount of data in the FIFO block is detected based on the difference obtained by subtracting the total amount of data read from the FIFO from the total amount of data written to the FIFO block, and the FIFO block is detected according to the remaining amount of data. And a control circuit for controlling writing and reading of data.

  According to a fifth aspect of the present invention, in the data transfer control device according to the fourth aspect, a transmission TERM control circuit for outputting a transmission TERM signal for temporarily stopping data reading to a transfer destination when data cannot be read. It is characterized by providing.

  According to a sixth aspect of the present invention, in the data transfer control device according to the fourth aspect, when a data write is impossible, a receive TERM control circuit that outputs a received TERM signal for temporarily stopping the data write to the transfer source It is characterized by providing.

  The data transfer control device according to claim 7 is a data transfer control device for transferring continuous data having a predetermined length to a transmission transfer destination, wherein the FIFO has a plurality of FIFO blocks having a storage capacity smaller than the maximum size of the continuous data. When the data for the maximum capacity is stored in the FIFO block at the time of data writing, the FIFO block is switched to another FIFO block having a free area, and when there is no data in the FIFO block at the time of data reading, A FIFO block switching control unit for switching to another FIFO block in which data is stored, a transmission write pointer that indicates the amount of data written by a count value that is written and incremented, and that is cleared when the FIFO block is switched; When data is read, A transmission control circuit that includes a transmission read pointer that indicates the amount of data read by the incremented count value and is cleared when the FIFO block is switched, and a capacity that indicates the maximum capacity of the FIFO block included in the FIFO block switching control unit Whether or not to write data while outputting a transmit write enable signal to the transmission transfer destination when there is a FIFO block whose count value indicated by the transmission write pointer is smaller than the pointer value and is not being read. A transmission write control unit that transmits a write control signal to the transmission control circuit, and a transmission read enable signal is output to the transmission transfer destination when there is at least one FIFO block that stores data and is not being written. On the other hand, whether or not to read A transmission read control unit that transmits a read control signal to the transmission control circuit, and a transmission TERM signal that temporarily stops data transmission to the transmission transfer destination when data cannot be read from any of the FIFO blocks And a transmission TERM control unit for outputting.

  A data transfer control device according to an eighth aspect of the invention is a data transfer control device for transferring continuous data having a predetermined length to a transmission destination, a FIFO having a storage capacity smaller than the maximum size of the continuous data, and data writing The transmission write pointer indicating the amount of data written by the count value incremented and incremented, the transmission read pointer indicating the data amount read by the count value incremented and read, and the maximum capacity of the FIFO A transmission control circuit including a capacity pointer, and a transmission write enable signal when the data can be stored in the FIFO, and a write control signal indicating whether or not to write is transmitted to the transmission control circuit. Transmit write controller and the transmit write pointer When the difference obtained by subtracting the count value of the transmission read pointer from the event value is greater than a predetermined value, a transmission read enable signal is output to the transmission transfer destination, while a read control signal indicating whether or not to perform the read is transmitted. A transmission TERM that includes a transmission read control unit that transmits to the control circuit and a transmission permission setting register that holds the predetermined value, and temporarily stops data transmission to the transmission transfer destination when the difference is smaller than the predetermined value And a transmission TERM control unit that outputs a signal.

  The invention according to claim 9 is the data transfer control device according to claim 7, wherein the transmission TERM control circuit receives information based on a data write time and a data read time from the transmission control circuit, and the data write time It is characterized in that the width of the transmission TERM signal is automatically changed so as to fill the difference with the data reading time.

  The data transfer control device according to claim 10 is a data transfer control device for transferring continuous data having a predetermined length to a reception transfer destination, wherein the FIFO has a plurality of FIFO blocks having a storage capacity smaller than the maximum size of the continuous data. When the data of the maximum capacity is stored in the FIFO block at the time of data writing, the data is switched to another FIFO block having a free area, and when the data is read from the FIFO block at the time of data reading, the data A FIFO switching control unit that switches to the other FIFO block in which is stored, a data write amount that is written and incremented by a count value that is written, a reception write pointer that is cleared when the FIFO block is switched, and data Is read and ink A reception control circuit including a reception read pointer that is cleared when the FIFO block is switched, and a capacity that indicates a maximum capacity of the FIFO block included in the FIFO block switching control unit When the count value indicated by the transmission write pointer is smaller than the pointer value and there is the FIFO block that is not being read, the reception write enable signal is output to the reception transfer destination while writing whether or not writing is to be performed. When there is at least one FIFO block in which data is stored and data is not being written, the reception write control unit that transmits a control signal to the reception control circuit outputs a reception readable signal to the reception transfer destination, The read control signal indicating whether or not to perform the read A reception read control unit for transmitting to a communication control circuit, and a reception TERM control unit for outputting a reception TERM signal for temporarily stopping data reception from the reception transfer source when data cannot be written to any of the FIFO blocks It is characterized by providing.

  A data transfer control device according to an eleventh aspect of the present invention is a data transfer control device for transferring continuous data having a predetermined length to a reception transfer destination, a FIFO having a storage capacity smaller than the maximum size of the continuous data, and data writing The received write pointer indicating the amount of data written by the count value incremented and incremented, the received read pointer indicating the amount of data read by the count value incremented and read, and the maximum capacity of the FIFO When the difference between the count values of the reception control circuit and the reception write pointer and the reception read pointer is smaller than a predetermined value, a reception write enable signal is output to the reception transfer source while writing is performed. A write control signal indicating whether or not to perform the reception control. A reception write control unit to be transmitted to the circuit, and whether data is stored in the FIFO and whether or not reading is performed while outputting a reception readable signal to the reception transfer destination when data is not written. A reception read control unit that transmits a read control signal to the reception control circuit, and a reception permission setting register that holds the predetermined value. When the difference is larger than the predetermined value, data reception from the reception transfer source And a reception TERM control unit for outputting a reception TERM signal for temporarily stopping the transmission.

  According to a twelfth aspect of the present invention, in the data transfer control device according to the tenth aspect, the reception TERM control circuit receives information based on a data write time and a data read time from the reception control circuit, and receives the data write time. It is characterized in that the width of the received TERM signal is automatically changed so as to fill the difference with the data reading time.

  According to a thirteenth aspect of the present invention, in the data transfer control device according to the eleventh aspect, the reception control circuit further receives data from the number of data corresponding to the predetermined value even after the reception TERM signal is output. It is characterized by doing.

  According to a fourteenth aspect of the present invention, in the data transfer control device according to the eleventh aspect, the reception TERM control unit is configured to receive a reference value for determining the output of the reception TERM signal and the output after the reception TERM signal is output. A full permission register having a tolerance value for determining the number of data is provided.

  The data transfer control method according to claim 15 is a data transfer control method for transferring continuous data having a predetermined length to a transmission transfer destination, wherein the FIFO block has a storage capacity smaller than the maximum size of the continuous data. A step of sequentially storing continuous data; a step of switching to another FIFO block having a free area when the FIFO block stores data of the maximum capacity at the time of data writing; and a step of switching the FIFO at the time of data reading. When there is no data in the block, the step of switching to the other FIFO block in which data is stored, and when the amount of data written is smaller than the maximum capacity of the FIFO block and reading is not performed, transmission Output the transmit writable signal to the transfer source and before When data is stored in the FIFO block and writing is not performed, a step of outputting a transmission readable signal to the transmission transfer destination and when reading of data from any of the FIFO blocks is impossible, And a step of outputting a transmission TERM signal for temporarily stopping data transmission to the transmission transfer destination.

  The data transfer control method according to claim 16 is a data transfer control method for transferring continuous data having a predetermined length to a transfer destination, wherein the continuous data is written in a FIFO having a storage capacity smaller than the maximum size of the continuous data. A step of reading the data stored in the FIFO, a step of outputting a transmission writable signal when the data can be stored in the FIFO, and a transmission control signal indicating whether or not writing is performed A step of transmitting the original, a step of outputting a transmission readable signal when the difference between the total amount of data written and the total amount of data read is larger than a predetermined value, and whether or not to perform the reading When the read control signal is transmitted to the transmission destination, and when the difference is smaller than the predetermined value Characterized in that it comprises a step of outputting a transmission TERM signal to suspend data transmission to the transmission destination.

  The data transfer control method according to claim 17 is a data transfer control method for transferring continuous data having a predetermined length to a reception transfer destination, wherein the FIFO block has a storage capacity smaller than the maximum size of the continuous data. A step of sequentially storing continuous data; a step of switching to another FIFO block having a free area when the FIFO block stores data of the maximum capacity at the time of data writing; and a step of switching the FIFO at the time of data reading. When there is no more data in the block, switching to another FIFO block in which data is stored, and when the amount of data written is less than the maximum capacity of the FIFO block and reading is not being performed Output the reception writable signal to the transfer destination and the previous When data is stored in the FIFO block and writing is not performed, a step of outputting a reception readable signal to the reception transfer destination, and when writing of data to any of the FIFO blocks is impossible, And a step of outputting a reception TERM signal for temporarily stopping data reception from the reception transfer source.

  The data transfer control method according to claim 18 is a data transfer control method for transferring continuous data having a predetermined length to a reception transfer destination, wherein the continuous data is stored in a FIFO having a storage capacity smaller than the maximum size of the continuous data. A step of writing, a step of reading data stored in the FIFO, a step of outputting a reception writable signal when data can be stored in the FIFO, and a write control signal indicating whether or not to perform writing A step of transmitting to a transfer source, a step of outputting a reception readable signal when the difference between the total amount of data written and the total amount of data read is greater than a predetermined value, and whether to perform the reading A step of transmitting a read control signal indicating whether or not to the reception transfer destination, and the difference is larger than the predetermined value. Itoki, characterized in that it comprises a step of outputting a reception TERM signal to suspend data reception from the reception transfer source.

  The invention according to claim 19 is the data transfer control device according to claim 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13 or 14, wherein the continuous data is a packet. It is characterized by being data.

  According to a twentieth aspect of the present invention, in the data transfer control method according to the fifteenth, sixteenth, seventeenth or eighteenth aspect, the continuous data is packet data.

  As described above, according to the first aspect of the present invention, the standby time for the next operation during the write or read operation is reduced and unnecessary by switching a plurality of FIFO blocks smaller than the maximum continuous data size. Memory area can also be reduced.

  Further, in the inventions according to claims 2, 3, 5 and 6, when a transfer rate difference occurs between the transfer source and the transfer destination, the TERM signal is output during the transfer, and the operation on the higher transfer rate side is performed. Since the transfer rate of the transfer source and the transfer destination can be transferred together by temporarily stopping the transfer, it is possible to perform transfer without reducing the overall transfer rate even without having the maximum size FIFO. .

  Further, in the present invention, the remaining amount of data in the FIFO block is detected by a difference obtained by subtracting the total amount of read data from the total amount of written data, and the FIFO block smaller than the maximum size of continuous data is detected. Thus, since writing and reading are controlled based on the remaining data amount, transfer control can be performed using a small FIFO.

  According to the seventh aspect of the invention, by switching a plurality of FIFO blocks smaller than the maximum size of continuous data, it is possible to reduce the waiting time for the next operation during the write or read operation and also reduce unnecessary memory areas. Furthermore, when a difference in transfer rate occurs between the transfer source and the transfer destination, a transmission TERM signal is output during transfer, and reading from the FIFO is stopped for an appropriate time, so that the transfer source and transfer destination are stopped. Therefore, it is possible to perform transfer without reducing the overall transfer rate without having a FIFO of the maximum size.

  In the invention according to claim 8, the amount of stored data is detected based on the difference between the count values of the transmission write pointer and the transmission read pointer, and the FIFO block smaller than the maximum size of continuous data is detected. When data is written and read, and the difference value indicating the amount of stored data is smaller than the value of the transmission permission setting register, that is, when the read operation cannot be performed normally, reading is impossible. Since the transmission TERM signal indicating the signal is output to the transfer destination and the transfer is temporarily stopped, it is possible to control transfer using a small FIFO while effectively matching the difference in transfer rate between the transfer source and the transfer destination. It becomes.

  Further, in the present invention, a signal corresponding to the difference between the data writing time and the data reading time is sent from the transmission control circuit to the transmission TERM control circuit, and the width of the transmission TERM signal is adjusted based on the signal. Therefore, it becomes possible to transfer at an optimum transfer rate.

  Subsequently, in the invention according to claim 10, by switching a plurality of FIFO blocks smaller than the maximum size of continuous data, the waiting time for the next operation during the write or read operation is reduced, and an unnecessary memory area Further, when a difference in transfer rate occurs between the transfer source and the transfer destination, the transfer source is output by outputting a received TERM signal in the middle of transfer and stopping writing to the FIFO for an appropriate time. Therefore, it is possible to perform transfer without reducing the overall transfer rate without having the maximum size FIFO.

  According to the eleventh aspect of the present invention, the amount of stored data is detected based on the difference between the count values of the reception write pointer and the reception read pointer, and the FIFO block smaller than the maximum size of continuous data is detected. When data is written and read, and the difference value indicating the stored data amount is larger than the value of the reception permission setting register, that is, when the write operation cannot be normally performed, writing is impossible. Is output to the transfer source and the transfer is temporarily stopped. Therefore, it is possible to control transfer using a small FIFO while effectively matching the difference in transfer rate between the transfer source and the transfer destination. It becomes.

  According to the twelfth aspect of the present invention, a signal corresponding to the difference between the data writing time and the data reading time is sent from the reception control circuit to the reception TERM control circuit, and the width of the reception TERM signal is adjusted based on the signal. Therefore, it becomes possible to transfer at an optimum transfer rate.

  Subsequently, in the invention described in claim 13, since the number of data corresponding to the reception permission setting register can be further received even after the reception TERM signal is output, the overrun data can be received. It becomes possible.

  In the invention according to claim 14, the output of the received TERM signal is linked with the number of data that can be received after the output of the signal so that the FIFO can be used efficiently and easily controlled. It becomes possible.

  Furthermore, in the invention described in claim 15, transmission control can be performed without requiring a FIFO capacity corresponding to the maximum size of continuous data.

  Subsequently, in the invention described in claim 16, it is possible to perform reception control without requiring a FIFO capacity corresponding to the maximum size of continuous data.

  According to the above configuration, it is possible to efficiently perform data transfer control using a FIFO that does not have the maximum packet length, and it is possible to realize a significant reduction in FIFO capacity.

  In particular, according to the inventions of claims 2, 3, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17 and 18, the packet transfer is continuously performed. It is possible to establish a system that stops in the middle of packet data in a system that transmits and receives data.

  Furthermore, according to the thirteenth aspect of the present invention, it is possible to realize system stability and expandability by controlling the received TERM signal in consideration of overrun during reception.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In this embodiment, a serial ATA interface is used as the data transfer control device and method according to the present invention. However, the present invention is not limited to serial ATA.

(First embodiment)
FIG. 1 shows a data transfer control device of a first embodiment in a system for transmitting and receiving continuous data. In this embodiment, an example of handling packet data as continuous data is shown. In FIG. 1, the FIFO 10 includes two FIFO blocks 10 a and 10 b having a capacity smaller than the maximum packet length, and writing and reading of transmission data are controlled by the control of the transmission control circuit 11. However, the FIFO blocks 10a and 10b cannot process reading and writing simultaneously.

  The transmission control circuit 11 uses a transmission write pointer 11a indicating the stored data amount by a count value incremented according to the written data amount and a count value incremented according to the read data amount. A transmission read pointer 11c indicating the read data amount and a FIFO block switching control unit 11b are provided. The FIFO block switching control unit 11b has a capacity pointer 11d indicating the maximum capacity of the FIFO block 10a and a capacity pointer 11e indicating the maximum capacity of the FIFO block 10b. The count value of the transmission write pointer 11a is stored in the capacity pointer 11d. If they are equal, it is determined that the maximum capacity of data has been stored in the FIFO block 10a, and the FIFO block is switched from 10a to an empty 10b. At the same time, the count value of the transmission write pointer 11a is cleared, and at the same time as the data storage of the FIFO block 10b is started, the increment is started again. Similarly, in the case of reading, the FIFO block switching control unit 11b switches the FIFO block by comparing the value of the capacity pointer with the count value of the transmission read pointer 11c.

  The transmission write control unit 12 receives information on the amount of write data obtained by comparing the value of the capacity pointer 11d or 11e with the count value indicated by the transmission write pointer 11a, and thereby determines that further writing is possible. In this case, that is, when the count value indicated by the transmission write pointer 11a is smaller than the value of the capacity pointer 11d or 11e, a transmission write permission signal (transmission write enable signal) is asserted to the transmission transfer source. That is, when the count value of the transmission write pointer 11a becomes equal to the maximum capacity of the FIFO block 10a or 10b, the transmission write permission signal is negated. If the transmission write request signal is transmitted from the transmission transfer source when the transmission write permission signal is asserted, the transmission write control unit 12 outputs a control signal for writing to the transmission control circuit 11.

  In addition, the transmission / reading control unit 13 receives information on the amount of read data obtained by comparing the value of the capacity pointer 11d or 11e with the count value indicated by the transmission / reading pointer 11c, thereby further reading is possible. When it is determined, that is, when data is not being written and data is stored such that the count value indicated by the transmission read pointer 11c is smaller than the value of the capacity pointer 11d or 11e, the data is stored in the transmission transfer destination. When the transmission read permission signal (transmission read enable signal) is asserted and reading is impossible, that is, when the count value of the read pointer 11c becomes equal to the maximum capacity of the FIFO block 10a or 10b, the transmission read permission signal is Negate. If the transmission read request signal is transmitted from the transmission transfer destination when the transmission read permission signal is asserted, the transmission read control unit 13 outputs a control signal for reading to the transmission control circuit 11.

  The transmission TERM control unit 14 is in a state where no data is stored in any of the FIFO blocks 10a or 10b, or is being written even if data is stored, and other than the FIFO block 10a or 10b being written, When data storage information is received from the transmission control circuit 11 when reading is not possible, such as when data is not stored, a transmission TERM signal for temporarily stopping data transmission to the transmission transfer destination is output.

  The operation of the data transfer control device of FIG. 1 will be described below using the timing chart of FIG. FIG. 2 shows a state in which the transmission write request permission signal is asserted from the transfer source when the transmission write permission signal of the transmission write control unit 12 is asserted. In this case, when the transmitted data is stored for the maximum capacity (# 1 in the figure) of the FIFO block 10a, the data can be read, so that a transmission read permission signal is sent from the transmission read control unit 13. Asserted. Here, since a transmission read request signal is transmitted from the transfer destination, data read and transfer are started from the FIFO block 10a. While data is being read from the FIFO block 10a, the transmitted data is stored in the FIFO block 10b (# 2 in the figure). In the present embodiment, as shown in FIG. 2, since data # 1 is output from the FIFO block 10a earlier than data # 2 is stored in the FIFO block 10b, all data is output from the FIFO block 10a. After being output, data is still being written to the FIFO block 10b. That is, there is a state where there is no FIFO block from which data can be read. Therefore, a transmission TERM signal for temporarily stopping data transmission to the transmission transfer destination is output from the transmission TERM control unit 14. When this transmission TERM signal is output, reading from the FIFO is stopped, and HOLD is inserted into the transfer destination data. In the present embodiment, the data when the transmission TERM signal is output is a special pattern called HOLD in SerialATA, but it is still effective even if this is another pattern.

  As described above, according to the data transfer control device and the method thereof in the present embodiment, it is possible to transfer data by using a FIFO smaller than the maximum packet size, and the FIFO capacity can be greatly reduced. It becomes possible.

  Further, based on the transfer rate obtained from the count values of the transmission write pointer 11a and the transmission read pointer 11c, the HOLD period is automatically adjusted by adjusting the width of the transmission TERM signal to be output to match the transfer rate of the transfer destination with the transfer source. It is possible to adjust, and it is possible to effectively transfer data by absorbing the difference in transfer rate.

(Second Embodiment)
Hereinafter, a second embodiment will be described with reference to FIG.

  FIG. 3 shows a data transfer control device of a second embodiment in a system for transmitting and receiving continuous data. In this embodiment, an example of handling packet data as continuous data is shown.

  The FIFO in this embodiment can perform writing and reading simultaneously. In FIG. 3, the FIFO 10 has a FIFO block 10c having a capacity smaller than the maximum packet length.

  The transmission control circuit 11 has a transmission write pointer 11a and a transmission read pointer 11c as in the data transfer control device of FIG. 1 shown in the first embodiment, and increments the count value according to writing and reading. Their function to do is similar. However, in the present embodiment, there is one FIFO block, and the transmission control circuit 11 includes one capacity pointer 11f indicating the maximum capacity of the FIFO block 10c.

  The transmission write control unit 12 receives write information from the transmission control circuit 11, asserts or negates a transmission write enable signal according to whether writing is possible or impossible, and further receives a transmission write request signal from the transmission transfer source. In some cases, the configuration for outputting a control signal as to whether or not to perform writing to the transmission control circuit 11 is the same as in the first embodiment. However, in the present embodiment, the write information is different in that it is obtained by comparing the difference in count value between the transmission write pointer 11a and the transmission read pointer 11c with the value of the capacity pointer 11f.

  Also in the transmission / reading control unit 13, as in the transmission / writing control unit 12 described above, the write information is obtained by comparing the count value difference between the transmission / writing pointer 11a and the transmission / reading pointer 11c with the value of the capacity pointer 11f. It differs from the first embodiment in that it is obtained.

  In this embodiment, the transmission TERM control unit 14 includes a transmission permission setting register 14a, and the difference between the count values of the transmission write pointer 11a and the transmission read pointer 11c obtained from the transmission control circuit 11 is the transmission permission setting. When the value is smaller than the value (predetermined value) of the register 14a, that is, when the stored data to be read is small, a transmission TERM signal for temporarily stopping data transmission to the transmission transfer destination is output. When the difference is larger than the value of the transmission permission setting register 14a, it is determined that the data that can be read is sufficiently stored, and the transmission read control unit 13 sends a transmission read permission signal to the transmission transfer destination. Assert. At this time, if a read request signal is transmitted from the transmission transfer destination, the transmission read control unit 13 outputs a read control signal that causes the transmission control circuit 11 to perform reading.

  The operation of the data transfer control device of FIG. 3 will be described below using the timing chart of FIG. In the present embodiment, an example in which the value of the transmission permission setting register 14a is set to 3 will be described. Under this set value, in FIG. 4, when the value of the transmission write pointer 11a becomes # 3, the difference between the count values of the transmission write pointer 11a and the transmission read pointer 11c becomes 3, so the transmission read permission signal Is asserted. However, when the count value of the transmission write pointer 11a becomes # 4, the count value of the transmission read pointer 11c is # 2, and the difference between them is 2 which is smaller than 3 of the transmission permission setting register 14a. Therefore, the transmission read permission signal is negated, and at the same time, the transmission TERM signal is output. Subsequently, while reading is temporarily suspended, writing is performed, and when the count value of the transmission write pointer 11a becomes # 5, the difference between the transmission write pointer 11a and the transmission read pointer 11c is 3. Reading is enabled again, the transmission read permission signal is asserted, and at the same time, output of the transmission TERM signal is stopped.

  As described above, according to the data transfer control device and the method thereof in the present embodiment, as described above, by performing data transfer control using the FIFO that can perform reading and writing simultaneously, the FIFO can be controlled. The capacity can be further reduced.

(Third embodiment)
Hereinafter, a third embodiment will be described with reference to FIG.

  FIG. 5 shows a data transfer control device of a third embodiment in a system for transmitting and receiving continuous data. In this embodiment, an example of handling packet data as continuous data is shown.

  The configuration including the FIFO 20, the reception control circuit 21, the reception write control unit 22, and the reception read control unit 23 is the same as that of the data transfer control device for transmission shown in FIG. Omitted.

  Since the data transfer control device used in the present embodiment is for reception, the reception TERM control unit 24 uses the FIFO block other than the FIFO block being read when the FIFO 20 stores data for the maximum capacity. Is stored in the maximum capacity, that is, when writing to any FIFO block is impossible, in other words, the state where the maximum capacity data is stored in any FIFO block, or When a FIFO block having a free area is being read and the maximum capacity of data is stored in other FIFO blocks, data transmission from the reception transfer source is temporarily stopped. The received TERM signal is output.

  The operation of the data transfer control device of FIG. 5 will be described below using the timing chart of FIG. FIG. 6 shows a state in which the reception write request permission signal is asserted from the transfer source when the reception write permission signal of the reception write control unit 22 is asserted. In this case, when the transmitted data is stored by the capacity of the FIFO block 20a (# 1 in the figure), the reception read control signal is asserted from the reception read control unit 23. Since the reception read request signal is transmitted from the transfer destination, data is output from the FIFO block 20a and transferred. While data is being output from the FIFO block 20a, received data is stored in the FIFO block 20b (# 2 in the figure). In the present embodiment, as shown in FIG. 6, the FIFO block 20b is filled with the data # 2 before all the data # 1 of the FIFO block 20a is read. Therefore, immediately after the storage of the data # 2 is completed, There is no writable FIFO block. Therefore, a reception TERM signal that temporarily stops data transmission from the reception transfer source is output from the reception TERM control unit 24. When this received TERM signal is output, writing to the FIFO is stopped and HOLD is inserted into the transfer source data. As in the first embodiment, this HOLD is still effective even with another pattern.

  As described above, according to the data transfer control device and method of the present embodiment, the width of the received TERM signal to be output based on the transfer rate obtained from the count values of the reception write pointer 21a and the reception read pointer 21c. By adjusting the transfer rate, it is possible to automatically adjust the HOLD period in accordance with the transfer rate of the transfer source in accordance with the transfer destination, and it is possible to effectively transfer data by absorbing the difference in transfer rate.

  In this embodiment, the FIFO at the time of transmission and the FIFO at the time of reception are separate, but it goes without saying that they can be used together.

(Fourth embodiment)
Hereinafter, a fourth embodiment will be described with reference to FIG.

  FIG. 7 shows a data transfer control device of a fourth embodiment in a system for transmitting and receiving continuous data. In this embodiment, an example of handling packet data as continuous data is shown.

  The FIFO in this embodiment can perform writing and reading at the same time as in the data transfer control device shown in FIG. 3 in the second embodiment.

  In FIG. 7, the FIFO block 20, the reception control circuit 21, the reception write control unit 22, and the reception read control unit 23 are the same as those of the data transfer control device of FIG. In the present embodiment, there is one FIFO block, and the reception control circuit 21 includes one capacity pointer 21f indicating the maximum capacity of the FIFO block 20c.

  The reception write control unit 22 receives write information from the reception control circuit 21, asserts or negates a reception write permission signal according to whether writing is possible or impossible, and further transmits a transmission write request signal from the reception transfer source. When received, the configuration for outputting a control signal as to whether or not to perform writing to the reception control circuit 21 is the same as in the third embodiment. However, the present embodiment is different in that the write information is obtained by comparing with the value of the reception write pointer 21f.

  Further, in the reception / reading control unit 23, similarly to the above-described reception / writing control unit 22, the write information is obtained by comparing the count value difference between the reception / writing pointer 21a and the reception / reading pointer 21c with the value of the capacity pointer 21f. It differs from the third embodiment in that it is obtained.

  Subsequently, since the data transfer control device used in the present embodiment is for reception, the reception TERM control unit 24 temporarily stops data transmission from the transfer source when data writing to the FIFO 20 is impossible. The received TERM signal is output. Specifically, in the present embodiment, the reception TERM control unit 24 is provided with a reception permission setting register 24 a having a reference value for outputting a reception TERM signal. When the difference between the count values of the write pointer 21a and the reception read pointer 21c is larger than the value of the reception permission setting register 24a, that is, when the stored data that has been written exceeds a predetermined value, the data from the reception transfer source A reception TERM signal for temporarily stopping transmission is output.

  The operation of the data transfer control device of FIG. 7 will be described below using the timing chart of FIG. In the present embodiment, an example in which the value of the reception permission setting register 24a is set to 6 will be described. Under this set value, in FIG. 8, when the value of the reception write pointer 21a becomes # 5, the difference between the count values of the reception write pointer 21a and the reception read pointer 21c becomes 5, and the reception read permission signal is Asserted. When the count value of the reception write pointer 21c becomes # 7, the count value of the reception read pointer 21c becomes # 1, and the difference between them is equal to 6 in the reception permission setting register 24a. Therefore, it is necessary to temporarily stop writing, and the received TERM signal is output. Subsequently, while writing is paused, reading is performed. When the difference becomes smaller than 6 during reading of data # 2, writing can be performed again, the received TERM signal is released, and data Writing of # 8 is started.

  As described above, according to the data transfer control device and method of the present embodiment, the reception control is performed using the FIFO that can perform reading and writing at the same time, so that the FIFO capacity can be further reduced. It becomes possible.

  Further, a full permission setting register (not shown) has a reference value for determining the output of the received TERM signal and sets the number of data (allowable value) that can be continuously received even after the received TERM signal is output. It may be provided separately from the reception permission setting register 24a. By adopting such a configuration, it is possible to cope with the case where the transfer source data is not stopped by the received TERM signal, and the stability and expandability of the system can be improved.

  Further, the FIFO can be used effectively by controlling the output timing of the reception TERM signal by the reception permission setting register so that the overrun data can be received.

  The data transfer control device and the data transfer control method according to the present invention can stop in the middle of continuous data transfer such as a packet using a FIFO, greatly reduce the FIFO capacity, and improve the stability of the system. It has the effect of realizing extensibility, and is useful as a data transfer system that requires processing for each unit, such as a packet.

It is a block diagram of the data transfer control apparatus of the 1st Embodiment of this invention. It is a timing chart figure showing a data transfer control method in a 1st embodiment. It is a block diagram of the data transfer control apparatus of the 2nd Embodiment of this invention. FIG. 6 is a timing chart illustrating a data transfer control method according to a second embodiment. It is a block diagram of the data transfer control apparatus of the 3rd Embodiment of this invention. FIG. 9 is a timing chart illustrating a data transfer control method according to a third embodiment. It is a block diagram of the data transfer control apparatus of the 4th Embodiment of this invention. It is a timing chart figure showing a data transfer control method in a 4th embodiment. (A) is a diagram showing an example of packet transfer in Serial ATA, (b) is a diagram showing another example of packet transfer in Serial ATA, and (c) is a further example of packet transfer in Serial ATA. It is a figure. It is a block diagram of the conventional data transfer control apparatus.

Explanation of symbols

10, 20 FIFO
10a, 10b, 20a, 20b FIFO block 11, 21 Transmission / reception control circuit 11a, 21a Write pointer 11b, 21b FIFO block switching control unit 11c, 21c Read pointer 11d, 11e, 11f,
21d, 21e, 21f Capacity pointers 12, 22 Write control unit 13, 23 Read control unit 14, 24 TERM control unit (TERM control circuit)
14a, 24a Transmission / reception permission setting register

Claims (20)

In a data transfer control device for transferring continuous data having a predetermined length to a transfer destination,
A FIFO having a plurality of FIFO blocks having a storage capacity smaller than the maximum size of the continuous data;
A write control unit that detects the amount of data stored in the FIFO block, switches the FIFO block that has completed storing data to the FIFO block that can store data, and sequentially writes data;
In the case where there is the FIFO block in which the data storage is completed, the data from the FIFO block in which the data storage has been completed is stored even when the data writing to another FIFO block is controlled by the write control unit. A data transfer control device comprising: a read control unit that reads the data. The data transfer control device according to claim 1, wherein
A data transfer control device comprising: a transmission TERM control circuit that outputs a transmission TERM signal for temporarily stopping data reading to a transfer destination when data cannot be read. The data transfer control device according to claim 1, wherein
A data transfer control device comprising: a reception TERM control circuit that outputs a reception TERM signal for temporarily stopping data writing to a transfer source when data cannot be written. In a data transfer control device for transferring continuous data having a predetermined length to a transfer destination,
A FIFO having a FIFO block with a storage capacity smaller than the maximum size of the continuous data;
The remaining amount of data in the FIFO block is detected based on the difference obtained by subtracting the total amount of data read from the FIFO from the total amount of data written to the FIFO block, and the FIFO block is detected according to the remaining amount of data. A data transfer control device comprising: a control circuit that controls writing and reading of data. The data transfer control device according to claim 4, wherein
A data transfer control device comprising: a transmission TERM control circuit that outputs a transmission TERM signal for temporarily stopping data reading to a transfer destination when data cannot be read. The data transfer control device according to claim 4, wherein
A data transfer control device comprising: a reception TERM control circuit that outputs a reception TERM signal for temporarily stopping data writing to a transfer source when data cannot be written. In a data transfer control device for transferring continuous data having a predetermined length to a transmission transfer destination,
A FIFO having a plurality of FIFO blocks having a storage capacity smaller than the maximum size of the continuous data;
When data of the maximum capacity is stored in the FIFO block at the time of data writing, the data is switched to another FIFO block having a free area, and when data is lost in the FIFO block at the time of data reading, A FIFO block switching control unit for switching to the other FIFO block stored;
A transmission write pointer that indicates the amount of data written by a count value that is incremented as data is written and is cleared when the FIFO block is switched,
A transmission control circuit comprising: a transmission read pointer that indicates a data amount read by a count value that is incremented when data is read and is cleared when the FIFO block is switched;
When the count value indicated by the transmission write pointer is smaller than the value of the capacity pointer indicating the maximum capacity of the FIFO block included in the FIFO block switching control unit and there is the FIFO block that is not being read, the transmission is transmitted to the transmission transfer destination. A transmit / write controller that transmits a write control signal indicating whether or not to perform writing to the transmission control circuit while outputting a writable signal, and the stored FIFO block in which data is stored and not being written A transmission read control unit that, when there is at least one, outputs a transmission read enable signal to the transmission transfer destination, and transmits a read control signal as to whether or not to perform reading to the transmission control circuit;
A data transfer control device comprising: a transmission TERM control unit that outputs a transmission TERM signal for temporarily stopping data transmission to the transmission transfer destination when data cannot be read from any of the FIFO blocks . In a data transfer control device for transferring continuous data having a predetermined length to a transmission transfer destination,
A FIFO having a storage capacity smaller than the maximum size of the continuous data;
A transmission write pointer indicating the amount of data written by a count value that is incremented as data is written;
A transmission control circuit comprising a transmission read pointer indicating the amount of data read by the count value incremented when data is read, and a capacity pointer indicating the maximum capacity of the FIFO;
A transmission write control unit for transmitting a write control signal as to whether or not to perform writing while outputting a transmission writable signal when data can be stored in the FIFO;
When the difference obtained by subtracting the count value of the transmission read pointer from the count value of the transmission write pointer is larger than a predetermined value, the transmission read enable signal is output to the transmission transfer destination, while reading whether or not to perform reading is performed. A transmission readout control unit for transmitting a control signal to the transmission control circuit;
A transmission permission setting register for holding the predetermined value, and a transmission TERM control unit for outputting a transmission TERM signal for temporarily stopping data transmission to the transmission transfer destination when the difference is smaller than the predetermined value. A data transfer control device. The data transfer control device according to claim 7, wherein
The transmission TERM control circuit receives information based on the data write time and the data read time from the transmission control circuit, and automatically sets the width of the transmission TERM signal so as to fill the difference between the data write time and the data read time. A data transfer control device characterized by being changed to In a data transfer control device for transferring continuous data having a predetermined length to a reception transfer destination,
A FIFO having a plurality of FIFO blocks having a storage capacity smaller than the maximum size of the continuous data;
When data for the maximum capacity is stored in the FIFO block at the time of data writing, switching to another FIFO block having a free area is performed, and data is stored when there is no data in the FIFO block at the time of data reading. A FIFO switching control unit that switches to another FIFO block that has been written, a data write amount that is written and incremented by a count value that is written, a reception write pointer that is cleared when the FIFO block is switched, and data is read A reception control circuit including a reception read pointer that indicates a data amount read by a count value that is read and incremented and is cleared when the FIFO block is switched;
When there is a FIFO block in which the count value indicated by the transmission write pointer is smaller than the value of the capacity pointer indicating the maximum capacity of the FIFO block included in the FIFO block switching control unit and there is the FIFO block that is not being read, the reception write is received at the reception transfer destination There is at least one FIFO block that outputs a enable signal while transmitting a write control signal indicating whether or not to perform writing to the reception control circuit and the FIFO block in which data is stored and not being written. A reception read control unit that outputs a read control signal to the reception control circuit as to whether or not to perform reading while outputting a reception readable signal to the reception transfer destination,
A data transfer control device comprising: a reception TERM control unit that outputs a reception TERM signal for temporarily stopping data reception from the reception transfer source when data cannot be written to any of the FIFO blocks . In a data transfer control device for transferring continuous data having a predetermined length to a reception transfer destination,
A FIFO having a storage capacity smaller than the maximum size of the continuous data;
A reception write pointer indicating the amount of data written by the count value to which data is written and incremented, a reception read pointer indicating the amount of data read by the count value to be read and incremented, and the FIFO A reception control circuit comprising a capacity pointer indicating the maximum capacity;
When the difference between the count values of the reception write pointer and the reception read pointer is smaller than a predetermined value, a write control signal indicating whether or not to write is output while a reception write enable signal is output to the reception transfer source. A reception write control unit for transmitting to the reception control circuit;
When data is stored in the FIFO and writing is not performed, a reception readable signal is output to the reception transfer destination, while a read control signal indicating whether to perform reading is transmitted to the reception control circuit. Receiving and reading control unit,
A reception permission setting register for holding the predetermined value, and a reception TERM control unit for outputting a reception TERM signal for temporarily stopping data reception from the reception transfer source when the difference is larger than the predetermined value. A data transfer control device. The data transfer control device according to claim 10, wherein
The reception TERM control circuit receives information based on the data write time and the data read time from the reception control circuit, and automatically sets the width of the reception TERM signal so as to fill the difference between the data write time and the data read time. A data transfer control device characterized by being changed to The data transfer control device according to claim 11, wherein
The data transfer control device, wherein the reception control circuit further receives data from the number of data corresponding to the predetermined value even after the reception TERM signal is output. The data transfer control device according to claim 11, wherein
The reception TERM control unit includes a full permission register having a reference value for determining the output of the reception TERM signal and an allowable value for determining the number of receivable data after the output of the reception TERM signal. Data transfer control device. In a data transfer control method for transferring continuous data having a predetermined length to a transmission transfer destination,
Sequentially storing the continuous data in a plurality of FIFO blocks having a storage capacity smaller than the maximum size of the continuous data;
When the FIFO block stores data of the maximum capacity at the time of data writing, switching to another FIFO block having a free area;
When there is no more data in the FIFO block at the time of data reading, switching to another FIFO block in which data is stored;
Outputting a transmission writable signal to the transmission transfer source when the amount of data written is less than the maximum capacity of the FIFO block and reading is not performed;
A step of outputting a transmission readable signal to a transmission transfer destination when data is stored in the FIFO block and writing is not performed;
A step of outputting a transmission TERM signal for temporarily stopping data transmission to the transmission transfer destination when data cannot be read from any of the FIFO blocks. In a data transfer control method for transferring continuous data having a predetermined length to a transfer destination,
Writing the continuous data in a FIFO having a smaller storage capacity than the maximum size of the continuous data;
Reading the data stored in the FIFO;
Outputting a transmission writable signal when data can be stored in the FIFO;
Transmitting a write control signal indicating whether or not to perform writing to a transmission transfer source; and
When a difference between the total amount of data that has been written and the total amount of data that has been read is greater than a predetermined value, outputting a transmission readable signal;
Transmitting a read control signal indicating whether or not to perform reading to a transmission transfer destination;
And a step of outputting a transmission TERM signal for temporarily stopping data transmission to the transmission and transfer destination when the difference is smaller than the predetermined value. In a data transfer control method for transferring continuous data having a predetermined length to a reception transfer destination,
Sequentially storing the continuous data in a plurality of FIFO blocks having a storage capacity smaller than the maximum size of the continuous data;
When the FIFO block stores data of the maximum capacity at the time of data writing, switching to another FIFO block having a free area;
When there is no more data in the FIFO block at the time of data reading, switching to another FIFO block in which data is stored;
Outputting a reception writable signal to a reception transfer destination when the amount of data written is smaller than the maximum capacity of the FIFO block and reading is not performed;
Outputting a reception readable signal to a reception transfer destination when data is stored in the FIFO block and writing is not performed;
And a step of outputting a reception TERM signal for temporarily stopping data reception from the reception transfer source when data cannot be written to any of the FIFO blocks. In a data transfer control method for transferring continuous data having a predetermined length to a reception transfer destination,
Writing the continuous data in a FIFO having a smaller storage capacity than the maximum size of the continuous data;
Reading the data stored in the FIFO;
Outputting a reception writable signal when data can be stored in the FIFO;
Transmitting a write control signal indicating whether or not to perform writing to the reception transfer source;
When the difference between the total amount of data that has been written and the total amount of data that has been read is greater than a predetermined value, outputting a reception readable signal;
Transmitting a read control signal indicating whether or not to perform the reading to a reception transfer destination;
And a step of outputting a reception TERM signal for temporarily stopping data reception from the reception transfer source when the difference is larger than the predetermined value. The data transfer control device according to claim 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, or 14.
The data transfer control device, wherein the continuous data is packet data. The data transfer control method according to claim 15, 16, 17 or 18,
The data transfer control method, wherein the continuous data is packet data.

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