JP2005174850A - Plasma display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a plasma display panel with high luminous efficiency and capable of write discharge at high speed with stability. <P>SOLUTION: The plasma display panel comprises scanning electrodes 22, sustaining electrodes 23, data electrodes 32, a priming electrode 36 arranged so as to cross the data electrodes 32, longitudinal wall parts 34a arranged in parallel with the data electrodes 32 to form main discharge cells 40, and lateral wall parts 34b arranged in parallel with the scanning electrodes 22 and the sustaining electrodes 23 to form gaps 41 between the main discharge cells 40. The main discharge gap between the scanning electrode 22 and the sustaining electrode 23 is to be longer than a sub discharge gap between either the scanning electrode 23 or the sustaining electrode 23 and the data electrode. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a plasma display panel (hereinafter also referred to as a panel).

  In recent years, a plasma display device whose market scale has been rapidly expanded is a display device with excellent visibility characterized by a large screen, a thin shape, and a light weight. In addition, in order to cope with high-definition video typified by high-definition broadcasting, high-definition plasma display panels are being promoted. There are several types of electrode structures for plasma display panels. Currently, AC type three-electrode plasma display panels suitable for larger screens and higher definition are the mainstream.

  In the AC type three-electrode plasma display panel, a large number of discharge cells are generally formed between a front plate and a back plate that are opposed to each other. The front plate is formed with a plurality of display electrodes, each consisting of a scan electrode and a sustain electrode, in parallel with each other on the front glass substrate, and a dielectric layer and a protective layer are formed so as to cover the display electrodes. The back plate includes a plurality of parallel data electrodes on the back glass substrate, a dielectric layer provided so as to cover them, and a plurality of barrier ribs formed on the back side in parallel with the data electrodes. A phosphor layer is formed on the surface and the side surfaces of the barrier ribs. Then, the front plate and the back plate are arranged opposite to each other so that the display electrode and the data electrode are three-dimensionally crossed and sealed, and the discharge gas is sealed in the internal discharge space.

  As a method for driving an AC type plasma display panel, a so-called subfield method is generally used in which one field period is divided into a plurality of subfields and gradation display is performed by a combination of subfields that emit light. Each subfield has an initialization period, an address period, and a sustain period.

  In the initialization period, initialization pulses are applied to all discharge cells constituting the plasma display panel to generate excitation particles (hereinafter referred to as priming particles) necessary for subsequent address discharge. In the subsequent address period, a scan pulse and an address pulse are sequentially applied to the scan electrode and the data electrode provided in the plasma display panel, respectively, thereby causing selective address discharge. In the subsequent sustain period, a predetermined number of sustain pulses are applied between the scan electrode and the sustain electrode to cause a sustain discharge, causing the discharge cell to emit light.

  A brighter and lower power consumption is desired in the market for such a plasma display panel.

In response to such a demand, for example, a discharge gap (hereinafter abbreviated as a main discharge gap) when a discharge is generated between the scan electrode and the sustain electrode is discharged between the scan electrode or the sustain electrode and the data electrode. A panel with improved emission luminance per unit power consumption (hereinafter abbreviated as light emission efficiency) and a driving method thereof are proposed by configuring the discharge gap to be longer than the discharge gap (hereinafter abbreviated as sub discharge gap). (See Patent Document 1).
JP 2000-305516 A

  When a discharge is generated in a discharge cell, there is a time difference (hereinafter abbreviated as a discharge delay) from when a discharge voltage is applied to when discharge is started. Therefore, in order to discharge the discharge cell stably, the pulse width of the scan pulse and the address pulse must be longer than at least the discharge delay. In particular, when the plasma display panel has a higher definition, the number of scan electrodes increases due to the higher definition, and therefore the address period becomes longer. Therefore, it is important to reduce the discharge delay and speed up the address operation.

  However, although the above-mentioned panel has an effect of improving the light emission efficiency, it does not have an effect of improving the discharge delay. To increase the definition of this panel, the writing operation can be stabilized at high speed. It was an issue.

  The present invention has been made in view of such problems, and an object of the present invention is to provide a plasma display panel that has high luminous efficiency and can realize high-speed and stable writing operation.

  The plasma display panel according to the present invention scans a scan electrode and a sustain electrode arranged on a first substrate so as to be parallel to each other, and a second substrate placed opposite to the first substrate across a discharge space. A data electrode disposed in a direction crossing the electrode and the sustain electrode, a dielectric layer formed so as to cover the data electrode, and a plurality of priming electrodes provided on the dielectric layer and disposed in parallel with the scan electrode and the sustain electrode, A plurality of main discharge cells formed of scan electrodes, sustain electrodes, and data electrodes; and a plurality of priming discharge cells formed of scan electrodes and priming electrodes; and a vertical wall formed parallel to the data electrodes, and A horizontal wall formed in a direction intersecting with the data electrode, and a discharge gap is generated between the scan electrode and the sustain electrode and the data electrode when a discharge occurs between the scan electrode and the sustain electrode. Characterized in that it is longer than the discharge gap when the discharge is generated between.

  According to such a configuration, it is possible to increase the light emission efficiency of the plasma display panel, and further to arrange the priming electrode on the second substrate, thereby realizing high-speed and stable writing operation.

  Moreover, the structure which provides the level | step difference which has a surface facing a scanning electrode or a sustain electrode in the wall surface by the side of the main discharge cell of a horizontal wall may be sufficient.

  According to such a configuration, it is possible to suppress the drive voltage applied during the discharge between the scan electrode or the sustain electrode and the data electrode.

  The lateral wall has at least two parts, a first lateral wall formed on the dielectric layer and a second lateral wall formed on the first lateral wall, and the width of the first lateral wall is set to the second width. It may be configured to be wider than the lateral wall and to provide a step by projecting the first lateral wall into the main discharge cell.

  Even with such a configuration, it is possible to suppress the drive voltage applied during the discharge of the scan electrode or the sustain electrode and the data electrode.

  According to the plasma display panel of the present invention, it is possible to provide a plasma display panel having high luminous efficiency and capable of stably performing address discharge at high speed.

  Hereinafter, a plasma display panel according to an embodiment of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a cross-sectional view showing a plasma display panel according to a first embodiment of the present invention, and FIG. 2 is a perspective view schematically showing a structure on the back substrate side of the panel.

  As shown in FIG. 1, a glass front substrate 21 as a first substrate and a rear substrate 31 as a second substrate are arranged to face each other with a discharge space therebetween, and ultraviolet rays are radiated to the discharge space by discharge. A gas mixture of neon and xenon is enclosed.

  A plurality of scan electrodes 22 and sustain electrodes 23 are formed in parallel with each other on the front substrate 21. At this time, two electrodes are alternately arranged so as to be sustain electrode 23 -scan electrode 22 -scan electrode 22 -sustain electrode 23-. Scan electrode 22 and sustain electrode 23 are each composed of transparent electrodes 22a and 23a and metal bus bars 22b and 23b formed on transparent electrodes 22a and 23a, respectively. Here, a light absorption layer 28 made of a black material is provided between scan electrode 22 and scan electrode 22 and between sustain electrode 23 and sustain electrode 23.

  Of the scanning electrodes 22, the protruding portion 22 b ′ of the metal bus 22 b of one scanning electrode 22 is formed to protrude onto the light absorption layer 28. A dielectric layer 24 and a protective layer 25 are formed so as to cover the scan electrode 22, the sustain electrode 23, and the light absorption layer 28.

  On the rear substrate 31, a plurality of data electrodes 32 are formed in parallel to each other in a direction intersecting with the scan electrodes 22 and the sustain electrodes 23. A dielectric layer 33a is formed so as to cover the data electrode 32, and a plurality of priming electrodes 36 are formed on the dielectric layer 33a in a direction crossing the data electrode 32. The dielectric layer 33 a insulates between the data electrode 32 and the priming electrode 36, and a dielectric layer 33 b is further formed so as to cover the priming electrode 36.

  Barrier ribs 34 are formed on the dielectric layer 33b. The barrier ribs 34 divide the discharge space to form main discharge cells 40 having the scan electrodes 22, the sustain electrodes 23, and the data electrodes 32. As shown in FIG. 2, the partition wall 34 extends in a direction parallel to the scanning electrode 22 and the sustain electrode 23, and extends between the main discharge cells 40. It is comprised with the horizontal wall part 34b which forms. Every other gap 41 has a priming electrode 36, and the gap 41 having the priming electrode 36 is formed as a priming discharge cell (hereinafter abbreviated as priming cell) 41a. A phosphor layer 35 is provided on the surface of the dielectric layer 33 b corresponding to the main discharge cells 40 partitioned by the barrier ribs 34 and on the side surfaces of the barrier ribs 34.

  When the front substrate 21 and the rear substrate 31 are arranged to face each other and sealed, a protruding portion 22b ′ protruding on the light absorption layer 28 among the metal bus bars 22b of the scanning electrode 22 formed on the front substrate 21, and the rear substrate Alignment is performed so that the priming electrode 36 formed on 31 is parallel to and opposed to the priming cell 41a. That is, the plasma display panel shown in FIGS. 1 and 2 performs a priming discharge between the protruding portion 22b ′ formed on the front substrate 21 side and the priming electrode 36 formed on the back substrate 31 side. It has become. Further, in FIG. 1, the phosphor layer 35 is not formed on the priming cell 41a side, but this is because a priming discharge is easily generated by not providing a phosphor layer that functions to inhibit discharge. Further, since the interval between the protruding portion 22b 'and the priming electrode 36 is shorter than the interval between the data electrode 32 and the transparent electrode 22a, the priming discharge has a lower discharge start voltage than the address discharge and is likely to generate a discharge.

  1 and 2, a dielectric layer 33b is further formed so as to cover the priming electrode 36. However, the dielectric layer 33b may not be formed.

  In the first embodiment of the present invention, a discharge gap (hereinafter abbreviated as a main discharge gap) when discharge occurs between scan electrode 22 and sustain electrode 23 is different from scan electrode 22 or sustain electrode 23. It is configured to be longer than a discharge gap (hereinafter, abbreviated as a sub-discharge gap) when discharge is generated between the data electrodes 32 (hereinafter, this configuration is abbreviated as a long gap configuration). Here, the sub-discharge gap represents a distance from the surface of the protective layer 25 in the region where the scan electrode 22 or the sustain electrode 23 and the data electrode 32 face each other to the surface of the phosphor layer 35.

FIG. 3 is a table summarizing the results of experiments conducted to investigate the relationship between the main discharge gap and the light emission luminance. In FIG. 3, the horizontal axis represents the main discharge gap, and the vertical axis represents the luminance ratio with the light emission luminance being 1 when the main discharge gap is 80 μm. Panels with main discharge gaps of 80 μm, 240 μm, and 450 μm are manufactured, a 100% white pattern video signal is input, a drive pulse with a period of 12 μsec is applied 255 times within 16 msec, and the panel emits light. The experiment was conducted by measuring the emission luminance of each. The applied drive pulse voltage was the discharge start voltage, 213 V at 80 μm, 261 V at 240 μm, and 287 V at 450 μm. Emission luminance 68.9cd ^/ m 2 main discharge gap from the experiment at 80μm, 248cd ^/ m 2 at 240 .mu.m, result of 371cd / ^{m 2} at 450μm is obtained, respectively, in the luminance ratio, 1, about 3.6, about It was 5.4.

  Next, in the above experiment, the light emission luminance was measured and the power consumption was also measured, and the light emission efficiency obtained by dividing the light emission luminance by the power consumption was calculated. FIG. 4 is a diagram summarizing the relationship between the main discharge gap and the light emission efficiency based on the above-described experiment. In FIG. 4, the horizontal axis represents the main discharge gap, and the vertical axis represents the light emission efficiency ratio with the light emission efficiency being 1 when the main discharge gap is 80 μm. For example, a light emission efficiency ratio of 1.5 indicates that a light emission luminance of 1.5 times per unit power consumption can be obtained for a panel having a main discharge gap of 80 μm. From this experiment, the main discharge gap was 80 μm, the luminous efficiency was 1.06 lm / W, the 240 μm was 1.64 lm / W, the 450 μm was 1.72 lm / W, and the luminous efficiency ratio was about 1.55, respectively. It was about 1.62.

In the first embodiment of the present invention, based on the above experimental results, in a 42-inch high-definition panel, the combined width (d _{A in} FIG. 1) of the main discharge cell 40 and the gap 41 is about 675 μm. The discharge cell width (d _{B in} FIG. 1) is about 375 μm, the main discharge gap (d _{C in} FIG. 1) is about 175 to 235 μm, and the sub-discharge gap (d _{D1 in} FIG. 1) is about 150 μm.

FIG. 5 is an electrode array diagram of the plasma display panel according to the first embodiment of the present invention. M columns of data electrodes D _{1 to} D _m (data electrodes 32 in FIG. 1) are arranged in the column direction, and n rows of scan electrodes SC _{1 to} SC _n (scan electrodes 22 in FIG. 1) and n rows of data electrodes are arranged in the row direction. sustain electrodes _SU 1 to SU _n (sustain electrodes 23 in FIG. 1) and the sustain electrodes SU ₁ - scan electrode SC ₁ - scan electrode SC ₂ - sustain electrode _SU 2 - · · · and so as to alternately arranged two by two Has been. In the first embodiment of the present invention, n / 2 is provided so as to face the protruding portions 22b ′ of the odd-numbered scan electrodes SC ₁ , SC ₃ ,... (The protruding portion 22b ′ in FIG. 1). Priming electrodes PR ₁ , PR ₃ ,... (Priming electrode 36 in FIG. 1) are arranged.

A discharge cell C _{i, j} (a main discharge cell in FIG. 1) including a pair of scan electrodes SC _i , sustain electrodes SU _i (i = 1 to n) and one data electrode D _j (j = 1 to _m ). 40) is formed in the discharge space. At this time, the total number of discharge cells C is mxn. In addition, a priming cell PS _i (priming cell 41a in FIG. 1) including the protruding portion 22b ′ of the scan electrode SC _i and the priming electrode PR _i is formed in an odd number of 1 to n rows, and the total number of priming cells PS is n / 2.

As described above, in the plasma display panel according to the first embodiment of the present invention, the scan electrode SC _p (p = odd number) in the odd-numbered row has the protruding portion 22b ′, and the priming discharge is generated in accordance with its own scanning. Generate and write. On the other hand, the scan electrode SC _{p + 1} in the even-numbered row does not have the protruding portion 22b ′, and writing is performed without generating a priming discharge associated with its own scanning.

  Next, driving waveforms and timings for driving the panel will be described.

  FIG. 6 is a drive waveform diagram of the plasma display panel according to the first embodiment of the present invention. In the first embodiment of the present invention, one field period is composed of a plurality of subfields having an initialization period, an address period, and a sustain period, and each subfield has a sustain pulse in the sustain period. Since the operation is substantially the same except that the number is different, only the operation for one subfield will be described here.

In half of the initializing period, data electrodes _D 1 to D _m, sustain electrodes _SU 1 to SU _n and priming electrodes _{PR 1 ~PR n-1} was held at 0V, respectively, to the scan electrodes _SC 1 to SC _n, the data A ramp waveform voltage that gently rises from a voltage V _{i1 that is} equal to or lower than the discharge start voltage to a voltage V _i2 that exceeds the discharge start voltage is applied to the electrodes D _{1 to} D _m . While this ramp waveform voltage increases, the scan electrodes _SC 1 to SC _n and data electrodes _D 1 to D _m, weak setup discharges first respectively between the priming electrodes _PR 1 _{to PR n-1} occurs . At this time, scan electrodes _SC 1 to SC _n by long gap structure - for discharge start voltage between the sustain electrodes _SU 1 to SU _n is high, the scan electrodes _SC 1 to SC _n and sustain electrodes _SU 1 to SU _n There is no discharge between. Negative wall voltage is accumulated on scan electrodes _SC 1 to SC _n upper, positive wall voltage is accumulated on data electrodes _D 1 to D _m upper and priming electrode _{PR 1 ~PR n-1} top . Here, the wall voltage at the top of the electrode represents a voltage generated by wall charges accumulated on the dielectric layer covering the electrode.

In the latter half of the initialization period, scan electrodes SC _{1 to} SC _n are gradually applied to data electrodes D _{1 to} D _m from voltage V _{i3 that is} lower than or equal to the discharge start voltage to voltage V _i4 that exceeds the discharge start voltage. Apply a falling ramp waveform voltage. During this time, the scan electrodes _SC 1 to SC _n and data electrodes _D 1 to D _m, weak setup discharges second respectively between priming electrode _{PR 1 ~PR n-1} occurs. Similarly, no discharge occurs between scan electrodes SC _{1 to} SC _n and sustain electrodes SU _{1 to} SU _n . Then, the negative wall voltage above scan electrodes SC ₁ -SC _n is weakened, and the positive wall voltage above data electrodes D ₁ -D _m is adjusted to a value suitable for the write operation, and priming electrodes PR ₁ -PR _n The positive wall voltage at the top of _{−1 is} also adjusted to a value suitable for the priming operation. This completes the initialization operation.

In the address period, scan electrodes SC _{1 to} SC _n are temporarily held at voltage Vc. Then, a voltage Vq substantially equal to the voltage change (Vc−V _i4 ) is applied to the priming electrodes PR _{1 to} PR _n−1 .

First, in the address operation of the discharge cells C _{p, 1 to} C _{p, m in} the odd-numbered rows, the scan pulse voltage Va is applied to the scan electrode SC _p and the data electrode D _k (k corresponding to the image signal to be displayed is displayed. Is an integer of 1 to m), and a positive write pulse Vd is applied. The scan electrodes SC _p of odd rows are scanning electrodes for writing with generating the priming discharge in accordance with the self-scanning. Therefore, by applying the scan pulse voltage Va, a priming discharge is generated between the priming electrode PR _p and the scan electrode SC _p in the priming cell PS _p , and the discharge cells C _{p, 1 to} C _{p, m} and the discharge cell C Priming is supplied inside _{p + 1,1 to} CP _{+ 1, m} . Since the discharge at this time has a structure in which the priming cell easily discharges as described above, the discharge becomes a fast and stable priming discharge with a small discharge delay.

Subsequently, an address discharge is generated in the discharge cells _{Cp, k} corresponding to the data electrode _Dk to which the address pulse voltage is applied. At this time, since the discharge of the discharge cell C _{p, k} is generated while priming is supplied from the priming discharge generated between the scan electrode SC _p and the priming electrode PR _p , the time until the supply of priming from the priming cell is started. Although there is a delay, the discharge is small and stable after the priming supply.

By this address discharge, a positive voltage is accumulated on the scan electrode SC _p of the discharge cells C _{p, k} and a negative voltage is accumulated on the sustain electrode SU _p, and the address operation in the odd-numbered rows is completed.

Next, in the address operation of the discharge cells C _{p + 1,1 to} C _{P + 1, m in} the even-numbered rows, the scan pulse voltage Va is applied to the scan electrode SCP _{+ 1} in the p + 1 row and at the same time, among the data electrodes D _{1 to} D _m A positive write pulse voltage Vd is applied to the data electrode _Dk corresponding to the image signal to be displayed in the (p + 1) th row. As a result, a discharge occurs at the intersection between the data electrode _Dk and the scan electrode SCP _{+ 1} . At this time, in the discharge cell C _{P + 1, k} , discharge occurs in a state where sufficient priming has already been supplied from the priming discharge generated between the scan electrode SC _p and the priming electrode PR _p. Very small and stable discharge.

By this address discharge, a positive voltage is accumulated on the scan electrode SC _{p + 1} of the discharge cell C _{p + 1, k} , a negative voltage is accumulated on the sustain electrode SU _{p + 1,} and the address operation in the even-numbered row is completed.

Thereafter, the same address operation is performed until the discharge cell C _{n, k} in the _n- th row _, and the address operation is completed.

In the sustain period, scan electrodes SC _{1 to} SC _n are once returned to 0V, then positive sustain pulse voltage Vs is applied to scan electrodes SC _{1 to} SC _n , and then sustain electrodes SU _{1 to} SU _n are returned to 0V. . At this time, the voltage between the upper portion of scan electrode SC _{i and} upper portion of sustain electrode SU _i in discharge cell C _{i, j} in which the address discharge has occurred is in addition to positive sustain pulse voltage Vs, and scan electrode SC _i in the address period. The wall voltages accumulated on the upper part and the upper part of the sustain electrode SU _i are added to become higher than the discharge start voltage. Discharge is generated between the substantially the same time the sustain electrodes _SU 1 to SU _n and the data electrodes _D 1 to D _m, the discharge cell _{C i} of this discharge as an auxiliary _discharge between the scan electrodes SC _i and sustain electrode SU _i in the _j During this period, a first sustain discharge is generated. After the first sustain discharge, the Vs is applied to sustain electrodes _SU 1 to SU _n, then returned to the scan electrodes _SC 1 to SC _n to 0V. At this time, the voltage between the upper portion of scan electrode SC _{i and} upper portion of sustain electrode SU _i in discharge cell C _{i, j} in which the address discharge has occurred is in addition to positive sustain pulse voltage Vs, and scan electrode SC _i in the address period. The wall voltages accumulated on the upper part and the upper part of the sustain electrode SU _i are added to become higher than the discharge start voltage. Almost simultaneously, a discharge is generated between scan electrodes SC _{1 to} SC _n and data electrodes D _{1 to} D _m, and this discharge is used as an auxiliary discharge between scan electrode SC _i and sustain electrode SU _i in discharge cell C _{i, j} . During this time, a second sustain discharge is generated. Thereafter, in the same manner, by applying sustain pulses alternately to scan electrodes SC _{1 to} SC _n and sustain electrodes SU _{1 to} SUn, the _number of sustain pulses is _equal to the number of sustain pulses for discharge cells C _{i, k} that have caused address discharge. The sustain discharge is continuously performed.

Thus, in the first embodiment of the present invention, the priming electrode PR _p provided on the back substrate 31 side and the front substrate 21 in the address operation of the discharge cells C _{p, 1 to} C _{p, m in} the odd-numbered rows. generating a priming discharge between the scan electrodes SC _p provided on the side. Due to the generation of the priming discharge, the priming can be supplied to the inside of the discharge cells Cp _{, 1 to} Cp _{, m} and the discharge cells Cp _{+ 1,1 to} Cp _{+ 1, m,} and the discharge delay is small, which is fast and stable. Address discharge can be realized. In addition, by causing the auxiliary discharge for the sustain discharge between the scan electrodes _SC 1 to SC _n and sustain electrodes _SU 1 to SU _n and the data electrodes _D 1 to D _m, stably be generated by the sustain discharge Can do.

  As described above, the plasma display panel shown in the first embodiment of the present invention has a long gap configuration to improve the light emission efficiency, and further, by providing a priming electrode on the back substrate side, the discharge delay can be reduced. A small, high-speed and stable address discharge can be realized.

(Second Embodiment)
FIG. 7 is a cross-sectional view showing a plasma display panel according to the second embodiment of the present invention, and FIG. 8 is a perspective view schematically showing a structure on the back substrate side of the panel.

As shown in FIGS. 7 and 8, in the second embodiment of the present invention, the horizontal wall portion 34b is first lateral wall portion 34b ₁ and the first lateral wall portion 34b ₁ on which is formed on the dielectric layer 33b It is composed of two layers of the second lateral wall portion 34b ₂ formed. The first lateral wall portion 34b ₁ is formed wider than the second lateral wall portion 34b _2, further to the first lateral wall portion 34b ₁ is main discharge cells 40 than the second lateral wall portion 34b ₂ It arranges so that it may protrude. Therefore, the side surface of the main discharge cell 40 formed by the lateral wall portion 34b has a stepped step having a surface facing the transparent electrodes 22a and 23a. A phosphor layer 35 is provided on the surface of the dielectric layer 33 b corresponding to the main discharge cell 40 and the side surface of the partition wall 34. Thus the plasma display panel shown in the second embodiment is the first embodiment differs from the lateral wall portion 34b in the first horizontal wall portion 34b ₁ and the two layers of the second lateral wall portion 34b ₂ By comprising, it has the point which set it as the structure provided with the step-like level | step difference provided with the surface which opposes the transparent electrodes 22a and 23a in the side surface of the main discharge cell 40. FIG.

  Next, in the second embodiment of the present invention, the reason why a stepped step having a surface facing the transparent electrodes 22a and 23a is provided on the side surface of the main discharge cell 40 will be described.

  In the present invention, auxiliary discharge for sustain discharge is generated between the scan electrode 22 or the sustain electrode 23 and the data electrode 32. In other words, the auxiliary discharge is generated as many times as the sustain discharge between the scan electrode 22 or the sustain electrode 23 and the data electrode 32. Therefore, if the discharge start voltage between the scan electrode 22 or the sustain electrode 23 and the data electrode 32 is lowered, the power consumption can be reduced. In order to lower this discharge start voltage, the sub-discharge gap may be shortened. On the other hand, in order to stably generate the sustain discharge, the main discharge cell 40 needs to have at least a discharge space that does not prevent the sustain discharge. That is, in order to reduce the discharge start voltage between the scan electrode 22 or the sustain electrode 23 and the data electrode 32 and to stably generate the sustain discharge, the sub discharge gap is shortened and the sustain discharge is performed. It must be compatible with securing the discharge space.

Second In the exemplary embodiment, the lateral wall portion 34b constituted by the first lateral wall portion 34b ₁ and the two layers of the second lateral wall portion 34b _2, the side surface of the main discharge cells 40, the transparent electrode 22a of the present invention, By adopting a configuration having a stepped step with a surface facing 23a, the sub-discharge gap is shortened and at the same time a discharge space for sustain discharge is secured. As shown in FIGS. 7 and 8, the sub-discharge gap extends from the surface of the phosphor layer 35 on the _first lateral wall 34 b ₁ facing the scan electrode 22 or the sustain electrode 23 to the surface of the protective layer 25. it can be shortened by the amount the secondary discharge gap of the horizontal wall portion 34b ₁ of the thickness. Further, since there is no _first lateral wall portion 34b1 near the center of the main discharge cell 40, a discharge space necessary for the sustain discharge can be secured.

In the second embodiment of the present invention, the sub-discharge gap (d _{D2 in} FIG. 7) is about 60 to 70 μm, the thickness of the first lateral wall 34b ₁ (d _{E in} FIG. 7) is about 80 to 90 μm, The width (d _{F in} FIG. 7) of the surface of one horizontal wall portion 34b ₁ facing the scan electrode 22 or the sustain electrode 23 is about 70 to 100 μm.

  As described above, in the plasma display panel shown in the second embodiment of the present invention, in addition to the first embodiment, the lateral wall portion is composed of two layers of the first lateral wall portion and the second lateral wall portion. By configuring the side surface of the main discharge cell with a stepped step with a surface facing the transparent electrode, the sub discharge gap is shortened while ensuring the discharge space necessary for the sustain discharge, and scanning It is possible to reduce the discharge start voltage between the electrode or the sustain electrode and the data electrode.

  Note that each numerical value shown in the embodiment of the present invention varies depending on the panel design, the number of pixels, the discharge characteristics, and the like, and thus needs to be optimized for each model.

  The plasma display panel according to the present invention has high luminous efficiency, and can provide a plasma display panel that can stably perform address discharge at high speed, which is industrially useful.

Sectional drawing which shows the plasma display panel in the 1st Embodiment of this invention The perspective view which shows typically the structure by the side of the back substrate of the plasma display panel in the 1st Embodiment of this invention. A diagram summarizing the results of experiments conducted to investigate the relationship between main discharge gap and light emission luminance Figure summarizing the results of experiments conducted to investigate the relationship between main discharge gap and luminous efficiency Electrode arrangement diagram of plasma display panel in the first exemplary embodiment of the present invention Drive waveform diagram of plasma display panel according to first embodiment of the present invention Sectional drawing which shows the plasma display panel in the 2nd Embodiment of this invention. The perspective view which shows typically the structure by the side of the back substrate of the plasma display panel in the 2nd Embodiment of this invention.

Explanation of symbols

21 Front substrate (made of glass) 22 Scan electrode 22a, 23a Transparent electrode 22b, 23b Metal bus bar 22b 'Protruding portion 23 Sustain electrode 24, 33a, 33b Dielectric layer 25 Protective layer 28 Light absorbing layer 31 Back surface (made of glass) Substrate 32 Data electrode 34 Bulkhead 34a Vertical wall 34b Horizontal wall 34b ₁ First horizontal wall 34b ₂ Second horizontal wall 35 Phosphor layer 36 Priming electrode 40 Main discharge cell 41 Gap 41a Priming (discharge) cell

Claims (3)

A scan electrode and a sustain electrode arranged parallel to each other on the first substrate;
A data electrode disposed on a second substrate disposed opposite to the first substrate across a discharge space in a direction intersecting the scan electrode and the sustain electrode;
A dielectric layer formed to cover the data electrode;
A plurality of priming electrodes provided on the dielectric layer and disposed in parallel with the scan electrodes and the sustain electrodes;
A plurality of main discharge cells formed by the scan electrodes, the sustain electrodes, and the data electrodes, and a plurality of priming discharge cells formed by the scan electrodes and the priming electrodes are partitioned and parallel to the data electrodes. A partition wall having a vertical wall and a horizontal wall formed in a direction crossing the data electrode,
A discharge gap when a discharge is generated between the scan electrode and the sustain electrode is formed longer than a discharge gap when a discharge is generated between the scan electrode or the sustain electrode and the data electrode. A characteristic plasma display panel. The plasma display panel according to claim 1, wherein a step having a surface facing the scan electrode or the sustain electrode is provided on a wall of the horizontal wall on the main discharge cell side. The lateral wall has at least two parts, a first lateral wall formed on the dielectric layer and a second lateral wall formed on the first lateral wall, and the width of the first lateral wall 3. The plasma display panel according to claim 2, wherein the step is provided so as to be wider than the second lateral wall, and the first lateral wall protrudes into the main discharge cell.

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