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JP2005033016A - Method of dry-etching low-dielectric constant interlayer insulating film - Google Patents

Method of dry-etching low-dielectric constant interlayer insulating film Download PDF

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JP2005033016A
JP2005033016A JP2003271060A JP2003271060A JP2005033016A JP 2005033016 A JP2005033016 A JP 2005033016A JP 2003271060 A JP2003271060 A JP 2003271060A JP 2003271060 A JP2003271060 A JP 2003271060A JP 2005033016 A JP2005033016 A JP 2005033016A
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insulating film
interlayer insulating
dielectric constant
etching
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JP4144795B2 (en
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Yasuhiro Morikawa
泰宏 森川
Toshio Hayashi
俊雄 林
Kouko Suu
紅コウ 鄒
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Ulvac Inc
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a method by which the fall of a resist selection ratio can be prevented and, in addition, no damage is given to a low-dielectric constant interlayer insulating film covered with a resist mask and composed of an SiOCH- or SiOC-based material in dry-etching the interlayer insulating film. <P>SOLUTION: In the method, the low-dielectric constant interlayer insulating film is etched with an etching gas composed of a mixed gas prepared by adding a CxHx gas containing C atoms by a number of 1-4 or HFC gas containing C atoms by the number of 1-3 to a perfluorocarbon gas at a rate of 20-50% of the total flow rate of the etching gas by introducing the etching gas under a working pressure of ≤1 Pa. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、層間絶縁膜をドライエッチングする方法に関し、特に、炭素を含有する低誘電率層間絶縁膜をドライエッチングする方法に関する。   The present invention relates to a method for dry etching an interlayer insulating film, and more particularly to a method for dry etching a low dielectric constant interlayer insulating film containing carbon.

一般に、SiOから構成される層間絶縁膜をプラズマ雰囲気中でドライエッチングして配線用のホール、トレンチを微細加工する場合、CF系ガスを含む混合ガスが使用される(特許文献1)。この場合、CF系ガスのみによってエッチングを行うと、エッチング処理中に分解生成したガス同士が再結合して気相中でクラスタリングが生じてCF系の膜堆積が発生する。このため、エッチングガスとして、アルゴンを主ガスとして用い、このアルゴンにフルオロカーボンガスを添加した混合ガスを使用し、クラスタリングの発生を防止することが考えられている(非特許文献1)。 In general, when an interlayer insulating film made of SiO 2 is dry-etched in a plasma atmosphere to finely process wiring holes and trenches, a mixed gas containing a CF-based gas is used (Patent Document 1). In this case, if etching is performed only with the CF-based gas, the gases generated by decomposition during the etching process are recombined to cause clustering in the gas phase, and CF-based film deposition occurs. For this reason, it is considered that argon is used as an etching gas, and a mixed gas obtained by adding a fluorocarbon gas to argon is used to prevent clustering (Non-patent Document 1).

ところで、近年の半導体装置の高集積化、微細化に伴い、層間絶縁膜として、例えば比誘電率(k)が2.6以下の、SiOCH系の低誘電率層間絶縁膜(多孔質材であってもよい)が開発されている。この場合、レジストマスクで覆われた低誘電率層間絶縁膜を、上記した化学反応性のないアルゴンを主ガスとする混合ガスを用いてエッチングすると、SiOCH系膜の構成材に炭素が含まれているため、層間絶縁膜をエッチングしたときのイオン衝撃によって例えば膜中のHがなくなり、ホール底部に、−C−C−やSi−C−の層が形成されてエッチングストップ現象が生じる。このことから、酸素やフッ素を多く添加させた混合ガスを使用してエッチングしたり、フッ素の発生を促進させる方法が提案されている。   By the way, with the recent high integration and miniaturization of semiconductor devices, as an interlayer insulating film, for example, a SiOCH-based low dielectric constant interlayer insulating film (which is a porous material) having a relative dielectric constant (k) of 2.6 or less. May be developed). In this case, when the low dielectric constant interlayer insulating film covered with the resist mask is etched using the above-described mixed gas containing argon as the main gas without chemical reactivity, the constituent material of the SiOCH-based film contains carbon. Therefore, for example, H in the film disappears due to ion bombardment when the interlayer insulating film is etched, and a layer of —C—C— or Si—C— is formed at the bottom of the hole, causing an etching stop phenomenon. For this reason, a method of etching using a mixed gas to which a large amount of oxygen or fluorine is added or a method for promoting the generation of fluorine has been proposed.

特開平11−31678号公報(例えば、特許請求の範囲の記載)。JP-A-11-31678 (for example, description of claims). W. chen, M. Itoh, T. Hayashi and T. Uchid, J. Vac. Sci. Technol., A16(1998) 1594W. chen, M. Itoh, T. Hayashi and T. Uchid, J. Vac. Sci. Technol., A16 (1998) 1594

しかしながら、上記方法では、レジストマスクが酸素やフッ素によってエッチングされることで、レジストのエッチング速度が急激に増加して対レジスト選択比が低下するという問題がある。また、上記方法では、例えば酸素そのものの高い反応性によって層間絶縁膜中のCHx基が引抜かれて層間絶縁膜(特に、ホールのサイドウォール)がダメージを受けるという問題が生じる。   However, the above-described method has a problem in that the resist mask is etched with oxygen or fluorine, so that the etching rate of the resist increases rapidly and the selectivity to resist decreases. In addition, the above-described method has a problem that, for example, CHx groups in the interlayer insulating film are extracted due to high reactivity of oxygen itself, and the interlayer insulating film (particularly, the sidewall of the hole) is damaged.

そこで、本発明は、上記点に鑑み、レジストマスクで覆われた低誘電率層間絶縁膜をドライエッチングする場合に、対レジスト選択比が低下することを防止でき、その上、層間絶縁膜にダメージを与えることがない低誘電率層間絶縁膜のドライエッチング方法を提供することを課題とするものである。   Therefore, in view of the above points, the present invention can prevent a reduction in the selectivity to resist when dry etching a low dielectric constant interlayer insulating film covered with a resist mask, and damage the interlayer insulating film. It is an object of the present invention to provide a dry etching method of a low dielectric constant interlayer insulating film that does not give a low temperature.

上記課題を解決するために、本発明の低誘電率層間絶縁膜のドライエッチング方法は、SiOCH或いはSiOC系材料からなる低誘電率層間絶縁膜をエッチングし、配線用のホール、トレンチを微細加工する低誘電率層間絶縁膜のドライエッチング方法において、過フッ化炭素ガスに、総流量に対して20〜50%の比率でCの数が1〜4のCxHyまたはCの数が1〜3のHFCガスを添加した混合ガスをエッチングガスとし、1Pa以下の作動圧力下でこのエッチングガスを導入してエッチングすることを特徴とする。   In order to solve the above-described problems, the low dielectric constant interlayer insulating film dry etching method of the present invention etches a low dielectric constant interlayer insulating film made of a SiOCH or SiOC-based material and finely processes wiring holes and trenches. In a dry etching method of a low dielectric constant interlayer insulating film, CxHy having 1 to 4 C atoms or HFC having 1 to 3 C atoms in a perfluorocarbon gas at a ratio of 20 to 50% with respect to the total flow rate Etching is performed by using a mixed gas to which a gas is added as an etching gas and introducing the etching gas under an operating pressure of 1 Pa or less.

本発明によれば、例えば膜中に炭素を含有する多孔質な低誘電率層間絶縁膜をエッチングする場合に、所定流量のCの数が1〜4のCxHyまたはCの数が1〜3のHFCガスを添加したため、レジストのエッチング速度が大きく減少し、対レジスト選択比が低下することが防止できる。また、例えばエッチングによる配線用のホールを微細加工する間、ホールのサイドウォールにH−C−F膜がデポジションされて保護されるため、エッチングによる反応性粒子の層間絶縁膜への侵入が防止され、層間絶縁膜がダメージを受けることはない。この場合、20%より少ない比率でCxHyまたはHFCガスを添加すると、レジスト高選択比が得られず、50%を越えた比率でCxHyまたはHFCガスを添加すると、エッチングストップとなる。また、CxHyにおいてCの数が4を越えると、エッチングストップとなり、HFCガスにおいて、Cの数が3を越えると、エッチングストップとなる。   According to the present invention, for example, when etching a porous low dielectric constant interlayer insulating film containing carbon in the film, the number of C at a predetermined flow rate is 1 to 4 CxHy or the number of C is 1 to 3 Since the HFC gas is added, it is possible to prevent the resist etching rate from being greatly reduced and the selectivity to the resist from being lowered. In addition, for example, during fine processing of wiring holes by etching, the H—C—F film is deposited and protected on the sidewalls of the holes, thereby preventing the entry of reactive particles into the interlayer insulating film by etching. Thus, the interlayer insulating film is not damaged. In this case, if CxHy or HFC gas is added at a ratio of less than 20%, the resist high selectivity cannot be obtained, and if CxHy or HFC gas is added at a ratio exceeding 50%, etching stops. Further, when the number of C exceeds 4 in CxHy, the etching is stopped, and when the number of C exceeds 3 in HFC gas, the etching is stopped.

尚、前記HFCガスとして、CHCHF、CHの少なくとも一方を選択すればよい。 Note that at least one of CH 3 CHF 2 and CH 2 F 2 may be selected as the HFC gas.

前記CxHyガスとして、CHガス、Cガスの少なくとも一方を選択すればよい。 As the CxHy gas, CH 4 gas, may be selected at least one of C 2 H 6 gas.

また、前記混合ガスに希ガスを添加してもよい。   Further, a rare gas may be added to the mixed gas.

前記過フッ化ガスを、C、C、C、及びCから選択すればよい。 The perfluorinated gas may be selected from C 2 F 6 , C 3 F 8 , C 4 F 8 , and C 5 F 8 .

これにより、本発明の低誘電率層間絶縁膜のエッチング方法は、例えばレジストマスクで覆われた低誘電率層間絶縁膜をエッチングする場合に、対レジスト選択比が低下することを防止でき、その上、エッチングストップ現象が生じることがないと共に層間絶縁膜にダメージを与えることがないという効果を奏する。   As a result, the method for etching a low dielectric constant interlayer insulating film of the present invention can prevent a reduction in the resist selectivity when etching a low dielectric constant interlayer insulating film covered with a resist mask, for example. The etching stop phenomenon does not occur and the interlayer insulating film is not damaged.

図1を参照して、1は、本発明の低誘電率層間絶縁膜をドライエッチングして配線用のホール、トレンチの微細加工を実行するエッチング装置を示す。このエッチング装置1は、低温、高密度プラズマによるエッチングが可能なものであり、ターボ分子ポンプなどの真空排気手段11aを備えた真空チャンバー11を有する。その上部には、誘電体円筒状壁により形成されたプラズマ発生部12がその下部は基板電極部13が設けられている。プラズマ発生部12を区画する壁(誘電体側壁)14の外側には、三つの磁場コイル15、16、17が設けられ、この磁場コイル15,16、17によって、プラズマ発生部12内に環状磁気中性線(図示せず)が形成される。中間の磁場コイル16と誘電体側壁14の外側との間にはプラズマ発生用高周波アンテナコイル18が配置され、この高周波アンテナコイル18は、高周波電源19に接続され、三つの磁場コイル15、16、17によって形成された磁気中性線に沿って交番電場を加えてこの磁気中性線に放電プラズマを発生するように構成されている。   Referring to FIG. 1, reference numeral 1 denotes an etching apparatus for performing fine etching of wiring holes and trenches by dry etching the low dielectric constant interlayer insulating film of the present invention. This etching apparatus 1 is capable of etching by low-temperature and high-density plasma, and has a vacuum chamber 11 provided with a vacuum exhaust means 11a such as a turbo molecular pump. A plasma generator 12 formed of a dielectric cylindrical wall is provided at the upper part, and a substrate electrode part 13 is provided at the lower part. Three magnetic field coils 15, 16, and 17 are provided outside the wall (dielectric side wall) 14 that partitions the plasma generation unit 12, and the magnetic field coils 15, 16, and 17 provide an annular magnetism in the plasma generation unit 12. A neutral line (not shown) is formed. A high frequency antenna coil 18 for plasma generation is disposed between the intermediate magnetic field coil 16 and the outside of the dielectric sidewall 14, and this high frequency antenna coil 18 is connected to a high frequency power source 19, and three magnetic field coils 15, 16, An alternating electric field is applied along the magnetic neutral line formed by 17 to generate a discharge plasma in the magnetic neutral line.

磁気中性線の作る面と対向させて基板電極部13内には、処理基板Sが載置される基板電極20が絶縁体20aを介して設けられている。この基板電極20は、コンデンサー21を介して高周波電源22に接続され、電位的に浮遊電極となって負のバイアス電位となる。また、プラズマ発生部12の天板23は、誘電体側壁14の上部フランジに密封固着され、電位的に浮遊状態とし対向電極を形成する。この天板23の内面には、真空チャンバ11内にエッチングガスを導入するガス導入ノズル24が設けられ、このガス導入ノズル24が、ガス流量制御手段(図示せず)を介してガス源に接続されている。   A substrate electrode 20 on which the processing substrate S is placed is provided via an insulator 20a in the substrate electrode portion 13 so as to face the surface formed by the magnetic neutral line. The substrate electrode 20 is connected to a high-frequency power source 22 via a capacitor 21 and becomes a floating electrode in terms of potential and has a negative bias potential. The top plate 23 of the plasma generator 12 is hermetically fixed to the upper flange of the dielectric side wall 14 and is in a floating state in potential to form a counter electrode. A gas introduction nozzle 24 for introducing an etching gas into the vacuum chamber 11 is provided on the inner surface of the top plate 23, and this gas introduction nozzle 24 is connected to a gas source via a gas flow rate control means (not shown). Has been.

上記エッチング装置を用いて、処理基板S上に形成され、配線用のホール、トレンチの微細加工される低誘電率層間絶縁膜としては、HSQやMSQのようにスピンコートによって形成されたSiOCH系材料、或いはCVDによって形成されるSiOC系材料で比誘電率2.0〜3.0のLowーk材料であり、多孔質材料を含む。SiOCH系材料としては、例えば、商品名LKD5109r5/JSR社製、商品名HSG−7000/日立化成社製、商品名HOSP/Honeywell Electric Materials社製、商品名Nanoglass/Honeywell Electric Materials社製、商品名OCD T−12/東京応化社製、商品名OCD T−32/東京応化社製、商品名IPS2.4/触媒化成工業社製、商品名IPS2.2/触媒化成工業社製、商品名ALCAP−S5100/旭化成社製がある。   As the low dielectric constant interlayer insulating film formed on the processing substrate S using the etching apparatus and finely processed for wiring holes and trenches, a SiOCH-based material formed by spin coating such as HSQ or MSQ is used. Alternatively, it is a low-k material having a relative dielectric constant of 2.0 to 3.0, which is a SiOC material formed by CVD, and includes a porous material. Examples of the SiOCH material include trade name LKD5109r5 / manufactured by JSR, trade name HSG-7000 / manufactured by Hitachi Chemical, trade name HOSP / Honeywell Electric Materials, trade name Nanoglass / Honeywell Electric Materials, trade name OCD T-12 / manufactured by Tokyo Ohkasha, trade name OCD T-32 / manufactured by Tokyo Ohkasha, trade name IPS2.4 / manufactured by Catalytic Kasei Kogyo, trade name IPS2.2 / manufactured by Catalytic Kasei Kogyo, trade name ALCAP-S5100 / Asahi Kasei Co., Ltd.

SiOC系材料としては、例えば、商品名Aurola2.7/日本ASM社製、商品名Aurola2.4/日本ASM社製、商品名Orion2.7/TRIKON社製、商品名Coral/Novellaf社製、商品名NCS/触媒化成工業社製、商品名Black Diamond/AMAT社製がある。また、商品名SiLK/Dow Chemical社製、商品名Porous-SiLK/Dow Chemical社製、商品名FLARE/Honeywell Electric Materials社製、商品名Porous FLARE/Honeywell Electric Materials社製、商品名Porous-FLARE/Honeywell Electric Materials社製、商品名GX‐3P/Honeywell Electric Materials社製などの有機系の低誘電率層間絶縁膜でもでもよい。尚、低誘電率層間絶縁膜上には、レジストを塗布した後、フォトリソグラフ法で所定のパターンが形成される。レジストとしては、公知のものが用いられる。   Examples of the SiOC material include trade name Aurola 2.7 / manufactured by ASM Japan, trade name Aurola 2.4 / manufactured by Japan ASM, trade name Orion 2.7 / TRIKON, trade name Coral / Novellaf, trade name There are NCS / Catalyst Chemical Industries, trade name Black Diamond / AMAT. Also, trade name SiLK / Dow Chemical, trade name Porous-SiLK / Dow Chemical, trade name FLARE / Honeywell Electric Materials, trade name Porous FLARE / Honeywell Electric Materials, trade name Porous-FLARE / Honeywell An organic low dielectric constant interlayer insulating film such as that manufactured by Electric Materials and trade name GX-3P / Honeywell Electric Materials may also be used. A predetermined pattern is formed on the low dielectric constant interlayer insulating film by photolithography after applying a resist. A known resist is used as the resist.

ドライエッチングプロセスに用いるエッチングガスとしては、過フッ化炭素ガス(CnFm)に、総流量に対して20〜50%の比率でCの数が1〜4のCxHyまたはCの数が1〜3のHFCガスを添加した混合ガスを用いる。過フッ化ガスとしては、C、C、C、及びCから選択する。Cの数が1〜4のCxHyとしては、CH、Cの中から選択される。また、Cの数が1〜3のHFCガスとしては、CHCHF(HFC−152a)、CH(HFC−32)、CHF(HFC−125)、CHFCF(HFC−134a)、CHF(HFC−23)の中から選択される。 As an etching gas used in the dry etching process, CxHy having 1 to 4 C or 1 to 3 C in a ratio of 20 to 50% with respect to the total flow rate in a fluorocarbon gas (CnFm). A mixed gas to which HFC gas is added is used. The perfluorinated gas is selected from C 2 F 6 , C 3 F 8 , C 4 F 8 , and C 5 F 8 . The CxHy having 1 to 4 C is selected from CH 4 and C 2 H 6 . In addition, as the HFC gas having 1 to 3 carbon atoms, CH 3 CHF 2 (HFC-152a), CH 2 F 2 (HFC-32), C 2 HF 5 (HFC-125), CH 2 FCF 3 ( HFC-134a) or CHF 3 (HFC-23).

この混合ガスを、1Pa以下の作動圧力下で導入してエッチングすれば、例えば膜中に炭素を含有する多孔質な低誘電率層間絶縁膜をエッチングする場合に、レジストのエッチング速度が大きく減少し、対レジスト選択比が低下することが防止できる。この場合、図2には、本発明の混合ガスを用いてエッチングした場合と、酸素またはフッ素を多く添加した混合ガスを用いてエッチングした場合との相違を模式的に示す。即ち、酸素またはフッ素を多く添加した混合ガスでは、(a)に示すように、対レジスト選択比が低いためにレジストマスクMの後退によって層間絶縁膜Iに、配線のショートにつながるファセッチィングが発生するが、本発明の混合ガスでは、(b)に示すように、対レジスト選択比が高いために層間絶縁膜Iにファセッチィングが発生しない。尚、図2に示すSは基板である。   If this mixed gas is introduced and etched under an operating pressure of 1 Pa or less, for example, when etching a porous low dielectric constant interlayer insulating film containing carbon in the film, the etching rate of the resist is greatly reduced. , It can be prevented that the selectivity to resist is lowered. In this case, FIG. 2 schematically shows a difference between the case where etching is performed using the mixed gas of the present invention and the case where etching is performed using a mixed gas to which a large amount of oxygen or fluorine is added. That is, in the mixed gas containing a large amount of oxygen or fluorine, as shown in (a), since the selectivity ratio to the resist is low, the recessing of the resist mask M causes the faceting that leads to a short circuit in the interlayer insulating film I. Although generated, in the mixed gas of the present invention, as shown in (b), faceting does not occur in the interlayer insulating film I because of a high resist selectivity ratio. Note that S shown in FIG. 2 is a substrate.

また、エッチングによる配線用のホール、トレンチを微細加工する間、ホール、トレンチのサイドウォールにH−C−F膜がデポジションされて保護されるため、エッチングによる反応性粒子の層間絶縁膜への侵入が防止され、層間絶縁膜がダメージを受けることはない。尚、HFCガスとして、CHCHF、CHのいずれかが望ましく、また、CxHyガスとして、CHガス、Cガスのいずれかが望ましい。さらに、この混合ガスに、Ar、Kr、Xeなどの希ガスを添加してもよい。この場合、混合ガスの主成分は、(希ガス+CnFm+O+HFC)または(希ガス+CnFm+O+CxHy)とすればよい。 In addition, since the H—C—F film is deposited and protected on the sidewalls of the holes and trenches during the microfabrication of the wiring holes and trenches by etching, the reactive particles by etching are applied to the interlayer insulating film. Intrusion is prevented and the interlayer insulating film is not damaged. Note that either CH 3 CHF 2 or CH 2 F 2 is desirable as the HFC gas, and any of CH 4 gas or C 2 H 6 gas is desirable as the CxHy gas. Further, a rare gas such as Ar, Kr, or Xe may be added to this mixed gas. In this case, the main component of the mixed gas may be (rare gas + CnFm + O 2 + HFC) or (rare gas + CnFm + O 2 + CxHy).

本実施例では、比誘電率(k)2.5のMSQのSiOCH系材料を用い、スピンコータを使用して基板上に、500nmの膜厚で低誘電率層間絶縁膜を形成した。そして、この低誘電率層間絶縁膜上に、スピンコータによりレジストを塗布し、フォトリソグラフ法で所定のパターンを形成した。この場合、レジストとしては、UV−IIを使用し、レジスト層の厚さを500nmとした。   In this example, an MSQ SiOCH material having a relative dielectric constant (k) of 2.5 was used, and a low dielectric constant interlayer insulating film having a thickness of 500 nm was formed on a substrate using a spin coater. Then, a resist was applied on the low dielectric constant interlayer insulating film by a spin coater, and a predetermined pattern was formed by photolithography. In this case, UV-II was used as the resist, and the thickness of the resist layer was 500 nm.

次に、図1に示すエッチング装置1を用いて、Cを主ガスとし、CHのを添加した混合ガスを、総流量に対してCHの混合比を変えて真空チャンバ11内に導入して低誘電率層間絶縁膜をエッチングした。尚、混合比は、(C+CH)を100%とした場合の値である。この場合、プラズマ発生用高周波アンテナコイル18に接続した高周波電源19の出力を2KW、基板電極21に接続した高周波電源22の出力を400W、基板設定温度10℃、真空チャンバ11の圧力を1Paに設定した。 Next, using the etching apparatus 1 shown in FIG. 1, a mixed gas containing C 3 F 8 as a main gas and CH 4 is added to the inside of the vacuum chamber 11 by changing the mixing ratio of CH 4 with respect to the total flow rate. Then, the low dielectric constant interlayer insulating film was etched. The mixing ratio is a value when (C 3 F 8 + CH 4 ) is 100%. In this case, the output of the high frequency power source 19 connected to the plasma generating high frequency antenna coil 18 is set to 2 KW, the output of the high frequency power source 22 connected to the substrate electrode 21 is set to 400 W, the substrate set temperature is 10 ° C., and the pressure of the vacuum chamber 11 is set to 1 Pa. did.

図2は、上記条件で低誘電率層間絶縁膜及びレジストマスクをエッチングしたときのエッチングレートを線a及び線bで示す。これによれば、CHの添加率が0から約50%の範囲では低誘電率層間絶縁膜のエッチングレートは殆ど減少せず、レジストのエッチングレートのみが大きく減少している。従って、線cで示すように高い対レジスト選択比が得られる。このことから、1Pa以下の低圧プロセスの特徴である膜堆積効果の弱いことに起因して、多孔質の構造を有する低誘電率層間絶縁膜であってもエッチングストップ減少が生じずに、対レジスト選択比のみが向上していると考えられる。 FIG. 2 shows lines a and b when the low dielectric constant interlayer insulating film and the resist mask are etched under the above conditions. According to this, when the addition rate of CH 4 is in the range of 0 to about 50%, the etching rate of the low dielectric constant interlayer insulating film is hardly reduced, and only the etching rate of the resist is greatly reduced. Therefore, a high resist-to-resist selection ratio is obtained as shown by line c. From this, due to the weak film deposition effect that is characteristic of a low-pressure process of 1 Pa or less, even in the case of a low dielectric constant interlayer insulating film having a porous structure, etching stop reduction does not occur, and resist resist Only the selectivity is considered improved.

図1に示すエッチング装置1を用いて、混合ガスとして、C(25sccm)+Ar(220sccm)+O(20sccm)+CH(30sccm)を用い、この混合ガスを真空チャンバ11内に導入して上記基板Sをエッチングした。この場合、プラズマ発生用高周波アンテナコイル18に接続した高周波電源19の出力を2KW、基板電極21に接続した高周波電源22の出力を400W、基板設定温度10℃、真空チャンバ11の圧力を1Paに設定した。 Using the etching apparatus 1 shown in FIG. 1, C 3 F 8 (25 sccm) + Ar (220 sccm) + O 2 (20 sccm) + CH 4 (30 sccm) is used as a mixed gas, and this mixed gas is introduced into the vacuum chamber 11. The substrate S was etched. In this case, the output of the high frequency power source 19 connected to the plasma generating high frequency antenna coil 18 is set to 2 KW, the output of the high frequency power source 22 connected to the substrate electrode 21 is set to 400 W, the substrate set temperature is 10 ° C., and the pressure of the vacuum chamber 11 is set to 1 Pa. did.

図4(b)は、上記条件でエッチングした場合のSEM写真である。これによれば、エッチングストップ現象を生じることなく、ホールのサイドウォールにダメージを与えることなくエッチングできた。尚、図4(a)は、CHを80%の比率で添加してエッチングした場合のSEM写真である。これによれば、エッチングストップ現象が発生している。また、図4(c)は、CHを添加せずにエッチングした場合のSEM写真である。これによれば、レジスト層が多く残ったのが確認できる。 FIG. 4B is an SEM photograph when etching is performed under the above conditions. According to this, etching could be performed without causing an etching stop phenomenon and damaging the sidewall of the hole. FIG. 4A is an SEM photograph in the case of etching with CH 4 added at a ratio of 80%. According to this, the etching stop phenomenon has occurred. FIG. 4C is an SEM photograph in the case of etching without adding CH 4 . According to this, it can be confirmed that many resist layers remain.

図1に示すエッチング装置1を用いて、上記と同じ条件下で、X線露光された50nmホールパターンをエッチングした。図5は、そのときのSEM写真である。これによれば、エッチングストップ現象を生じることなく、50nmのホールを800nmの深さまでエッチングできた。   Using the etching apparatus 1 shown in FIG. 1, the X-ray exposed 50 nm hole pattern was etched under the same conditions as described above. FIG. 5 is an SEM photograph at that time. According to this, a 50 nm hole could be etched to a depth of 800 nm without causing an etching stop phenomenon.

本発明の低誘電率層間絶縁膜のエッチング方法を実施するエッチング装置を概略的に示す図。The figure which shows roughly the etching apparatus which enforces the etching method of the low dielectric constant interlayer insulation film of this invention. (a)及び(b)は、本発明の方法と従来の方法との相違を模式的に示す図。(A) And (b) is a figure which shows typically the difference with the method of this invention, and the conventional method. 低誘電率層間絶縁膜及びレジストマスクのエッチングレートを示すグラフ。The graph which shows the etching rate of a low dielectric constant interlayer insulation film and a resist mask. 本発明の方法を実施してエッチングをした場合のSEM写真。The SEM photograph at the time of etching by implementing the method of the present invention. 本発明の方法を実施してエッチングをした場合のSEM写真。The SEM photograph at the time of etching by implementing the method of the present invention.

符号の説明Explanation of symbols

1 エッチング装置
11 真空チャンバ
12 プラズマ発生部
13 基板電極部
S 基板
DESCRIPTION OF SYMBOLS 1 Etching apparatus 11 Vacuum chamber 12 Plasma generation part 13 Substrate electrode part S Substrate

Claims (5)

SiOCH或いはSiOC系材料からなる低誘電率層間絶縁膜をエッチングし、配線用のホール、トレンチを微細加工する低誘電率層間絶縁膜のドライエッチング方法において、
過フッ化炭素ガスに、総流量に対して20〜50%の比率でCの数が1〜4のCxHyまたはCの数が1〜3のHFCガスを添加した混合ガスをエッチングガスとし、1Pa以下の作動圧力下でこのエッチングガスを導入してエッチングすることを特徴とする低誘電率層間絶縁膜のドライエッチング方法。
In a dry etching method of a low dielectric constant interlayer insulating film in which a low dielectric constant interlayer insulating film made of a SiOCH or SiOC-based material is etched to finely process wiring holes and trenches,
Etching gas is a mixed gas obtained by adding CxHy having 1 to 4 C atoms or HFC gas having 1 to 3 carbon atoms to a perfluorocarbon gas at a ratio of 20 to 50% with respect to the total flow rate. A dry etching method for a low dielectric constant interlayer insulating film, which comprises etching by introducing this etching gas under the following operating pressure.
前記HFCガスとして、CHCHF、CHの少なくとも一方を選択することを特徴とする請求項1記載の低誘電率層間絶縁膜のドライエッチング方法。 2. The method for dry etching a low dielectric constant interlayer insulating film according to claim 1, wherein at least one of CH 3 CHF 2 and CH 2 F 2 is selected as the HFC gas. 前記CxHyガスとして、CHガス、Cガスの少なくとも一方を選択することを特徴とする請求項1または請求項2記載の低誘電率層間絶縁膜のドライエッチング方法。 Examples CxHy gas, CH 4 gas, C 2 H 6 claim 1 or claim 2 low dielectric constant dry etching method of the interlayer insulating film, wherein the selecting at least one of the gas. 前記混合ガスに希ガスを添加することを特徴とする請求項1乃至請求項3のいずれか1項に記載の低誘電率層間絶縁膜のドライエッチング方法。 The dry etching method for a low dielectric constant interlayer insulating film according to any one of claims 1 to 3, wherein a rare gas is added to the mixed gas. 前記過フッ化ガスを、C、C、C、及びCから選択することを特徴とする請求項1乃至請求項4のいずれか1項に記載の低誘電率層間絶縁膜のドライエッチング方法。
Said perfluorinated gas, C 2 F 6, C 3 F 8, C 4 F 8, and C 5 claims 1 to 4, characterized in that selected from F 8 according to any one A dry etching method for a low dielectric constant interlayer insulating film.
JP2003271060A 2003-07-04 2003-07-04 Dry etching method for low dielectric constant interlayer insulating film Expired - Fee Related JP4144795B2 (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006278517A (en) * 2005-03-28 2006-10-12 Tokyo Electron Ltd Plasma etching method, plasma etching apparatus, control program, and computer storage medium
KR100737009B1 (en) * 2005-12-13 2007-07-09 현대자동차주식회사 Reaction Force Control System of Steer-by-Wire System Using Passive Damper and Damping Compensation Control and Its Method
US8927436B2 (en) 2012-01-18 2015-01-06 Samsung Display Co., Ltd. Thin film transistor and method of manufacturing trench, metal wire, and thin film transistor array panel
JP2018195846A (en) * 2018-08-08 2018-12-06 東京エレクトロン株式会社 Etching apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006278517A (en) * 2005-03-28 2006-10-12 Tokyo Electron Ltd Plasma etching method, plasma etching apparatus, control program, and computer storage medium
KR100737009B1 (en) * 2005-12-13 2007-07-09 현대자동차주식회사 Reaction Force Control System of Steer-by-Wire System Using Passive Damper and Damping Compensation Control and Its Method
US8927436B2 (en) 2012-01-18 2015-01-06 Samsung Display Co., Ltd. Thin film transistor and method of manufacturing trench, metal wire, and thin film transistor array panel
JP2018195846A (en) * 2018-08-08 2018-12-06 東京エレクトロン株式会社 Etching apparatus

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